xref: /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
1  //===-- PPCMachineFunctionInfo.h - Private data used for PowerPC --*- C++ -*-=//
2  //
3  // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4  // See https://llvm.org/LICENSE.txt for license information.
5  // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6  //
7  //===----------------------------------------------------------------------===//
8  //
9  // This file declares the PowerPC specific subclass of MachineFunctionInfo.
10  //
11  //===----------------------------------------------------------------------===//
12  
13  #ifndef LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
14  #define LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
15  
16  #include "llvm/ADT/SmallVector.h"
17  #include "llvm/CodeGen/MachineFunction.h"
18  #include "llvm/CodeGen/TargetCallingConv.h"
19  
20  namespace llvm {
21  
22  /// PPCFunctionInfo - This class is derived from MachineFunction private
23  /// PowerPC target-specific information for each MachineFunction.
24  class PPCFunctionInfo : public MachineFunctionInfo {
25  public:
26    enum ParamType {
27      FixedType,
28      ShortFloatingPoint,
29      LongFloatingPoint,
30      VectorChar,
31      VectorShort,
32      VectorInt,
33      VectorFloat
34    };
35  
36  private:
37    virtual void anchor();
38  
39    /// FramePointerSaveIndex - Frame index of where the old frame pointer is
40    /// stored.  Also used as an anchor for instructions that need to be altered
41    /// when using frame pointers (dyna_add, dyna_sub.)
42    int FramePointerSaveIndex = 0;
43  
44    /// ReturnAddrSaveIndex - Frame index of where the return address is stored.
45    ///
46    int ReturnAddrSaveIndex = 0;
47  
48    /// Frame index where the old base pointer is stored.
49    int BasePointerSaveIndex = 0;
50  
51    /// Frame index where the old PIC base pointer is stored.
52    int PICBasePointerSaveIndex = 0;
53  
54    /// Frame index where the ROP Protection Hash is stored.
55    int ROPProtectionHashSaveIndex = 0;
56  
57    /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current
58    /// function.  This is only valid after the initial scan of the function by
59    /// PEI.
60    bool MustSaveLR = false;
61  
62    /// MustSaveTOC - Indicates that the TOC save needs to be performed in the
63    /// prologue of the function. This is typically the case when there are
64    /// indirect calls in the function and it is more profitable to save the
65    /// TOC pointer in the prologue than in the block(s) containing the call(s).
66    bool MustSaveTOC = false;
67  
68    /// Do we have to disable shrink-wrapping? This has to be set if we emit any
69    /// instructions that clobber LR in the entry block because discovering this
70    /// in PEI is too late (happens after shrink-wrapping);
71    bool ShrinkWrapDisabled = false;
72  
73    /// Does this function have any stack spills.
74    bool HasSpills = false;
75  
76    /// Does this function spill using instructions with only r+r (not r+i)
77    /// forms.
78    bool HasNonRISpills = false;
79  
80    /// SpillsCR - Indicates whether CR is spilled in the current function.
81    bool SpillsCR = false;
82  
83    /// DisableNonVolatileCR - Indicates whether non-volatile CR fields would be
84    /// disabled.
85    bool DisableNonVolatileCR = false;
86  
87    /// LRStoreRequired - The bool indicates whether there is some explicit use of
88    /// the LR/LR8 stack slot that is not obvious from scanning the code.  This
89    /// requires that the code generator produce a store of LR to the stack on
90    /// entry, even though LR may otherwise apparently not be used.
91    bool LRStoreRequired = false;
92  
93    /// This function makes use of the PPC64 ELF TOC base pointer (register r2).
94    bool UsesTOCBasePtr = false;
95  
96    /// MinReservedArea - This is the frame size that is at least reserved in a
97    /// potential caller (parameter+linkage area).
98    unsigned MinReservedArea = 0;
99  
100    /// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum
101    /// amount the stack pointer is adjusted to make the frame bigger for tail
102    /// calls. Used for creating an area before the register spill area.
103    int TailCallSPDelta = 0;
104  
105    /// HasFastCall - Does this function contain a fast call. Used to determine
106    /// how the caller's stack pointer should be calculated (epilog/dynamicalloc).
107    bool HasFastCall = false;
108  
109    /// VarArgsFrameIndex - FrameIndex for start of varargs area.
110    int VarArgsFrameIndex = 0;
111  
112    /// VarArgsStackOffset - StackOffset for start of stack
113    /// arguments.
114  
115    int VarArgsStackOffset = 0;
116  
117    /// VarArgsNumGPR - Index of the first unused integer
118    /// register for parameter passing.
119    unsigned VarArgsNumGPR = 0;
120  
121    /// VarArgsNumFPR - Index of the first unused double
122    /// register for parameter passing.
123    unsigned VarArgsNumFPR = 0;
124  
125    /// FixedParmsNum - The number of fixed parameters.
126    unsigned FixedParmsNum = 0;
127  
128    /// FloatingParmsNum - The number of floating parameters.
129    unsigned FloatingParmsNum = 0;
130  
131    /// VectorParmsNum - The number of vector parameters.
132    unsigned VectorParmsNum = 0;
133  
134    /// ParamtersType - Store all the parameter's type that are saved on
135    /// registers.
136    SmallVector<ParamType, 32> ParamtersType;
137  
138    /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4.
139    int CRSpillFrameIndex = 0;
140  
141    /// If any of CR[2-4] need to be saved in the prologue and restored in the
142    /// epilogue then they are added to this array. This is used for the
143    /// 64-bit SVR4 ABI.
144    SmallVector<Register, 3> MustSaveCRs;
145  
146    /// Whether this uses the PIC Base register or not.
147    bool UsesPICBase = false;
148  
149    /// We keep track attributes for each live-in virtual registers
150    /// to use SExt/ZExt flags in later optimization.
151    std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs;
152  
153    /// Flags for aix-shared-lib-tls-model-opt, will be lazily initialized for
154    /// each function.
155    bool AIXFuncUseTLSIEForLD = false;
156    bool AIXFuncTLSModelOptInitDone = false;
157  
158  public:
159    explicit PPCFunctionInfo(const Function &F, const TargetSubtargetInfo *STI);
160  
161    MachineFunctionInfo *
162    clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
163          const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
164        const override;
165  
getFramePointerSaveIndex()166    int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
setFramePointerSaveIndex(int Idx)167    void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }
168  
getReturnAddrSaveIndex()169    int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; }
setReturnAddrSaveIndex(int idx)170    void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; }
171  
getBasePointerSaveIndex()172    int getBasePointerSaveIndex() const { return BasePointerSaveIndex; }
setBasePointerSaveIndex(int Idx)173    void setBasePointerSaveIndex(int Idx) { BasePointerSaveIndex = Idx; }
174  
getPICBasePointerSaveIndex()175    int getPICBasePointerSaveIndex() const { return PICBasePointerSaveIndex; }
setPICBasePointerSaveIndex(int Idx)176    void setPICBasePointerSaveIndex(int Idx) { PICBasePointerSaveIndex = Idx; }
177  
getROPProtectionHashSaveIndex()178    int getROPProtectionHashSaveIndex() const {
179      return ROPProtectionHashSaveIndex;
180    }
setROPProtectionHashSaveIndex(int Idx)181    void setROPProtectionHashSaveIndex(int Idx) {
182      ROPProtectionHashSaveIndex = Idx;
183    }
184  
getMinReservedArea()185    unsigned getMinReservedArea() const { return MinReservedArea; }
setMinReservedArea(unsigned size)186    void setMinReservedArea(unsigned size) { MinReservedArea = size; }
187  
getTailCallSPDelta()188    int getTailCallSPDelta() const { return TailCallSPDelta; }
setTailCallSPDelta(int size)189    void setTailCallSPDelta(int size) { TailCallSPDelta = size; }
190  
191    /// MustSaveLR - This is set when the prolog/epilog inserter does its initial
192    /// scan of the function. It is true if the LR/LR8 register is ever explicitly
193    /// defined/clobbered in the machine function (e.g. by calls and movpctolr,
194    /// which is used in PIC generation), or if the LR stack slot is explicitly
195    /// referenced by builtin_return_address.
setMustSaveLR(bool U)196    void setMustSaveLR(bool U) { MustSaveLR = U; }
mustSaveLR()197    bool mustSaveLR() const    { return MustSaveLR; }
198  
setMustSaveTOC(bool U)199    void setMustSaveTOC(bool U) { MustSaveTOC = U; }
mustSaveTOC()200    bool mustSaveTOC() const    { return MustSaveTOC; }
201  
202    /// We certainly don't want to shrink wrap functions if we've emitted a
203    /// MovePCtoLR8 as that has to go into the entry, so the prologue definitely
204    /// has to go into the entry block.
setShrinkWrapDisabled(bool U)205    void setShrinkWrapDisabled(bool U) { ShrinkWrapDisabled = U; }
shrinkWrapDisabled()206    bool shrinkWrapDisabled() const { return ShrinkWrapDisabled; }
207  
setHasSpills()208    void setHasSpills()      { HasSpills = true; }
hasSpills()209    bool hasSpills() const   { return HasSpills; }
210  
setHasNonRISpills()211    void setHasNonRISpills()    { HasNonRISpills = true; }
hasNonRISpills()212    bool hasNonRISpills() const { return HasNonRISpills; }
213  
setSpillsCR()214    void setSpillsCR()       { SpillsCR = true; }
isCRSpilled()215    bool isCRSpilled() const { return SpillsCR; }
216  
setDisableNonVolatileCR()217    void setDisableNonVolatileCR() { DisableNonVolatileCR = true; }
isNonVolatileCRDisabled()218    bool isNonVolatileCRDisabled() const { return DisableNonVolatileCR; }
219  
setLRStoreRequired()220    void setLRStoreRequired() { LRStoreRequired = true; }
isLRStoreRequired()221    bool isLRStoreRequired() const { return LRStoreRequired; }
222  
setUsesTOCBasePtr()223    void setUsesTOCBasePtr()    { UsesTOCBasePtr = true; }
usesTOCBasePtr()224    bool usesTOCBasePtr() const { return UsesTOCBasePtr; }
225  
setHasFastCall()226    void setHasFastCall() { HasFastCall = true; }
hasFastCall()227    bool hasFastCall() const { return HasFastCall;}
228  
setAIXFuncTLSModelOptInitDone()229    void setAIXFuncTLSModelOptInitDone() { AIXFuncTLSModelOptInitDone = true; }
isAIXFuncTLSModelOptInitDone()230    bool isAIXFuncTLSModelOptInitDone() const {
231      return AIXFuncTLSModelOptInitDone;
232    }
setAIXFuncUseTLSIEForLD()233    void setAIXFuncUseTLSIEForLD() { AIXFuncUseTLSIEForLD = true; }
isAIXFuncUseTLSIEForLD()234    bool isAIXFuncUseTLSIEForLD() const { return AIXFuncUseTLSIEForLD; }
235  
getVarArgsFrameIndex()236    int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
setVarArgsFrameIndex(int Index)237    void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
238  
getVarArgsStackOffset()239    int getVarArgsStackOffset() const { return VarArgsStackOffset; }
setVarArgsStackOffset(int Offset)240    void setVarArgsStackOffset(int Offset) { VarArgsStackOffset = Offset; }
241  
getVarArgsNumGPR()242    unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; }
setVarArgsNumGPR(unsigned Num)243    void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; }
244  
getFixedParmsNum()245    unsigned getFixedParmsNum() const { return FixedParmsNum; }
getFloatingPointParmsNum()246    unsigned getFloatingPointParmsNum() const { return FloatingParmsNum; }
getVectorParmsNum()247    unsigned getVectorParmsNum() const { return VectorParmsNum; }
hasVectorParms()248    bool hasVectorParms() const { return VectorParmsNum != 0; }
249  
250    uint32_t getParmsType() const;
251  
252    uint32_t getVecExtParmsType() const;
253  
254    void appendParameterType(ParamType Type);
255  
getVarArgsNumFPR()256    unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; }
setVarArgsNumFPR(unsigned Num)257    void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; }
258  
259    /// This function associates attributes for each live-in virtual register.
addLiveInAttr(Register VReg,ISD::ArgFlagsTy Flags)260    void addLiveInAttr(Register VReg, ISD::ArgFlagsTy Flags) {
261      LiveInAttrs.push_back(std::make_pair(VReg, Flags));
262    }
263  
264    /// This function returns true if the specified vreg is
265    /// a live-in register and sign-extended.
266    bool isLiveInSExt(Register VReg) const;
267  
268    /// This function returns true if the specified vreg is
269    /// a live-in register and zero-extended.
270    bool isLiveInZExt(Register VReg) const;
271  
getCRSpillFrameIndex()272    int getCRSpillFrameIndex() const { return CRSpillFrameIndex; }
setCRSpillFrameIndex(int idx)273    void setCRSpillFrameIndex(int idx) { CRSpillFrameIndex = idx; }
274  
275    const SmallVectorImpl<Register> &
getMustSaveCRs()276      getMustSaveCRs() const { return MustSaveCRs; }
addMustSaveCR(Register Reg)277    void addMustSaveCR(Register Reg) { MustSaveCRs.push_back(Reg); }
278  
setUsesPICBase(bool uses)279    void setUsesPICBase(bool uses) { UsesPICBase = uses; }
usesPICBase()280    bool usesPICBase() const { return UsesPICBase; }
281  
282    MCSymbol *getPICOffsetSymbol(MachineFunction &MF) const;
283  
284    MCSymbol *getGlobalEPSymbol(MachineFunction &MF) const;
285    MCSymbol *getLocalEPSymbol(MachineFunction &MF) const;
286    MCSymbol *getTOCOffsetSymbol(MachineFunction &MF) const;
287  };
288  
289  } // end namespace llvm
290  
291  #endif // LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
292