xref: /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
1 //=- LoongArchMachineFunctionInfo.h - LoongArch machine function info -----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares LoongArch-specific per-machine-function information.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
14 #define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
15 
16 #include "LoongArchSubtarget.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 
20 namespace llvm {
21 
22 /// LoongArchMachineFunctionInfo - This class is derived from
23 /// MachineFunctionInfo and contains private LoongArch-specific information for
24 /// each MachineFunction.
25 class LoongArchMachineFunctionInfo : public MachineFunctionInfo {
26 private:
27   /// FrameIndex for start of varargs area
28   int VarArgsFrameIndex = 0;
29   /// Size of the save area used for varargs
30   int VarArgsSaveSize = 0;
31 
32   /// Size of stack frame to save callee saved registers
33   unsigned CalleeSavedStackSize = 0;
34 
35   /// FrameIndex of the spill slot when there is no scavenged register in
36   /// insertIndirectBranch.
37   int BranchRelaxationSpillFrameIndex = -1;
38 
39   /// Registers that have been sign extended from i32.
40   SmallVector<Register, 8> SExt32Registers;
41 
42 public:
LoongArchMachineFunctionInfo(const Function & F,const TargetSubtargetInfo * STI)43   LoongArchMachineFunctionInfo(const Function &F,
44                                const TargetSubtargetInfo *STI) {}
45 
46   MachineFunctionInfo *
clone(BumpPtrAllocator & Allocator,MachineFunction & DestMF,const DenseMap<MachineBasicBlock *,MachineBasicBlock * > & Src2DstMBB)47   clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
48         const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
49       const override {
50     return DestMF.cloneInfo<LoongArchMachineFunctionInfo>(*this);
51   }
52 
getVarArgsFrameIndex()53   int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
setVarArgsFrameIndex(int Index)54   void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
55 
getVarArgsSaveSize()56   unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; }
setVarArgsSaveSize(int Size)57   void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; }
58 
getCalleeSavedStackSize()59   unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
setCalleeSavedStackSize(unsigned Size)60   void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
61 
getBranchRelaxationSpillFrameIndex()62   int getBranchRelaxationSpillFrameIndex() {
63     return BranchRelaxationSpillFrameIndex;
64   }
setBranchRelaxationSpillFrameIndex(int Index)65   void setBranchRelaxationSpillFrameIndex(int Index) {
66     BranchRelaxationSpillFrameIndex = Index;
67   }
68 
addSExt32Register(Register Reg)69   void addSExt32Register(Register Reg) { SExt32Registers.push_back(Reg); }
70 
isSExt32Register(Register Reg)71   bool isSExt32Register(Register Reg) const {
72     return is_contained(SExt32Registers, Reg);
73   }
74 };
75 
76 } // end namespace llvm
77 
78 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
79