1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2016 Qualcomm Atheros, Inc. All rights reserved. 4 * Copyright (c) 2015 The Linux Foundation. All rights reserved. 5 */ 6 7 #ifndef _AHB_H_ 8 #define _AHB_H_ 9 10 #include <linux/platform_device.h> 11 12 struct ath10k_ahb { 13 struct platform_device *pdev; 14 void __iomem *mem; 15 unsigned long mem_len; 16 void __iomem *gcc_mem; 17 void __iomem *tcsr_mem; 18 19 int irq; 20 21 struct clk *cmd_clk; 22 struct clk *ref_clk; 23 struct clk *rtc_clk; 24 25 struct reset_control *core_cold_rst; 26 struct reset_control *radio_cold_rst; 27 struct reset_control *radio_warm_rst; 28 struct reset_control *radio_srif_rst; 29 struct reset_control *cpu_init_rst; 30 }; 31 32 #ifdef CONFIG_ATH10K_AHB 33 34 #define ATH10K_GCC_REG_BASE 0x1800000 35 #define ATH10K_GCC_REG_SIZE 0x60000 36 37 #define ATH10K_TCSR_REG_BASE 0x1900000 38 #define ATH10K_TCSR_REG_SIZE 0x80000 39 40 #define ATH10K_AHB_GCC_FEPLL_PLL_DIV 0x2f020 41 #define ATH10K_AHB_WIFI_SCRATCH_5_REG 0x4f014 42 43 #define ATH10K_AHB_WLAN_CORE_ID_REG 0x82030 44 45 #define ATH10K_AHB_TCSR_WIFI0_GLB_CFG 0x49000 46 #define ATH10K_AHB_TCSR_WIFI1_GLB_CFG 0x49004 47 #define TCSR_WIFIX_GLB_CFG_DISABLE_CORE_CLK BIT(25) 48 49 #define ATH10K_AHB_TCSR_WCSS0_HALTREQ 0x52000 50 #define ATH10K_AHB_TCSR_WCSS1_HALTREQ 0x52010 51 #define ATH10K_AHB_TCSR_WCSS0_HALTACK 0x52004 52 #define ATH10K_AHB_TCSR_WCSS1_HALTACK 0x52014 53 54 #define ATH10K_AHB_AXI_BUS_HALT_TIMEOUT 10 /* msec */ 55 #define AHB_AXI_BUS_HALT_REQ 1 56 #define AHB_AXI_BUS_HALT_ACK 1 57 58 #define ATH10K_AHB_CORE_CTRL_CPU_INTR_MASK 1 59 60 int ath10k_ahb_init(void); 61 void ath10k_ahb_exit(void); 62 63 #else /* CONFIG_ATH10K_AHB */ 64 ath10k_ahb_init(void)65 static inline int ath10k_ahb_init(void) 66 { 67 return 0; 68 } 69 ath10k_ahb_exit(void)70 static inline void ath10k_ahb_exit(void) 71 { 72 } 73 74 #endif /* CONFIG_ATH10K_AHB */ 75 76 #endif /* _AHB_H_ */ 77