xref: /linux/drivers/net/ethernet/meta/fbnic/fbnic.h (revision 85502b2214d50ba0ddf2a5fb454e4d28a160d175)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3 
4 #ifndef _FBNIC_H_
5 #define _FBNIC_H_
6 
7 #include <linux/interrupt.h>
8 #include <linux/io.h>
9 #include <linux/ptp_clock_kernel.h>
10 #include <linux/types.h>
11 #include <linux/workqueue.h>
12 
13 #include "fbnic_csr.h"
14 #include "fbnic_fw.h"
15 #include "fbnic_hw_stats.h"
16 #include "fbnic_mac.h"
17 #include "fbnic_rpc.h"
18 
19 struct fbnic_napi_vector;
20 
21 #define FBNIC_MAX_NAPI_VECTORS		128u
22 #define FBNIC_MBX_CMPL_SLOTS		4
23 
24 struct fbnic_dev {
25 	struct device *dev;
26 	struct net_device *netdev;
27 	struct dentry *dbg_fbd;
28 	struct device *hwmon;
29 
30 	u32 __iomem *uc_addr0;
31 	u32 __iomem *uc_addr4;
32 	const struct fbnic_mac *mac;
33 	unsigned int fw_msix_vector;
34 	unsigned int pcs_msix_vector;
35 	unsigned short num_irqs;
36 
37 	struct {
38 		u8 users;
39 		char name[IFNAMSIZ + 9];
40 	} napi_irq[FBNIC_MAX_NAPI_VECTORS];
41 
42 	struct delayed_work service_task;
43 
44 	struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES];
45 	struct fbnic_fw_cap fw_cap;
46 	struct fbnic_fw_completion *cmpl_data[FBNIC_MBX_CMPL_SLOTS];
47 	/* Lock protecting Tx Mailbox queue to prevent possible races */
48 	spinlock_t fw_tx_lock;
49 
50 	unsigned long last_heartbeat_request;
51 	unsigned long last_heartbeat_response;
52 	u8 fw_heartbeat_enabled;
53 
54 	u64 dsn;
55 	u32 mps;
56 	u32 readrq;
57 
58 	/* Local copy of the devices TCAM */
59 	struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES];
60 	struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES];
61 	u8 mac_addr_boundary;
62 	u8 tce_tcam_last;
63 
64 	/* IP TCAM */
65 	struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
66 	struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
67 	struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
68 	struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
69 
70 	/* Number of TCQs/RCQs available on hardware */
71 	u16 max_num_queues;
72 
73 	/* Lock protecting writes to @time_high, @time_offset of fbnic_netdev,
74 	 * and the HW time CSR machinery.
75 	 */
76 	spinlock_t time_lock;
77 	/* Externally accessible PTP clock, may be NULL */
78 	struct ptp_clock *ptp;
79 	struct ptp_clock_info ptp_info;
80 	/* Last @time_high refresh time in jiffies (to catch stalls) */
81 	unsigned long last_read;
82 
83 	/* Local copy of hardware statistics */
84 	struct fbnic_hw_stats hw_stats;
85 
86 	/* Lock protecting access to hw_stats */
87 	spinlock_t hw_stats_lock;
88 };
89 
90 /* Reserve entry 0 in the MSI-X "others" array until we have filled all
91  * 32 of the possible interrupt slots. By doing this we can avoid any
92  * potential conflicts should we need to enable one of the debug interrupt
93  * causes later.
94  */
95 enum {
96 	FBNIC_FW_MSIX_ENTRY,
97 	FBNIC_PCS_MSIX_ENTRY,
98 	FBNIC_NON_NAPI_VECTORS
99 };
100 
fbnic_present(struct fbnic_dev * fbd)101 static inline bool fbnic_present(struct fbnic_dev *fbd)
102 {
103 	return !!READ_ONCE(fbd->uc_addr0);
104 }
105 
fbnic_wr32(struct fbnic_dev * fbd,u32 reg,u32 val)106 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val)
107 {
108 	u32 __iomem *csr = READ_ONCE(fbd->uc_addr0);
109 
110 	if (csr)
111 		writel(val, csr + reg);
112 }
113 
114 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg);
115 
fbnic_wrfl(struct fbnic_dev * fbd)116 static inline void fbnic_wrfl(struct fbnic_dev *fbd)
117 {
118 	fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0);
119 }
120 
121 static inline void
fbnic_rmw32(struct fbnic_dev * fbd,u32 reg,u32 mask,u32 val)122 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val)
123 {
124 	u32 v;
125 
126 	v = fbnic_rd32(fbd, reg);
127 	v &= ~mask;
128 	v |= val;
129 	fbnic_wr32(fbd, reg, v);
130 }
131 
132 #define wr32(_f, _r, _v)	fbnic_wr32(_f, _r, _v)
133 #define rd32(_f, _r)		fbnic_rd32(_f, _r)
134 #define wrfl(_f)		fbnic_wrfl(_f)
135 
136 bool fbnic_fw_present(struct fbnic_dev *fbd);
137 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg);
138 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val);
139 
140 #define fw_rd32(_f, _r)		fbnic_fw_rd32(_f, _r)
141 #define fw_wr32(_f, _r, _v)	fbnic_fw_wr32(_f, _r, _v)
142 #define fw_wrfl(_f)		fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG)
143 
fbnic_bmc_present(struct fbnic_dev * fbd)144 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd)
145 {
146 	return fbd->fw_cap.bmc_present;
147 }
148 
fbnic_init_failure(struct fbnic_dev * fbd)149 static inline bool fbnic_init_failure(struct fbnic_dev *fbd)
150 {
151 	return !fbd->netdev;
152 }
153 
154 extern char fbnic_driver_name[];
155 
156 void fbnic_devlink_free(struct fbnic_dev *fbd);
157 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev);
158 void fbnic_devlink_register(struct fbnic_dev *fbd);
159 void fbnic_devlink_unregister(struct fbnic_dev *fbd);
160 
161 int fbnic_fw_request_mbx(struct fbnic_dev *fbd);
162 void fbnic_fw_free_mbx(struct fbnic_dev *fbd);
163 
164 void fbnic_hwmon_register(struct fbnic_dev *fbd);
165 void fbnic_hwmon_unregister(struct fbnic_dev *fbd);
166 
167 int fbnic_pcs_request_irq(struct fbnic_dev *fbd);
168 void fbnic_pcs_free_irq(struct fbnic_dev *fbd);
169 
170 void fbnic_napi_name_irqs(struct fbnic_dev *fbd);
171 int fbnic_napi_request_irq(struct fbnic_dev *fbd,
172 			   struct fbnic_napi_vector *nv);
173 void fbnic_napi_free_irq(struct fbnic_dev *fbd,
174 			 struct fbnic_napi_vector *nv);
175 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr);
176 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler,
177 		      unsigned long flags, const char *name, void *data);
178 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data);
179 void fbnic_free_irqs(struct fbnic_dev *fbd);
180 int fbnic_alloc_irqs(struct fbnic_dev *fbd);
181 
182 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,
183 				 const size_t str_sz);
184 
185 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd);
186 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd);
187 void fbnic_dbg_init(void);
188 void fbnic_dbg_exit(void);
189 
190 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version);
191 int fbnic_csr_regs_len(struct fbnic_dev *fbd);
192 
193 void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm);
194 void fbnic_config_rx_frames(struct fbnic_napi_vector *nv);
195 
196 enum fbnic_boards {
197 	fbnic_board_asic
198 };
199 
200 struct fbnic_info {
201 	unsigned int max_num_queues;
202 	unsigned int bar_mask;
203 };
204 
205 #endif /* _FBNIC_H_ */
206