xref: /linux/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c (revision e70140ba0d2b1a30467d4af6bcfe761327b9ec95)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2015 Freescale Semiconductor, Inc.
4  *
5  * Freescale DCU drm device driver
6  */
7 
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
10 #include <linux/console.h>
11 #include <linux/io.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/mm.h>
14 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_client_setup.h>
23 #include <drm/drm_drv.h>
24 #include <drm/drm_fbdev_dma.h>
25 #include <drm/drm_gem_dma_helper.h>
26 #include <drm/drm_modeset_helper.h>
27 #include <drm/drm_module.h>
28 #include <drm/drm_probe_helper.h>
29 #include <drm/drm_vblank.h>
30 
31 #include "fsl_dcu_drm_crtc.h"
32 #include "fsl_dcu_drm_drv.h"
33 #include "fsl_tcon.h"
34 
35 static int legacyfb_depth = 24;
36 module_param(legacyfb_depth, int, 0444);
37 
fsl_dcu_drm_is_volatile_reg(struct device * dev,unsigned int reg)38 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
39 {
40 	if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
41 		return true;
42 
43 	return false;
44 }
45 
46 static const struct regmap_config fsl_dcu_regmap_config = {
47 	.reg_bits = 32,
48 	.reg_stride = 4,
49 	.val_bits = 32,
50 
51 	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
52 };
53 
fsl_dcu_irq_reset(struct drm_device * dev)54 static void fsl_dcu_irq_reset(struct drm_device *dev)
55 {
56 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
57 
58 	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
59 	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
60 }
61 
fsl_dcu_drm_irq(int irq,void * arg)62 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
63 {
64 	struct drm_device *dev = arg;
65 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
66 	unsigned int int_status;
67 	int ret;
68 
69 	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
70 	if (ret) {
71 		dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
72 		return IRQ_NONE;
73 	}
74 
75 	if (int_status & DCU_INT_STATUS_VBLANK)
76 		drm_handle_vblank(dev, 0);
77 
78 	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
79 
80 	return IRQ_HANDLED;
81 }
82 
fsl_dcu_irq_install(struct drm_device * dev,unsigned int irq)83 static int fsl_dcu_irq_install(struct drm_device *dev, unsigned int irq)
84 {
85 	if (irq == IRQ_NOTCONNECTED)
86 		return -ENOTCONN;
87 
88 	fsl_dcu_irq_reset(dev);
89 
90 	return request_irq(irq, fsl_dcu_drm_irq, 0, dev->driver->name, dev);
91 }
92 
fsl_dcu_irq_uninstall(struct drm_device * dev)93 static void fsl_dcu_irq_uninstall(struct drm_device *dev)
94 {
95 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
96 
97 	fsl_dcu_irq_reset(dev);
98 	free_irq(fsl_dev->irq, dev);
99 }
100 
fsl_dcu_load(struct drm_device * dev,unsigned long flags)101 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
102 {
103 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
104 	struct regmap *scfg;
105 	int ret;
106 
107 	ret = fsl_dcu_drm_modeset_init(fsl_dev);
108 	if (ret < 0)
109 		return dev_err_probe(dev->dev, ret, "failed to initialize mode setting\n");
110 
111 	scfg = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg");
112 	if (PTR_ERR(scfg) != -ENODEV) {
113 		/*
114 		 * For simplicity, enable the PIXCLK unconditionally,
115 		 * resulting in increased power consumption. Disabling
116 		 * the clock in PM or on unload could be implemented as
117 		 * a future improvement.
118 		 */
119 		ret = regmap_update_bits(scfg, SCFG_PIXCLKCR, SCFG_PIXCLKCR_PXCEN,
120 					 SCFG_PIXCLKCR_PXCEN);
121 		if (ret < 0)
122 			return dev_err_probe(dev->dev, ret, "failed to enable pixclk\n");
123 	}
124 
125 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
126 	if (ret < 0) {
127 		dev_err(dev->dev, "failed to initialize vblank\n");
128 		goto done_vblank;
129 	}
130 
131 	ret = fsl_dcu_irq_install(dev, fsl_dev->irq);
132 	if (ret < 0) {
133 		dev_err(dev->dev, "failed to install IRQ handler\n");
134 		goto done_irq;
135 	}
136 
137 	if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
138 	    legacyfb_depth != 32) {
139 		dev_warn(dev->dev,
140 			"Invalid legacyfb_depth.  Defaulting to 24bpp\n");
141 		legacyfb_depth = 24;
142 	}
143 
144 	return 0;
145 done_irq:
146 	drm_kms_helper_poll_fini(dev);
147 
148 	drm_mode_config_cleanup(dev);
149 done_vblank:
150 	dev->dev_private = NULL;
151 
152 	return ret;
153 }
154 
fsl_dcu_unload(struct drm_device * dev)155 static void fsl_dcu_unload(struct drm_device *dev)
156 {
157 	drm_atomic_helper_shutdown(dev);
158 	drm_kms_helper_poll_fini(dev);
159 
160 	drm_mode_config_cleanup(dev);
161 	fsl_dcu_irq_uninstall(dev);
162 
163 	dev->dev_private = NULL;
164 }
165 
166 DEFINE_DRM_GEM_DMA_FOPS(fsl_dcu_drm_fops);
167 
168 static const struct drm_driver fsl_dcu_drm_driver = {
169 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
170 	.load			= fsl_dcu_load,
171 	.unload			= fsl_dcu_unload,
172 	DRM_GEM_DMA_DRIVER_OPS,
173 	DRM_FBDEV_DMA_DRIVER_OPS,
174 	.fops			= &fsl_dcu_drm_fops,
175 	.name			= "fsl-dcu-drm",
176 	.desc			= "Freescale DCU DRM",
177 	.date			= "20160425",
178 	.major			= 1,
179 	.minor			= 1,
180 };
181 
182 #ifdef CONFIG_PM_SLEEP
fsl_dcu_drm_pm_suspend(struct device * dev)183 static int fsl_dcu_drm_pm_suspend(struct device *dev)
184 {
185 	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
186 	int ret;
187 
188 	if (!fsl_dev)
189 		return 0;
190 
191 	disable_irq(fsl_dev->irq);
192 
193 	ret = drm_mode_config_helper_suspend(fsl_dev->drm);
194 	if (ret) {
195 		enable_irq(fsl_dev->irq);
196 		return ret;
197 	}
198 
199 	clk_disable_unprepare(fsl_dev->clk);
200 
201 	return 0;
202 }
203 
fsl_dcu_drm_pm_resume(struct device * dev)204 static int fsl_dcu_drm_pm_resume(struct device *dev)
205 {
206 	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
207 	int ret;
208 
209 	if (!fsl_dev)
210 		return 0;
211 
212 	ret = clk_prepare_enable(fsl_dev->clk);
213 	if (ret < 0) {
214 		dev_err(dev, "failed to enable dcu clk\n");
215 		return ret;
216 	}
217 
218 	if (fsl_dev->tcon)
219 		fsl_tcon_bypass_enable(fsl_dev->tcon);
220 	fsl_dcu_drm_init_planes(fsl_dev->drm);
221 	enable_irq(fsl_dev->irq);
222 
223 	drm_mode_config_helper_resume(fsl_dev->drm);
224 
225 	return 0;
226 }
227 #endif
228 
229 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
230 	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
231 };
232 
233 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
234 	.name = "ls1021a",
235 	.total_layer = 16,
236 	.max_layer = 4,
237 	.layer_regs = LS1021A_LAYER_REG_NUM,
238 };
239 
240 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
241 	.name = "vf610",
242 	.total_layer = 64,
243 	.max_layer = 6,
244 	.layer_regs = VF610_LAYER_REG_NUM,
245 };
246 
247 static const struct of_device_id fsl_dcu_of_match[] = {
248 	{
249 		.compatible = "fsl,ls1021a-dcu",
250 		.data = &fsl_dcu_ls1021a_data,
251 	}, {
252 		.compatible = "fsl,vf610-dcu",
253 		.data = &fsl_dcu_vf610_data,
254 	}, {
255 	},
256 };
257 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
258 
fsl_dcu_drm_probe(struct platform_device * pdev)259 static int fsl_dcu_drm_probe(struct platform_device *pdev)
260 {
261 	struct fsl_dcu_drm_device *fsl_dev;
262 	struct drm_device *drm;
263 	struct device *dev = &pdev->dev;
264 	struct resource *res;
265 	void __iomem *base;
266 	struct clk *pix_clk_in;
267 	char pix_clk_name[32];
268 	const char *pix_clk_in_name;
269 	const struct of_device_id *id;
270 	int ret;
271 	u8 div_ratio_shift = 0;
272 
273 	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
274 	if (!fsl_dev)
275 		return -ENOMEM;
276 
277 	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
278 	if (!id)
279 		return -ENODEV;
280 	fsl_dev->soc = id->data;
281 
282 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
283 	base = devm_ioremap_resource(dev, res);
284 	if (IS_ERR(base)) {
285 		ret = PTR_ERR(base);
286 		return ret;
287 	}
288 
289 	fsl_dev->irq = platform_get_irq(pdev, 0);
290 	if (fsl_dev->irq < 0)
291 		return fsl_dev->irq;
292 
293 	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
294 			&fsl_dcu_regmap_config);
295 	if (IS_ERR(fsl_dev->regmap)) {
296 		dev_err(dev, "regmap init failed\n");
297 		return PTR_ERR(fsl_dev->regmap);
298 	}
299 
300 	fsl_dev->clk = devm_clk_get(dev, "dcu");
301 	if (IS_ERR(fsl_dev->clk)) {
302 		dev_err(dev, "failed to get dcu clock\n");
303 		return PTR_ERR(fsl_dev->clk);
304 	}
305 	ret = clk_prepare_enable(fsl_dev->clk);
306 	if (ret < 0) {
307 		dev_err(dev, "failed to enable dcu clk\n");
308 		return ret;
309 	}
310 
311 	pix_clk_in = devm_clk_get(dev, "pix");
312 	if (IS_ERR(pix_clk_in)) {
313 		/* legancy binding, use dcu clock as pixel clock input */
314 		pix_clk_in = fsl_dev->clk;
315 	}
316 
317 	if (of_property_read_bool(dev->of_node, "big-endian"))
318 		div_ratio_shift = 24;
319 
320 	pix_clk_in_name = __clk_get_name(pix_clk_in);
321 	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
322 	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
323 			pix_clk_in_name, 0, base + DCU_DIV_RATIO,
324 			div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
325 	if (IS_ERR(fsl_dev->pix_clk)) {
326 		dev_err(dev, "failed to register pix clk\n");
327 		ret = PTR_ERR(fsl_dev->pix_clk);
328 		goto disable_clk;
329 	}
330 
331 	fsl_dev->tcon = fsl_tcon_init(dev);
332 
333 	drm = drm_dev_alloc(&fsl_dcu_drm_driver, dev);
334 	if (IS_ERR(drm)) {
335 		ret = PTR_ERR(drm);
336 		goto unregister_pix_clk;
337 	}
338 
339 	fsl_dev->dev = dev;
340 	fsl_dev->drm = drm;
341 	fsl_dev->np = dev->of_node;
342 	drm->dev_private = fsl_dev;
343 	dev_set_drvdata(dev, fsl_dev);
344 
345 	ret = drm_dev_register(drm, 0);
346 	if (ret < 0)
347 		goto put;
348 
349 	drm_client_setup_with_color_mode(drm, legacyfb_depth);
350 
351 	return 0;
352 
353 put:
354 	drm_dev_put(drm);
355 unregister_pix_clk:
356 	clk_unregister(fsl_dev->pix_clk);
357 disable_clk:
358 	clk_disable_unprepare(fsl_dev->clk);
359 	return ret;
360 }
361 
fsl_dcu_drm_remove(struct platform_device * pdev)362 static void fsl_dcu_drm_remove(struct platform_device *pdev)
363 {
364 	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
365 
366 	drm_dev_unregister(fsl_dev->drm);
367 	drm_dev_put(fsl_dev->drm);
368 	clk_disable_unprepare(fsl_dev->clk);
369 	clk_unregister(fsl_dev->pix_clk);
370 }
371 
fsl_dcu_drm_shutdown(struct platform_device * pdev)372 static void fsl_dcu_drm_shutdown(struct platform_device *pdev)
373 {
374 	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
375 
376 	drm_atomic_helper_shutdown(fsl_dev->drm);
377 }
378 
379 static struct platform_driver fsl_dcu_drm_platform_driver = {
380 	.probe		= fsl_dcu_drm_probe,
381 	.remove		= fsl_dcu_drm_remove,
382 	.shutdown	= fsl_dcu_drm_shutdown,
383 	.driver		= {
384 		.name	= "fsl-dcu",
385 		.pm	= &fsl_dcu_drm_pm_ops,
386 		.of_match_table = fsl_dcu_of_match,
387 	},
388 };
389 
390 drm_module_platform_driver(fsl_dcu_drm_platform_driver);
391 
392 MODULE_DESCRIPTION("Freescale DCU DRM Driver");
393 MODULE_LICENSE("GPL");
394