1 /*
2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #include <linux/vmalloc.h>
35 #include <linux/count_zeros.h>
36 #include <rdma/ib_umem.h>
37 #include <linux/math.h>
38 #include "hns_roce_device.h"
39 #include "hns_roce_cmd.h"
40 #include "hns_roce_hem.h"
41 #include "hns_roce_trace.h"
42
hw_index_to_key(int ind)43 static u32 hw_index_to_key(int ind)
44 {
45 return ((u32)ind >> 24) | ((u32)ind << 8);
46 }
47
key_to_hw_index(u32 key)48 unsigned long key_to_hw_index(u32 key)
49 {
50 return (key << 24) | (key >> 8);
51 }
52
alloc_mr_key(struct hns_roce_dev * hr_dev,struct hns_roce_mr * mr)53 static int alloc_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
54 {
55 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
56 struct ib_device *ibdev = &hr_dev->ib_dev;
57 int err;
58 int id;
59
60 /* Allocate a key for mr from mr_table */
61 id = ida_alloc_range(&mtpt_ida->ida, mtpt_ida->min, mtpt_ida->max,
62 GFP_KERNEL);
63 if (id < 0) {
64 ibdev_err(ibdev, "failed to alloc id for MR key, id(%d)\n", id);
65 return -ENOMEM;
66 }
67
68 mr->key = hw_index_to_key(id); /* MR key */
69
70 err = hns_roce_table_get(hr_dev, &hr_dev->mr_table.mtpt_table,
71 (unsigned long)id);
72 if (err) {
73 ibdev_err(ibdev, "failed to alloc mtpt, ret = %d.\n", err);
74 goto err_free_bitmap;
75 }
76
77 return 0;
78 err_free_bitmap:
79 ida_free(&mtpt_ida->ida, id);
80 return err;
81 }
82
free_mr_key(struct hns_roce_dev * hr_dev,struct hns_roce_mr * mr)83 static void free_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
84 {
85 unsigned long obj = key_to_hw_index(mr->key);
86
87 hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table, obj);
88 ida_free(&hr_dev->mr_table.mtpt_ida.ida, (int)obj);
89 }
90
alloc_mr_pbl(struct hns_roce_dev * hr_dev,struct hns_roce_mr * mr,struct ib_udata * udata,u64 start)91 static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr,
92 struct ib_udata *udata, u64 start)
93 {
94 struct ib_device *ibdev = &hr_dev->ib_dev;
95 bool is_fast = mr->type == MR_TYPE_FRMR;
96 struct hns_roce_buf_attr buf_attr = {};
97 int err;
98
99 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num;
100 buf_attr.page_shift = is_fast ? PAGE_SHIFT :
101 hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT;
102 buf_attr.region[0].size = mr->size;
103 buf_attr.region[0].hopnum = mr->pbl_hop_num;
104 buf_attr.region_count = 1;
105 buf_attr.user_access = mr->access;
106 /* fast MR's buffer is alloced before mapping, not at creation */
107 buf_attr.mtt_only = is_fast;
108 buf_attr.iova = mr->iova;
109 /* pagesize and hopnum is fixed for fast MR */
110 buf_attr.adaptive = !is_fast;
111 buf_attr.type = MTR_PBL;
112
113 err = hns_roce_mtr_create(hr_dev, &mr->pbl_mtr, &buf_attr,
114 hr_dev->caps.pbl_ba_pg_sz + PAGE_SHIFT,
115 udata, start);
116 if (err) {
117 ibdev_err(ibdev, "failed to alloc pbl mtr, ret = %d.\n", err);
118 return err;
119 }
120
121 mr->npages = mr->pbl_mtr.hem_cfg.buf_pg_count;
122 mr->pbl_hop_num = buf_attr.region[0].hopnum;
123
124 return err;
125 }
126
free_mr_pbl(struct hns_roce_dev * hr_dev,struct hns_roce_mr * mr)127 static void free_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
128 {
129 hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr);
130 }
131
hns_roce_mr_free(struct hns_roce_dev * hr_dev,struct hns_roce_mr * mr)132 static void hns_roce_mr_free(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
133 {
134 struct ib_device *ibdev = &hr_dev->ib_dev;
135 int ret;
136
137 if (mr->enabled) {
138 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
139 key_to_hw_index(mr->key) &
140 (hr_dev->caps.num_mtpts - 1));
141 if (ret)
142 ibdev_warn_ratelimited(ibdev, "failed to destroy mpt, ret = %d.\n",
143 ret);
144 }
145
146 free_mr_pbl(hr_dev, mr);
147 free_mr_key(hr_dev, mr);
148 }
149
hns_roce_mr_enable(struct hns_roce_dev * hr_dev,struct hns_roce_mr * mr)150 static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev,
151 struct hns_roce_mr *mr)
152 {
153 unsigned long mtpt_idx = key_to_hw_index(mr->key);
154 struct hns_roce_cmd_mailbox *mailbox;
155 struct device *dev = hr_dev->dev;
156 int ret;
157
158 /* Allocate mailbox memory */
159 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
160 if (IS_ERR(mailbox))
161 return PTR_ERR(mailbox);
162
163 trace_hns_mr(mr);
164 if (mr->type != MR_TYPE_FRMR)
165 ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr);
166 else
167 ret = hr_dev->hw->frmr_write_mtpt(mailbox->buf, mr);
168 if (ret) {
169 dev_err(dev, "failed to write mtpt, ret = %d.\n", ret);
170 goto err_page;
171 }
172
173 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
174 mtpt_idx & (hr_dev->caps.num_mtpts - 1));
175 if (ret) {
176 dev_err(dev, "failed to create mpt, ret = %d.\n", ret);
177 goto err_page;
178 }
179
180 mr->enabled = 1;
181
182 err_page:
183 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
184
185 return ret;
186 }
187
hns_roce_init_mr_table(struct hns_roce_dev * hr_dev)188 void hns_roce_init_mr_table(struct hns_roce_dev *hr_dev)
189 {
190 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
191
192 ida_init(&mtpt_ida->ida);
193 mtpt_ida->max = hr_dev->caps.num_mtpts - 1;
194 mtpt_ida->min = hr_dev->caps.reserved_mrws;
195 }
196
hns_roce_get_dma_mr(struct ib_pd * pd,int acc)197 struct ib_mr *hns_roce_get_dma_mr(struct ib_pd *pd, int acc)
198 {
199 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
200 struct hns_roce_mr *mr;
201 int ret;
202
203 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
204 if (!mr)
205 return ERR_PTR(-ENOMEM);
206
207 mr->type = MR_TYPE_DMA;
208 mr->pd = to_hr_pd(pd)->pdn;
209 mr->access = acc;
210
211 /* Allocate memory region key */
212 hns_roce_hem_list_init(&mr->pbl_mtr.hem_list);
213 ret = alloc_mr_key(hr_dev, mr);
214 if (ret)
215 goto err_free;
216
217 ret = hns_roce_mr_enable(hr_dev, mr);
218 if (ret)
219 goto err_mr;
220
221 mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
222
223 return &mr->ibmr;
224 err_mr:
225 free_mr_key(hr_dev, mr);
226
227 err_free:
228 kfree(mr);
229 return ERR_PTR(ret);
230 }
231
hns_roce_reg_user_mr(struct ib_pd * pd,u64 start,u64 length,u64 virt_addr,int access_flags,struct ib_udata * udata)232 struct ib_mr *hns_roce_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
233 u64 virt_addr, int access_flags,
234 struct ib_udata *udata)
235 {
236 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
237 struct hns_roce_mr *mr;
238 int ret;
239
240 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
241 if (!mr) {
242 ret = -ENOMEM;
243 goto err_out;
244 }
245
246 mr->iova = virt_addr;
247 mr->size = length;
248 mr->pd = to_hr_pd(pd)->pdn;
249 mr->access = access_flags;
250 mr->type = MR_TYPE_MR;
251
252 ret = alloc_mr_key(hr_dev, mr);
253 if (ret)
254 goto err_alloc_mr;
255
256 ret = alloc_mr_pbl(hr_dev, mr, udata, start);
257 if (ret)
258 goto err_alloc_key;
259
260 ret = hns_roce_mr_enable(hr_dev, mr);
261 if (ret)
262 goto err_alloc_pbl;
263
264 mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
265
266 return &mr->ibmr;
267
268 err_alloc_pbl:
269 free_mr_pbl(hr_dev, mr);
270 err_alloc_key:
271 free_mr_key(hr_dev, mr);
272 err_alloc_mr:
273 kfree(mr);
274 err_out:
275 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_MR_REG_ERR_CNT]);
276
277 return ERR_PTR(ret);
278 }
279
hns_roce_rereg_user_mr(struct ib_mr * ibmr,int flags,u64 start,u64 length,u64 virt_addr,int mr_access_flags,struct ib_pd * pd,struct ib_udata * udata)280 struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start,
281 u64 length, u64 virt_addr,
282 int mr_access_flags, struct ib_pd *pd,
283 struct ib_udata *udata)
284 {
285 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
286 struct ib_device *ib_dev = &hr_dev->ib_dev;
287 struct hns_roce_mr *mr = to_hr_mr(ibmr);
288 struct hns_roce_cmd_mailbox *mailbox;
289 unsigned long mtpt_idx;
290 int ret;
291
292 if (!mr->enabled) {
293 ret = -EINVAL;
294 goto err_out;
295 }
296
297 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
298 ret = PTR_ERR_OR_ZERO(mailbox);
299 if (ret)
300 goto err_out;
301
302 mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1);
303
304 ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_MPT,
305 mtpt_idx);
306 if (ret)
307 goto free_cmd_mbox;
308
309 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
310 mtpt_idx);
311 if (ret)
312 ibdev_warn(ib_dev, "failed to destroy MPT, ret = %d.\n", ret);
313
314 mr->enabled = 0;
315 mr->iova = virt_addr;
316 mr->size = length;
317
318 if (flags & IB_MR_REREG_PD)
319 mr->pd = to_hr_pd(pd)->pdn;
320
321 if (flags & IB_MR_REREG_ACCESS)
322 mr->access = mr_access_flags;
323
324 if (flags & IB_MR_REREG_TRANS) {
325 free_mr_pbl(hr_dev, mr);
326 ret = alloc_mr_pbl(hr_dev, mr, udata, start);
327 if (ret) {
328 ibdev_err(ib_dev, "failed to alloc mr PBL, ret = %d.\n",
329 ret);
330 goto free_cmd_mbox;
331 }
332 }
333
334 ret = hr_dev->hw->rereg_write_mtpt(hr_dev, mr, flags, mailbox->buf);
335 if (ret) {
336 ibdev_err(ib_dev, "failed to write mtpt, ret = %d.\n", ret);
337 goto free_cmd_mbox;
338 }
339
340 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
341 mtpt_idx);
342 if (ret) {
343 ibdev_err(ib_dev, "failed to create MPT, ret = %d.\n", ret);
344 goto free_cmd_mbox;
345 }
346
347 mr->enabled = 1;
348
349 free_cmd_mbox:
350 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
351
352 err_out:
353 if (ret) {
354 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_MR_REREG_ERR_CNT]);
355 return ERR_PTR(ret);
356 }
357
358 return NULL;
359 }
360
hns_roce_dereg_mr(struct ib_mr * ibmr,struct ib_udata * udata)361 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
362 {
363 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
364 struct hns_roce_mr *mr = to_hr_mr(ibmr);
365
366 if (hr_dev->hw->dereg_mr)
367 hr_dev->hw->dereg_mr(hr_dev);
368
369 hns_roce_mr_free(hr_dev, mr);
370 kfree(mr);
371
372 return 0;
373 }
374
hns_roce_alloc_mr(struct ib_pd * pd,enum ib_mr_type mr_type,u32 max_num_sg)375 struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
376 u32 max_num_sg)
377 {
378 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
379 struct device *dev = hr_dev->dev;
380 struct hns_roce_mr *mr;
381 int ret;
382
383 if (mr_type != IB_MR_TYPE_MEM_REG)
384 return ERR_PTR(-EINVAL);
385
386 if (max_num_sg > HNS_ROCE_FRMR_MAX_PA) {
387 dev_err(dev, "max_num_sg larger than %d\n",
388 HNS_ROCE_FRMR_MAX_PA);
389 return ERR_PTR(-EINVAL);
390 }
391
392 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
393 if (!mr)
394 return ERR_PTR(-ENOMEM);
395
396 mr->type = MR_TYPE_FRMR;
397 mr->pd = to_hr_pd(pd)->pdn;
398 mr->size = max_num_sg * (1 << PAGE_SHIFT);
399
400 /* Allocate memory region key */
401 ret = alloc_mr_key(hr_dev, mr);
402 if (ret)
403 goto err_free;
404
405 ret = alloc_mr_pbl(hr_dev, mr, NULL, 0);
406 if (ret)
407 goto err_key;
408
409 ret = hns_roce_mr_enable(hr_dev, mr);
410 if (ret)
411 goto err_pbl;
412
413 mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
414 mr->ibmr.length = mr->size;
415
416 return &mr->ibmr;
417
418 err_pbl:
419 free_mr_pbl(hr_dev, mr);
420 err_key:
421 free_mr_key(hr_dev, mr);
422 err_free:
423 kfree(mr);
424 return ERR_PTR(ret);
425 }
426
hns_roce_set_page(struct ib_mr * ibmr,u64 addr)427 static int hns_roce_set_page(struct ib_mr *ibmr, u64 addr)
428 {
429 struct hns_roce_mr *mr = to_hr_mr(ibmr);
430
431 if (likely(mr->npages < mr->pbl_mtr.hem_cfg.buf_pg_count)) {
432 mr->page_list[mr->npages++] = addr;
433 return 0;
434 }
435
436 return -ENOBUFS;
437 }
438
hns_roce_map_mr_sg(struct ib_mr * ibmr,struct scatterlist * sg,int sg_nents,unsigned int * sg_offset_p)439 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
440 unsigned int *sg_offset_p)
441 {
442 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
443 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
444 struct ib_device *ibdev = &hr_dev->ib_dev;
445 struct hns_roce_mr *mr = to_hr_mr(ibmr);
446 struct hns_roce_mtr *mtr = &mr->pbl_mtr;
447 int ret, sg_num = 0;
448
449 if (!IS_ALIGNED(sg_offset, HNS_ROCE_FRMR_ALIGN_SIZE) ||
450 ibmr->page_size < HNS_HW_PAGE_SIZE ||
451 ibmr->page_size > HNS_HW_MAX_PAGE_SIZE)
452 return sg_num;
453
454 mr->npages = 0;
455 mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count,
456 sizeof(dma_addr_t), GFP_KERNEL);
457 if (!mr->page_list)
458 return sg_num;
459
460 sg_num = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset_p, hns_roce_set_page);
461 if (sg_num < 1) {
462 ibdev_err(ibdev, "failed to store sg pages %u %u, cnt = %d.\n",
463 mr->npages, mr->pbl_mtr.hem_cfg.buf_pg_count, sg_num);
464 goto err_page_list;
465 }
466
467 mtr->hem_cfg.region[0].offset = 0;
468 mtr->hem_cfg.region[0].count = mr->npages;
469 mtr->hem_cfg.region[0].hopnum = mr->pbl_hop_num;
470 mtr->hem_cfg.region_count = 1;
471 ret = hns_roce_mtr_map(hr_dev, mtr, mr->page_list, mr->npages);
472 if (ret) {
473 ibdev_err(ibdev, "failed to map sg mtr, ret = %d.\n", ret);
474 sg_num = 0;
475 } else {
476 mr->pbl_mtr.hem_cfg.buf_pg_shift = (u32)ilog2(ibmr->page_size);
477 }
478
479 err_page_list:
480 kvfree(mr->page_list);
481 mr->page_list = NULL;
482
483 return sg_num;
484 }
485
hns_roce_mw_free(struct hns_roce_dev * hr_dev,struct hns_roce_mw * mw)486 static void hns_roce_mw_free(struct hns_roce_dev *hr_dev,
487 struct hns_roce_mw *mw)
488 {
489 struct device *dev = hr_dev->dev;
490 int ret;
491
492 if (mw->enabled) {
493 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
494 key_to_hw_index(mw->rkey) &
495 (hr_dev->caps.num_mtpts - 1));
496 if (ret)
497 dev_warn(dev, "MW DESTROY_MPT failed (%d)\n", ret);
498
499 hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table,
500 key_to_hw_index(mw->rkey));
501 }
502
503 ida_free(&hr_dev->mr_table.mtpt_ida.ida,
504 (int)key_to_hw_index(mw->rkey));
505 }
506
hns_roce_mw_enable(struct hns_roce_dev * hr_dev,struct hns_roce_mw * mw)507 static int hns_roce_mw_enable(struct hns_roce_dev *hr_dev,
508 struct hns_roce_mw *mw)
509 {
510 struct hns_roce_mr_table *mr_table = &hr_dev->mr_table;
511 struct hns_roce_cmd_mailbox *mailbox;
512 struct device *dev = hr_dev->dev;
513 unsigned long mtpt_idx = key_to_hw_index(mw->rkey);
514 int ret;
515
516 /* prepare HEM entry memory */
517 ret = hns_roce_table_get(hr_dev, &mr_table->mtpt_table, mtpt_idx);
518 if (ret)
519 return ret;
520
521 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
522 if (IS_ERR(mailbox)) {
523 ret = PTR_ERR(mailbox);
524 goto err_table;
525 }
526
527 ret = hr_dev->hw->mw_write_mtpt(mailbox->buf, mw);
528 if (ret) {
529 dev_err(dev, "MW write mtpt fail!\n");
530 goto err_page;
531 }
532
533 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
534 mtpt_idx & (hr_dev->caps.num_mtpts - 1));
535 if (ret) {
536 dev_err(dev, "MW CREATE_MPT failed (%d)\n", ret);
537 goto err_page;
538 }
539
540 mw->enabled = 1;
541
542 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
543
544 return 0;
545
546 err_page:
547 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
548
549 err_table:
550 hns_roce_table_put(hr_dev, &mr_table->mtpt_table, mtpt_idx);
551
552 return ret;
553 }
554
hns_roce_alloc_mw(struct ib_mw * ibmw,struct ib_udata * udata)555 int hns_roce_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
556 {
557 struct hns_roce_dev *hr_dev = to_hr_dev(ibmw->device);
558 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
559 struct ib_device *ibdev = &hr_dev->ib_dev;
560 struct hns_roce_mw *mw = to_hr_mw(ibmw);
561 int ret;
562 int id;
563
564 /* Allocate a key for mw from mr_table */
565 id = ida_alloc_range(&mtpt_ida->ida, mtpt_ida->min, mtpt_ida->max,
566 GFP_KERNEL);
567 if (id < 0) {
568 ibdev_err(ibdev, "failed to alloc id for MW key, id(%d)\n", id);
569 return -ENOMEM;
570 }
571
572 mw->rkey = hw_index_to_key(id);
573
574 ibmw->rkey = mw->rkey;
575 mw->pdn = to_hr_pd(ibmw->pd)->pdn;
576 mw->pbl_hop_num = hr_dev->caps.pbl_hop_num;
577 mw->pbl_ba_pg_sz = hr_dev->caps.pbl_ba_pg_sz;
578 mw->pbl_buf_pg_sz = hr_dev->caps.pbl_buf_pg_sz;
579
580 ret = hns_roce_mw_enable(hr_dev, mw);
581 if (ret)
582 goto err_mw;
583
584 return 0;
585
586 err_mw:
587 hns_roce_mw_free(hr_dev, mw);
588 return ret;
589 }
590
hns_roce_dealloc_mw(struct ib_mw * ibmw)591 int hns_roce_dealloc_mw(struct ib_mw *ibmw)
592 {
593 struct hns_roce_dev *hr_dev = to_hr_dev(ibmw->device);
594 struct hns_roce_mw *mw = to_hr_mw(ibmw);
595
596 hns_roce_mw_free(hr_dev, mw);
597 return 0;
598 }
599
mtr_map_region(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,struct hns_roce_buf_region * region,dma_addr_t * pages,int max_count)600 static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
601 struct hns_roce_buf_region *region, dma_addr_t *pages,
602 int max_count)
603 {
604 int count, npage;
605 int offset, end;
606 __le64 *mtts;
607 u64 addr;
608 int i;
609
610 offset = region->offset;
611 end = offset + region->count;
612 npage = 0;
613 while (offset < end && npage < max_count) {
614 count = 0;
615 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list,
616 offset, &count);
617 if (!mtts)
618 return -ENOBUFS;
619
620 for (i = 0; i < count && npage < max_count; i++) {
621 addr = pages[npage];
622
623 mtts[i] = cpu_to_le64(addr);
624 npage++;
625 }
626 offset += count;
627 }
628
629 return npage;
630 }
631
mtr_has_mtt(struct hns_roce_buf_attr * attr)632 static inline bool mtr_has_mtt(struct hns_roce_buf_attr *attr)
633 {
634 int i;
635
636 for (i = 0; i < attr->region_count; i++)
637 if (attr->region[i].hopnum != HNS_ROCE_HOP_NUM_0 &&
638 attr->region[i].hopnum > 0)
639 return true;
640
641 /* because the mtr only one root base address, when hopnum is 0 means
642 * root base address equals the first buffer address, thus all alloced
643 * memory must in a continuous space accessed by direct mode.
644 */
645 return false;
646 }
647
mtr_bufs_size(struct hns_roce_buf_attr * attr)648 static inline size_t mtr_bufs_size(struct hns_roce_buf_attr *attr)
649 {
650 size_t size = 0;
651 int i;
652
653 for (i = 0; i < attr->region_count; i++)
654 size += attr->region[i].size;
655
656 return size;
657 }
658
659 /*
660 * check the given pages in continuous address space
661 * Returns 0 on success, or the error page num.
662 */
mtr_check_direct_pages(dma_addr_t * pages,int page_count,unsigned int page_shift)663 static inline int mtr_check_direct_pages(dma_addr_t *pages, int page_count,
664 unsigned int page_shift)
665 {
666 size_t page_size = 1 << page_shift;
667 int i;
668
669 for (i = 1; i < page_count; i++)
670 if (pages[i] - pages[i - 1] != page_size)
671 return i;
672
673 return 0;
674 }
675
mtr_free_bufs(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr)676 static void mtr_free_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
677 {
678 /* release user buffers */
679 if (mtr->umem) {
680 ib_umem_release(mtr->umem);
681 mtr->umem = NULL;
682 }
683
684 /* release kernel buffers */
685 if (mtr->kmem) {
686 hns_roce_buf_free(hr_dev, mtr->kmem);
687 mtr->kmem = NULL;
688 }
689 }
690
mtr_alloc_bufs(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,struct hns_roce_buf_attr * buf_attr,struct ib_udata * udata,unsigned long user_addr)691 static int mtr_alloc_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
692 struct hns_roce_buf_attr *buf_attr,
693 struct ib_udata *udata, unsigned long user_addr)
694 {
695 struct ib_device *ibdev = &hr_dev->ib_dev;
696 size_t total_size;
697
698 total_size = mtr_bufs_size(buf_attr);
699
700 if (udata) {
701 mtr->kmem = NULL;
702 mtr->umem = ib_umem_get(ibdev, user_addr, total_size,
703 buf_attr->user_access);
704 if (IS_ERR(mtr->umem)) {
705 ibdev_err(ibdev, "failed to get umem, ret = %ld.\n",
706 PTR_ERR(mtr->umem));
707 return -ENOMEM;
708 }
709 } else {
710 mtr->umem = NULL;
711 mtr->kmem = hns_roce_buf_alloc(hr_dev, total_size,
712 buf_attr->page_shift,
713 !mtr_has_mtt(buf_attr) ?
714 HNS_ROCE_BUF_DIRECT : 0);
715 if (IS_ERR(mtr->kmem)) {
716 ibdev_err(ibdev, "failed to alloc kmem, ret = %ld.\n",
717 PTR_ERR(mtr->kmem));
718 return PTR_ERR(mtr->kmem);
719 }
720 }
721
722 return 0;
723 }
724
cal_mtr_pg_cnt(struct hns_roce_mtr * mtr)725 static int cal_mtr_pg_cnt(struct hns_roce_mtr *mtr)
726 {
727 struct hns_roce_buf_region *region;
728 int page_cnt = 0;
729 int i;
730
731 for (i = 0; i < mtr->hem_cfg.region_count; i++) {
732 region = &mtr->hem_cfg.region[i];
733 page_cnt += region->count;
734 }
735
736 return page_cnt;
737 }
738
need_split_huge_page(struct hns_roce_mtr * mtr)739 static bool need_split_huge_page(struct hns_roce_mtr *mtr)
740 {
741 /* When HEM buffer uses 0-level addressing, the page size is
742 * equal to the whole buffer size. If the current MTR has multiple
743 * regions, we split the buffer into small pages(4k, required by hns
744 * ROCEE). These pages will be used in multiple regions.
745 */
746 return mtr->hem_cfg.is_direct && mtr->hem_cfg.region_count > 1;
747 }
748
mtr_map_bufs(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr)749 static int mtr_map_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
750 {
751 struct ib_device *ibdev = &hr_dev->ib_dev;
752 int page_count = cal_mtr_pg_cnt(mtr);
753 unsigned int page_shift;
754 dma_addr_t *pages;
755 int npage;
756 int ret;
757
758 page_shift = need_split_huge_page(mtr) ? HNS_HW_PAGE_SHIFT :
759 mtr->hem_cfg.buf_pg_shift;
760 /* alloc a tmp array to store buffer's dma address */
761 pages = kvcalloc(page_count, sizeof(dma_addr_t), GFP_KERNEL);
762 if (!pages)
763 return -ENOMEM;
764
765 if (mtr->umem)
766 npage = hns_roce_get_umem_bufs(pages, page_count,
767 mtr->umem, page_shift);
768 else
769 npage = hns_roce_get_kmem_bufs(hr_dev, pages, page_count,
770 mtr->kmem, page_shift);
771
772 if (npage != page_count) {
773 ibdev_err(ibdev, "failed to get mtr page %d != %d.\n", npage,
774 page_count);
775 ret = -ENOBUFS;
776 goto err_alloc_list;
777 }
778
779 if (need_split_huge_page(mtr) && npage > 1) {
780 ret = mtr_check_direct_pages(pages, npage, page_shift);
781 if (ret) {
782 ibdev_err(ibdev, "failed to check %s page: %d / %d.\n",
783 mtr->umem ? "umtr" : "kmtr", ret, npage);
784 ret = -ENOBUFS;
785 goto err_alloc_list;
786 }
787 }
788
789 ret = hns_roce_mtr_map(hr_dev, mtr, pages, page_count);
790 if (ret)
791 ibdev_err(ibdev, "failed to map mtr pages, ret = %d.\n", ret);
792
793 err_alloc_list:
794 kvfree(pages);
795
796 return ret;
797 }
798
hns_roce_mtr_map(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,dma_addr_t * pages,unsigned int page_cnt)799 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
800 dma_addr_t *pages, unsigned int page_cnt)
801 {
802 struct ib_device *ibdev = &hr_dev->ib_dev;
803 struct hns_roce_buf_region *r;
804 unsigned int i, mapped_cnt;
805 int ret = 0;
806
807 /*
808 * Only use the first page address as root ba when hopnum is 0, this
809 * is because the addresses of all pages are consecutive in this case.
810 */
811 if (mtr->hem_cfg.is_direct) {
812 mtr->hem_cfg.root_ba = pages[0];
813 return 0;
814 }
815
816 for (i = 0, mapped_cnt = 0; i < mtr->hem_cfg.region_count &&
817 mapped_cnt < page_cnt; i++) {
818 r = &mtr->hem_cfg.region[i];
819
820 if (r->offset + r->count > page_cnt) {
821 ret = -EINVAL;
822 ibdev_err(ibdev,
823 "failed to check mtr%u count %u + %u > %u.\n",
824 i, r->offset, r->count, page_cnt);
825 return ret;
826 }
827
828 ret = mtr_map_region(hr_dev, mtr, r, &pages[r->offset],
829 page_cnt - mapped_cnt);
830 if (ret < 0) {
831 ibdev_err(ibdev,
832 "failed to map mtr%u offset %u, ret = %d.\n",
833 i, r->offset, ret);
834 return ret;
835 }
836 mapped_cnt += ret;
837 ret = 0;
838 }
839
840 if (mapped_cnt < page_cnt) {
841 ret = -ENOBUFS;
842 ibdev_err(ibdev, "failed to map mtr pages count: %u < %u.\n",
843 mapped_cnt, page_cnt);
844 }
845
846 return ret;
847 }
848
hns_roce_get_direct_addr_mtt(struct hns_roce_hem_cfg * cfg,u32 start_index,u64 * mtt_buf,int mtt_cnt)849 static int hns_roce_get_direct_addr_mtt(struct hns_roce_hem_cfg *cfg,
850 u32 start_index, u64 *mtt_buf,
851 int mtt_cnt)
852 {
853 int mtt_count;
854 int total = 0;
855 u32 npage;
856 u64 addr;
857
858 if (mtt_cnt > cfg->region_count)
859 return -EINVAL;
860
861 for (mtt_count = 0; mtt_count < cfg->region_count && total < mtt_cnt;
862 mtt_count++) {
863 npage = cfg->region[mtt_count].offset;
864 if (npage < start_index)
865 continue;
866
867 addr = cfg->root_ba + (npage << HNS_HW_PAGE_SHIFT);
868 mtt_buf[total] = addr;
869
870 total++;
871 }
872
873 if (!total)
874 return -ENOENT;
875
876 return 0;
877 }
878
hns_roce_get_mhop_mtt(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,u32 start_index,u64 * mtt_buf,int mtt_cnt)879 static int hns_roce_get_mhop_mtt(struct hns_roce_dev *hr_dev,
880 struct hns_roce_mtr *mtr, u32 start_index,
881 u64 *mtt_buf, int mtt_cnt)
882 {
883 int left = mtt_cnt;
884 int total = 0;
885 int mtt_count;
886 __le64 *mtts;
887 u32 npage;
888
889 while (left > 0) {
890 mtt_count = 0;
891 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list,
892 start_index + total,
893 &mtt_count);
894 if (!mtts || !mtt_count)
895 break;
896
897 npage = min(mtt_count, left);
898 left -= npage;
899 for (mtt_count = 0; mtt_count < npage; mtt_count++)
900 mtt_buf[total++] = le64_to_cpu(mtts[mtt_count]);
901 }
902
903 if (!total)
904 return -ENOENT;
905
906 return 0;
907 }
908
hns_roce_mtr_find(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,u32 offset,u64 * mtt_buf,int mtt_max)909 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
910 u32 offset, u64 *mtt_buf, int mtt_max)
911 {
912 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
913 u32 start_index;
914 int ret;
915
916 if (!mtt_buf || mtt_max < 1)
917 return -EINVAL;
918
919 /* no mtt memory in direct mode, so just return the buffer address */
920 if (cfg->is_direct) {
921 start_index = offset >> HNS_HW_PAGE_SHIFT;
922 ret = hns_roce_get_direct_addr_mtt(cfg, start_index,
923 mtt_buf, mtt_max);
924 } else {
925 start_index = offset >> cfg->buf_pg_shift;
926 ret = hns_roce_get_mhop_mtt(hr_dev, mtr, start_index,
927 mtt_buf, mtt_max);
928 }
929 return ret;
930 }
931
get_best_page_shift(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,struct hns_roce_buf_attr * buf_attr)932 static int get_best_page_shift(struct hns_roce_dev *hr_dev,
933 struct hns_roce_mtr *mtr,
934 struct hns_roce_buf_attr *buf_attr)
935 {
936 unsigned int page_sz;
937
938 if (!buf_attr->adaptive || buf_attr->type != MTR_PBL || !mtr->umem)
939 return 0;
940
941 page_sz = ib_umem_find_best_pgsz(mtr->umem,
942 hr_dev->caps.page_size_cap,
943 buf_attr->iova);
944 if (!page_sz)
945 return -EINVAL;
946
947 buf_attr->page_shift = order_base_2(page_sz);
948 return 0;
949 }
950
get_best_hop_num(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,struct hns_roce_buf_attr * buf_attr,unsigned int ba_pg_shift)951 static int get_best_hop_num(struct hns_roce_dev *hr_dev,
952 struct hns_roce_mtr *mtr,
953 struct hns_roce_buf_attr *buf_attr,
954 unsigned int ba_pg_shift)
955 {
956 #define INVALID_HOPNUM -1
957 #define MIN_BA_CNT 1
958 size_t buf_pg_sz = 1 << buf_attr->page_shift;
959 struct ib_device *ibdev = &hr_dev->ib_dev;
960 size_t ba_pg_sz = 1 << ba_pg_shift;
961 int hop_num = INVALID_HOPNUM;
962 size_t unit = MIN_BA_CNT;
963 size_t ba_cnt;
964 int j;
965
966 if (!buf_attr->adaptive || buf_attr->type != MTR_PBL)
967 return 0;
968
969 /* Caculating the number of buf pages, each buf page need a BA */
970 if (mtr->umem)
971 ba_cnt = ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz);
972 else
973 ba_cnt = DIV_ROUND_UP(buf_attr->region[0].size, buf_pg_sz);
974
975 for (j = 0; j <= HNS_ROCE_MAX_HOP_NUM; j++) {
976 if (ba_cnt <= unit) {
977 hop_num = j;
978 break;
979 }
980 /* Number of BAs can be represented at per hop */
981 unit *= ba_pg_sz / BA_BYTE_LEN;
982 }
983
984 if (hop_num < 0) {
985 ibdev_err(ibdev,
986 "failed to calculate a valid hopnum.\n");
987 return -EINVAL;
988 }
989
990 buf_attr->region[0].hopnum = hop_num;
991
992 return 0;
993 }
994
is_buf_attr_valid(struct hns_roce_dev * hr_dev,struct hns_roce_buf_attr * attr)995 static bool is_buf_attr_valid(struct hns_roce_dev *hr_dev,
996 struct hns_roce_buf_attr *attr)
997 {
998 struct ib_device *ibdev = &hr_dev->ib_dev;
999
1000 if (attr->region_count > ARRAY_SIZE(attr->region) ||
1001 attr->region_count < 1 || attr->page_shift < HNS_HW_PAGE_SHIFT) {
1002 ibdev_err(ibdev,
1003 "invalid buf attr, region count %u, page shift %u.\n",
1004 attr->region_count, attr->page_shift);
1005 return false;
1006 }
1007
1008 return true;
1009 }
1010
mtr_init_buf_cfg(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,struct hns_roce_buf_attr * attr)1011 static int mtr_init_buf_cfg(struct hns_roce_dev *hr_dev,
1012 struct hns_roce_mtr *mtr,
1013 struct hns_roce_buf_attr *attr)
1014 {
1015 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
1016 struct hns_roce_buf_region *r;
1017 size_t buf_pg_sz;
1018 size_t buf_size;
1019 int page_cnt, i;
1020 u64 pgoff = 0;
1021
1022 if (!is_buf_attr_valid(hr_dev, attr))
1023 return -EINVAL;
1024
1025 /* If mtt is disabled, all pages must be within a continuous range */
1026 cfg->is_direct = !mtr_has_mtt(attr);
1027 cfg->region_count = attr->region_count;
1028 buf_size = mtr_bufs_size(attr);
1029 if (need_split_huge_page(mtr)) {
1030 buf_pg_sz = HNS_HW_PAGE_SIZE;
1031 cfg->buf_pg_count = 1;
1032 /* The ROCEE requires the page size to be 4K * 2 ^ N. */
1033 cfg->buf_pg_shift = HNS_HW_PAGE_SHIFT +
1034 order_base_2(DIV_ROUND_UP(buf_size, HNS_HW_PAGE_SIZE));
1035 } else {
1036 buf_pg_sz = 1 << attr->page_shift;
1037 cfg->buf_pg_count = mtr->umem ?
1038 ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz) :
1039 DIV_ROUND_UP(buf_size, buf_pg_sz);
1040 cfg->buf_pg_shift = attr->page_shift;
1041 pgoff = mtr->umem ? mtr->umem->address & ~PAGE_MASK : 0;
1042 }
1043
1044 /* Convert buffer size to page index and page count for each region and
1045 * the buffer's offset needs to be appended to the first region.
1046 */
1047 for (page_cnt = 0, i = 0; i < attr->region_count; i++) {
1048 r = &cfg->region[i];
1049 r->offset = page_cnt;
1050 buf_size = hr_hw_page_align(attr->region[i].size + pgoff);
1051 if (attr->type == MTR_PBL && mtr->umem)
1052 r->count = ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz);
1053 else
1054 r->count = DIV_ROUND_UP(buf_size, buf_pg_sz);
1055
1056 pgoff = 0;
1057 page_cnt += r->count;
1058 r->hopnum = to_hr_hem_hopnum(attr->region[i].hopnum, r->count);
1059 }
1060
1061 return 0;
1062 }
1063
cal_pages_per_l1ba(unsigned int ba_per_bt,unsigned int hopnum)1064 static u64 cal_pages_per_l1ba(unsigned int ba_per_bt, unsigned int hopnum)
1065 {
1066 return int_pow(ba_per_bt, hopnum - 1);
1067 }
1068
cal_best_bt_pg_sz(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,unsigned int pg_shift)1069 static unsigned int cal_best_bt_pg_sz(struct hns_roce_dev *hr_dev,
1070 struct hns_roce_mtr *mtr,
1071 unsigned int pg_shift)
1072 {
1073 unsigned long cap = hr_dev->caps.page_size_cap;
1074 struct hns_roce_buf_region *re;
1075 unsigned int pgs_per_l1ba;
1076 unsigned int ba_per_bt;
1077 unsigned int ba_num;
1078 int i;
1079
1080 for_each_set_bit_from(pg_shift, &cap, sizeof(cap) * BITS_PER_BYTE) {
1081 if (!(BIT(pg_shift) & cap))
1082 continue;
1083
1084 ba_per_bt = BIT(pg_shift) / BA_BYTE_LEN;
1085 ba_num = 0;
1086 for (i = 0; i < mtr->hem_cfg.region_count; i++) {
1087 re = &mtr->hem_cfg.region[i];
1088 if (re->hopnum == 0)
1089 continue;
1090
1091 pgs_per_l1ba = cal_pages_per_l1ba(ba_per_bt, re->hopnum);
1092 ba_num += DIV_ROUND_UP(re->count, pgs_per_l1ba);
1093 }
1094
1095 if (ba_num <= ba_per_bt)
1096 return pg_shift;
1097 }
1098
1099 return 0;
1100 }
1101
mtr_alloc_mtt(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,unsigned int ba_page_shift)1102 static int mtr_alloc_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
1103 unsigned int ba_page_shift)
1104 {
1105 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
1106 int ret;
1107
1108 hns_roce_hem_list_init(&mtr->hem_list);
1109 if (!cfg->is_direct) {
1110 ba_page_shift = cal_best_bt_pg_sz(hr_dev, mtr, ba_page_shift);
1111 if (!ba_page_shift)
1112 return -ERANGE;
1113
1114 ret = hns_roce_hem_list_request(hr_dev, &mtr->hem_list,
1115 cfg->region, cfg->region_count,
1116 ba_page_shift);
1117 if (ret)
1118 return ret;
1119 cfg->root_ba = mtr->hem_list.root_ba;
1120 cfg->ba_pg_shift = ba_page_shift;
1121 } else {
1122 cfg->ba_pg_shift = cfg->buf_pg_shift;
1123 }
1124
1125 return 0;
1126 }
1127
mtr_free_mtt(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr)1128 static void mtr_free_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
1129 {
1130 hns_roce_hem_list_release(hr_dev, &mtr->hem_list);
1131 }
1132
1133 /**
1134 * hns_roce_mtr_create - Create hns memory translate region.
1135 *
1136 * @hr_dev: RoCE device struct pointer
1137 * @mtr: memory translate region
1138 * @buf_attr: buffer attribute for creating mtr
1139 * @ba_page_shift: page shift for multi-hop base address table
1140 * @udata: user space context, if it's NULL, means kernel space
1141 * @user_addr: userspace virtual address to start at
1142 */
hns_roce_mtr_create(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr,struct hns_roce_buf_attr * buf_attr,unsigned int ba_page_shift,struct ib_udata * udata,unsigned long user_addr)1143 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
1144 struct hns_roce_buf_attr *buf_attr,
1145 unsigned int ba_page_shift, struct ib_udata *udata,
1146 unsigned long user_addr)
1147 {
1148 struct ib_device *ibdev = &hr_dev->ib_dev;
1149 int ret;
1150
1151 trace_hns_buf_attr(buf_attr);
1152 /* The caller has its own buffer list and invokes the hns_roce_mtr_map()
1153 * to finish the MTT configuration.
1154 */
1155 if (buf_attr->mtt_only) {
1156 mtr->umem = NULL;
1157 mtr->kmem = NULL;
1158 } else {
1159 ret = mtr_alloc_bufs(hr_dev, mtr, buf_attr, udata, user_addr);
1160 if (ret) {
1161 ibdev_err(ibdev,
1162 "failed to alloc mtr bufs, ret = %d.\n", ret);
1163 return ret;
1164 }
1165
1166 ret = get_best_page_shift(hr_dev, mtr, buf_attr);
1167 if (ret)
1168 goto err_init_buf;
1169
1170 ret = get_best_hop_num(hr_dev, mtr, buf_attr, ba_page_shift);
1171 if (ret)
1172 goto err_init_buf;
1173 }
1174
1175 ret = mtr_init_buf_cfg(hr_dev, mtr, buf_attr);
1176 if (ret)
1177 goto err_init_buf;
1178
1179 ret = mtr_alloc_mtt(hr_dev, mtr, ba_page_shift);
1180 if (ret) {
1181 ibdev_err(ibdev, "failed to alloc mtr mtt, ret = %d.\n", ret);
1182 goto err_init_buf;
1183 }
1184
1185 if (buf_attr->mtt_only)
1186 return 0;
1187
1188 /* Write buffer's dma address to MTT */
1189 ret = mtr_map_bufs(hr_dev, mtr);
1190 if (ret) {
1191 ibdev_err(ibdev, "failed to map mtr bufs, ret = %d.\n", ret);
1192 goto err_alloc_mtt;
1193 }
1194
1195 return 0;
1196
1197 err_alloc_mtt:
1198 mtr_free_mtt(hr_dev, mtr);
1199 err_init_buf:
1200 mtr_free_bufs(hr_dev, mtr);
1201
1202 return ret;
1203 }
1204
hns_roce_mtr_destroy(struct hns_roce_dev * hr_dev,struct hns_roce_mtr * mtr)1205 void hns_roce_mtr_destroy(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
1206 {
1207 /* release multi-hop addressing resource */
1208 hns_roce_hem_list_release(hr_dev, &mtr->hem_list);
1209
1210 /* free buffers */
1211 mtr_free_bufs(hr_dev, mtr);
1212 }
1213