1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_platform.h"
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/reboot.h>
35 #include <sys/devmap.h>
36
37 #include <vm/vm.h>
38 #include <vm/pmap.h>
39
40 #include <machine/bus.h>
41 #include <machine/intr.h>
42 #include <machine/machdep.h>
43 #include <machine/platformvar.h>
44
45 #include <arm/arm/mpcore_timervar.h>
46 #include <arm/freescale/imx/imx6_anatopreg.h>
47 #include <arm/freescale/imx/imx6_anatopvar.h>
48 #include <arm/freescale/imx/imx_machdep.h>
49
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/ofw/openfirm.h>
52
53 #include <arm/freescale/imx/imx6_machdep.h>
54
55 #include "platform_if.h"
56 #include "platform_pl310_if.h"
57
58 static platform_attach_t imx6_attach;
59 static platform_devmap_init_t imx6_devmap_init;
60 static platform_late_init_t imx6_late_init;
61 static platform_cpu_reset_t imx6_cpu_reset;
62
63 /*
64 * Fix FDT data related to interrupts.
65 *
66 * Driven by the needs of linux and its drivers (as always), the published FDT
67 * data for imx6 now sets the interrupt parent for most devices to the GPC
68 * interrupt controller, which is for use when the chip is in deep-sleep mode.
69 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
70 * to be handled by the GIC.
71 *
72 * Luckily, the change to the FDT data was to assign the GPC as the interrupt
73 * parent for the soc node and letting that get inherited by all other devices
74 * (except a few that directly name GIC as their interrupt parent). So we can
75 * set the world right by just changing the interrupt-parent property of the soc
76 * node to refer to GIC instead of GPC. This will get us by until we write our
77 * own GPC driver (or until linux changes its mind and the FDT data again).
78 *
79 * 2020/11/25: The tempmon and pmu nodes are siblings (not children) of the soc
80 * node, so for them to use interrupts we need to apply the same fix as we do
81 * for the soc node.
82 *
83 * We validate that we have data that looks like we expect before changing it:
84 * - SOC node exists and has GPC as its interrupt parent.
85 * - GPC node exists and has GIC as its interrupt parent.
86 * - GIC node exists and is its own interrupt parent or has no parent.
87 *
88 * This applies to all models of imx6. Luckily all of them have the devices
89 * involved at the same addresses on the same buses, so we don't need any
90 * per-soc logic. We handle this at platform attach time rather than via the
91 * fdt_fixup_table, because the latter requires matching on the FDT "model"
92 * property, and this applies to all boards including those not yet invented.
93 *
94 * This just in: as of the import of dts files from linux 4.15 on 2018-02-10,
95 * they appear to have applied a new style rule to the dts which forbids leading
96 * zeroes in the @address qualifiers on node names. Since we have to find those
97 * nodes by string matching we now have to search for both flavors of each node
98 * name involved.
99 */
100
101 static void
fix_node_iparent(const char * nodepath,phandle_t gpcxref,phandle_t gicxref)102 fix_node_iparent(const char* nodepath, phandle_t gpcxref, phandle_t gicxref)
103 {
104 static const char *propname = "interrupt-parent";
105 phandle_t node, iparent;
106
107 if ((node = OF_finddevice(nodepath)) == -1)
108 return;
109 if (OF_getencprop(node, propname, &iparent, sizeof(iparent)) <= 0)
110 return;
111 if (iparent != gpcxref)
112 return;
113
114 OF_setprop(node, propname, &gicxref, sizeof(gicxref));
115 }
116
117 static void
fix_fdt_interrupt_data(void)118 fix_fdt_interrupt_data(void)
119 {
120 phandle_t gicipar, gicnode, gicxref;
121 phandle_t gpcipar, gpcnode, gpcxref;
122 int result;
123
124 /* GIC node may be child of soc node, or appear directly at root. */
125 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000");
126 if (gicnode == -1)
127 gicnode = OF_finddevice("/soc/interrupt-controller@a01000");
128 if (gicnode == -1) {
129 gicnode = OF_finddevice("/interrupt-controller@00a01000");
130 if (gicnode == -1)
131 gicnode = OF_finddevice("/interrupt-controller@a01000");
132 if (gicnode == -1)
133 return;
134 }
135 gicxref = OF_xref_from_node(gicnode);
136
137 /* If gic node has no parent, pretend it is its own parent. */
138 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar,
139 sizeof(gicipar));
140 if (result <= 0)
141 gicipar = gicxref;
142
143 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000");
144 if (gpcnode == -1)
145 gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000");
146 if (gpcnode == -1)
147 gpcnode = OF_finddevice("/soc/bus@2000000/gpc@20dc000");
148 if (gpcnode == -1)
149 return;
150 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar,
151 sizeof(gpcipar));
152 if (result <= 0)
153 return;
154 gpcxref = OF_xref_from_node(gpcnode);
155
156 if (gpcipar != gicxref || gicipar != gicxref)
157 return;
158
159 gicxref = cpu_to_fdt32(gicxref);
160 fix_node_iparent("/soc", gpcxref, gicxref);
161 fix_node_iparent("/pmu", gpcxref, gicxref);
162 fix_node_iparent("/tempmon", gpcxref, gicxref);
163 }
164
165 static void
fix_fdt_iomuxc_data(void)166 fix_fdt_iomuxc_data(void)
167 {
168 phandle_t node;
169
170 /*
171 * The linux dts defines two nodes with the same mmio address range,
172 * iomuxc-gpr and the regular iomuxc. The -grp node is a simple_mfd and
173 * a syscon, but it only has access to a small subset of the iomuxc
174 * registers, so it can't serve as the accessor for the iomuxc driver's
175 * register IO. But right now, the simple_mfd driver attaches first,
176 * preventing the real iomuxc driver from allocating its mmio register
177 * range because it partially overlaps with the -gpr range.
178 *
179 * For now, by far the easiest thing to do to keep imx6 working is to
180 * just disable the iomuxc-gpr node because we don't have a driver for
181 * it anyway, we just need to prevent attachment of simple_mfd.
182 *
183 * If we ever write a -gpr driver, this code should probably switch to
184 * modifying the reg property so that the range covers all the iomuxc
185 * regs, then the -gpr driver can be a regular syscon driver that iomuxc
186 * uses for register access.
187 */
188 node = OF_finddevice("/soc/aips-bus@2000000/iomuxc-gpr@20e0000");
189 if (node == -1)
190 node = OF_finddevice("/soc/bus@2000000/iomuxc-gpr@20e0000");
191 if (node != -1)
192 OF_setprop(node, "status", "disabled", sizeof("disabled"));
193 }
194
195 static int
imx6_attach(platform_t plat)196 imx6_attach(platform_t plat)
197 {
198
199 /* Fix soc interrupt-parent property. */
200 fix_fdt_interrupt_data();
201
202 /* Fix iomuxc-gpr and iomuxc nodes both using the same mmio range. */
203 fix_fdt_iomuxc_data();
204
205 /* Inform the MPCore timer driver that its clock is variable. */
206 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
207
208 return (0);
209 }
210
211 static void
imx6_late_init(platform_t plat)212 imx6_late_init(platform_t plat)
213 {
214 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;
215
216 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS);
217 }
218
219 /*
220 * Set up static device mappings.
221 *
222 * This attempts to cover the most-used devices with 1MB section mappings, which
223 * is good for performance (uses fewer TLB entries for device access).
224 *
225 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
226 * L2 cache controller. Most of the 1MB range is unused reserved space.
227 *
228 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
229 *
230 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
231 * the memory map. When we get support for graphics it might make sense to
232 * static map some of that area. Be careful with other things in that area such
233 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
234 */
235 static int
imx6_devmap_init(platform_t plat)236 imx6_devmap_init(platform_t plat)
237 {
238 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
239 const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
240 const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
241 const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
242 const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
243 const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
244
245 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
246 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
247 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
248
249 return (0);
250 }
251
252 static void
imx6_cpu_reset(platform_t plat)253 imx6_cpu_reset(platform_t plat)
254 {
255 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
256
257 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
258 }
259
260 /*
261 * Determine what flavor of imx6 we're running on.
262 *
263 * This code is based on the way u-boot does it. Information found on the web
264 * indicates that Freescale themselves were the original source of this logic,
265 * including the strange check for number of CPUs in the SCU configuration
266 * register, which is apparently needed on some revisions of the SOLO.
267 *
268 * According to the documentation, there is such a thing as an i.MX6 Dual
269 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a
270 * number or provided any logic to handle it in their detection code.
271 *
272 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
273 * documented in the chip reference manual. (SCU configuration is mentioned,
274 * but not mapped out in detail.) I think the bottom two bits of the scu config
275 * register may be ncpu-1.
276 *
277 * This hasn't been tested yet on a dual[-lite].
278 *
279 * On a solo:
280 * digprog = 0x00610001
281 * hwsoc = 0x00000062
282 * scu config = 0x00000500
283 * On a quad:
284 * digprog = 0x00630002
285 * hwsoc = 0x00000063
286 * scu config = 0x00005503
287 */
288 u_int
imx_soc_type(void)289 imx_soc_type(void)
290 {
291 uint32_t digprog, hwsoc;
292 uint32_t *pcr;
293 static u_int soctype;
294 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
295 #define HWSOC_MX6SL 0x60
296 #define HWSOC_MX6DL 0x61
297 #define HWSOC_MX6SOLO 0x62
298 #define HWSOC_MX6Q 0x63
299 #define HWSOC_MX6UL 0x64
300
301 if (soctype != 0)
302 return (soctype);
303
304 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
305 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
306 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
307
308 if (hwsoc != HWSOC_MX6SL) {
309 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
310 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
311 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
312 /*printf("digprog = 0x%08x\n", digprog);*/
313 if (hwsoc == HWSOC_MX6DL) {
314 pcr = pmap_mapdev(SCU_CONFIG_PHYSADDR, 4);
315 if (pcr != NULL) {
316 /*printf("scu config = 0x%08x\n", *pcr);*/
317 if ((*pcr & 0x03) == 0) {
318 hwsoc = HWSOC_MX6SOLO;
319 }
320 pmap_unmapdev(pcr, 4);
321 }
322 }
323 }
324 /* printf("hwsoc 0x%08x\n", hwsoc); */
325
326 switch (hwsoc) {
327 case HWSOC_MX6SL:
328 soctype = IMXSOC_6SL;
329 break;
330 case HWSOC_MX6SOLO:
331 soctype = IMXSOC_6S;
332 break;
333 case HWSOC_MX6DL:
334 soctype = IMXSOC_6DL;
335 break;
336 case HWSOC_MX6Q :
337 soctype = IMXSOC_6Q;
338 break;
339 case HWSOC_MX6UL:
340 soctype = IMXSOC_6UL;
341 break;
342 default:
343 printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
344 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
345 soctype = IMXSOC_6Q;
346 break;
347 }
348
349 return (soctype);
350 }
351
352 /*
353 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
354 * option SOCDEV_PA=0x02000000
355 * option SOCDEV_VA=0x02000000
356 * option EARLY_PRINTF
357 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
358 * makes sense now, but if multiple SOCs do that it will make early_putc another
359 * duplicate symbol to be eliminated on the path to a generic kernel.
360 */
361 #if 0
362 static void
363 imx6_early_putc(int c)
364 {
365 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
366 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040;
367 const uint32_t UART_TXRDY = (1 << 3);
368
369 while ((*UART_STAT_REG & UART_TXRDY) == 0)
370 continue;
371 *UART_TX_REG = c;
372 }
373 early_putc_t *early_putc = imx6_early_putc;
374 #endif
375
376 static platform_method_t imx6_methods[] = {
377 PLATFORMMETHOD(platform_attach, imx6_attach),
378 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init),
379 PLATFORMMETHOD(platform_late_init, imx6_late_init),
380 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset),
381
382 #ifdef SMP
383 PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap),
384 PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid),
385 #endif
386
387 PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init),
388
389 PLATFORMMETHOD_END,
390 };
391
392 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80);
393 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80);
394 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80);
395 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67);
396