1 /* SPDX-License-Identifier: ISC */
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
7 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
8 */
9
10 #ifndef _CORE_H_
11 #define _CORE_H_
12
13 #include <linux/completion.h>
14 #include <linux/if_ether.h>
15 #include <linux/types.h>
16 #include <linux/pci.h>
17 #include <linux/uuid.h>
18 #include <linux/time.h>
19 #include <linux/leds.h>
20
21 #include "htt.h"
22 #include "htc.h"
23 #include "hw.h"
24 #include "targaddrs.h"
25 #include "wmi.h"
26 #include "../ath.h"
27 #include "../regd.h"
28 #include "../dfs_pattern_detector.h"
29 #include "spectral.h"
30 #include "thermal.h"
31 #include "wow.h"
32 #include "swap.h"
33
34 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
35 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
36 #define WO(_f) ((_f##_OFFSET) >> 2)
37
38 #define ATH10K_SCAN_ID 0
39 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
40 #define WMI_READY_TIMEOUT (5 * HZ)
41 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
42 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
43 #define ATH10K_NUM_CHANS 41
44 #define ATH10K_MAX_5G_CHAN 173
45
46 #if defined(CONFIG_FWLOG)
47 #define ATH10K_FWLOG_MODULE_ID_MAX_10_2_4 28
48 #define ATH10K_FWLOG_MODULE_ID_MAX_10_4 35
49 #endif
50
51 /* Antenna noise floor */
52 #define ATH10K_DEFAULT_NOISE_FLOOR -95
53
54 #define ATH10K_INVALID_RSSI 128
55
56 #define ATH10K_MAX_NUM_MGMT_PENDING 128
57
58 /* number of failed packets (20 packets with 16 sw reties each) */
59 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
60
61 /*
62 * Use insanely high numbers to make sure that the firmware implementation
63 * won't start, we have the same functionality already in hostapd. Unit
64 * is seconds.
65 */
66 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
67 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
68 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
69
70 /* SMBIOS type containing Board Data File Name Extension */
71 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
72
73 /* SMBIOS type structure length (excluding strings-set) */
74 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
75
76 /* Offset pointing to Board Data File Name Extension */
77 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
78
79 /* Board Data File Name Extension string length.
80 * String format: BDF_<Customer ID>_<Extension>\0
81 */
82 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
83
84 /* The magic used by QCA spec */
85 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
86
87 /* Default Airtime weight multiplier (Tuned for multiclient performance) */
88 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4
89
90 #define ATH10K_MAX_RETRY_COUNT 30
91
92 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \
93 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
94 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\
95 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
96 #define ATH10K_RECOVERY_TIMEOUT_HZ (5 * HZ)
97 #define ATH10K_RECOVERY_MAX_FAIL_COUNT 4
98
99 struct ath10k;
100
ath10k_bus_str(enum ath10k_bus bus)101 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
102 {
103 switch (bus) {
104 case ATH10K_BUS_PCI:
105 return "pci";
106 case ATH10K_BUS_AHB:
107 return "ahb";
108 case ATH10K_BUS_SDIO:
109 return "sdio";
110 case ATH10K_BUS_USB:
111 return "usb";
112 case ATH10K_BUS_SNOC:
113 return "snoc";
114 }
115
116 return "unknown";
117 }
118
119 enum ath10k_skb_flags {
120 ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
121 ATH10K_SKB_F_DTIM_ZERO = BIT(1),
122 ATH10K_SKB_F_DELIVER_CAB = BIT(2),
123 ATH10K_SKB_F_MGMT = BIT(3),
124 ATH10K_SKB_F_QOS = BIT(4),
125 ATH10K_SKB_F_RAW_TX = BIT(5),
126 ATH10K_SKB_F_NOACK_TID = BIT(6),
127 };
128
129 struct ath10k_skb_cb {
130 dma_addr_t paddr;
131 u8 flags;
132 u8 eid;
133 u16 msdu_id;
134 u16 airtime_est;
135 struct ieee80211_vif *vif;
136 struct ieee80211_txq *txq;
137 u32 ucast_cipher;
138 } __packed;
139
140 struct ath10k_skb_rxcb {
141 dma_addr_t paddr;
142 struct hlist_node hlist;
143 u8 eid;
144 };
145
ATH10K_SKB_CB(struct sk_buff * skb)146 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
147 {
148 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
149 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
150 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
151 }
152
ATH10K_SKB_RXCB(struct sk_buff * skb)153 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
154 {
155 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
156 return (struct ath10k_skb_rxcb *)skb->cb;
157 }
158
159 #define ATH10K_RXCB_SKB(rxcb) \
160 container_of((void *)rxcb, struct sk_buff, cb)
161
host_interest_item_address(u32 item_offset)162 static inline u32 host_interest_item_address(u32 item_offset)
163 {
164 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
165 }
166
167 enum ath10k_phy_mode {
168 ATH10K_PHY_MODE_LEGACY = 0,
169 ATH10K_PHY_MODE_HT = 1,
170 ATH10K_PHY_MODE_VHT = 2,
171 };
172
173 /* Data rate 100KBPS based on IE Index */
174 struct ath10k_index_ht_data_rate_type {
175 u8 beacon_rate_index;
176 u16 supported_rate[4];
177 };
178
179 /* Data rate 100KBPS based on IE Index */
180 struct ath10k_index_vht_data_rate_type {
181 u8 beacon_rate_index;
182 u16 supported_VHT80_rate[2];
183 u16 supported_VHT40_rate[2];
184 u16 supported_VHT20_rate[2];
185 };
186
187 struct ath10k_bmi {
188 bool done_sent;
189 };
190
191 struct ath10k_mem_chunk {
192 void *vaddr;
193 dma_addr_t paddr;
194 u32 len;
195 u32 req_id;
196 };
197
198 struct ath10k_wmi {
199 enum ath10k_htc_ep_id eid;
200 struct completion service_ready;
201 struct completion unified_ready;
202 struct completion barrier;
203 struct completion radar_confirm;
204 wait_queue_head_t tx_credits_wq;
205 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
206 struct wmi_cmd_map *cmd;
207 struct wmi_vdev_param_map *vdev_param;
208 struct wmi_pdev_param_map *pdev_param;
209 struct wmi_peer_param_map *peer_param;
210 const struct wmi_ops *ops;
211 const struct wmi_peer_flags_map *peer_flags;
212
213 u32 mgmt_max_num_pending_tx;
214
215 /* Protected by data_lock */
216 struct idr mgmt_pending_tx;
217
218 u32 num_mem_chunks;
219 u32 rx_decap_mode;
220 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
221 };
222
223 struct ath10k_fw_stats_peer {
224 struct list_head list;
225
226 u8 peer_macaddr[ETH_ALEN];
227 u32 peer_rssi;
228 u32 peer_tx_rate;
229 u32 peer_rx_rate; /* 10x only */
230 u64 rx_duration;
231 };
232
233 struct ath10k_fw_extd_stats_peer {
234 struct list_head list;
235
236 u8 peer_macaddr[ETH_ALEN];
237 u64 rx_duration;
238 };
239
240 struct ath10k_fw_stats_vdev {
241 struct list_head list;
242
243 u32 vdev_id;
244 u32 beacon_snr;
245 u32 data_snr;
246 u32 num_tx_frames[4];
247 u32 num_rx_frames;
248 u32 num_tx_frames_retries[4];
249 u32 num_tx_frames_failures[4];
250 u32 num_rts_fail;
251 u32 num_rts_success;
252 u32 num_rx_err;
253 u32 num_rx_discard;
254 u32 num_tx_not_acked;
255 u32 tx_rate_history[10];
256 u32 beacon_rssi_history[10];
257 };
258
259 struct ath10k_fw_stats_vdev_extd {
260 struct list_head list;
261
262 u32 vdev_id;
263 u32 ppdu_aggr_cnt;
264 u32 ppdu_noack;
265 u32 mpdu_queued;
266 u32 ppdu_nonaggr_cnt;
267 u32 mpdu_sw_requeued;
268 u32 mpdu_suc_retry;
269 u32 mpdu_suc_multitry;
270 u32 mpdu_fail_retry;
271 u32 tx_ftm_suc;
272 u32 tx_ftm_suc_retry;
273 u32 tx_ftm_fail;
274 u32 rx_ftmr_cnt;
275 u32 rx_ftmr_dup_cnt;
276 u32 rx_iftmr_cnt;
277 u32 rx_iftmr_dup_cnt;
278 };
279
280 struct ath10k_fw_stats_pdev {
281 struct list_head list;
282
283 /* PDEV stats */
284 s32 ch_noise_floor;
285 u32 tx_frame_count; /* Cycles spent transmitting frames */
286 u32 rx_frame_count; /* Cycles spent receiving frames */
287 u32 rx_clear_count; /* Total channel busy time, evidently */
288 u32 cycle_count; /* Total on-channel time */
289 u32 phy_err_count;
290 u32 chan_tx_power;
291 u32 ack_rx_bad;
292 u32 rts_bad;
293 u32 rts_good;
294 u32 fcs_bad;
295 u32 no_beacons;
296 u32 mib_int_count;
297
298 /* PDEV TX stats */
299 s32 comp_queued;
300 s32 comp_delivered;
301 s32 msdu_enqued;
302 s32 mpdu_enqued;
303 s32 wmm_drop;
304 s32 local_enqued;
305 s32 local_freed;
306 s32 hw_queued;
307 s32 hw_reaped;
308 s32 underrun;
309 u32 hw_paused;
310 s32 tx_abort;
311 s32 mpdus_requeued;
312 u32 tx_ko;
313 u32 data_rc;
314 u32 self_triggers;
315 u32 sw_retry_failure;
316 u32 illgl_rate_phy_err;
317 u32 pdev_cont_xretry;
318 u32 pdev_tx_timeout;
319 u32 pdev_resets;
320 u32 phy_underrun;
321 u32 txop_ovf;
322 u32 seq_posted;
323 u32 seq_failed_queueing;
324 u32 seq_completed;
325 u32 seq_restarted;
326 u32 mu_seq_posted;
327 u32 mpdus_sw_flush;
328 u32 mpdus_hw_filter;
329 u32 mpdus_truncated;
330 u32 mpdus_ack_failed;
331 u32 mpdus_expired;
332
333 /* PDEV RX stats */
334 s32 mid_ppdu_route_change;
335 s32 status_rcvd;
336 s32 r0_frags;
337 s32 r1_frags;
338 s32 r2_frags;
339 s32 r3_frags;
340 s32 htt_msdus;
341 s32 htt_mpdus;
342 s32 loc_msdus;
343 s32 loc_mpdus;
344 s32 oversize_amsdu;
345 s32 phy_errs;
346 s32 phy_err_drop;
347 s32 mpdu_errs;
348 s32 rx_ovfl_errs;
349 };
350
351 struct ath10k_fw_stats {
352 bool extended;
353 struct list_head pdevs;
354 struct list_head vdevs;
355 struct list_head peers;
356 struct list_head peers_extd;
357 };
358
359 #define ATH10K_TPC_TABLE_TYPE_FLAG 1
360 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
361
362 struct ath10k_tpc_table {
363 u32 pream_idx[WMI_TPC_RATE_MAX];
364 u8 rate_code[WMI_TPC_RATE_MAX];
365 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
366 };
367
368 struct ath10k_tpc_stats {
369 u32 reg_domain;
370 u32 chan_freq;
371 u32 phy_mode;
372 u32 twice_antenna_reduction;
373 u32 twice_max_rd_power;
374 s32 twice_antenna_gain;
375 u32 power_limit;
376 u32 num_tx_chain;
377 u32 ctl;
378 u32 rate_max;
379 u8 flag[WMI_TPC_FLAG];
380 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
381 };
382
383 struct ath10k_tpc_table_final {
384 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
385 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
386 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
387 };
388
389 struct ath10k_tpc_stats_final {
390 u32 reg_domain;
391 u32 chan_freq;
392 u32 phy_mode;
393 u32 twice_antenna_reduction;
394 u32 twice_max_rd_power;
395 s32 twice_antenna_gain;
396 u32 power_limit;
397 u32 num_tx_chain;
398 u32 ctl;
399 u32 rate_max;
400 u8 flag[WMI_TPC_FLAG];
401 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
402 };
403
404 struct ath10k_dfs_stats {
405 u32 phy_errors;
406 u32 pulses_total;
407 u32 pulses_detected;
408 u32 pulses_discarded;
409 u32 radar_detected;
410 };
411
412 enum ath10k_radar_confirmation_state {
413 ATH10K_RADAR_CONFIRMATION_IDLE = 0,
414 ATH10K_RADAR_CONFIRMATION_INPROGRESS,
415 ATH10K_RADAR_CONFIRMATION_STOPPED,
416 };
417
418 struct ath10k_radar_found_info {
419 u32 pri_min;
420 u32 pri_max;
421 u32 width_min;
422 u32 width_max;
423 u32 sidx_min;
424 u32 sidx_max;
425 };
426
427 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
428
429 struct ath10k_peer {
430 struct list_head list;
431 struct ieee80211_vif *vif;
432 struct ieee80211_sta *sta;
433
434 bool removed;
435 int vdev_id;
436 u8 addr[ETH_ALEN];
437 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
438
439 /* protected by ar->data_lock */
440 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
441 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
442 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];
443 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
444 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];
445 struct {
446 enum htt_security_types sec_type;
447 int pn_len;
448 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];
449 };
450
451 struct ath10k_txq {
452 struct list_head list;
453 unsigned long num_fw_queued;
454 unsigned long num_push_allowed;
455 };
456
457 enum ath10k_pkt_rx_err {
458 ATH10K_PKT_RX_ERR_FCS,
459 ATH10K_PKT_RX_ERR_TKIP,
460 ATH10K_PKT_RX_ERR_CRYPT,
461 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
462 ATH10K_PKT_RX_ERR_MAX,
463 };
464
465 enum ath10k_ampdu_subfrm_num {
466 ATH10K_AMPDU_SUBFRM_NUM_10,
467 ATH10K_AMPDU_SUBFRM_NUM_20,
468 ATH10K_AMPDU_SUBFRM_NUM_30,
469 ATH10K_AMPDU_SUBFRM_NUM_40,
470 ATH10K_AMPDU_SUBFRM_NUM_50,
471 ATH10K_AMPDU_SUBFRM_NUM_60,
472 ATH10K_AMPDU_SUBFRM_NUM_MORE,
473 ATH10K_AMPDU_SUBFRM_NUM_MAX,
474 };
475
476 enum ath10k_amsdu_subfrm_num {
477 ATH10K_AMSDU_SUBFRM_NUM_1,
478 ATH10K_AMSDU_SUBFRM_NUM_2,
479 ATH10K_AMSDU_SUBFRM_NUM_3,
480 ATH10K_AMSDU_SUBFRM_NUM_4,
481 ATH10K_AMSDU_SUBFRM_NUM_MORE,
482 ATH10K_AMSDU_SUBFRM_NUM_MAX,
483 };
484
485 struct ath10k_sta_tid_stats {
486 unsigned long rx_pkt_from_fw;
487 unsigned long rx_pkt_unchained;
488 unsigned long rx_pkt_drop_chained;
489 unsigned long rx_pkt_drop_filter;
490 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
491 unsigned long rx_pkt_queued_for_mac;
492 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
493 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
494 };
495
496 enum ath10k_counter_type {
497 ATH10K_COUNTER_TYPE_BYTES,
498 ATH10K_COUNTER_TYPE_PKTS,
499 ATH10K_COUNTER_TYPE_MAX,
500 };
501
502 enum ath10k_stats_type {
503 ATH10K_STATS_TYPE_SUCC,
504 ATH10K_STATS_TYPE_FAIL,
505 ATH10K_STATS_TYPE_RETRY,
506 ATH10K_STATS_TYPE_AMPDU,
507 ATH10K_STATS_TYPE_MAX,
508 };
509
510 struct ath10k_htt_data_stats {
511 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];
512 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];
513 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];
514 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];
515 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];
516 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];
517 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];
518 };
519
520 struct ath10k_htt_tx_stats {
521 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];
522 u64 tx_duration;
523 u64 ba_fails;
524 u64 ack_fails;
525 };
526
527 #define ATH10K_TID_MAX 8
528
529 struct ath10k_sta {
530 struct ath10k_vif *arvif;
531
532 /* the following are protected by ar->data_lock */
533 u32 changed; /* IEEE80211_RC_* */
534 u32 bw;
535 u32 nss;
536 u32 smps;
537 u16 peer_id;
538 struct rate_info txrate;
539 struct ieee80211_tx_info tx_info;
540 u32 tx_retries;
541 u32 tx_failed;
542 u32 last_tx_bitrate;
543
544 u32 rx_rate_code;
545 u32 rx_bitrate_kbps;
546 u32 tx_rate_code;
547 u32 tx_bitrate_kbps;
548 struct work_struct update_wk;
549 u64 rx_duration;
550 struct ath10k_htt_tx_stats *tx_stats;
551 u32 ucast_cipher;
552
553 #ifdef CONFIG_MAC80211_DEBUGFS
554 /* protected by conf_mutex */
555 bool aggr_mode;
556
557 /* Protected with ar->data_lock */
558 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
559 #endif
560 /* Protected with ar->data_lock */
561 u32 peer_ps_state;
562 struct work_struct tid_config_wk;
563 int noack[ATH10K_TID_MAX];
564 int retry_long[ATH10K_TID_MAX];
565 int ampdu[ATH10K_TID_MAX];
566 u8 rate_ctrl[ATH10K_TID_MAX];
567 u32 rate_code[ATH10K_TID_MAX];
568 int rtscts[ATH10K_TID_MAX];
569 };
570
571 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
572 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
573
574 enum ath10k_beacon_state {
575 ATH10K_BEACON_SCHEDULED = 0,
576 ATH10K_BEACON_SENDING,
577 ATH10K_BEACON_SENT,
578 };
579
580 struct ath10k_vif {
581 struct list_head list;
582
583 u32 vdev_id;
584 u16 peer_id;
585 enum wmi_vdev_type vdev_type;
586 enum wmi_vdev_subtype vdev_subtype;
587 u32 beacon_interval;
588 u32 dtim_period;
589 struct sk_buff *beacon;
590 /* protected by data_lock */
591 enum ath10k_beacon_state beacon_state;
592 void *beacon_buf;
593 dma_addr_t beacon_paddr;
594 unsigned long tx_paused; /* arbitrary values defined by target */
595
596 struct ath10k *ar;
597 struct ieee80211_vif *vif;
598
599 bool is_started;
600 bool is_up;
601 bool spectral_enabled;
602 bool ps;
603 u32 aid;
604 u8 bssid[ETH_ALEN];
605
606 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
607 s8 def_wep_key_idx;
608
609 u16 tx_seq_no;
610
611 union {
612 struct {
613 u32 uapsd;
614 } sta;
615 struct {
616 /* 512 stations */
617 u8 tim_bitmap[64];
618 u8 tim_len;
619 u32 ssid_len;
620 u8 ssid[IEEE80211_MAX_SSID_LEN] __nonstring;
621 bool hidden_ssid;
622 /* P2P_IE with NoA attribute for P2P_GO case */
623 u32 noa_len;
624 u8 *noa_data;
625 } ap;
626 } u;
627
628 bool use_cts_prot;
629 bool nohwcrypt;
630 int num_legacy_stations;
631 int txpower;
632 bool ftm_responder;
633 struct wmi_wmm_params_all_arg wmm_params;
634 struct work_struct ap_csa_work;
635 struct delayed_work connection_loss_work;
636 struct cfg80211_bitrate_mask bitrate_mask;
637
638 /* For setting VHT peer fixed rate, protected by conf_mutex */
639 int vht_num_rates;
640 u8 vht_pfr;
641 u32 tid_conf_changed[ATH10K_TID_MAX];
642 int noack[ATH10K_TID_MAX];
643 int retry_long[ATH10K_TID_MAX];
644 int ampdu[ATH10K_TID_MAX];
645 u8 rate_ctrl[ATH10K_TID_MAX];
646 u32 rate_code[ATH10K_TID_MAX];
647 int rtscts[ATH10K_TID_MAX];
648 u32 tids_rst;
649 };
650
651 struct ath10k_vif_iter {
652 u32 vdev_id;
653 struct ath10k_vif *arvif;
654 };
655
656 /* Copy Engine register dump, protected by ce-lock */
657 struct ath10k_ce_crash_data {
658 __le32 base_addr;
659 __le32 src_wr_idx;
660 __le32 src_r_idx;
661 __le32 dst_wr_idx;
662 __le32 dst_r_idx;
663 };
664
665 struct ath10k_ce_crash_hdr {
666 __le32 ce_count;
667 __le32 reserved[3]; /* for future use */
668 struct ath10k_ce_crash_data entries[];
669 };
670
671 #define MAX_MEM_DUMP_TYPE 5
672
673 /* used for crash-dump storage, protected by data-lock */
674 struct ath10k_fw_crash_data {
675 guid_t guid;
676 struct timespec64 timestamp;
677 __le32 registers[REG_DUMP_COUNT_QCA988X];
678 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
679
680 u8 *ramdump_buf;
681 size_t ramdump_buf_len;
682 };
683
684 struct ath10k_debug {
685 struct dentry *debugfs_phy;
686
687 struct ath10k_fw_stats fw_stats;
688 struct completion fw_stats_complete;
689 bool fw_stats_done;
690
691 unsigned long htt_stats_mask;
692 unsigned long reset_htt_stats;
693 struct delayed_work htt_stats_dwork;
694 struct ath10k_dfs_stats dfs_stats;
695 struct ath_dfs_pool_stats dfs_pool_stats;
696
697 /* used for tpc-dump storage, protected by data-lock */
698 struct ath10k_tpc_stats *tpc_stats;
699 struct ath10k_tpc_stats_final *tpc_stats_final;
700
701 struct completion tpc_complete;
702
703 /* protected by conf_mutex */
704 u64 fw_dbglog_mask;
705 u32 fw_dbglog_level;
706 u32 reg_addr;
707 u32 nf_cal_period;
708 void *cal_data;
709 u32 enable_extd_tx_stats;
710 u8 fw_dbglog_mode;
711 };
712
713 enum ath10k_state {
714 ATH10K_STATE_OFF = 0,
715 ATH10K_STATE_ON,
716
717 /* When doing firmware recovery the device is first powered down.
718 * mac80211 is supposed to call in to start() hook later on. It is
719 * however possible that driver unloading and firmware crash overlap.
720 * mac80211 can wait on conf_mutex in stop() while the device is
721 * stopped in ath10k_core_restart() work holding conf_mutex. The state
722 * RESTARTED means that the device is up and mac80211 has started hw
723 * reconfiguration. Once mac80211 is done with the reconfiguration we
724 * set the state to STATE_ON in reconfig_complete().
725 */
726 ATH10K_STATE_RESTARTING,
727 ATH10K_STATE_RESTARTED,
728
729 /* The device has crashed while restarting hw. This state is like ON
730 * but commands are blocked in HTC and -ECOMM response is given. This
731 * prevents completion timeouts and makes the driver more responsive to
732 * userspace commands. This is also prevents recursive recovery.
733 */
734 ATH10K_STATE_WEDGED,
735
736 /* factory tests */
737 ATH10K_STATE_UTF,
738 };
739
740 enum ath10k_firmware_mode {
741 /* the default mode, standard 802.11 functionality */
742 ATH10K_FIRMWARE_MODE_NORMAL,
743
744 /* factory tests etc */
745 ATH10K_FIRMWARE_MODE_UTF,
746 };
747
748 enum ath10k_fw_features {
749 /* wmi_mgmt_rx_hdr contains extra RSSI information */
750 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
751
752 /* Firmware from 10X branch. Deprecated, don't use in new code. */
753 ATH10K_FW_FEATURE_WMI_10X = 1,
754
755 /* firmware support tx frame management over WMI, otherwise it's HTT */
756 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
757
758 /* Firmware does not support P2P */
759 ATH10K_FW_FEATURE_NO_P2P = 3,
760
761 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
762 * bit is required to be set as well. Deprecated, don't use in new
763 * code.
764 */
765 ATH10K_FW_FEATURE_WMI_10_2 = 4,
766
767 /* Some firmware revisions lack proper multi-interface client powersave
768 * implementation. Enabling PS could result in connection drops,
769 * traffic stalls, etc.
770 */
771 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
772
773 /* Some firmware revisions have an incomplete WoWLAN implementation
774 * despite WMI service bit being advertised. This feature flag is used
775 * to distinguish whether WoWLAN is really supported or not.
776 */
777 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
778
779 /* Don't trust error code from otp.bin */
780 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
781
782 /* Some firmware revisions pad 4th hw address to 4 byte boundary making
783 * it 8 bytes long in Native Wifi Rx decap.
784 */
785 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
786
787 /* Firmware supports bypassing PLL setting on init. */
788 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
789
790 /* Raw mode support. If supported, FW supports receiving and transmitting
791 * frames in raw mode.
792 */
793 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
794
795 /* Firmware Supports Adaptive CCA*/
796 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
797
798 /* Firmware supports management frame protection */
799 ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
800
801 /* Firmware supports pull-push model where host shares it's software
802 * queue state with firmware and firmware generates fetch requests
803 * telling host which queues to dequeue tx from.
804 *
805 * Primary function of this is improved MU-MIMO performance with
806 * multiple clients.
807 */
808 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
809
810 /* Firmware supports BT-Coex without reloading firmware via pdev param.
811 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
812 * extended resource config should be enabled always. This firmware IE
813 * is used to configure WMI_COEX_GPIO_SUPPORT.
814 */
815 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
816
817 /* Unused flag and proven to be not working, enable this if you want
818 * to experiment sending NULL func data frames in HTT TX
819 */
820 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
821
822 /* Firmware allow other BSS mesh broadcast/multicast frames without
823 * creating monitor interface. Appropriate rxfilters are programmed for
824 * mesh vdev by firmware itself. This feature flags will be used for
825 * not creating monitor vdev while configuring mesh node.
826 */
827 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
828
829 /* Firmware does not support power save in station mode. */
830 ATH10K_FW_FEATURE_NO_PS = 17,
831
832 /* Firmware allows management tx by reference instead of by value. */
833 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
834
835 /* Firmware load is done externally, not by bmi */
836 ATH10K_FW_FEATURE_NON_BMI = 19,
837
838 /* Firmware sends only one chan_info event per channel */
839 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,
840
841 /* Firmware allows setting peer fixed rate */
842 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,
843
844 /* Firmware support IRAM recovery */
845 ATH10K_FW_FEATURE_IRAM_RECOVERY = 22,
846
847 /* keep last */
848 ATH10K_FW_FEATURE_COUNT,
849 };
850
851 enum ath10k_dev_flags {
852 /* Indicates that ath10k device is during CAC phase of DFS */
853 ATH10K_CAC_RUNNING,
854 ATH10K_FLAG_CORE_REGISTERED,
855
856 /* Device has crashed and needs to restart. This indicates any pending
857 * waiters should immediately cancel instead of waiting for a time out.
858 */
859 ATH10K_FLAG_CRASH_FLUSH,
860
861 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
862 * Raw mode supports both hardware and software crypto. Native WiFi only
863 * supports hardware crypto.
864 */
865 ATH10K_FLAG_RAW_MODE,
866
867 /* Disable HW crypto engine */
868 ATH10K_FLAG_HW_CRYPTO_DISABLED,
869
870 /* Bluetooth coexistence enabled */
871 ATH10K_FLAG_BTCOEX,
872
873 /* Per Station statistics service */
874 ATH10K_FLAG_PEER_STATS,
875
876 /* protected by conf_mutex */
877 ATH10K_FLAG_NAPI_ENABLED,
878 };
879
880 enum ath10k_cal_mode {
881 ATH10K_CAL_MODE_FILE,
882 ATH10K_CAL_MODE_OTP,
883 ATH10K_CAL_MODE_DT,
884 ATH10K_CAL_MODE_NVMEM,
885 ATH10K_PRE_CAL_MODE_FILE,
886 ATH10K_PRE_CAL_MODE_DT,
887 ATH10K_PRE_CAL_MODE_NVMEM,
888 ATH10K_CAL_MODE_EEPROM,
889 };
890
891 enum ath10k_crypt_mode {
892 /* Only use hardware crypto engine */
893 ATH10K_CRYPT_MODE_HW,
894 /* Only use software crypto engine */
895 ATH10K_CRYPT_MODE_SW,
896 };
897
ath10k_cal_mode_str(enum ath10k_cal_mode mode)898 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
899 {
900 switch (mode) {
901 case ATH10K_CAL_MODE_FILE:
902 return "file";
903 case ATH10K_CAL_MODE_OTP:
904 return "otp";
905 case ATH10K_CAL_MODE_DT:
906 return "dt";
907 case ATH10K_CAL_MODE_NVMEM:
908 return "nvmem";
909 case ATH10K_PRE_CAL_MODE_FILE:
910 return "pre-cal-file";
911 case ATH10K_PRE_CAL_MODE_DT:
912 return "pre-cal-dt";
913 case ATH10K_PRE_CAL_MODE_NVMEM:
914 return "pre-cal-nvmem";
915 case ATH10K_CAL_MODE_EEPROM:
916 return "eeprom";
917 }
918
919 return "unknown";
920 }
921
922 enum ath10k_scan_state {
923 ATH10K_SCAN_IDLE,
924 ATH10K_SCAN_STARTING,
925 ATH10K_SCAN_RUNNING,
926 ATH10K_SCAN_ABORTING,
927 };
928
ath10k_scan_state_str(enum ath10k_scan_state state)929 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
930 {
931 switch (state) {
932 case ATH10K_SCAN_IDLE:
933 return "idle";
934 case ATH10K_SCAN_STARTING:
935 return "starting";
936 case ATH10K_SCAN_RUNNING:
937 return "running";
938 case ATH10K_SCAN_ABORTING:
939 return "aborting";
940 }
941
942 return "unknown";
943 }
944
945 enum ath10k_tx_pause_reason {
946 ATH10K_TX_PAUSE_Q_FULL,
947 ATH10K_TX_PAUSE_MAX,
948 };
949
950 struct ath10k_fw_file {
951 const struct firmware *firmware;
952
953 char fw_version[ETHTOOL_FWVERS_LEN];
954
955 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
956
957 enum ath10k_fw_wmi_op_version wmi_op_version;
958 enum ath10k_fw_htt_op_version htt_op_version;
959
960 const void *firmware_data;
961 size_t firmware_len;
962
963 const void *otp_data;
964 size_t otp_len;
965
966 const void *codeswap_data;
967 size_t codeswap_len;
968
969 /* The original idea of struct ath10k_fw_file was that it only
970 * contains struct firmware and pointers to various parts (actual
971 * firmware binary, otp, metadata etc) of the file. This seg_info
972 * is actually created separate but as this is used similarly as
973 * the other firmware components it's more convenient to have it
974 * here.
975 */
976 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
977 };
978
979 struct ath10k_fw_components {
980 const struct firmware *board;
981 const void *board_data;
982 size_t board_len;
983 const struct firmware *ext_board;
984 const void *ext_board_data;
985 size_t ext_board_len;
986
987 struct ath10k_fw_file fw_file;
988 };
989
990 struct ath10k_per_peer_tx_stats {
991 u32 succ_bytes;
992 u32 retry_bytes;
993 u32 failed_bytes;
994 u8 ratecode;
995 u8 flags;
996 u16 peer_id;
997 u16 succ_pkts;
998 u16 retry_pkts;
999 u16 failed_pkts;
1000 u16 duration;
1001 u32 reserved1;
1002 u32 reserved2;
1003 };
1004
1005 enum ath10k_dev_type {
1006 ATH10K_DEV_TYPE_LL,
1007 ATH10K_DEV_TYPE_HL,
1008 };
1009
1010 struct ath10k_bus_params {
1011 u32 chip_id;
1012 enum ath10k_dev_type dev_type;
1013 bool link_can_suspend;
1014 bool hl_msdu_ids;
1015 };
1016
1017 struct ath10k {
1018 struct ath_common ath_common;
1019 struct ieee80211_hw *hw;
1020 struct ieee80211_ops *ops;
1021 struct device *dev;
1022 struct msa_region {
1023 dma_addr_t paddr;
1024 u32 mem_size;
1025 void *vaddr;
1026 } msa;
1027 u8 mac_addr[ETH_ALEN];
1028
1029 enum ath10k_hw_rev hw_rev;
1030 u16 dev_id;
1031 u32 chip_id;
1032 u32 target_version;
1033 u8 fw_version_major;
1034 u32 fw_version_minor;
1035 u16 fw_version_release;
1036 u16 fw_version_build;
1037 u32 fw_stats_req_mask;
1038 u32 phy_capability;
1039 u32 hw_min_tx_power;
1040 u32 hw_max_tx_power;
1041 u32 hw_eeprom_rd;
1042 u32 ht_cap_info;
1043 u32 vht_cap_info;
1044 u32 vht_supp_mcs;
1045 u32 num_rf_chains;
1046 u32 max_spatial_stream;
1047 #if defined(CONFIG_FWLOG)
1048 u32 fwlog_max_moduleid;
1049 #endif
1050 /* protected by conf_mutex */
1051 u32 low_2ghz_chan;
1052 u32 high_2ghz_chan;
1053 u32 low_5ghz_chan;
1054 u32 high_5ghz_chan;
1055 bool ani_enabled;
1056 u32 sys_cap_info;
1057
1058 /* protected by data_lock */
1059 bool hw_rfkill_on;
1060
1061 /* protected by conf_mutex */
1062 u8 ps_state_enable;
1063
1064 bool nlo_enabled;
1065 bool p2p;
1066
1067 struct {
1068 enum ath10k_bus bus;
1069 const struct ath10k_hif_ops *ops;
1070 } hif;
1071
1072 struct completion target_suspend;
1073 struct completion driver_recovery;
1074
1075 const struct ath10k_hw_regs *regs;
1076 const struct ath10k_hw_ce_regs *hw_ce_regs;
1077 const struct ath10k_hw_values *hw_values;
1078 struct ath10k_bmi bmi;
1079 struct ath10k_wmi wmi;
1080 struct ath10k_htc htc;
1081 struct ath10k_htt htt;
1082
1083 struct ath10k_hw_params hw_params;
1084
1085 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
1086 struct ath10k_fw_components normal_mode_fw;
1087
1088 /* READ-ONLY images of the running firmware, which can be either
1089 * normal or UTF. Do not modify, release etc!
1090 */
1091 const struct ath10k_fw_components *running_fw;
1092
1093 const char *board_name;
1094
1095 const struct firmware *pre_cal_file;
1096 const struct firmware *cal_file;
1097
1098 struct {
1099 u32 vendor;
1100 u32 device;
1101 u32 subsystem_vendor;
1102 u32 subsystem_device;
1103
1104 bool bmi_ids_valid;
1105 bool qmi_ids_valid;
1106 u32 qmi_board_id;
1107 u32 qmi_chip_id;
1108 u8 bmi_board_id;
1109 u8 bmi_eboard_id;
1110 u8 bmi_chip_id;
1111 bool ext_bid_supported;
1112
1113 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
1114 } id;
1115
1116 int fw_api;
1117 int bd_api;
1118 enum ath10k_cal_mode cal_mode;
1119
1120 struct {
1121 struct completion started;
1122 struct completion completed;
1123 struct completion on_channel;
1124 struct delayed_work timeout;
1125 enum ath10k_scan_state state;
1126 bool is_roc;
1127 int vdev_id;
1128 int roc_freq;
1129 bool roc_notify;
1130 } scan;
1131
1132 struct {
1133 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
1134 } mac;
1135
1136 /* should never be NULL; needed for regular htt rx */
1137 struct ieee80211_channel *rx_channel;
1138
1139 /* valid during scan; needed for mgmt rx during scan */
1140 struct ieee80211_channel *scan_channel;
1141
1142 /* current operating channel definition */
1143 struct cfg80211_chan_def chandef;
1144
1145 /* currently configured operating channel in firmware */
1146 struct ieee80211_channel *tgt_oper_chan;
1147
1148 unsigned long long free_vdev_map;
1149 struct ath10k_vif *monitor_arvif;
1150 bool monitor;
1151 int monitor_vdev_id;
1152 bool monitor_started;
1153 unsigned int filter_flags;
1154 unsigned long dev_flags;
1155 bool dfs_block_radar_events;
1156
1157 /* protected by conf_mutex */
1158 bool radar_enabled;
1159 int num_started_vdevs;
1160
1161 /* Protected by conf-mutex */
1162 u8 cfg_tx_chainmask;
1163 u8 cfg_rx_chainmask;
1164
1165 struct completion install_key_done;
1166
1167 int last_wmi_vdev_start_status;
1168 struct completion vdev_setup_done;
1169 struct completion vdev_delete_done;
1170 struct completion peer_stats_info_complete;
1171
1172 struct workqueue_struct *workqueue;
1173 /* Auxiliary workqueue */
1174 struct workqueue_struct *workqueue_aux;
1175 struct workqueue_struct *workqueue_tx_complete;
1176 /* prevents concurrent FW reconfiguration */
1177 struct mutex conf_mutex;
1178
1179 /* protects coredump data */
1180 struct mutex dump_mutex;
1181
1182 /* protects shared structure data */
1183 spinlock_t data_lock;
1184
1185 /* serialize wake_tx_queue calls per ac */
1186 spinlock_t queue_lock[IEEE80211_NUM_ACS];
1187
1188 struct list_head arvifs;
1189 struct list_head peers;
1190 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
1191 wait_queue_head_t peer_mapping_wq;
1192
1193 /* protected by conf_mutex */
1194 int num_peers;
1195 int num_stations;
1196
1197 int max_num_peers;
1198 int max_num_stations;
1199 int max_num_vdevs;
1200 int max_num_tdls_vdevs;
1201 int num_active_peers;
1202 int num_tids;
1203
1204 struct work_struct svc_rdy_work;
1205 struct sk_buff *svc_rdy_skb;
1206
1207 struct work_struct offchan_tx_work;
1208 struct sk_buff_head offchan_tx_queue;
1209 struct completion offchan_tx_completed;
1210 struct sk_buff *offchan_tx_skb;
1211
1212 struct work_struct wmi_mgmt_tx_work;
1213 struct sk_buff_head wmi_mgmt_tx_queue;
1214
1215 enum ath10k_state state;
1216
1217 struct work_struct register_work;
1218 struct work_struct restart_work;
1219 struct work_struct bundle_tx_work;
1220 struct work_struct tx_complete_work;
1221
1222 atomic_t pending_recovery;
1223 unsigned int recovery_count;
1224 /* continuous recovery fail count */
1225 atomic_t fail_cont_count;
1226
1227 /* cycle count is reported twice for each visited channel during scan.
1228 * access protected by data_lock
1229 */
1230 u32 survey_last_rx_clear_count;
1231 u32 survey_last_cycle_count;
1232 struct survey_info survey[ATH10K_NUM_CHANS];
1233
1234 /* Channel info events are expected to come in pairs without and with
1235 * COMPLETE flag set respectively for each channel visit during scan.
1236 *
1237 * However there are deviations from this rule. This flag is used to
1238 * avoid reporting garbage data.
1239 */
1240 bool ch_info_can_report_survey;
1241 struct completion bss_survey_done;
1242
1243 struct dfs_pattern_detector *dfs_detector;
1244
1245 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
1246
1247 #ifdef CONFIG_ATH10K_DEBUGFS
1248 struct ath10k_debug debug;
1249 struct {
1250 /* relay(fs) channel for spectral scan */
1251 struct rchan *rfs_chan_spec_scan;
1252
1253 /* spectral_mode and spec_config are protected by conf_mutex */
1254 enum ath10k_spectral_mode mode;
1255 struct ath10k_spec_scan config;
1256 } spectral;
1257 #endif
1258
1259 u32 pktlog_filter;
1260
1261 #ifdef CONFIG_DEV_COREDUMP
1262 struct {
1263 struct ath10k_fw_crash_data *fw_crash_data;
1264 } coredump;
1265 #endif
1266
1267 struct {
1268 /* protected by conf_mutex */
1269 struct ath10k_fw_components utf_mode_fw;
1270
1271 /* protected by data_lock */
1272 bool utf_monitor;
1273 } testmode;
1274
1275 struct {
1276 struct gpio_led wifi_led;
1277 struct led_classdev cdev;
1278 char label[48];
1279 u32 gpio_state_pin;
1280 } leds;
1281
1282 struct {
1283 /* protected by data_lock */
1284 u32 rx_crc_err_drop;
1285 u32 fw_crash_counter;
1286 u32 fw_warm_reset_counter;
1287 u32 fw_cold_reset_counter;
1288 } stats;
1289
1290 struct ath10k_thermal thermal;
1291 struct ath10k_wow wow;
1292 struct ath10k_per_peer_tx_stats peer_tx_stats;
1293
1294 #if defined(CONFIG_FWLOG)
1295 struct work_struct fwlog_tx_work;
1296 struct sk_buff_head fwlog_tx_queue;
1297 #endif
1298
1299 /* NAPI */
1300 struct net_device *napi_dev;
1301 struct napi_struct napi;
1302
1303 struct work_struct set_coverage_class_work;
1304 /* protected by conf_mutex */
1305 struct {
1306 /* writing also protected by data_lock */
1307 s16 coverage_class;
1308
1309 u32 reg_phyclk;
1310 u32 reg_slottime_conf;
1311 u32 reg_slottime_orig;
1312 u32 reg_ack_cts_timeout_conf;
1313 u32 reg_ack_cts_timeout_orig;
1314 } fw_coverage;
1315
1316 u32 ampdu_reference;
1317
1318 const u8 *wmi_key_cipher;
1319 void *ce_priv;
1320
1321 u32 sta_tid_stats_mask;
1322
1323 /* protected by data_lock */
1324 enum ath10k_radar_confirmation_state radar_conf_state;
1325 struct ath10k_radar_found_info last_radar_info;
1326 struct work_struct radar_confirmation_work;
1327 struct ath10k_bus_params bus_param;
1328 struct completion peer_delete_done;
1329
1330 bool coex_support;
1331 int coex_gpio_pin;
1332
1333 s32 tx_power_2g_limit;
1334 s32 tx_power_5g_limit;
1335
1336 /* must be last */
1337 u8 drv_priv[] __aligned(sizeof(void *));
1338 };
1339
ath10k_peer_stats_enabled(struct ath10k * ar)1340 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
1341 {
1342 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
1343 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
1344 return true;
1345
1346 return false;
1347 }
1348
1349 extern unsigned int ath10k_frame_mode;
1350 extern unsigned long ath10k_coredump_mask;
1351
1352 void ath10k_core_napi_sync_disable(struct ath10k *ar);
1353 void ath10k_core_napi_enable(struct ath10k *ar);
1354 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1355 enum ath10k_bus bus,
1356 enum ath10k_hw_rev hw_rev,
1357 const struct ath10k_hif_ops *hif_ops);
1358 void ath10k_core_destroy(struct ath10k *ar);
1359 void ath10k_core_get_fw_features_str(struct ath10k *ar,
1360 char *buf,
1361 size_t max_len);
1362 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1363 struct ath10k_fw_file *fw_file);
1364
1365 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1366 const struct ath10k_fw_components *fw_components);
1367 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
1368 void ath10k_core_stop(struct ath10k *ar);
1369 void ath10k_core_start_recovery(struct ath10k *ar);
1370 int ath10k_core_register(struct ath10k *ar,
1371 const struct ath10k_bus_params *bus_params);
1372 void ath10k_core_unregister(struct ath10k *ar);
1373 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);
1374 int ath10k_core_check_dt(struct ath10k *ar);
1375 void ath10k_core_free_board_files(struct ath10k *ar);
1376
1377 #endif /* _CORE_H_ */
1378