1 /*
2 * Copyright 1996 Massachusetts Institute of Technology
3 *
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
14 * warranty.
15 *
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/types.h>
31 #include <sys/fcntl.h>
32 #include <sys/mman.h>
33 #include <sys/pciio.h>
34 #include <sys/queue.h>
35
36 #include <vm/vm.h>
37
38 #include <dev/pci/pcireg.h>
39
40 #include <assert.h>
41 #include <bitstring.h>
42 #include <ctype.h>
43 #include <err.h>
44 #include <inttypes.h>
45 #include <stdbool.h>
46 #include <stdlib.h>
47 #include <stdio.h>
48 #include <string.h>
49 #include <unistd.h>
50
51 #include "pathnames.h"
52 #include "pciconf.h"
53
54 struct pci_device_info
55 {
56 TAILQ_ENTRY(pci_device_info) link;
57 int id;
58 char *desc;
59 };
60
61 struct pci_vendor_info
62 {
63 TAILQ_ENTRY(pci_vendor_info) link;
64 TAILQ_HEAD(,pci_device_info) devs;
65 int id;
66 char *desc;
67 };
68
69
70 struct pci_tree_entry {
71 TAILQ_ENTRY(pci_tree_entry) link;
72 TAILQ_HEAD(pci_tree_list, pci_tree_entry) children;
73 struct pci_conf *p;
74 };
75
76 static TAILQ_HEAD(,pci_vendor_info) pci_vendors;
77
78 static struct pcisel getsel(const char *str);
79 static void list_bridge(int fd, struct pci_conf *p);
80 static void list_bars(int fd, struct pci_conf *p);
81 static void list_devs(const char *name, int verbose, int bars, int bridge,
82 int caps, int errors, int vpd, int compact);
83 static void show_tree(int verbose);
84 static void list_verbose(struct pci_conf *p);
85 static void list_vpd(int fd, struct pci_conf *p);
86 static const char *guess_class(struct pci_conf *p);
87 static const char *guess_subclass(struct pci_conf *p);
88 static int load_vendors(void);
89 static void readit(const char *, const char *, int);
90 static void writeit(const char *, const char *, const char *, int);
91 static void chkattached(const char *);
92 static void dump_bar(const char *name, const char *reg, const char *bar_start,
93 const char *bar_count, int width, int verbose);
94 static void read_bar(const char *name, const char *bar, const char *start_end,
95 int width);
96 static void write_bar(const char *name, const char *bar, const char *offset_str,
97 const char *value_str, int width);
98
99 static int exitstatus = 0;
100
101 static void
usage(void)102 usage(void)
103 {
104
105 fprintf(stderr, "%s",
106 "usage: pciconf -l [-BbcevV] [device]\n"
107 " pciconf -t [-v]\n"
108 " pciconf -a device\n"
109 " pciconf -r [-b | -h] device addr[:addr2]\n"
110 " pciconf -w [-b | -h] device addr value\n"
111 " pciconf -D [-b | -h | -x] device bar [start [count]]\n"
112 " pciconf -R [-b | -h | -x] device bar start[:end]\n"
113 " pciconf -W [-b | -h | -x] device bar offset value"
114 "\n");
115 exit(1);
116 }
117
118 int
main(int argc,char ** argv)119 main(int argc, char **argv)
120 {
121 int c, width;
122 enum { NONE, LIST, TREE, READ, WRITE, ATTACHED, DUMPBAR, READBAR,
123 WRITEBAR } mode;
124 int compact, bars, bridge, caps, errors, verbose, vpd;
125
126 mode = NONE;
127 compact = bars = bridge = caps = errors = verbose = vpd = 0;
128 width = 4;
129
130 while ((c = getopt(argc, argv, "aBbcDehlRrtWwVvx")) != -1) {
131 switch(c) {
132 case 'a':
133 mode = ATTACHED;
134 break;
135
136 case 'B':
137 bridge = 1;
138 break;
139
140 case 'b':
141 bars = 1;
142 width = 1;
143 break;
144
145 case 'c':
146 caps++;
147 break;
148
149 case 'D':
150 mode = DUMPBAR;
151 break;
152
153 case 'e':
154 errors = 1;
155 break;
156
157 case 'h':
158 width = 2;
159 break;
160
161 case 'l':
162 if (mode == LIST)
163 compact = 1;
164 mode = LIST;
165 break;
166
167 case 'R':
168 mode = READBAR;
169 break;
170
171 case 'r':
172 mode = READ;
173 break;
174
175 case 't':
176 mode = TREE;
177 break;
178
179 case 'W':
180 mode = WRITEBAR;
181 break;
182
183 case 'w':
184 mode = WRITE;
185 break;
186
187 case 'v':
188 verbose++;
189 break;
190
191 case 'V':
192 vpd = 1;
193 break;
194
195 case 'x':
196 width = 8;
197 break;
198
199 default:
200 usage();
201 }
202 }
203
204 switch (mode) {
205 case LIST:
206 if (optind >= argc + 1)
207 usage();
208 list_devs(optind + 1 == argc ? argv[optind] : NULL, verbose,
209 bars, bridge, caps, errors, vpd, compact);
210 break;
211 case TREE:
212 if (optind != argc)
213 usage();
214 show_tree(verbose);
215 break;
216 case ATTACHED:
217 if (optind + 1 != argc)
218 usage();
219 chkattached(argv[optind]);
220 break;
221 case READ:
222 if (optind + 2 != argc || width == 8)
223 usage();
224 readit(argv[optind], argv[optind + 1], width);
225 break;
226 case WRITE:
227 if (optind + 3 != argc || width == 8)
228 usage();
229 writeit(argv[optind], argv[optind + 1], argv[optind + 2],
230 width);
231 break;
232 case DUMPBAR:
233 if (optind + 2 > argc || optind + 4 < argc)
234 usage();
235 dump_bar(argv[optind], argv[optind + 1],
236 optind + 2 < argc ? argv[optind + 2] : NULL,
237 optind + 3 < argc ? argv[optind + 3] : NULL,
238 width, verbose);
239 break;
240 case READBAR:
241 if (optind + 3 != argc)
242 usage();
243 read_bar(argv[optind], argv[optind + 1], argv[optind + 2],
244 width);
245 break;
246 case WRITEBAR:
247 if (optind + 4 != argc)
248 usage();
249 write_bar(argv[optind], argv[optind + 1], argv[optind + 2],
250 argv[optind + 3], width);
251 break;
252 default:
253 usage();
254 }
255
256 return (exitstatus);
257 }
258
259 static bool
fetch_devs(int fd,const char * name,struct pci_conf ** confp,size_t * countp)260 fetch_devs(int fd, const char *name, struct pci_conf **confp, size_t *countp)
261 {
262 struct pci_conf_io pc;
263 struct pci_conf conf[255], *p;
264 struct pci_match_conf patterns[1];
265 size_t count;
266
267 bzero(&pc, sizeof(struct pci_conf_io));
268 pc.match_buf_len = sizeof(conf);
269 pc.matches = conf;
270 if (name != NULL) {
271 bzero(&patterns, sizeof(patterns));
272 patterns[0].pc_sel = getsel(name);
273 patterns[0].flags = PCI_GETCONF_MATCH_DOMAIN |
274 PCI_GETCONF_MATCH_BUS | PCI_GETCONF_MATCH_DEV |
275 PCI_GETCONF_MATCH_FUNC;
276 pc.num_patterns = 1;
277 pc.pat_buf_len = sizeof(patterns);
278 pc.patterns = patterns;
279 }
280
281 p = NULL;
282 count = 0;
283 do {
284 if (ioctl(fd, PCIOCGETCONF, &pc) == -1)
285 err(1, "ioctl(PCIOCGETCONF)");
286
287 if (pc.status == PCI_GETCONF_LIST_CHANGED) {
288 free(p);
289 p = NULL;
290 count = 0;
291 pc.offset = 0;
292 continue;
293 }
294
295 if (pc.status == PCI_GETCONF_ERROR) {
296 warnx("error returned from PCIOCGETCONF ioctl");
297 return (false);
298 }
299
300 p = reallocf(p, (count + pc.num_matches) * sizeof(*p));
301 if (p == NULL) {
302 warnx("failed to allocate buffer for PCIOCGETCONF results");
303 return (false);
304 }
305
306 memcpy(p + count, conf, pc.num_matches * sizeof(*p));
307 count += pc.num_matches;
308 } while (pc.status == PCI_GETCONF_MORE_DEVS);
309
310 *confp = p;
311 *countp = count;
312 return (true);
313 }
314
315 static void
list_devs(const char * name,int verbose,int bars,int bridge,int caps,int errors,int vpd,int compact)316 list_devs(const char *name, int verbose, int bars, int bridge, int caps,
317 int errors, int vpd, int compact)
318 {
319 int fd;
320 struct pci_conf *conf, *p;
321 size_t count;
322 int none_count = 0;
323
324 if (verbose)
325 load_vendors();
326
327 fd = open(_PATH_DEVPCI, (bridge || caps || errors) ? O_RDWR : O_RDONLY,
328 0);
329 if (fd < 0)
330 err(1, "%s", _PATH_DEVPCI);
331
332 if (!fetch_devs(fd, name, &conf, &count)) {
333 exitstatus = 1;
334 close(fd);
335 return;
336 }
337
338 if (compact)
339 printf("drv\tselector\tclass rev hdr "
340 "vendor device subven subdev\n");
341 for (p = conf; p < conf + count; p++) {
342 if (compact)
343 printf("%s%d@pci%d:%d:%d:%d:"
344 "\t%06x %02x %02x "
345 "%04x %04x %04x %04x\n",
346 *p->pd_name ? p->pd_name : "none",
347 *p->pd_name ? (int)p->pd_unit :
348 none_count++, p->pc_sel.pc_domain,
349 p->pc_sel.pc_bus, p->pc_sel.pc_dev,
350 p->pc_sel.pc_func, (p->pc_class << 16) |
351 (p->pc_subclass << 8) | p->pc_progif,
352 p->pc_revid, p->pc_hdr,
353 p->pc_vendor, p->pc_device,
354 p->pc_subvendor, p->pc_subdevice);
355 else
356 printf("%s%d@pci%d:%d:%d:%d:"
357 "\tclass=0x%06x rev=0x%02x hdr=0x%02x "
358 "vendor=0x%04x device=0x%04x "
359 "subvendor=0x%04x subdevice=0x%04x\n",
360 *p->pd_name ? p->pd_name : "none",
361 *p->pd_name ? (int)p->pd_unit :
362 none_count++, p->pc_sel.pc_domain,
363 p->pc_sel.pc_bus, p->pc_sel.pc_dev,
364 p->pc_sel.pc_func, (p->pc_class << 16) |
365 (p->pc_subclass << 8) | p->pc_progif,
366 p->pc_revid, p->pc_hdr,
367 p->pc_vendor, p->pc_device,
368 p->pc_subvendor, p->pc_subdevice);
369 if (verbose)
370 list_verbose(p);
371 if (bars)
372 list_bars(fd, p);
373 if (bridge)
374 list_bridge(fd, p);
375 if (caps)
376 list_caps(fd, p, caps);
377 if (errors)
378 list_errors(fd, p);
379 if (vpd)
380 list_vpd(fd, p);
381 }
382
383 free(conf);
384 close(fd);
385 }
386
387 static int
pci_conf_compar(const void * lhs,const void * rhs)388 pci_conf_compar(const void *lhs, const void *rhs)
389 {
390 const struct pci_conf *l, *r;
391
392 l = lhs;
393 r = rhs;
394 if (l->pc_sel.pc_domain != r->pc_sel.pc_domain)
395 return (l->pc_sel.pc_domain - r->pc_sel.pc_domain);
396 if (l->pc_sel.pc_bus != r->pc_sel.pc_bus)
397 return (l->pc_sel.pc_bus - r->pc_sel.pc_bus);
398 if (l->pc_sel.pc_dev != r->pc_sel.pc_dev)
399 return (l->pc_sel.pc_dev - r->pc_sel.pc_dev);
400 return (l->pc_sel.pc_func - r->pc_sel.pc_func);
401 }
402
403 static void
tree_add_device(struct pci_tree_list * head,struct pci_conf * p,struct pci_conf * conf,size_t count,bitstr_t * added)404 tree_add_device(struct pci_tree_list *head, struct pci_conf *p,
405 struct pci_conf *conf, size_t count, bitstr_t *added)
406 {
407 struct pci_tree_entry *e;
408 struct pci_conf *child;
409 size_t i;
410
411 e = malloc(sizeof(*e));
412 TAILQ_INIT(&e->children);
413 e->p = p;
414 TAILQ_INSERT_TAIL(head, e, link);
415
416 switch (p->pc_hdr) {
417 case PCIM_HDRTYPE_BRIDGE:
418 case PCIM_HDRTYPE_CARDBUS:
419 break;
420 default:
421 return;
422 }
423 if (p->pc_secbus == 0)
424 return;
425
426 assert(p->pc_subbus >= p->pc_secbus);
427 for (i = 0; i < count; i++) {
428 child = conf + i;
429 if (child->pc_sel.pc_domain < p->pc_sel.pc_domain)
430 continue;
431 if (child->pc_sel.pc_domain > p->pc_sel.pc_domain)
432 break;
433 if (child->pc_sel.pc_bus < p->pc_secbus)
434 continue;
435 if (child->pc_sel.pc_bus > p->pc_subbus)
436 break;
437
438 if (child->pc_sel.pc_bus == p->pc_secbus) {
439 assert(bit_test(added, i) == 0);
440 bit_set(added, i);
441 tree_add_device(&e->children, conf + i, conf, count,
442 added);
443 continue;
444 }
445
446 if (bit_test(added, i) == 0) {
447 /*
448 * This really shouldn't happen, but if for
449 * some reason a child bridge doesn't claim
450 * this device, display it now rather than
451 * later.
452 */
453 bit_set(added, i);
454 tree_add_device(&e->children, conf + i, conf, count,
455 added);
456 continue;
457 }
458 }
459 }
460
461 static bool
build_tree(struct pci_tree_list * head,struct pci_conf * conf,size_t count)462 build_tree(struct pci_tree_list *head, struct pci_conf *conf, size_t count)
463 {
464 bitstr_t *added;
465 size_t i;
466
467 TAILQ_INIT(head);
468
469 /*
470 * Allocate a bitstring to track which devices have already
471 * been added to the tree.
472 */
473 added = bit_alloc(count);
474 if (added == NULL)
475 return (false);
476
477 for (i = 0; i < count; i++) {
478 if (bit_test(added, i))
479 continue;
480
481 bit_set(added, i);
482 tree_add_device(head, conf + i, conf, count, added);
483 }
484
485 free(added);
486 return (true);
487 }
488
489 static void
free_tree(struct pci_tree_list * head)490 free_tree(struct pci_tree_list *head)
491 {
492 struct pci_tree_entry *e, *n;
493
494 TAILQ_FOREACH_SAFE(e, head, link, n) {
495 free_tree(&e->children);
496 TAILQ_REMOVE(head, e, link);
497 free(e);
498 }
499 }
500
501 static void
print_tree_entry(struct pci_tree_entry * e,const char * indent,bool last,int verbose)502 print_tree_entry(struct pci_tree_entry *e, const char *indent, bool last,
503 int verbose)
504 {
505 struct pci_vendor_info *vi;
506 struct pci_device_info *di;
507 struct pci_tree_entry *child;
508 struct pci_conf *p = e->p;
509 char *indent_buf;
510
511 printf("%s%c--- ", indent, last ? '`' : '|');
512 if (p->pd_name[0] != '\0')
513 printf("%s%lu", p->pd_name, p->pd_unit);
514 else
515 printf("pci%d:%d:%d:%d", p->pc_sel.pc_domain, p->pc_sel.pc_bus,
516 p->pc_sel.pc_dev, p->pc_sel.pc_func);
517
518 if (verbose) {
519 di = NULL;
520 TAILQ_FOREACH(vi, &pci_vendors, link) {
521 if (vi->id == p->pc_vendor) {
522 printf(" %s", vi->desc);
523 TAILQ_FOREACH(di, &vi->devs, link) {
524 if (di->id == p->pc_device) {
525 printf(" %s", di->desc);
526 if (verbose > 1)
527 printf(" [0x%04x:0x%04x "
528 "0x%04x:0x%04x]",
529 p->pc_vendor,
530 p->pc_device,
531 p->pc_subvendor,
532 p->pc_subdevice);
533 break;
534 }
535 }
536 break;
537 }
538 }
539 if (vi == NULL)
540 printf(" vendor=0x%04x device=0x%04x", p->pc_vendor,
541 p->pc_device);
542 else if (di == NULL)
543 printf(" device=0x%04x", p->pc_device);
544 }
545 printf("\n");
546
547 if (TAILQ_EMPTY(&e->children))
548 return;
549
550 asprintf(&indent_buf, "%s%c ", indent, last ? ' ' : '|');
551 TAILQ_FOREACH(child, &e->children, link) {
552 print_tree_entry(child, indent_buf, TAILQ_NEXT(child, link) ==
553 NULL, verbose);
554 }
555 free(indent_buf);
556 }
557
558 static void
show_tree(int verbose)559 show_tree(int verbose)
560 {
561 struct pci_tree_list head;
562 struct pci_tree_entry *e, *n;
563 struct pci_conf *conf;
564 size_t count;
565 int fd;
566 bool last, new_bus;
567
568 if (verbose)
569 load_vendors();
570
571 fd = open(_PATH_DEVPCI, O_RDONLY);
572 if (fd < 0)
573 err(1, "%s", _PATH_DEVPCI);
574
575 if (!fetch_devs(fd, NULL, &conf, &count)) {
576 exitstatus = 1;
577 goto close_fd;
578 }
579
580 if (count == 0)
581 goto close_fd;
582
583 if (conf[0].pc_reported_len < offsetof(struct pci_conf, pc_subbus)) {
584 warnx("kernel too old");
585 exitstatus = 1;
586 goto free_conf;
587 }
588
589 /* First, sort devices by DBSF. */
590 qsort(conf, count, sizeof(*conf), pci_conf_compar);
591
592 if (!build_tree(&head, conf, count)) {
593 warnx("failed to build tree of PCI devices");
594 exitstatus = 1;
595 goto free_conf;
596 }
597
598 new_bus = true;
599 TAILQ_FOREACH(e, &head, link) {
600 if (new_bus) {
601 printf("--- pci%d:%d\n", e->p->pc_sel.pc_domain,
602 e->p->pc_sel.pc_bus);
603 new_bus = false;
604 }
605
606 /* Is this the last entry for this bus? */
607 n = TAILQ_NEXT(e, link);
608 if (n == NULL ||
609 n->p->pc_sel.pc_domain != e->p->pc_sel.pc_domain ||
610 n->p->pc_sel.pc_bus != e->p->pc_sel.pc_bus) {
611 last = true;
612 new_bus = true;
613 } else
614 last = false;
615
616 print_tree_entry(e, " ", last, verbose);
617 }
618
619 free_tree(&head);
620 free_conf:
621 free(conf);
622 close_fd:
623 close(fd);
624 }
625
626 static void
print_bus_range(struct pci_conf * p)627 print_bus_range(struct pci_conf *p)
628 {
629 printf(" bus range = %u-%u\n", p->pc_secbus, p->pc_subbus);
630 }
631
632 static void
print_window(int reg,const char * type,int range,uint64_t base,uint64_t limit)633 print_window(int reg, const char *type, int range, uint64_t base,
634 uint64_t limit)
635 {
636
637 printf(" window[%02x] = type %s, range %2d, addr %#jx-%#jx, %s\n",
638 reg, type, range, (uintmax_t)base, (uintmax_t)limit,
639 base < limit ? "enabled" : "disabled");
640 }
641
642 static void
print_special_decode(bool isa,bool vga,bool subtractive)643 print_special_decode(bool isa, bool vga, bool subtractive)
644 {
645 bool comma;
646
647 if (isa || vga || subtractive) {
648 comma = false;
649 printf(" decode = ");
650 if (isa) {
651 printf("ISA");
652 comma = true;
653 }
654 if (vga) {
655 printf("%sVGA", comma ? ", " : "");
656 comma = true;
657 }
658 if (subtractive)
659 printf("%ssubtractive", comma ? ", " : "");
660 printf("\n");
661 }
662 }
663
664 static void
print_bridge_windows(int fd,struct pci_conf * p)665 print_bridge_windows(int fd, struct pci_conf *p)
666 {
667 uint64_t base, limit;
668 uint32_t val;
669 uint16_t bctl;
670 bool subtractive;
671 int range;
672
673 /*
674 * XXX: This assumes that a window with a base and limit of 0
675 * is not implemented. In theory a window might be programmed
676 * at the smallest size with a base of 0, but those do not seem
677 * common in practice.
678 */
679 val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1);
680 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) {
681 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
682 base = PCI_PPBIOBASE(
683 read_config(fd, &p->pc_sel, PCIR_IOBASEH_1, 2),
684 val);
685 limit = PCI_PPBIOLIMIT(
686 read_config(fd, &p->pc_sel, PCIR_IOLIMITH_1, 2),
687 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1));
688 range = 32;
689 } else {
690 base = PCI_PPBIOBASE(0, val);
691 limit = PCI_PPBIOLIMIT(0,
692 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1));
693 range = 16;
694 }
695 print_window(PCIR_IOBASEL_1, "I/O Port", range, base, limit);
696 }
697
698 base = PCI_PPBMEMBASE(0,
699 read_config(fd, &p->pc_sel, PCIR_MEMBASE_1, 2));
700 limit = PCI_PPBMEMLIMIT(0,
701 read_config(fd, &p->pc_sel, PCIR_MEMLIMIT_1, 2));
702 print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit);
703
704 val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2);
705 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) {
706 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
707 base = PCI_PPBMEMBASE(
708 read_config(fd, &p->pc_sel, PCIR_PMBASEH_1, 4),
709 val);
710 limit = PCI_PPBMEMLIMIT(
711 read_config(fd, &p->pc_sel, PCIR_PMLIMITH_1, 4),
712 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2));
713 range = 64;
714 } else {
715 base = PCI_PPBMEMBASE(0, val);
716 limit = PCI_PPBMEMLIMIT(0,
717 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2));
718 range = 32;
719 }
720 print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base,
721 limit);
722 }
723
724 /*
725 * XXX: This list of bridges that are subtractive but do not set
726 * progif to indicate it is copied from pci_pci.c.
727 */
728 subtractive = p->pc_progif == PCIP_BRIDGE_PCI_SUBTRACTIVE;
729 switch (p->pc_device << 16 | p->pc_vendor) {
730 case 0xa002177d: /* Cavium ThunderX */
731 case 0x124b8086: /* Intel 82380FB Mobile */
732 case 0x060513d7: /* Toshiba ???? */
733 subtractive = true;
734 }
735 if (p->pc_vendor == 0x8086 && (p->pc_device & 0xff00) == 0x2400)
736 subtractive = true;
737
738 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_1, 2);
739 print_special_decode(bctl & PCIB_BCR_ISA_ENABLE,
740 bctl & PCIB_BCR_VGA_ENABLE, subtractive);
741 }
742
743 static void
print_cardbus_mem_window(int fd,struct pci_conf * p,int basereg,int limitreg,bool prefetch)744 print_cardbus_mem_window(int fd, struct pci_conf *p, int basereg, int limitreg,
745 bool prefetch)
746 {
747
748 print_window(basereg, prefetch ? "Prefetchable Memory" : "Memory", 32,
749 PCI_CBBMEMBASE(read_config(fd, &p->pc_sel, basereg, 4)),
750 PCI_CBBMEMLIMIT(read_config(fd, &p->pc_sel, limitreg, 4)));
751 }
752
753 static void
print_cardbus_io_window(int fd,struct pci_conf * p,int basereg,int limitreg)754 print_cardbus_io_window(int fd, struct pci_conf *p, int basereg, int limitreg)
755 {
756 uint32_t base, limit;
757 uint32_t val;
758 int range;
759
760 val = read_config(fd, &p->pc_sel, basereg, 2);
761 if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) {
762 base = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, basereg, 4));
763 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 4));
764 range = 32;
765 } else {
766 base = PCI_CBBIOBASE(val);
767 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 2));
768 range = 16;
769 }
770 print_window(basereg, "I/O Port", range, base, limit);
771 }
772
773 static void
print_cardbus_windows(int fd,struct pci_conf * p)774 print_cardbus_windows(int fd, struct pci_conf *p)
775 {
776 uint16_t bctl;
777
778 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_2, 2);
779 print_cardbus_mem_window(fd, p, PCIR_MEMBASE0_2, PCIR_MEMLIMIT0_2,
780 bctl & CBB_BCR_PREFETCH_0_ENABLE);
781 print_cardbus_mem_window(fd, p, PCIR_MEMBASE1_2, PCIR_MEMLIMIT1_2,
782 bctl & CBB_BCR_PREFETCH_1_ENABLE);
783 print_cardbus_io_window(fd, p, PCIR_IOBASE0_2, PCIR_IOLIMIT0_2);
784 print_cardbus_io_window(fd, p, PCIR_IOBASE1_2, PCIR_IOLIMIT1_2);
785 print_special_decode(bctl & CBB_BCR_ISA_ENABLE,
786 bctl & CBB_BCR_VGA_ENABLE, false);
787 }
788
789 static void
list_bridge(int fd,struct pci_conf * p)790 list_bridge(int fd, struct pci_conf *p)
791 {
792
793 switch (p->pc_hdr & PCIM_HDRTYPE) {
794 case PCIM_HDRTYPE_BRIDGE:
795 print_bus_range(p);
796 print_bridge_windows(fd, p);
797 break;
798 case PCIM_HDRTYPE_CARDBUS:
799 print_bus_range(p);
800 print_cardbus_windows(fd, p);
801 break;
802 }
803 }
804
805 static void
list_bars(int fd,struct pci_conf * p)806 list_bars(int fd, struct pci_conf *p)
807 {
808 int i, max;
809
810 switch (p->pc_hdr & PCIM_HDRTYPE) {
811 case PCIM_HDRTYPE_NORMAL:
812 max = PCIR_MAX_BAR_0;
813 break;
814 case PCIM_HDRTYPE_BRIDGE:
815 max = PCIR_MAX_BAR_1;
816 break;
817 case PCIM_HDRTYPE_CARDBUS:
818 max = PCIR_MAX_BAR_2;
819 break;
820 default:
821 return;
822 }
823
824 for (i = 0; i <= max; i++)
825 print_bar(fd, p, "bar ", PCIR_BAR(i));
826 }
827
828 void
print_bar(int fd,struct pci_conf * p,const char * label,uint16_t bar_offset)829 print_bar(int fd, struct pci_conf *p, const char *label, uint16_t bar_offset)
830 {
831 uint64_t base;
832 const char *type;
833 struct pci_bar_io bar;
834 int range;
835
836 bar.pbi_sel = p->pc_sel;
837 bar.pbi_reg = bar_offset;
838 if (ioctl(fd, PCIOCGETBAR, &bar) < 0)
839 return;
840 if (PCI_BAR_IO(bar.pbi_base)) {
841 type = "I/O Port";
842 range = 32;
843 base = bar.pbi_base & PCIM_BAR_IO_BASE;
844 } else {
845 if (bar.pbi_base & PCIM_BAR_MEM_PREFETCH)
846 type = "Prefetchable Memory";
847 else
848 type = "Memory";
849 switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) {
850 case PCIM_BAR_MEM_32:
851 range = 32;
852 break;
853 case PCIM_BAR_MEM_1MB:
854 range = 20;
855 break;
856 case PCIM_BAR_MEM_64:
857 range = 64;
858 break;
859 default:
860 range = -1;
861 }
862 base = bar.pbi_base & ~((uint64_t)0xf);
863 }
864 printf(" %s[%02x] = type %s, range %2d, base %#jx, ",
865 label, bar_offset, type, range, (uintmax_t)base);
866 printf("size %ju, %s\n", (uintmax_t)bar.pbi_length,
867 bar.pbi_enabled ? "enabled" : "disabled");
868 }
869
870 static void
list_verbose(struct pci_conf * p)871 list_verbose(struct pci_conf *p)
872 {
873 struct pci_vendor_info *vi;
874 struct pci_device_info *di;
875 const char *dp;
876
877 TAILQ_FOREACH(vi, &pci_vendors, link) {
878 if (vi->id == p->pc_vendor) {
879 printf(" vendor = '%s'\n", vi->desc);
880 break;
881 }
882 }
883 if (vi == NULL) {
884 di = NULL;
885 } else {
886 TAILQ_FOREACH(di, &vi->devs, link) {
887 if (di->id == p->pc_device) {
888 printf(" device = '%s'\n", di->desc);
889 break;
890 }
891 }
892 }
893 if ((dp = guess_class(p)) != NULL)
894 printf(" class = %s\n", dp);
895 if ((dp = guess_subclass(p)) != NULL)
896 printf(" subclass = %s\n", dp);
897 }
898
899 static void
list_vpd(int fd,struct pci_conf * p)900 list_vpd(int fd, struct pci_conf *p)
901 {
902 struct pci_list_vpd_io list;
903 struct pci_vpd_element *vpd, *end;
904
905 list.plvi_sel = p->pc_sel;
906 list.plvi_len = 0;
907 list.plvi_data = NULL;
908 if (ioctl(fd, PCIOCLISTVPD, &list) < 0 || list.plvi_len == 0)
909 return;
910
911 list.plvi_data = malloc(list.plvi_len);
912 if (ioctl(fd, PCIOCLISTVPD, &list) < 0) {
913 free(list.plvi_data);
914 return;
915 }
916
917 vpd = list.plvi_data;
918 end = (struct pci_vpd_element *)((char *)vpd + list.plvi_len);
919 for (; vpd < end; vpd = PVE_NEXT(vpd)) {
920 if (vpd->pve_flags == PVE_FLAG_IDENT) {
921 printf(" VPD ident = '%.*s'\n",
922 (int)vpd->pve_datalen, vpd->pve_data);
923 continue;
924 }
925
926 /* Ignore the checksum keyword. */
927 if (!(vpd->pve_flags & PVE_FLAG_RW) &&
928 memcmp(vpd->pve_keyword, "RV", 2) == 0)
929 continue;
930
931 /* Ignore remaining read-write space. */
932 if (vpd->pve_flags & PVE_FLAG_RW &&
933 memcmp(vpd->pve_keyword, "RW", 2) == 0)
934 continue;
935
936 /* Handle extended capability keyword. */
937 if (!(vpd->pve_flags & PVE_FLAG_RW) &&
938 memcmp(vpd->pve_keyword, "CP", 2) == 0) {
939 printf(" VPD ro CP = ID %02x in map 0x%x[0x%x]\n",
940 (unsigned int)vpd->pve_data[0],
941 PCIR_BAR((unsigned int)vpd->pve_data[1]),
942 (unsigned int)vpd->pve_data[3] << 8 |
943 (unsigned int)vpd->pve_data[2]);
944 continue;
945 }
946
947 /* Remaining keywords should all have ASCII values. */
948 printf(" VPD %s %c%c = '%.*s'\n",
949 vpd->pve_flags & PVE_FLAG_RW ? "rw" : "ro",
950 vpd->pve_keyword[0], vpd->pve_keyword[1],
951 (int)vpd->pve_datalen, vpd->pve_data);
952 }
953 free(list.plvi_data);
954 }
955
956 /*
957 * This is a direct cut-and-paste from the table in sys/dev/pci/pci.c.
958 */
959 static struct
960 {
961 int class;
962 int subclass;
963 const char *desc;
964 } pci_nomatch_tab[] = {
965 {PCIC_OLD, -1, "old"},
966 {PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"},
967 {PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"},
968 {PCIC_STORAGE, -1, "mass storage"},
969 {PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"},
970 {PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"},
971 {PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"},
972 {PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"},
973 {PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"},
974 {PCIC_STORAGE, PCIS_STORAGE_ATA_ADMA, "ATA (ADMA)"},
975 {PCIC_STORAGE, PCIS_STORAGE_SATA, "SATA"},
976 {PCIC_STORAGE, PCIS_STORAGE_SAS, "SAS"},
977 {PCIC_STORAGE, PCIS_STORAGE_NVM, "NVM"},
978 {PCIC_STORAGE, PCIS_STORAGE_UFS, "UFS"},
979 {PCIC_NETWORK, -1, "network"},
980 {PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"},
981 {PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"},
982 {PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"},
983 {PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"},
984 {PCIC_NETWORK, PCIS_NETWORK_ISDN, "ISDN"},
985 {PCIC_NETWORK, PCIS_NETWORK_WORLDFIP, "WorldFip"},
986 {PCIC_NETWORK, PCIS_NETWORK_PICMG, "PICMG"},
987 {PCIC_NETWORK, PCIS_NETWORK_INFINIBAND, "InfiniBand"},
988 {PCIC_NETWORK, PCIS_NETWORK_HFC, "host fabric"},
989 {PCIC_DISPLAY, -1, "display"},
990 {PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"},
991 {PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"},
992 {PCIC_DISPLAY, PCIS_DISPLAY_3D, "3D"},
993 {PCIC_MULTIMEDIA, -1, "multimedia"},
994 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"},
995 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"},
996 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_TELE, "telephony"},
997 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_HDA, "HDA"},
998 {PCIC_MEMORY, -1, "memory"},
999 {PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"},
1000 {PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"},
1001 {PCIC_BRIDGE, -1, "bridge"},
1002 {PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"},
1003 {PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"},
1004 {PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"},
1005 {PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"},
1006 {PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"},
1007 {PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"},
1008 {PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"},
1009 {PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"},
1010 {PCIC_BRIDGE, PCIS_BRIDGE_RACEWAY, "PCI-RACEway"},
1011 {PCIC_BRIDGE, PCIS_BRIDGE_PCI_TRANSPARENT,
1012 "Semi-transparent PCI-to-PCI"},
1013 {PCIC_BRIDGE, PCIS_BRIDGE_INFINIBAND, "InfiniBand-PCI"},
1014 {PCIC_BRIDGE, PCIS_BRIDGE_AS_PCI,
1015 "AdvancedSwitching-PCI"},
1016 {PCIC_SIMPLECOMM, -1, "simple comms"},
1017 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */
1018 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"},
1019 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MULSER, "multiport serial"},
1020 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MODEM, "generic modem"},
1021 {PCIC_BASEPERIPH, -1, "base peripheral"},
1022 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"},
1023 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"},
1024 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"},
1025 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"},
1026 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PCIHOT, "PCI hot-plug controller"},
1027 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_SDHC, "SD host controller"},
1028 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_IOMMU, "IOMMU"},
1029 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RCEC,
1030 "Root Complex Event Collector"},
1031 {PCIC_INPUTDEV, -1, "input device"},
1032 {PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"},
1033 {PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"},
1034 {PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"},
1035 {PCIC_INPUTDEV, PCIS_INPUTDEV_SCANNER, "scanner"},
1036 {PCIC_INPUTDEV, PCIS_INPUTDEV_GAMEPORT, "gameport"},
1037 {PCIC_DOCKING, -1, "docking station"},
1038 {PCIC_PROCESSOR, -1, "processor"},
1039 {PCIC_SERIALBUS, -1, "serial bus"},
1040 {PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"},
1041 {PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"},
1042 {PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"},
1043 {PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"},
1044 {PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"},
1045 {PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"},
1046 {PCIC_SERIALBUS, PCIS_SERIALBUS_INFINIBAND, "InfiniBand"},
1047 {PCIC_SERIALBUS, PCIS_SERIALBUS_IPMI, "IPMI"},
1048 {PCIC_SERIALBUS, PCIS_SERIALBUS_SERCOS, "SERCOS"},
1049 {PCIC_SERIALBUS, PCIS_SERIALBUS_CANBUS, "CANbus"},
1050 {PCIC_SERIALBUS, PCIS_SERIALBUS_MIPI_I3C, "MIPI I3C"},
1051 {PCIC_WIRELESS, -1, "wireless controller"},
1052 {PCIC_WIRELESS, PCIS_WIRELESS_IRDA, "iRDA"},
1053 {PCIC_WIRELESS, PCIS_WIRELESS_IR, "IR"},
1054 {PCIC_WIRELESS, PCIS_WIRELESS_RF, "RF"},
1055 {PCIC_WIRELESS, PCIS_WIRELESS_BLUETOOTH, "bluetooth"},
1056 {PCIC_WIRELESS, PCIS_WIRELESS_BROADBAND, "broadband"},
1057 {PCIC_WIRELESS, PCIS_WIRELESS_80211A, "ethernet 802.11a"},
1058 {PCIC_WIRELESS, PCIS_WIRELESS_80211B, "ethernet 802.11b"},
1059 {PCIC_WIRELESS, PCIS_WIRELESS_CELL,
1060 "cellular controller/modem"},
1061 {PCIC_WIRELESS, PCIS_WIRELESS_CELL_E,
1062 "cellular controller/modem plus ethernet"},
1063 {PCIC_INTELLIIO, -1, "intelligent I/O controller"},
1064 {PCIC_INTELLIIO, PCIS_INTELLIIO_I2O, "I2O"},
1065 {PCIC_SATCOM, -1, "satellite communication"},
1066 {PCIC_SATCOM, PCIS_SATCOM_TV, "sat TV"},
1067 {PCIC_SATCOM, PCIS_SATCOM_AUDIO, "sat audio"},
1068 {PCIC_SATCOM, PCIS_SATCOM_VOICE, "sat voice"},
1069 {PCIC_SATCOM, PCIS_SATCOM_DATA, "sat data"},
1070 {PCIC_CRYPTO, -1, "encrypt/decrypt"},
1071 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "network/computer crypto"},
1072 {PCIC_CRYPTO, PCIS_CRYPTO_ENTERTAIN, "entertainment crypto"},
1073 {PCIC_DASP, -1, "dasp"},
1074 {PCIC_DASP, PCIS_DASP_DPIO, "DPIO module"},
1075 {PCIC_DASP, PCIS_DASP_PERFCNTRS, "performance counters"},
1076 {PCIC_DASP, PCIS_DASP_COMM_SYNC, "communication synchronizer"},
1077 {PCIC_DASP, PCIS_DASP_MGMT_CARD, "signal processing management"},
1078 {PCIC_ACCEL, -1, "processing accelerators"},
1079 {PCIC_ACCEL, PCIS_ACCEL_PROCESSING, "processing accelerators"},
1080 {PCIC_INSTRUMENT, -1, "non-essential instrumentation"},
1081 {0, 0, NULL}
1082 };
1083
1084 static const char *
guess_class(struct pci_conf * p)1085 guess_class(struct pci_conf *p)
1086 {
1087 int i;
1088
1089 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
1090 if (pci_nomatch_tab[i].class == p->pc_class)
1091 return(pci_nomatch_tab[i].desc);
1092 }
1093 return(NULL);
1094 }
1095
1096 static const char *
guess_subclass(struct pci_conf * p)1097 guess_subclass(struct pci_conf *p)
1098 {
1099 int i;
1100
1101 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
1102 if ((pci_nomatch_tab[i].class == p->pc_class) &&
1103 (pci_nomatch_tab[i].subclass == p->pc_subclass))
1104 return(pci_nomatch_tab[i].desc);
1105 }
1106 return(NULL);
1107 }
1108
1109 static int
load_vendors(void)1110 load_vendors(void)
1111 {
1112 const char *dbf;
1113 FILE *db;
1114 struct pci_vendor_info *cv;
1115 struct pci_device_info *cd;
1116 char buf[1024], str[1024];
1117 char *ch;
1118 int id, error;
1119
1120 /*
1121 * Locate the database and initialise.
1122 */
1123 TAILQ_INIT(&pci_vendors);
1124 if ((dbf = getenv("PCICONF_VENDOR_DATABASE")) == NULL)
1125 dbf = _PATH_LPCIVDB;
1126 if ((db = fopen(dbf, "r")) == NULL) {
1127 dbf = _PATH_PCIVDB;
1128 if ((db = fopen(dbf, "r")) == NULL)
1129 return(1);
1130 }
1131 cv = NULL;
1132 cd = NULL;
1133 error = 0;
1134
1135 /*
1136 * Scan input lines from the database
1137 */
1138 for (;;) {
1139 if (fgets(buf, sizeof(buf), db) == NULL)
1140 break;
1141
1142 if ((ch = strchr(buf, '#')) != NULL)
1143 *ch = '\0';
1144 ch = strchr(buf, '\0') - 1;
1145 while (ch > buf && isspace(*ch))
1146 *ch-- = '\0';
1147 if (ch <= buf)
1148 continue;
1149
1150 /* Can't handle subvendor / subdevice entries yet */
1151 if (buf[0] == '\t' && buf[1] == '\t')
1152 continue;
1153
1154 /* Check for vendor entry */
1155 if (buf[0] != '\t' && sscanf(buf, "%04x %[^\n]", &id, str) == 2) {
1156 if ((id == 0) || (strlen(str) < 1))
1157 continue;
1158 if ((cv = malloc(sizeof(struct pci_vendor_info))) == NULL) {
1159 warn("allocating vendor entry");
1160 error = 1;
1161 break;
1162 }
1163 if ((cv->desc = strdup(str)) == NULL) {
1164 free(cv);
1165 warn("allocating vendor description");
1166 error = 1;
1167 break;
1168 }
1169 cv->id = id;
1170 TAILQ_INIT(&cv->devs);
1171 TAILQ_INSERT_TAIL(&pci_vendors, cv, link);
1172 continue;
1173 }
1174
1175 /* Check for device entry */
1176 if (buf[0] == '\t' && sscanf(buf + 1, "%04x %[^\n]", &id, str) == 2) {
1177 if ((id == 0) || (strlen(str) < 1))
1178 continue;
1179 if (cv == NULL) {
1180 warnx("device entry with no vendor!");
1181 continue;
1182 }
1183 if ((cd = malloc(sizeof(struct pci_device_info))) == NULL) {
1184 warn("allocating device entry");
1185 error = 1;
1186 break;
1187 }
1188 if ((cd->desc = strdup(str)) == NULL) {
1189 free(cd);
1190 warn("allocating device description");
1191 error = 1;
1192 break;
1193 }
1194 cd->id = id;
1195 TAILQ_INSERT_TAIL(&cv->devs, cd, link);
1196 continue;
1197 }
1198
1199 /* It's a comment or junk, ignore it */
1200 }
1201 if (ferror(db))
1202 error = 1;
1203 fclose(db);
1204
1205 return(error);
1206 }
1207
1208 uint32_t
read_config(int fd,struct pcisel * sel,long reg,int width)1209 read_config(int fd, struct pcisel *sel, long reg, int width)
1210 {
1211 struct pci_io pi;
1212
1213 pi.pi_sel = *sel;
1214 pi.pi_reg = reg;
1215 pi.pi_width = width;
1216
1217 if (ioctl(fd, PCIOCREAD, &pi) < 0)
1218 err(1, "ioctl(PCIOCREAD)");
1219
1220 return (pi.pi_data);
1221 }
1222
1223 static struct pcisel
getdevice(const char * name)1224 getdevice(const char *name)
1225 {
1226 struct pci_conf_io pc;
1227 struct pci_conf conf[1];
1228 struct pci_match_conf patterns[1];
1229 char *cp;
1230 int fd;
1231
1232 fd = open(_PATH_DEVPCI, O_RDONLY, 0);
1233 if (fd < 0)
1234 err(1, "%s", _PATH_DEVPCI);
1235
1236 bzero(&pc, sizeof(struct pci_conf_io));
1237 pc.match_buf_len = sizeof(conf);
1238 pc.matches = conf;
1239
1240 bzero(&patterns, sizeof(patterns));
1241
1242 /*
1243 * The pattern structure requires the unit to be split out from
1244 * the driver name. Walk backwards from the end of the name to
1245 * find the start of the unit.
1246 */
1247 if (name[0] == '\0')
1248 errx(1, "Empty device name");
1249 cp = strchr(name, '\0');
1250 assert(cp != NULL && cp != name);
1251 cp--;
1252 while (cp != name && isdigit(cp[-1]))
1253 cp--;
1254 if (cp == name || !isdigit(*cp))
1255 errx(1, "Invalid device name");
1256 if ((size_t)(cp - name) + 1 > sizeof(patterns[0].pd_name))
1257 errx(1, "Device name is too long");
1258 memcpy(patterns[0].pd_name, name, cp - name);
1259 patterns[0].pd_unit = strtol(cp, &cp, 10);
1260 if (*cp != '\0')
1261 errx(1, "Invalid device name");
1262 patterns[0].flags = PCI_GETCONF_MATCH_NAME | PCI_GETCONF_MATCH_UNIT;
1263 pc.num_patterns = 1;
1264 pc.pat_buf_len = sizeof(patterns);
1265 pc.patterns = patterns;
1266
1267 if (ioctl(fd, PCIOCGETCONF, &pc) == -1)
1268 err(1, "ioctl(PCIOCGETCONF)");
1269 if (pc.status != PCI_GETCONF_LAST_DEVICE &&
1270 pc.status != PCI_GETCONF_MORE_DEVS)
1271 errx(1, "error returned from PCIOCGETCONF ioctl");
1272 close(fd);
1273 if (pc.num_matches == 0)
1274 errx(1, "Device not found");
1275 return (conf[0].pc_sel);
1276 }
1277
1278 static struct pcisel
parsesel(const char * str)1279 parsesel(const char *str)
1280 {
1281 const char *ep;
1282 char *eppos;
1283 struct pcisel sel;
1284 unsigned long selarr[4];
1285 int i;
1286
1287 ep = strchr(str, '@');
1288 if (ep != NULL)
1289 ep++;
1290 else
1291 ep = str;
1292
1293 if (strncmp(ep, "pci", 3) == 0) {
1294 ep += 3;
1295 i = 0;
1296 while (isdigit(*ep) && i < 4) {
1297 selarr[i++] = strtoul(ep, &eppos, 10);
1298 ep = eppos;
1299 if (*ep == ':')
1300 ep++;
1301 }
1302 if (i > 0 && *ep == '\0') {
1303 sel.pc_func = (i > 2) ? selarr[--i] : 0;
1304 sel.pc_dev = (i > 0) ? selarr[--i] : 0;
1305 sel.pc_bus = (i > 0) ? selarr[--i] : 0;
1306 sel.pc_domain = (i > 0) ? selarr[--i] : 0;
1307 return (sel);
1308 }
1309 }
1310 errx(1, "cannot parse selector %s", str);
1311 }
1312
1313 static struct pcisel
getsel(const char * str)1314 getsel(const char *str)
1315 {
1316
1317 /*
1318 * No device names contain colons and selectors always contain
1319 * at least one colon.
1320 */
1321 if (strchr(str, ':') == NULL)
1322 return (getdevice(str));
1323 else
1324 return (parsesel(str));
1325 }
1326
1327 static void
readit(const char * name,const char * reg,int width)1328 readit(const char *name, const char *reg, int width)
1329 {
1330 long rstart;
1331 long rend;
1332 long r;
1333 char *end;
1334 int i, items_per_line;
1335 int fd;
1336 struct pcisel sel;
1337
1338 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1339 if (fd < 0)
1340 err(1, "%s", _PATH_DEVPCI);
1341
1342 rend = rstart = strtol(reg, &end, 0);
1343 if (*end == ':') {
1344 end++;
1345 rend = strtol(end, NULL, 0);
1346 }
1347 sel = getsel(name);
1348 items_per_line = 16 / width;
1349 for (i = 1, r = rstart; r <= rend; i++, r += width) {
1350 printf("%0*x", width * 2, read_config(fd, &sel, r, width));
1351
1352 /* Use a double space in the middle when outputting bytes. */
1353 if (width == 1 && i % 16 == 8)
1354 putchar(' ');
1355
1356 putchar(i % items_per_line == 0 ? '\n' : ' ');
1357 }
1358 if (i % items_per_line != 1)
1359 putchar('\n');
1360 close(fd);
1361 }
1362
1363 static void
writeit(const char * name,const char * reg,const char * data,int width)1364 writeit(const char *name, const char *reg, const char *data, int width)
1365 {
1366 int fd;
1367 struct pci_io pi;
1368
1369 pi.pi_sel = getsel(name);
1370 pi.pi_reg = strtoul(reg, NULL, 0); /* XXX error check */
1371 pi.pi_width = width;
1372 pi.pi_data = strtoul(data, NULL, 0); /* XXX error check */
1373
1374 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1375 if (fd < 0)
1376 err(1, "%s", _PATH_DEVPCI);
1377
1378 if (ioctl(fd, PCIOCWRITE, &pi) < 0)
1379 err(1, "ioctl(PCIOCWRITE)");
1380 close(fd);
1381 }
1382
1383 static void
chkattached(const char * name)1384 chkattached(const char *name)
1385 {
1386 int fd;
1387 struct pci_io pi;
1388
1389 pi.pi_sel = getsel(name);
1390
1391 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1392 if (fd < 0)
1393 err(1, "%s", _PATH_DEVPCI);
1394
1395 if (ioctl(fd, PCIOCATTACHED, &pi) < 0)
1396 err(1, "ioctl(PCIOCATTACHED)");
1397
1398 exitstatus = pi.pi_data ? 0 : 2; /* exit(2), if NOT attached */
1399 printf("%s: %s%s\n", name, pi.pi_data == 0 ? "not " : "", "attached");
1400 close(fd);
1401 }
1402
1403 static void
map_bar(const char * name,const char * reg,int flags,struct pci_bar_mmap * pbm)1404 map_bar(const char *name, const char *reg, int flags, struct pci_bar_mmap *pbm)
1405 {
1406 int fd;
1407 char *el;
1408
1409 memset(pbm, 0, sizeof(struct pci_bar_mmap));
1410 pbm->pbm_sel = getsel(name);
1411 pbm->pbm_reg = strtoul(reg, &el, 0);
1412 if (*reg == '\0' || *el != '\0')
1413 errx(1, "Invalid bar specification %s", reg);
1414 pbm->pbm_memattr = VM_MEMATTR_DEVICE;
1415 pbm->pbm_flags = flags;
1416
1417 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1418 if (fd < 0)
1419 err(1, "%s", _PATH_DEVPCI);
1420
1421 if (ioctl(fd, PCIOCBARMMAP, pbm) < 0)
1422 err(1, "ioctl(PCIOCBARMMAP)");
1423
1424 close(fd);
1425 }
1426
1427 static void
unmap_bar(struct pci_bar_mmap * pbm)1428 unmap_bar(struct pci_bar_mmap *pbm)
1429 {
1430 munmap(pbm->pbm_map_base, pbm->pbm_map_length);
1431 }
1432
1433 static void
dump_bar(const char * name,const char * reg,const char * bar_start,const char * bar_count,int width,int verbose)1434 dump_bar(const char *name, const char *reg, const char *bar_start,
1435 const char *bar_count, int width, int verbose)
1436 {
1437 struct pci_bar_mmap pbm;
1438 uint32_t *dd;
1439 uint16_t *dh;
1440 uint8_t *db;
1441 uint64_t *dx, a, start, count;
1442 char *el;
1443 size_t res;
1444
1445 start = 0;
1446 if (bar_start != NULL) {
1447 start = strtoul(bar_start, &el, 0);
1448 if (*el != '\0')
1449 errx(1, "Invalid bar start specification %s",
1450 bar_start);
1451 }
1452 count = 0;
1453 if (bar_count != NULL) {
1454 count = strtoul(bar_count, &el, 0);
1455 if (*el != '\0')
1456 errx(1, "Invalid count specification %s",
1457 bar_count);
1458 }
1459
1460 map_bar(name, reg, 0, &pbm);
1461
1462 if (count == 0)
1463 count = pbm.pbm_bar_length / width;
1464 if (start + count < start || (start + count) * width < (uint64_t)width)
1465 errx(1, "(start + count) x width overflow");
1466 if ((start + count) * width > pbm.pbm_bar_length) {
1467 if (start * width > pbm.pbm_bar_length)
1468 count = 0;
1469 else
1470 count = (pbm.pbm_bar_length - start * width) / width;
1471 }
1472 if (verbose) {
1473 fprintf(stderr,
1474 "Dumping pci%d:%d:%d:%d BAR %x mapped base %p "
1475 "off %#x length %#jx from %#jx count %#jx in %d-bytes\n",
1476 pbm.pbm_sel.pc_domain, pbm.pbm_sel.pc_bus,
1477 pbm.pbm_sel.pc_dev, pbm.pbm_sel.pc_func,
1478 pbm.pbm_reg, pbm.pbm_map_base, pbm.pbm_bar_off,
1479 pbm.pbm_bar_length, start, count, width);
1480 }
1481 switch (width) {
1482 case 1:
1483 db = (uint8_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1484 pbm.pbm_bar_off + start * width);
1485 for (a = 0; a < count; a++, db++) {
1486 res = fwrite(db, width, 1, stdout);
1487 if (res != 1) {
1488 errx(1, "error writing to stdout");
1489 break;
1490 }
1491 }
1492 break;
1493 case 2:
1494 dh = (uint16_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1495 pbm.pbm_bar_off + start * width);
1496 for (a = 0; a < count; a++, dh++) {
1497 res = fwrite(dh, width, 1, stdout);
1498 if (res != 1) {
1499 errx(1, "error writing to stdout");
1500 break;
1501 }
1502 }
1503 break;
1504 case 4:
1505 dd = (uint32_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1506 pbm.pbm_bar_off + start * width);
1507 for (a = 0; a < count; a ++, dd++) {
1508 res = fwrite(dd, width, 1, stdout);
1509 if (res != 1) {
1510 errx(1, "error writing to stdout");
1511 break;
1512 }
1513 }
1514 break;
1515 case 8:
1516 dx = (uint64_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1517 pbm.pbm_bar_off + start * width);
1518 for (a = 0; a < count; a++, dx++) {
1519 res = fwrite(dx, width, 1, stdout);
1520 if (res != 1) {
1521 errx(1, "error writing to stdout");
1522 break;
1523 }
1524 }
1525 break;
1526 default:
1527 errx(1, "invalid access width");
1528 }
1529
1530 unmap_bar(&pbm);
1531 }
1532
1533 union tunion {
1534 uint8_t one;
1535 uint16_t two;
1536 uint32_t four;
1537 uint64_t eight;
1538 uint8_t bytes[8];
1539 };
1540
1541 static void
read_bar(const char * name,const char * bar,const char * start_end,int width)1542 read_bar(const char *name, const char *bar, const char *start_end, int width)
1543 {
1544 struct pci_bar_mmap pbm;
1545 long rstart, rend, r;
1546 char *end;
1547 int items_per_line, i;
1548
1549 rend = rstart = strtol(start_end, &end, 0);
1550 if (*end == ':') {
1551 end++;
1552 rend = strtol(end, NULL, 0);
1553 }
1554
1555 map_bar(name, bar, 0, &pbm);
1556
1557 items_per_line = 16 / width;
1558 for (i = 1, r = rstart; r <= rend; i++, r += width) {
1559 uintptr_t addr;
1560 union tunion t;
1561 int j;
1562
1563 addr = (uintptr_t)pbm.pbm_map_base + pbm.pbm_bar_off + r;
1564 switch (width) {
1565 case 1:
1566 t.one = *((uint8_t *)addr);
1567 break;
1568 case 2:
1569 t.two = *((uint16_t *)addr);
1570 break;
1571 case 4:
1572 t.four = *((uint32_t *)addr);
1573 break;
1574 case 8:
1575 t.eight = *((uint64_t *)addr);
1576 break;
1577 default:
1578 errx(1, "invalid read width");
1579 }
1580 for (j = 0; j < width; j++) {
1581 printf("%02x", t.bytes[j]);
1582 }
1583 /* Use a double space in the middle when outputting bytes. */
1584 if (width == 1 && (i % 16) == 8)
1585 putchar(' ');
1586 putchar(i % items_per_line == 0 ? '\n' : ' ');
1587 }
1588 if (i % items_per_line != 1)
1589 putchar('\n');
1590
1591 unmap_bar(&pbm);
1592 }
1593
1594 static void
write_bar(const char * name,const char * bar,const char * offset_str,const char * value_str,int width)1595 write_bar(const char *name, const char *bar, const char *offset_str,
1596 const char *value_str, int width)
1597 {
1598 struct pci_bar_mmap pbm;
1599 uint64_t offset, value;
1600 uintptr_t addr;
1601 char *el;
1602
1603 offset = strtoul(offset_str, &el, 0);
1604 if (*el != '\0')
1605 errx(1, "Invalid bar offset specification %s", offset_str);
1606 value = strtoul(value_str, (char **)0, 0); /* XXX error check */
1607
1608 map_bar(name, bar, PCIIO_BAR_MMAP_RW, &pbm);
1609
1610 addr = (uintptr_t)pbm.pbm_map_base + pbm.pbm_bar_off + offset;
1611 switch (width) {
1612 case 1:
1613 *((uint8_t *)addr) = value;
1614 break;
1615 case 2:
1616 *((uint16_t *)addr) = value;
1617 break;
1618 case 4:
1619 *((uint32_t *)addr) = value;
1620 break;
1621 case 8:
1622 *((uint64_t *)addr) = value;
1623 break;
1624 default:
1625 errx(1, "invalid write width");
1626 }
1627
1628 unmap_bar(&pbm);
1629 }
1630