1 // SPDX-License-Identifier: GPL-2.0
2
3 use kernel::prelude::*;
4
5 use crate::driver::Bar0;
6 use crate::gpu::Chipset;
7
8 mod ga100;
9 mod ga102;
10 mod tu102;
11
12 pub(crate) trait FbHal {
13 /// Returns the address of the currently-registered sysmem flush page.
read_sysmem_flush_page(&self, bar: &Bar0) -> u6414 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64;
15
16 /// Register `addr` as the address of the sysmem flush page.
17 ///
18 /// This might fail if the address is too large for the receiving register.
write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result19 fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result;
20
21 /// Returns `true` is display is supported.
supports_display(&self, bar: &Bar0) -> bool22 fn supports_display(&self, bar: &Bar0) -> bool;
23
24 /// Returns the VRAM size, in bytes.
vidmem_size(&self, bar: &Bar0) -> u6425 fn vidmem_size(&self, bar: &Bar0) -> u64;
26 }
27
28 /// Returns the HAL corresponding to `chipset`.
fb_hal(chipset: Chipset) -> &'static dyn FbHal29 pub(super) fn fb_hal(chipset: Chipset) -> &'static dyn FbHal {
30 use Chipset::*;
31
32 match chipset {
33 TU102 | TU104 | TU106 | TU117 | TU116 => tu102::TU102_HAL,
34 GA100 => ga100::GA100_HAL,
35 GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 => {
36 ga102::GA102_HAL
37 }
38 }
39 }
40