1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9
10 #include "pinctrl-msm.h"
11
12 #define REG_SIZE 0x1000
13
14 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
15 { \
16 .grp = PINCTRL_PINGROUP("gpio" #id, \
17 gpio##id##_pins, \
18 ARRAY_SIZE(gpio##id##_pins)), \
19 .funcs = (int[]){ \
20 msm_mux_gpio, /* gpio mode */ \
21 msm_mux_##f1, \
22 msm_mux_##f2, \
23 msm_mux_##f3, \
24 msm_mux_##f4, \
25 msm_mux_##f5, \
26 msm_mux_##f6, \
27 msm_mux_##f7, \
28 msm_mux_##f8, \
29 msm_mux_##f9 \
30 }, \
31 .nfuncs = 10, \
32 .ctl_reg = REG_SIZE * id, \
33 .io_reg = 0x4 + REG_SIZE * id, \
34 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
35 .intr_status_reg = 0xc + REG_SIZE * id, \
36 .intr_target_reg = 0x8 + REG_SIZE * id, \
37 .mux_bit = 2, \
38 .pull_bit = 0, \
39 .drv_bit = 6, \
40 .i2c_pull_bit = 13, \
41 .egpio_enable = 12, \
42 .egpio_present = 11, \
43 .oe_bit = 9, \
44 .in_bit = 0, \
45 .out_bit = 1, \
46 .intr_enable_bit = 0, \
47 .intr_status_bit = 0, \
48 .intr_target_bit = 5, \
49 .intr_target_kpss_val = 3, \
50 .intr_raw_status_bit = 4, \
51 .intr_polarity_bit = 1, \
52 .intr_detection_bit = 2, \
53 .intr_detection_width = 2, \
54 }
55
56 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
57 { \
58 .grp = PINCTRL_PINGROUP(#pg_name, \
59 pg_name##_pins, \
60 ARRAY_SIZE(pg_name##_pins)), \
61 .ctl_reg = ctl, \
62 .io_reg = 0, \
63 .intr_cfg_reg = 0, \
64 .intr_status_reg = 0, \
65 .intr_target_reg = 0, \
66 .mux_bit = -1, \
67 .pull_bit = pull, \
68 .drv_bit = drv, \
69 .oe_bit = -1, \
70 .in_bit = -1, \
71 .out_bit = -1, \
72 .intr_enable_bit = -1, \
73 .intr_status_bit = -1, \
74 .intr_target_bit = -1, \
75 .intr_raw_status_bit = -1, \
76 .intr_polarity_bit = -1, \
77 .intr_detection_bit = -1, \
78 .intr_detection_width = -1, \
79 }
80
81 #define UFS_RESET(pg_name, offset) \
82 { \
83 .grp = PINCTRL_PINGROUP(#pg_name, \
84 pg_name##_pins, \
85 ARRAY_SIZE(pg_name##_pins)), \
86 .ctl_reg = offset, \
87 .io_reg = offset + 0x4, \
88 .intr_cfg_reg = 0, \
89 .intr_status_reg = 0, \
90 .intr_target_reg = 0, \
91 .mux_bit = -1, \
92 .pull_bit = 3, \
93 .drv_bit = 0, \
94 .oe_bit = -1, \
95 .in_bit = -1, \
96 .out_bit = 0, \
97 .intr_enable_bit = -1, \
98 .intr_status_bit = -1, \
99 .intr_target_bit = -1, \
100 .intr_raw_status_bit = -1, \
101 .intr_polarity_bit = -1, \
102 .intr_detection_bit = -1, \
103 .intr_detection_width = -1, \
104 }
105
106 static const struct pinctrl_pin_desc x1e80100_pins[] = {
107 PINCTRL_PIN(0, "GPIO_0"),
108 PINCTRL_PIN(1, "GPIO_1"),
109 PINCTRL_PIN(2, "GPIO_2"),
110 PINCTRL_PIN(3, "GPIO_3"),
111 PINCTRL_PIN(4, "GPIO_4"),
112 PINCTRL_PIN(5, "GPIO_5"),
113 PINCTRL_PIN(6, "GPIO_6"),
114 PINCTRL_PIN(7, "GPIO_7"),
115 PINCTRL_PIN(8, "GPIO_8"),
116 PINCTRL_PIN(9, "GPIO_9"),
117 PINCTRL_PIN(10, "GPIO_10"),
118 PINCTRL_PIN(11, "GPIO_11"),
119 PINCTRL_PIN(12, "GPIO_12"),
120 PINCTRL_PIN(13, "GPIO_13"),
121 PINCTRL_PIN(14, "GPIO_14"),
122 PINCTRL_PIN(15, "GPIO_15"),
123 PINCTRL_PIN(16, "GPIO_16"),
124 PINCTRL_PIN(17, "GPIO_17"),
125 PINCTRL_PIN(18, "GPIO_18"),
126 PINCTRL_PIN(19, "GPIO_19"),
127 PINCTRL_PIN(20, "GPIO_20"),
128 PINCTRL_PIN(21, "GPIO_21"),
129 PINCTRL_PIN(22, "GPIO_22"),
130 PINCTRL_PIN(23, "GPIO_23"),
131 PINCTRL_PIN(24, "GPIO_24"),
132 PINCTRL_PIN(25, "GPIO_25"),
133 PINCTRL_PIN(26, "GPIO_26"),
134 PINCTRL_PIN(27, "GPIO_27"),
135 PINCTRL_PIN(28, "GPIO_28"),
136 PINCTRL_PIN(29, "GPIO_29"),
137 PINCTRL_PIN(30, "GPIO_30"),
138 PINCTRL_PIN(31, "GPIO_31"),
139 PINCTRL_PIN(32, "GPIO_32"),
140 PINCTRL_PIN(33, "GPIO_33"),
141 PINCTRL_PIN(34, "GPIO_34"),
142 PINCTRL_PIN(35, "GPIO_35"),
143 PINCTRL_PIN(36, "GPIO_36"),
144 PINCTRL_PIN(37, "GPIO_37"),
145 PINCTRL_PIN(38, "GPIO_38"),
146 PINCTRL_PIN(39, "GPIO_39"),
147 PINCTRL_PIN(40, "GPIO_40"),
148 PINCTRL_PIN(41, "GPIO_41"),
149 PINCTRL_PIN(42, "GPIO_42"),
150 PINCTRL_PIN(43, "GPIO_43"),
151 PINCTRL_PIN(44, "GPIO_44"),
152 PINCTRL_PIN(45, "GPIO_45"),
153 PINCTRL_PIN(46, "GPIO_46"),
154 PINCTRL_PIN(47, "GPIO_47"),
155 PINCTRL_PIN(48, "GPIO_48"),
156 PINCTRL_PIN(49, "GPIO_49"),
157 PINCTRL_PIN(50, "GPIO_50"),
158 PINCTRL_PIN(51, "GPIO_51"),
159 PINCTRL_PIN(52, "GPIO_52"),
160 PINCTRL_PIN(53, "GPIO_53"),
161 PINCTRL_PIN(54, "GPIO_54"),
162 PINCTRL_PIN(55, "GPIO_55"),
163 PINCTRL_PIN(56, "GPIO_56"),
164 PINCTRL_PIN(57, "GPIO_57"),
165 PINCTRL_PIN(58, "GPIO_58"),
166 PINCTRL_PIN(59, "GPIO_59"),
167 PINCTRL_PIN(60, "GPIO_60"),
168 PINCTRL_PIN(61, "GPIO_61"),
169 PINCTRL_PIN(62, "GPIO_62"),
170 PINCTRL_PIN(63, "GPIO_63"),
171 PINCTRL_PIN(64, "GPIO_64"),
172 PINCTRL_PIN(65, "GPIO_65"),
173 PINCTRL_PIN(66, "GPIO_66"),
174 PINCTRL_PIN(67, "GPIO_67"),
175 PINCTRL_PIN(68, "GPIO_68"),
176 PINCTRL_PIN(69, "GPIO_69"),
177 PINCTRL_PIN(70, "GPIO_70"),
178 PINCTRL_PIN(71, "GPIO_71"),
179 PINCTRL_PIN(72, "GPIO_72"),
180 PINCTRL_PIN(73, "GPIO_73"),
181 PINCTRL_PIN(74, "GPIO_74"),
182 PINCTRL_PIN(75, "GPIO_75"),
183 PINCTRL_PIN(76, "GPIO_76"),
184 PINCTRL_PIN(77, "GPIO_77"),
185 PINCTRL_PIN(78, "GPIO_78"),
186 PINCTRL_PIN(79, "GPIO_79"),
187 PINCTRL_PIN(80, "GPIO_80"),
188 PINCTRL_PIN(81, "GPIO_81"),
189 PINCTRL_PIN(82, "GPIO_82"),
190 PINCTRL_PIN(83, "GPIO_83"),
191 PINCTRL_PIN(84, "GPIO_84"),
192 PINCTRL_PIN(85, "GPIO_85"),
193 PINCTRL_PIN(86, "GPIO_86"),
194 PINCTRL_PIN(87, "GPIO_87"),
195 PINCTRL_PIN(88, "GPIO_88"),
196 PINCTRL_PIN(89, "GPIO_89"),
197 PINCTRL_PIN(90, "GPIO_90"),
198 PINCTRL_PIN(91, "GPIO_91"),
199 PINCTRL_PIN(92, "GPIO_92"),
200 PINCTRL_PIN(93, "GPIO_93"),
201 PINCTRL_PIN(94, "GPIO_94"),
202 PINCTRL_PIN(95, "GPIO_95"),
203 PINCTRL_PIN(96, "GPIO_96"),
204 PINCTRL_PIN(97, "GPIO_97"),
205 PINCTRL_PIN(98, "GPIO_98"),
206 PINCTRL_PIN(99, "GPIO_99"),
207 PINCTRL_PIN(100, "GPIO_100"),
208 PINCTRL_PIN(101, "GPIO_101"),
209 PINCTRL_PIN(102, "GPIO_102"),
210 PINCTRL_PIN(103, "GPIO_103"),
211 PINCTRL_PIN(104, "GPIO_104"),
212 PINCTRL_PIN(105, "GPIO_105"),
213 PINCTRL_PIN(106, "GPIO_106"),
214 PINCTRL_PIN(107, "GPIO_107"),
215 PINCTRL_PIN(108, "GPIO_108"),
216 PINCTRL_PIN(109, "GPIO_109"),
217 PINCTRL_PIN(110, "GPIO_110"),
218 PINCTRL_PIN(111, "GPIO_111"),
219 PINCTRL_PIN(112, "GPIO_112"),
220 PINCTRL_PIN(113, "GPIO_113"),
221 PINCTRL_PIN(114, "GPIO_114"),
222 PINCTRL_PIN(115, "GPIO_115"),
223 PINCTRL_PIN(116, "GPIO_116"),
224 PINCTRL_PIN(117, "GPIO_117"),
225 PINCTRL_PIN(118, "GPIO_118"),
226 PINCTRL_PIN(119, "GPIO_119"),
227 PINCTRL_PIN(120, "GPIO_120"),
228 PINCTRL_PIN(121, "GPIO_121"),
229 PINCTRL_PIN(122, "GPIO_122"),
230 PINCTRL_PIN(123, "GPIO_123"),
231 PINCTRL_PIN(124, "GPIO_124"),
232 PINCTRL_PIN(125, "GPIO_125"),
233 PINCTRL_PIN(126, "GPIO_126"),
234 PINCTRL_PIN(127, "GPIO_127"),
235 PINCTRL_PIN(128, "GPIO_128"),
236 PINCTRL_PIN(129, "GPIO_129"),
237 PINCTRL_PIN(130, "GPIO_130"),
238 PINCTRL_PIN(131, "GPIO_131"),
239 PINCTRL_PIN(132, "GPIO_132"),
240 PINCTRL_PIN(133, "GPIO_133"),
241 PINCTRL_PIN(134, "GPIO_134"),
242 PINCTRL_PIN(135, "GPIO_135"),
243 PINCTRL_PIN(136, "GPIO_136"),
244 PINCTRL_PIN(137, "GPIO_137"),
245 PINCTRL_PIN(138, "GPIO_138"),
246 PINCTRL_PIN(139, "GPIO_139"),
247 PINCTRL_PIN(140, "GPIO_140"),
248 PINCTRL_PIN(141, "GPIO_141"),
249 PINCTRL_PIN(142, "GPIO_142"),
250 PINCTRL_PIN(143, "GPIO_143"),
251 PINCTRL_PIN(144, "GPIO_144"),
252 PINCTRL_PIN(145, "GPIO_145"),
253 PINCTRL_PIN(146, "GPIO_146"),
254 PINCTRL_PIN(147, "GPIO_147"),
255 PINCTRL_PIN(148, "GPIO_148"),
256 PINCTRL_PIN(149, "GPIO_149"),
257 PINCTRL_PIN(150, "GPIO_150"),
258 PINCTRL_PIN(151, "GPIO_151"),
259 PINCTRL_PIN(152, "GPIO_152"),
260 PINCTRL_PIN(153, "GPIO_153"),
261 PINCTRL_PIN(154, "GPIO_154"),
262 PINCTRL_PIN(155, "GPIO_155"),
263 PINCTRL_PIN(156, "GPIO_156"),
264 PINCTRL_PIN(157, "GPIO_157"),
265 PINCTRL_PIN(158, "GPIO_158"),
266 PINCTRL_PIN(159, "GPIO_159"),
267 PINCTRL_PIN(160, "GPIO_160"),
268 PINCTRL_PIN(161, "GPIO_161"),
269 PINCTRL_PIN(162, "GPIO_162"),
270 PINCTRL_PIN(163, "GPIO_163"),
271 PINCTRL_PIN(164, "GPIO_164"),
272 PINCTRL_PIN(165, "GPIO_165"),
273 PINCTRL_PIN(166, "GPIO_166"),
274 PINCTRL_PIN(167, "GPIO_167"),
275 PINCTRL_PIN(168, "GPIO_168"),
276 PINCTRL_PIN(169, "GPIO_169"),
277 PINCTRL_PIN(170, "GPIO_170"),
278 PINCTRL_PIN(171, "GPIO_171"),
279 PINCTRL_PIN(172, "GPIO_172"),
280 PINCTRL_PIN(173, "GPIO_173"),
281 PINCTRL_PIN(174, "GPIO_174"),
282 PINCTRL_PIN(175, "GPIO_175"),
283 PINCTRL_PIN(176, "GPIO_176"),
284 PINCTRL_PIN(177, "GPIO_177"),
285 PINCTRL_PIN(178, "GPIO_178"),
286 PINCTRL_PIN(179, "GPIO_179"),
287 PINCTRL_PIN(180, "GPIO_180"),
288 PINCTRL_PIN(181, "GPIO_181"),
289 PINCTRL_PIN(182, "GPIO_182"),
290 PINCTRL_PIN(183, "GPIO_183"),
291 PINCTRL_PIN(184, "GPIO_184"),
292 PINCTRL_PIN(185, "GPIO_185"),
293 PINCTRL_PIN(186, "GPIO_186"),
294 PINCTRL_PIN(187, "GPIO_187"),
295 PINCTRL_PIN(188, "GPIO_188"),
296 PINCTRL_PIN(189, "GPIO_189"),
297 PINCTRL_PIN(190, "GPIO_190"),
298 PINCTRL_PIN(191, "GPIO_191"),
299 PINCTRL_PIN(192, "GPIO_192"),
300 PINCTRL_PIN(193, "GPIO_193"),
301 PINCTRL_PIN(194, "GPIO_194"),
302 PINCTRL_PIN(195, "GPIO_195"),
303 PINCTRL_PIN(196, "GPIO_196"),
304 PINCTRL_PIN(197, "GPIO_197"),
305 PINCTRL_PIN(198, "GPIO_198"),
306 PINCTRL_PIN(199, "GPIO_199"),
307 PINCTRL_PIN(200, "GPIO_200"),
308 PINCTRL_PIN(201, "GPIO_201"),
309 PINCTRL_PIN(202, "GPIO_202"),
310 PINCTRL_PIN(203, "GPIO_203"),
311 PINCTRL_PIN(204, "GPIO_204"),
312 PINCTRL_PIN(205, "GPIO_205"),
313 PINCTRL_PIN(206, "GPIO_206"),
314 PINCTRL_PIN(207, "GPIO_207"),
315 PINCTRL_PIN(208, "GPIO_208"),
316 PINCTRL_PIN(209, "GPIO_209"),
317 PINCTRL_PIN(210, "GPIO_210"),
318 PINCTRL_PIN(211, "GPIO_211"),
319 PINCTRL_PIN(212, "GPIO_212"),
320 PINCTRL_PIN(213, "GPIO_213"),
321 PINCTRL_PIN(214, "GPIO_214"),
322 PINCTRL_PIN(215, "GPIO_215"),
323 PINCTRL_PIN(216, "GPIO_216"),
324 PINCTRL_PIN(217, "GPIO_217"),
325 PINCTRL_PIN(218, "GPIO_218"),
326 PINCTRL_PIN(219, "GPIO_219"),
327 PINCTRL_PIN(220, "GPIO_220"),
328 PINCTRL_PIN(221, "GPIO_221"),
329 PINCTRL_PIN(222, "GPIO_222"),
330 PINCTRL_PIN(223, "GPIO_223"),
331 PINCTRL_PIN(224, "GPIO_224"),
332 PINCTRL_PIN(225, "GPIO_225"),
333 PINCTRL_PIN(226, "GPIO_226"),
334 PINCTRL_PIN(227, "GPIO_227"),
335 PINCTRL_PIN(228, "GPIO_228"),
336 PINCTRL_PIN(229, "GPIO_229"),
337 PINCTRL_PIN(230, "GPIO_230"),
338 PINCTRL_PIN(231, "GPIO_231"),
339 PINCTRL_PIN(232, "GPIO_232"),
340 PINCTRL_PIN(233, "GPIO_233"),
341 PINCTRL_PIN(234, "GPIO_234"),
342 PINCTRL_PIN(235, "GPIO_235"),
343 PINCTRL_PIN(236, "GPIO_236"),
344 PINCTRL_PIN(237, "GPIO_237"),
345 PINCTRL_PIN(238, "UFS_RESET"),
346 PINCTRL_PIN(239, "SDC2_CLK"),
347 PINCTRL_PIN(240, "SDC2_CMD"),
348 PINCTRL_PIN(241, "SDC2_DATA"),
349 };
350
351 #define DECLARE_MSM_GPIO_PINS(pin) \
352 static const unsigned int gpio##pin##_pins[] = { pin }
353 DECLARE_MSM_GPIO_PINS(0);
354 DECLARE_MSM_GPIO_PINS(1);
355 DECLARE_MSM_GPIO_PINS(2);
356 DECLARE_MSM_GPIO_PINS(3);
357 DECLARE_MSM_GPIO_PINS(4);
358 DECLARE_MSM_GPIO_PINS(5);
359 DECLARE_MSM_GPIO_PINS(6);
360 DECLARE_MSM_GPIO_PINS(7);
361 DECLARE_MSM_GPIO_PINS(8);
362 DECLARE_MSM_GPIO_PINS(9);
363 DECLARE_MSM_GPIO_PINS(10);
364 DECLARE_MSM_GPIO_PINS(11);
365 DECLARE_MSM_GPIO_PINS(12);
366 DECLARE_MSM_GPIO_PINS(13);
367 DECLARE_MSM_GPIO_PINS(14);
368 DECLARE_MSM_GPIO_PINS(15);
369 DECLARE_MSM_GPIO_PINS(16);
370 DECLARE_MSM_GPIO_PINS(17);
371 DECLARE_MSM_GPIO_PINS(18);
372 DECLARE_MSM_GPIO_PINS(19);
373 DECLARE_MSM_GPIO_PINS(20);
374 DECLARE_MSM_GPIO_PINS(21);
375 DECLARE_MSM_GPIO_PINS(22);
376 DECLARE_MSM_GPIO_PINS(23);
377 DECLARE_MSM_GPIO_PINS(24);
378 DECLARE_MSM_GPIO_PINS(25);
379 DECLARE_MSM_GPIO_PINS(26);
380 DECLARE_MSM_GPIO_PINS(27);
381 DECLARE_MSM_GPIO_PINS(28);
382 DECLARE_MSM_GPIO_PINS(29);
383 DECLARE_MSM_GPIO_PINS(30);
384 DECLARE_MSM_GPIO_PINS(31);
385 DECLARE_MSM_GPIO_PINS(32);
386 DECLARE_MSM_GPIO_PINS(33);
387 DECLARE_MSM_GPIO_PINS(34);
388 DECLARE_MSM_GPIO_PINS(35);
389 DECLARE_MSM_GPIO_PINS(36);
390 DECLARE_MSM_GPIO_PINS(37);
391 DECLARE_MSM_GPIO_PINS(38);
392 DECLARE_MSM_GPIO_PINS(39);
393 DECLARE_MSM_GPIO_PINS(40);
394 DECLARE_MSM_GPIO_PINS(41);
395 DECLARE_MSM_GPIO_PINS(42);
396 DECLARE_MSM_GPIO_PINS(43);
397 DECLARE_MSM_GPIO_PINS(44);
398 DECLARE_MSM_GPIO_PINS(45);
399 DECLARE_MSM_GPIO_PINS(46);
400 DECLARE_MSM_GPIO_PINS(47);
401 DECLARE_MSM_GPIO_PINS(48);
402 DECLARE_MSM_GPIO_PINS(49);
403 DECLARE_MSM_GPIO_PINS(50);
404 DECLARE_MSM_GPIO_PINS(51);
405 DECLARE_MSM_GPIO_PINS(52);
406 DECLARE_MSM_GPIO_PINS(53);
407 DECLARE_MSM_GPIO_PINS(54);
408 DECLARE_MSM_GPIO_PINS(55);
409 DECLARE_MSM_GPIO_PINS(56);
410 DECLARE_MSM_GPIO_PINS(57);
411 DECLARE_MSM_GPIO_PINS(58);
412 DECLARE_MSM_GPIO_PINS(59);
413 DECLARE_MSM_GPIO_PINS(60);
414 DECLARE_MSM_GPIO_PINS(61);
415 DECLARE_MSM_GPIO_PINS(62);
416 DECLARE_MSM_GPIO_PINS(63);
417 DECLARE_MSM_GPIO_PINS(64);
418 DECLARE_MSM_GPIO_PINS(65);
419 DECLARE_MSM_GPIO_PINS(66);
420 DECLARE_MSM_GPIO_PINS(67);
421 DECLARE_MSM_GPIO_PINS(68);
422 DECLARE_MSM_GPIO_PINS(69);
423 DECLARE_MSM_GPIO_PINS(70);
424 DECLARE_MSM_GPIO_PINS(71);
425 DECLARE_MSM_GPIO_PINS(72);
426 DECLARE_MSM_GPIO_PINS(73);
427 DECLARE_MSM_GPIO_PINS(74);
428 DECLARE_MSM_GPIO_PINS(75);
429 DECLARE_MSM_GPIO_PINS(76);
430 DECLARE_MSM_GPIO_PINS(77);
431 DECLARE_MSM_GPIO_PINS(78);
432 DECLARE_MSM_GPIO_PINS(79);
433 DECLARE_MSM_GPIO_PINS(80);
434 DECLARE_MSM_GPIO_PINS(81);
435 DECLARE_MSM_GPIO_PINS(82);
436 DECLARE_MSM_GPIO_PINS(83);
437 DECLARE_MSM_GPIO_PINS(84);
438 DECLARE_MSM_GPIO_PINS(85);
439 DECLARE_MSM_GPIO_PINS(86);
440 DECLARE_MSM_GPIO_PINS(87);
441 DECLARE_MSM_GPIO_PINS(88);
442 DECLARE_MSM_GPIO_PINS(89);
443 DECLARE_MSM_GPIO_PINS(90);
444 DECLARE_MSM_GPIO_PINS(91);
445 DECLARE_MSM_GPIO_PINS(92);
446 DECLARE_MSM_GPIO_PINS(93);
447 DECLARE_MSM_GPIO_PINS(94);
448 DECLARE_MSM_GPIO_PINS(95);
449 DECLARE_MSM_GPIO_PINS(96);
450 DECLARE_MSM_GPIO_PINS(97);
451 DECLARE_MSM_GPIO_PINS(98);
452 DECLARE_MSM_GPIO_PINS(99);
453 DECLARE_MSM_GPIO_PINS(100);
454 DECLARE_MSM_GPIO_PINS(101);
455 DECLARE_MSM_GPIO_PINS(102);
456 DECLARE_MSM_GPIO_PINS(103);
457 DECLARE_MSM_GPIO_PINS(104);
458 DECLARE_MSM_GPIO_PINS(105);
459 DECLARE_MSM_GPIO_PINS(106);
460 DECLARE_MSM_GPIO_PINS(107);
461 DECLARE_MSM_GPIO_PINS(108);
462 DECLARE_MSM_GPIO_PINS(109);
463 DECLARE_MSM_GPIO_PINS(110);
464 DECLARE_MSM_GPIO_PINS(111);
465 DECLARE_MSM_GPIO_PINS(112);
466 DECLARE_MSM_GPIO_PINS(113);
467 DECLARE_MSM_GPIO_PINS(114);
468 DECLARE_MSM_GPIO_PINS(115);
469 DECLARE_MSM_GPIO_PINS(116);
470 DECLARE_MSM_GPIO_PINS(117);
471 DECLARE_MSM_GPIO_PINS(118);
472 DECLARE_MSM_GPIO_PINS(119);
473 DECLARE_MSM_GPIO_PINS(120);
474 DECLARE_MSM_GPIO_PINS(121);
475 DECLARE_MSM_GPIO_PINS(122);
476 DECLARE_MSM_GPIO_PINS(123);
477 DECLARE_MSM_GPIO_PINS(124);
478 DECLARE_MSM_GPIO_PINS(125);
479 DECLARE_MSM_GPIO_PINS(126);
480 DECLARE_MSM_GPIO_PINS(127);
481 DECLARE_MSM_GPIO_PINS(128);
482 DECLARE_MSM_GPIO_PINS(129);
483 DECLARE_MSM_GPIO_PINS(130);
484 DECLARE_MSM_GPIO_PINS(131);
485 DECLARE_MSM_GPIO_PINS(132);
486 DECLARE_MSM_GPIO_PINS(133);
487 DECLARE_MSM_GPIO_PINS(134);
488 DECLARE_MSM_GPIO_PINS(135);
489 DECLARE_MSM_GPIO_PINS(136);
490 DECLARE_MSM_GPIO_PINS(137);
491 DECLARE_MSM_GPIO_PINS(138);
492 DECLARE_MSM_GPIO_PINS(139);
493 DECLARE_MSM_GPIO_PINS(140);
494 DECLARE_MSM_GPIO_PINS(141);
495 DECLARE_MSM_GPIO_PINS(142);
496 DECLARE_MSM_GPIO_PINS(143);
497 DECLARE_MSM_GPIO_PINS(144);
498 DECLARE_MSM_GPIO_PINS(145);
499 DECLARE_MSM_GPIO_PINS(146);
500 DECLARE_MSM_GPIO_PINS(147);
501 DECLARE_MSM_GPIO_PINS(148);
502 DECLARE_MSM_GPIO_PINS(149);
503 DECLARE_MSM_GPIO_PINS(150);
504 DECLARE_MSM_GPIO_PINS(151);
505 DECLARE_MSM_GPIO_PINS(152);
506 DECLARE_MSM_GPIO_PINS(153);
507 DECLARE_MSM_GPIO_PINS(154);
508 DECLARE_MSM_GPIO_PINS(155);
509 DECLARE_MSM_GPIO_PINS(156);
510 DECLARE_MSM_GPIO_PINS(157);
511 DECLARE_MSM_GPIO_PINS(158);
512 DECLARE_MSM_GPIO_PINS(159);
513 DECLARE_MSM_GPIO_PINS(160);
514 DECLARE_MSM_GPIO_PINS(161);
515 DECLARE_MSM_GPIO_PINS(162);
516 DECLARE_MSM_GPIO_PINS(163);
517 DECLARE_MSM_GPIO_PINS(164);
518 DECLARE_MSM_GPIO_PINS(165);
519 DECLARE_MSM_GPIO_PINS(166);
520 DECLARE_MSM_GPIO_PINS(167);
521 DECLARE_MSM_GPIO_PINS(168);
522 DECLARE_MSM_GPIO_PINS(169);
523 DECLARE_MSM_GPIO_PINS(170);
524 DECLARE_MSM_GPIO_PINS(171);
525 DECLARE_MSM_GPIO_PINS(172);
526 DECLARE_MSM_GPIO_PINS(173);
527 DECLARE_MSM_GPIO_PINS(174);
528 DECLARE_MSM_GPIO_PINS(175);
529 DECLARE_MSM_GPIO_PINS(176);
530 DECLARE_MSM_GPIO_PINS(177);
531 DECLARE_MSM_GPIO_PINS(178);
532 DECLARE_MSM_GPIO_PINS(179);
533 DECLARE_MSM_GPIO_PINS(180);
534 DECLARE_MSM_GPIO_PINS(181);
535 DECLARE_MSM_GPIO_PINS(182);
536 DECLARE_MSM_GPIO_PINS(183);
537 DECLARE_MSM_GPIO_PINS(184);
538 DECLARE_MSM_GPIO_PINS(185);
539 DECLARE_MSM_GPIO_PINS(186);
540 DECLARE_MSM_GPIO_PINS(187);
541 DECLARE_MSM_GPIO_PINS(188);
542 DECLARE_MSM_GPIO_PINS(189);
543 DECLARE_MSM_GPIO_PINS(190);
544 DECLARE_MSM_GPIO_PINS(191);
545 DECLARE_MSM_GPIO_PINS(192);
546 DECLARE_MSM_GPIO_PINS(193);
547 DECLARE_MSM_GPIO_PINS(194);
548 DECLARE_MSM_GPIO_PINS(195);
549 DECLARE_MSM_GPIO_PINS(196);
550 DECLARE_MSM_GPIO_PINS(197);
551 DECLARE_MSM_GPIO_PINS(198);
552 DECLARE_MSM_GPIO_PINS(199);
553 DECLARE_MSM_GPIO_PINS(200);
554 DECLARE_MSM_GPIO_PINS(201);
555 DECLARE_MSM_GPIO_PINS(202);
556 DECLARE_MSM_GPIO_PINS(203);
557 DECLARE_MSM_GPIO_PINS(204);
558 DECLARE_MSM_GPIO_PINS(205);
559 DECLARE_MSM_GPIO_PINS(206);
560 DECLARE_MSM_GPIO_PINS(207);
561 DECLARE_MSM_GPIO_PINS(208);
562 DECLARE_MSM_GPIO_PINS(209);
563 DECLARE_MSM_GPIO_PINS(210);
564 DECLARE_MSM_GPIO_PINS(211);
565 DECLARE_MSM_GPIO_PINS(212);
566 DECLARE_MSM_GPIO_PINS(213);
567 DECLARE_MSM_GPIO_PINS(214);
568 DECLARE_MSM_GPIO_PINS(215);
569 DECLARE_MSM_GPIO_PINS(216);
570 DECLARE_MSM_GPIO_PINS(217);
571 DECLARE_MSM_GPIO_PINS(218);
572 DECLARE_MSM_GPIO_PINS(219);
573 DECLARE_MSM_GPIO_PINS(220);
574 DECLARE_MSM_GPIO_PINS(221);
575 DECLARE_MSM_GPIO_PINS(222);
576 DECLARE_MSM_GPIO_PINS(223);
577 DECLARE_MSM_GPIO_PINS(224);
578 DECLARE_MSM_GPIO_PINS(225);
579 DECLARE_MSM_GPIO_PINS(226);
580 DECLARE_MSM_GPIO_PINS(227);
581 DECLARE_MSM_GPIO_PINS(228);
582 DECLARE_MSM_GPIO_PINS(229);
583 DECLARE_MSM_GPIO_PINS(230);
584 DECLARE_MSM_GPIO_PINS(231);
585 DECLARE_MSM_GPIO_PINS(232);
586 DECLARE_MSM_GPIO_PINS(233);
587 DECLARE_MSM_GPIO_PINS(234);
588 DECLARE_MSM_GPIO_PINS(235);
589 DECLARE_MSM_GPIO_PINS(236);
590 DECLARE_MSM_GPIO_PINS(237);
591
592 static const unsigned int ufs_reset_pins[] = { 238 };
593 static const unsigned int sdc2_clk_pins[] = { 239 };
594 static const unsigned int sdc2_cmd_pins[] = { 240 };
595 static const unsigned int sdc2_data_pins[] = { 241 };
596
597 enum x1e80100_functions {
598 msm_mux_gpio,
599 msm_mux_RESOUT_GPIO,
600 msm_mux_aon_cci,
601 msm_mux_aoss_cti,
602 msm_mux_atest_char,
603 msm_mux_atest_char0,
604 msm_mux_atest_char1,
605 msm_mux_atest_char2,
606 msm_mux_atest_char3,
607 msm_mux_atest_usb,
608 msm_mux_audio_ext,
609 msm_mux_audio_ref,
610 msm_mux_cam_aon,
611 msm_mux_cam_mclk,
612 msm_mux_cci_async,
613 msm_mux_cci_i2c,
614 msm_mux_cci_timer0,
615 msm_mux_cci_timer1,
616 msm_mux_cci_timer2,
617 msm_mux_cci_timer3,
618 msm_mux_cci_timer4,
619 msm_mux_cmu_rng0,
620 msm_mux_cmu_rng1,
621 msm_mux_cmu_rng2,
622 msm_mux_cmu_rng3,
623 msm_mux_cri_trng,
624 msm_mux_dbg_out,
625 msm_mux_ddr_bist,
626 msm_mux_ddr_pxi0,
627 msm_mux_ddr_pxi1,
628 msm_mux_ddr_pxi2,
629 msm_mux_ddr_pxi3,
630 msm_mux_ddr_pxi4,
631 msm_mux_ddr_pxi5,
632 msm_mux_ddr_pxi6,
633 msm_mux_ddr_pxi7,
634 msm_mux_edp0_hot,
635 msm_mux_edp0_lcd,
636 msm_mux_edp1_hot,
637 msm_mux_edp1_lcd,
638 msm_mux_eusb0_ac,
639 msm_mux_eusb1_ac,
640 msm_mux_eusb2_ac,
641 msm_mux_eusb3_ac,
642 msm_mux_eusb5_ac,
643 msm_mux_eusb6_ac,
644 msm_mux_gcc_gp1,
645 msm_mux_gcc_gp2,
646 msm_mux_gcc_gp3,
647 msm_mux_i2s0_data0,
648 msm_mux_i2s0_data1,
649 msm_mux_i2s0_sck,
650 msm_mux_i2s0_ws,
651 msm_mux_i2s1_data0,
652 msm_mux_i2s1_data1,
653 msm_mux_i2s1_sck,
654 msm_mux_i2s1_ws,
655 msm_mux_ibi_i3c,
656 msm_mux_jitter_bist,
657 msm_mux_mdp_vsync0,
658 msm_mux_mdp_vsync1,
659 msm_mux_mdp_vsync2,
660 msm_mux_mdp_vsync3,
661 msm_mux_mdp_vsync4,
662 msm_mux_mdp_vsync5,
663 msm_mux_mdp_vsync6,
664 msm_mux_mdp_vsync7,
665 msm_mux_mdp_vsync8,
666 msm_mux_pcie3_clk,
667 msm_mux_pcie4_clk,
668 msm_mux_pcie5_clk,
669 msm_mux_pcie6a_clk,
670 msm_mux_pcie6b_clk,
671 msm_mux_phase_flag,
672 msm_mux_pll_bist,
673 msm_mux_pll_clk,
674 msm_mux_prng_rosc0,
675 msm_mux_prng_rosc1,
676 msm_mux_prng_rosc2,
677 msm_mux_prng_rosc3,
678 msm_mux_qdss_cti,
679 msm_mux_qdss_gpio,
680 msm_mux_qspi00,
681 msm_mux_qspi01,
682 msm_mux_qspi02,
683 msm_mux_qspi03,
684 msm_mux_qspi0_clk,
685 msm_mux_qspi0_cs0,
686 msm_mux_qspi0_cs1,
687 msm_mux_qup0_se0,
688 msm_mux_qup0_se1,
689 msm_mux_qup0_se2,
690 msm_mux_qup0_se3,
691 msm_mux_qup0_se4,
692 msm_mux_qup0_se5,
693 msm_mux_qup0_se6,
694 msm_mux_qup0_se7,
695 msm_mux_qup1_se0,
696 msm_mux_qup1_se1,
697 msm_mux_qup1_se2,
698 msm_mux_qup1_se3,
699 msm_mux_qup1_se4,
700 msm_mux_qup1_se5,
701 msm_mux_qup1_se6,
702 msm_mux_qup1_se7,
703 msm_mux_qup2_se0,
704 msm_mux_qup2_se1,
705 msm_mux_qup2_se2,
706 msm_mux_qup2_se3,
707 msm_mux_qup2_se4,
708 msm_mux_qup2_se5,
709 msm_mux_qup2_se6,
710 msm_mux_qup2_se7,
711 msm_mux_sd_write,
712 msm_mux_sdc4_clk,
713 msm_mux_sdc4_cmd,
714 msm_mux_sdc4_data0,
715 msm_mux_sdc4_data1,
716 msm_mux_sdc4_data2,
717 msm_mux_sdc4_data3,
718 msm_mux_sys_throttle,
719 msm_mux_tb_trig,
720 msm_mux_tgu_ch0,
721 msm_mux_tgu_ch1,
722 msm_mux_tgu_ch2,
723 msm_mux_tgu_ch3,
724 msm_mux_tgu_ch4,
725 msm_mux_tgu_ch5,
726 msm_mux_tgu_ch6,
727 msm_mux_tgu_ch7,
728 msm_mux_tmess_prng0,
729 msm_mux_tmess_prng1,
730 msm_mux_tmess_prng2,
731 msm_mux_tmess_prng3,
732 msm_mux_tsense_pwm1,
733 msm_mux_tsense_pwm2,
734 msm_mux_tsense_pwm3,
735 msm_mux_tsense_pwm4,
736 msm_mux_usb0_dp,
737 msm_mux_usb0_phy,
738 msm_mux_usb0_sbrx,
739 msm_mux_usb0_sbtx,
740 msm_mux_usb1_dp,
741 msm_mux_usb1_phy,
742 msm_mux_usb1_sbrx,
743 msm_mux_usb1_sbtx,
744 msm_mux_usb2_dp,
745 msm_mux_usb2_phy,
746 msm_mux_usb2_sbrx,
747 msm_mux_usb2_sbtx,
748 msm_mux_vsense_trigger,
749 msm_mux__,
750 };
751
752 static const char * const gpio_groups[] = {
753 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
754 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
755 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
756 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
757 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
758 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
759 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
760 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
761 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
762 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
763 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
764 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
765 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
766 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
767 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
768 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
769 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
770 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
771 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
772 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
773 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
774 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
775 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
776 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158",
777 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
778 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
779 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176",
780 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182",
781 "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188",
782 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194",
783 "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200",
784 "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206",
785 "gpio207", "gpio208", "gpio209", "gpio210", "gpio211", "gpio212",
786 "gpio213", "gpio214", "gpio215", "gpio216", "gpio217", "gpio218",
787 "gpio219", "gpio220", "gpio221", "gpio222", "gpio223", "gpio224",
788 "gpio225", "gpio226", "gpio227", "gpio228", "gpio229", "gpio230",
789 "gpio231", "gpio232", "gpio233", "gpio234", "gpio235", "gpio236",
790 "gpio237",
791 };
792
793 static const char * const RESOUT_GPIO_groups[] = {
794 "gpio160",
795 };
796
797 static const char * const aon_cci_groups[] = {
798 "gpio235", "gpio236",
799 };
800
801 static const char * const aoss_cti_groups[] = {
802 "gpio60", "gpio61", "gpio62", "gpio63",
803 };
804
805 static const char * const atest_char_groups[] = {
806 "gpio181",
807 };
808
809 static const char * const atest_char0_groups[] = {
810 "gpio185",
811 };
812
813 static const char * const atest_char1_groups[] = {
814 "gpio184",
815 };
816
817 static const char * const atest_char2_groups[] = {
818 "gpio188",
819 };
820
821 static const char * const atest_char3_groups[] = {
822 "gpio182",
823 };
824
825 static const char * const atest_usb_groups[] = {
826 "gpio9", "gpio10", "gpio35", "gpio38", "gpio41", "gpio42",
827 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48",
828 "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54",
829 "gpio58", "gpio59", "gpio65", "gpio66", "gpio67", "gpio72",
830 "gpio73", "gpio74", "gpio75", "gpio80", "gpio81", "gpio83",
831 };
832
833 static const char * const audio_ext_groups[] = {
834 "gpio134", "gpio142",
835 };
836
837 static const char * const audio_ref_groups[] = {
838 "gpio142",
839 };
840
841 static const char * const cam_aon_groups[] = {
842 "gpio100",
843 };
844
845 static const char * const cam_mclk_groups[] = {
846 "gpio96", "gpio97", "gpio98", "gpio99",
847 };
848
849 static const char * const cci_async_groups[] = {
850 "gpio111", "gpio112", "gpio113",
851 };
852
853 static const char * const cci_i2c_groups[] = {
854 "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106",
855 };
856
857 static const char * const cci_timer0_groups[] = {
858 "gpio109",
859 };
860
861 static const char * const cci_timer1_groups[] = {
862 "gpio110",
863 };
864
865 static const char * const cci_timer2_groups[] = {
866 "gpio111",
867 };
868
869 static const char * const cci_timer3_groups[] = {
870 "gpio112",
871 };
872
873 static const char * const cci_timer4_groups[] = {
874 "gpio113",
875 };
876
877 static const char * const cmu_rng0_groups[] = {
878 "gpio48",
879 };
880
881 static const char * const cmu_rng1_groups[] = {
882 "gpio47",
883 };
884
885 static const char * const cmu_rng2_groups[] = {
886 "gpio46",
887 };
888
889 static const char * const cmu_rng3_groups[] = {
890 "gpio45",
891 };
892
893 static const char * const cri_trng_groups[] = {
894 "gpio187",
895 };
896
897 static const char * const dbg_out_groups[] = {
898 "gpio51",
899 };
900
901 static const char * const ddr_bist_groups[] = {
902 "gpio54", "gpio55", "gpio56", "gpio57",
903 };
904
905 static const char * const ddr_pxi0_groups[] = {
906 "gpio9", "gpio38",
907 };
908
909 static const char * const ddr_pxi1_groups[] = {
910 "gpio10", "gpio41",
911 };
912
913 static const char * const ddr_pxi2_groups[] = {
914 "gpio42", "gpio43",
915 };
916
917 static const char * const ddr_pxi3_groups[] = {
918 "gpio44", "gpio45",
919 };
920
921 static const char * const ddr_pxi4_groups[] = {
922 "gpio46", "gpio47",
923 };
924
925 static const char * const ddr_pxi5_groups[] = {
926 "gpio48", "gpio49",
927 };
928
929 static const char * const ddr_pxi6_groups[] = {
930 "gpio50", "gpio51",
931 };
932
933 static const char * const ddr_pxi7_groups[] = {
934 "gpio52", "gpio53",
935 };
936
937 static const char * const edp0_hot_groups[] = {
938 "gpio119",
939 };
940
941 static const char * const edp0_lcd_groups[] = {
942 "gpio120",
943 };
944
945 static const char * const edp1_hot_groups[] = {
946 "gpio120",
947 };
948
949 static const char * const edp1_lcd_groups[] = {
950 "gpio115", "gpio119",
951 };
952
953 static const char * const eusb0_ac_groups[] = {
954 "gpio168",
955 };
956
957 static const char * const eusb1_ac_groups[] = {
958 "gpio177",
959 };
960
961 static const char * const eusb2_ac_groups[] = {
962 "gpio186",
963 };
964
965 static const char * const eusb3_ac_groups[] = {
966 "gpio169",
967 };
968
969 static const char * const eusb5_ac_groups[] = {
970 "gpio187",
971 };
972
973 static const char * const eusb6_ac_groups[] = {
974 "gpio178",
975 };
976
977 static const char * const gcc_gp1_groups[] = {
978 "gpio71", "gpio72",
979 };
980
981 static const char * const gcc_gp2_groups[] = {
982 "gpio64", "gpio73",
983 };
984
985 static const char * const gcc_gp3_groups[] = {
986 "gpio74", "gpio82",
987 };
988
989 static const char * const i2s0_data0_groups[] = {
990 "gpio136",
991 };
992
993 static const char * const i2s0_data1_groups[] = {
994 "gpio137",
995 };
996
997 static const char * const i2s0_sck_groups[] = {
998 "gpio135",
999 };
1000
1001 static const char * const i2s0_ws_groups[] = {
1002 "gpio138",
1003 };
1004
1005 static const char * const i2s1_data0_groups[] = {
1006 "gpio140",
1007 };
1008
1009 static const char * const i2s1_data1_groups[] = {
1010 "gpio142",
1011 };
1012
1013 static const char * const i2s1_sck_groups[] = {
1014 "gpio139",
1015 };
1016
1017 static const char * const i2s1_ws_groups[] = {
1018 "gpio141",
1019 };
1020
1021 static const char * const ibi_i3c_groups[] = {
1022 "gpio0", "gpio1", "gpio32", "gpio33", "gpio36", "gpio37", "gpio68",
1023 "gpio69",
1024 };
1025
1026 static const char * const jitter_bist_groups[] = {
1027 "gpio42",
1028 };
1029
1030 static const char * const mdp_vsync0_groups[] = {
1031 "gpio114",
1032 };
1033
1034 static const char * const mdp_vsync1_groups[] = {
1035 "gpio114",
1036 };
1037
1038 static const char * const mdp_vsync2_groups[] = {
1039 "gpio115",
1040 };
1041
1042 static const char * const mdp_vsync3_groups[] = {
1043 "gpio115",
1044 };
1045
1046 static const char * const mdp_vsync4_groups[] = {
1047 "gpio109",
1048 };
1049
1050 static const char * const mdp_vsync5_groups[] = {
1051 "gpio110",
1052 };
1053
1054 static const char * const mdp_vsync6_groups[] = {
1055 "gpio111",
1056 };
1057
1058 static const char * const mdp_vsync7_groups[] = {
1059 "gpio112",
1060 };
1061
1062 static const char * const mdp_vsync8_groups[] = {
1063 "gpio113",
1064 };
1065
1066 static const char * const pcie3_clk_groups[] = {
1067 "gpio144",
1068 };
1069
1070 static const char * const pcie4_clk_groups[] = {
1071 "gpio147",
1072 };
1073
1074 static const char * const pcie5_clk_groups[] = {
1075 "gpio150",
1076 };
1077
1078 static const char * const pcie6a_clk_groups[] = {
1079 "gpio153",
1080 };
1081
1082 static const char * const pcie6b_clk_groups[] = {
1083 "gpio156",
1084 };
1085
1086 static const char * const phase_flag_groups[] = {
1087 "gpio6", "gpio7", "gpio8", "gpio11", "gpio12", "gpio13",
1088 "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
1089 "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25",
1090 "gpio26", "gpio27", "gpio39", "gpio40", "gpio76", "gpio77",
1091 "gpio78", "gpio181", "gpio182", "gpio184", "gpio185",
1092 "gpio186", "gpio187", "gpio188",
1093 };
1094
1095 static const char * const pll_bist_groups[] = {
1096 "gpio28",
1097 };
1098
1099 static const char * const pll_clk_groups[] = {
1100 "gpio35",
1101 };
1102
1103 static const char * const prng_rosc0_groups[] = {
1104 "gpio186",
1105 };
1106
1107 static const char * const prng_rosc1_groups[] = {
1108 "gpio188",
1109 };
1110
1111 static const char * const prng_rosc2_groups[] = {
1112 "gpio182",
1113 };
1114
1115 static const char * const prng_rosc3_groups[] = {
1116 "gpio181",
1117 };
1118
1119 static const char * const qdss_cti_groups[] = {
1120 "gpio18", "gpio19", "gpio23", "gpio27", "gpio161", "gpio162",
1121 "gpio215", "gpio217",
1122 };
1123
1124 static const char * const qdss_gpio_groups[] = {
1125 "gpio96", "gpio97", "gpio98", "gpio99", "gpio100", "gpio101",
1126 "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107",
1127 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113",
1128 "gpio219", "gpio220", "gpio221", "gpio222", "gpio223", "gpio224",
1129 "gpio225", "gpio226", "gpio227", "gpio228", "gpio229", "gpio230",
1130 "gpio231", "gpio232", "gpio233", "gpio234", "gpio235", "gpio236",
1131 };
1132
1133 static const char * const qspi00_groups[] = {
1134 "gpio128",
1135 };
1136
1137 static const char * const qspi01_groups[] = {
1138 "gpio129",
1139 };
1140
1141 static const char * const qspi02_groups[] = {
1142 "gpio130",
1143 };
1144
1145 static const char * const qspi03_groups[] = {
1146 "gpio131",
1147 };
1148
1149 static const char * const qspi0_clk_groups[] = {
1150 "gpio127",
1151 };
1152
1153 static const char * const qspi0_cs0_groups[] = {
1154 "gpio132",
1155 };
1156
1157 static const char * const qspi0_cs1_groups[] = {
1158 "gpio133",
1159 };
1160
1161 static const char * const qup0_se0_groups[] = {
1162 "gpio0", "gpio1", "gpio2", "gpio3",
1163 };
1164
1165 static const char * const qup0_se1_groups[] = {
1166 "gpio4", "gpio5", "gpio6", "gpio7",
1167 };
1168
1169 static const char * const qup0_se2_groups[] = {
1170 "gpio8", "gpio9", "gpio10", "gpio11", "gpio17", "gpio18", "gpio19",
1171 };
1172
1173 static const char * const qup0_se3_groups[] = {
1174 "gpio12", "gpio13", "gpio14", "gpio15", "gpio21", "gpio22", "gpio23",
1175 };
1176
1177 static const char * const qup0_se4_groups[] = {
1178 "gpio16", "gpio17", "gpio18", "gpio19",
1179 };
1180
1181 static const char * const qup0_se5_groups[] = {
1182 "gpio20", "gpio21", "gpio22", "gpio23",
1183 };
1184
1185 static const char * const qup0_se6_groups[] = {
1186 "gpio24", "gpio25", "gpio26", "gpio27",
1187 };
1188
1189 static const char * const qup0_se7_groups[] = {
1190 "gpio12", "gpio13", "gpio14", "gpio15",
1191 };
1192
1193 static const char * const qup1_se0_groups[] = {
1194 "gpio32", "gpio33", "gpio34", "gpio35",
1195 };
1196
1197 static const char * const qup1_se1_groups[] = {
1198 "gpio36", "gpio37", "gpio38", "gpio39",
1199 };
1200
1201 static const char * const qup1_se2_groups[] = {
1202 "gpio40", "gpio41", "gpio42", "gpio43", "gpio49", "gpio50", "gpio51",
1203 };
1204
1205 static const char * const qup1_se3_groups[] = {
1206 "gpio33", "gpio34", "gpio35", "gpio44", "gpio45", "gpio46", "gpio47",
1207 };
1208
1209 static const char * const qup1_se4_groups[] = {
1210 "gpio48", "gpio49", "gpio50", "gpio51",
1211 };
1212
1213 static const char * const qup1_se5_groups[] = {
1214 "gpio52", "gpio53", "gpio54", "gpio55",
1215 };
1216
1217 static const char * const qup1_se6_groups[] = {
1218 "gpio56", "gpio57", "gpio58", "gpio59",
1219 };
1220
1221 static const char * const qup1_se7_groups[] = {
1222 "gpio52", "gpio53", "gpio54", "gpio55",
1223 };
1224
1225 static const char * const qup2_se0_groups[] = {
1226 "gpio64", "gpio65", "gpio66", "gpio67",
1227 };
1228
1229 static const char * const qup2_se1_groups[] = {
1230 "gpio68", "gpio69", "gpio70", "gpio71",
1231 };
1232
1233 static const char * const qup2_se2_groups[] = {
1234 "gpio72", "gpio73", "gpio74", "gpio75", "gpio81", "gpio82", "gpio83",
1235 };
1236
1237 static const char * const qup2_se3_groups[] = {
1238 "gpio65", "gpio66", "gpio67", "gpio76", "gpio77", "gpio78", "gpio79",
1239 };
1240
1241 static const char * const qup2_se4_groups[] = {
1242 "gpio80", "gpio81", "gpio82", "gpio83",
1243 };
1244
1245 static const char * const qup2_se5_groups[] = {
1246 "gpio84", "gpio85", "gpio86", "gpio87",
1247 };
1248
1249 static const char * const qup2_se6_groups[] = {
1250 "gpio88", "gpio89", "gpio90", "gpio91",
1251 };
1252
1253 static const char * const qup2_se7_groups[] = {
1254 "gpio84", "gpio85", "gpio86", "gpio87",
1255 };
1256
1257 static const char * const sd_write_groups[] = {
1258 "gpio162",
1259 };
1260
1261 static const char * const sdc4_clk_groups[] = {
1262 "gpio127",
1263 };
1264
1265 static const char * const sdc4_cmd_groups[] = {
1266 "gpio132",
1267 };
1268
1269 static const char * const sdc4_data0_groups[] = {
1270 "gpio128",
1271 };
1272
1273 static const char * const sdc4_data1_groups[] = {
1274 "gpio129",
1275 };
1276
1277 static const char * const sdc4_data2_groups[] = {
1278 "gpio130",
1279 };
1280
1281 static const char * const sdc4_data3_groups[] = {
1282 "gpio131",
1283 };
1284
1285 static const char * const sys_throttle_groups[] = {
1286 "gpio39", "gpio94",
1287 };
1288
1289 static const char * const tb_trig_groups[] = {
1290 "gpio133", "gpio137",
1291 };
1292
1293 static const char * const tgu_ch0_groups[] = {
1294 "gpio81",
1295 };
1296
1297 static const char * const tgu_ch1_groups[] = {
1298 "gpio65",
1299 };
1300
1301 static const char * const tgu_ch2_groups[] = {
1302 "gpio66",
1303 };
1304
1305 static const char * const tgu_ch3_groups[] = {
1306 "gpio67",
1307 };
1308
1309 static const char * const tgu_ch4_groups[] = {
1310 "gpio68",
1311 };
1312
1313 static const char * const tgu_ch5_groups[] = {
1314 "gpio69",
1315 };
1316
1317 static const char * const tgu_ch6_groups[] = {
1318 "gpio83",
1319 };
1320
1321 static const char * const tgu_ch7_groups[] = {
1322 "gpio80",
1323 };
1324
1325 static const char * const tmess_prng0_groups[] = {
1326 "gpio92",
1327 };
1328
1329 static const char * const tmess_prng1_groups[] = {
1330 "gpio93",
1331 };
1332
1333 static const char * const tmess_prng2_groups[] = {
1334 "gpio94",
1335 };
1336
1337 static const char * const tmess_prng3_groups[] = {
1338 "gpio95",
1339 };
1340
1341 static const char * const tsense_pwm1_groups[] = {
1342 "gpio34",
1343 };
1344
1345 static const char * const tsense_pwm2_groups[] = {
1346 "gpio34",
1347 };
1348
1349 static const char * const tsense_pwm3_groups[] = {
1350 "gpio34",
1351 };
1352
1353 static const char * const tsense_pwm4_groups[] = {
1354 "gpio34",
1355 };
1356
1357 static const char * const usb0_dp_groups[] = {
1358 "gpio122",
1359 };
1360
1361 static const char * const usb0_phy_groups[] = {
1362 "gpio121",
1363 };
1364
1365 static const char * const usb0_sbrx_groups[] = {
1366 "gpio163",
1367 };
1368
1369 static const char * const usb0_sbtx_groups[] = {
1370 "gpio164", "gpio165",
1371 };
1372
1373 static const char * const usb1_dp_groups[] = {
1374 "gpio124",
1375 };
1376
1377 static const char * const usb1_phy_groups[] = {
1378 "gpio123",
1379 };
1380
1381 static const char * const usb1_sbrx_groups[] = {
1382 "gpio172",
1383 };
1384
1385 static const char * const usb1_sbtx_groups[] = {
1386 "gpio173", "gpio174",
1387 };
1388
1389 static const char * const usb2_dp_groups[] = {
1390 "gpio126",
1391 };
1392
1393 static const char * const usb2_phy_groups[] = {
1394 "gpio125",
1395 };
1396
1397 static const char * const usb2_sbrx_groups[] = {
1398 "gpio181",
1399 };
1400
1401 static const char * const usb2_sbtx_groups[] = {
1402 "gpio182", "gpio183",
1403 };
1404
1405 static const char * const vsense_trigger_groups[] = {
1406 "gpio38",
1407 };
1408
1409 static const struct pinfunction x1e80100_functions[] = {
1410 MSM_PIN_FUNCTION(gpio),
1411 MSM_PIN_FUNCTION(RESOUT_GPIO),
1412 MSM_PIN_FUNCTION(aon_cci),
1413 MSM_PIN_FUNCTION(aoss_cti),
1414 MSM_PIN_FUNCTION(atest_char),
1415 MSM_PIN_FUNCTION(atest_char0),
1416 MSM_PIN_FUNCTION(atest_char1),
1417 MSM_PIN_FUNCTION(atest_char2),
1418 MSM_PIN_FUNCTION(atest_char3),
1419 MSM_PIN_FUNCTION(atest_usb),
1420 MSM_PIN_FUNCTION(audio_ext),
1421 MSM_PIN_FUNCTION(audio_ref),
1422 MSM_PIN_FUNCTION(cam_aon),
1423 MSM_PIN_FUNCTION(cam_mclk),
1424 MSM_PIN_FUNCTION(cci_async),
1425 MSM_PIN_FUNCTION(cci_i2c),
1426 MSM_PIN_FUNCTION(cci_timer0),
1427 MSM_PIN_FUNCTION(cci_timer1),
1428 MSM_PIN_FUNCTION(cci_timer2),
1429 MSM_PIN_FUNCTION(cci_timer3),
1430 MSM_PIN_FUNCTION(cci_timer4),
1431 MSM_PIN_FUNCTION(cmu_rng0),
1432 MSM_PIN_FUNCTION(cmu_rng1),
1433 MSM_PIN_FUNCTION(cmu_rng2),
1434 MSM_PIN_FUNCTION(cmu_rng3),
1435 MSM_PIN_FUNCTION(cri_trng),
1436 MSM_PIN_FUNCTION(dbg_out),
1437 MSM_PIN_FUNCTION(ddr_bist),
1438 MSM_PIN_FUNCTION(ddr_pxi0),
1439 MSM_PIN_FUNCTION(ddr_pxi1),
1440 MSM_PIN_FUNCTION(ddr_pxi2),
1441 MSM_PIN_FUNCTION(ddr_pxi3),
1442 MSM_PIN_FUNCTION(ddr_pxi4),
1443 MSM_PIN_FUNCTION(ddr_pxi5),
1444 MSM_PIN_FUNCTION(ddr_pxi6),
1445 MSM_PIN_FUNCTION(ddr_pxi7),
1446 MSM_PIN_FUNCTION(edp0_hot),
1447 MSM_PIN_FUNCTION(edp0_lcd),
1448 MSM_PIN_FUNCTION(edp1_hot),
1449 MSM_PIN_FUNCTION(edp1_lcd),
1450 MSM_PIN_FUNCTION(eusb0_ac),
1451 MSM_PIN_FUNCTION(eusb1_ac),
1452 MSM_PIN_FUNCTION(eusb2_ac),
1453 MSM_PIN_FUNCTION(eusb3_ac),
1454 MSM_PIN_FUNCTION(eusb5_ac),
1455 MSM_PIN_FUNCTION(eusb6_ac),
1456 MSM_PIN_FUNCTION(gcc_gp1),
1457 MSM_PIN_FUNCTION(gcc_gp2),
1458 MSM_PIN_FUNCTION(gcc_gp3),
1459 MSM_PIN_FUNCTION(i2s0_data0),
1460 MSM_PIN_FUNCTION(i2s0_data1),
1461 MSM_PIN_FUNCTION(i2s0_sck),
1462 MSM_PIN_FUNCTION(i2s0_ws),
1463 MSM_PIN_FUNCTION(i2s1_data0),
1464 MSM_PIN_FUNCTION(i2s1_data1),
1465 MSM_PIN_FUNCTION(i2s1_sck),
1466 MSM_PIN_FUNCTION(i2s1_ws),
1467 MSM_PIN_FUNCTION(ibi_i3c),
1468 MSM_PIN_FUNCTION(jitter_bist),
1469 MSM_PIN_FUNCTION(mdp_vsync0),
1470 MSM_PIN_FUNCTION(mdp_vsync1),
1471 MSM_PIN_FUNCTION(mdp_vsync2),
1472 MSM_PIN_FUNCTION(mdp_vsync3),
1473 MSM_PIN_FUNCTION(mdp_vsync4),
1474 MSM_PIN_FUNCTION(mdp_vsync5),
1475 MSM_PIN_FUNCTION(mdp_vsync6),
1476 MSM_PIN_FUNCTION(mdp_vsync7),
1477 MSM_PIN_FUNCTION(mdp_vsync8),
1478 MSM_PIN_FUNCTION(pcie3_clk),
1479 MSM_PIN_FUNCTION(pcie4_clk),
1480 MSM_PIN_FUNCTION(pcie5_clk),
1481 MSM_PIN_FUNCTION(pcie6a_clk),
1482 MSM_PIN_FUNCTION(pcie6b_clk),
1483 MSM_PIN_FUNCTION(phase_flag),
1484 MSM_PIN_FUNCTION(pll_bist),
1485 MSM_PIN_FUNCTION(pll_clk),
1486 MSM_PIN_FUNCTION(prng_rosc0),
1487 MSM_PIN_FUNCTION(prng_rosc1),
1488 MSM_PIN_FUNCTION(prng_rosc2),
1489 MSM_PIN_FUNCTION(prng_rosc3),
1490 MSM_PIN_FUNCTION(qdss_cti),
1491 MSM_PIN_FUNCTION(qdss_gpio),
1492 MSM_PIN_FUNCTION(qspi00),
1493 MSM_PIN_FUNCTION(qspi01),
1494 MSM_PIN_FUNCTION(qspi02),
1495 MSM_PIN_FUNCTION(qspi03),
1496 MSM_PIN_FUNCTION(qspi0_clk),
1497 MSM_PIN_FUNCTION(qspi0_cs0),
1498 MSM_PIN_FUNCTION(qspi0_cs1),
1499 MSM_PIN_FUNCTION(qup0_se0),
1500 MSM_PIN_FUNCTION(qup0_se1),
1501 MSM_PIN_FUNCTION(qup0_se2),
1502 MSM_PIN_FUNCTION(qup0_se3),
1503 MSM_PIN_FUNCTION(qup0_se4),
1504 MSM_PIN_FUNCTION(qup0_se5),
1505 MSM_PIN_FUNCTION(qup0_se6),
1506 MSM_PIN_FUNCTION(qup0_se7),
1507 MSM_PIN_FUNCTION(qup1_se0),
1508 MSM_PIN_FUNCTION(qup1_se1),
1509 MSM_PIN_FUNCTION(qup1_se2),
1510 MSM_PIN_FUNCTION(qup1_se3),
1511 MSM_PIN_FUNCTION(qup1_se4),
1512 MSM_PIN_FUNCTION(qup1_se5),
1513 MSM_PIN_FUNCTION(qup1_se6),
1514 MSM_PIN_FUNCTION(qup1_se7),
1515 MSM_PIN_FUNCTION(qup2_se0),
1516 MSM_PIN_FUNCTION(qup2_se1),
1517 MSM_PIN_FUNCTION(qup2_se2),
1518 MSM_PIN_FUNCTION(qup2_se3),
1519 MSM_PIN_FUNCTION(qup2_se4),
1520 MSM_PIN_FUNCTION(qup2_se5),
1521 MSM_PIN_FUNCTION(qup2_se6),
1522 MSM_PIN_FUNCTION(qup2_se7),
1523 MSM_PIN_FUNCTION(sd_write),
1524 MSM_PIN_FUNCTION(sdc4_clk),
1525 MSM_PIN_FUNCTION(sdc4_cmd),
1526 MSM_PIN_FUNCTION(sdc4_data0),
1527 MSM_PIN_FUNCTION(sdc4_data1),
1528 MSM_PIN_FUNCTION(sdc4_data2),
1529 MSM_PIN_FUNCTION(sdc4_data3),
1530 MSM_PIN_FUNCTION(sys_throttle),
1531 MSM_PIN_FUNCTION(tb_trig),
1532 MSM_PIN_FUNCTION(tgu_ch0),
1533 MSM_PIN_FUNCTION(tgu_ch1),
1534 MSM_PIN_FUNCTION(tgu_ch2),
1535 MSM_PIN_FUNCTION(tgu_ch3),
1536 MSM_PIN_FUNCTION(tgu_ch4),
1537 MSM_PIN_FUNCTION(tgu_ch5),
1538 MSM_PIN_FUNCTION(tgu_ch6),
1539 MSM_PIN_FUNCTION(tgu_ch7),
1540 MSM_PIN_FUNCTION(tmess_prng0),
1541 MSM_PIN_FUNCTION(tmess_prng1),
1542 MSM_PIN_FUNCTION(tmess_prng2),
1543 MSM_PIN_FUNCTION(tmess_prng3),
1544 MSM_PIN_FUNCTION(tsense_pwm1),
1545 MSM_PIN_FUNCTION(tsense_pwm2),
1546 MSM_PIN_FUNCTION(tsense_pwm3),
1547 MSM_PIN_FUNCTION(tsense_pwm4),
1548 MSM_PIN_FUNCTION(usb0_dp),
1549 MSM_PIN_FUNCTION(usb0_phy),
1550 MSM_PIN_FUNCTION(usb0_sbrx),
1551 MSM_PIN_FUNCTION(usb0_sbtx),
1552 MSM_PIN_FUNCTION(usb1_dp),
1553 MSM_PIN_FUNCTION(usb1_phy),
1554 MSM_PIN_FUNCTION(usb1_sbrx),
1555 MSM_PIN_FUNCTION(usb1_sbtx),
1556 MSM_PIN_FUNCTION(usb2_dp),
1557 MSM_PIN_FUNCTION(usb2_phy),
1558 MSM_PIN_FUNCTION(usb2_sbrx),
1559 MSM_PIN_FUNCTION(usb2_sbtx),
1560 MSM_PIN_FUNCTION(vsense_trigger),
1561 };
1562
1563 /*
1564 * Every pin is maintained as a single group, and missing or non-existing pin
1565 * would be maintained as dummy group to synchronize pin group index with
1566 * pin descriptor registered with pinctrl core.
1567 * Clients would not be able to request these dummy pin groups.
1568 */
1569 static const struct msm_pingroup x1e80100_groups[] = {
1570 [0] = PINGROUP(0, qup0_se0, ibi_i3c, _, _, _, _, _, _, _),
1571 [1] = PINGROUP(1, qup0_se0, ibi_i3c, _, _, _, _, _, _, _),
1572 [2] = PINGROUP(2, qup0_se0, _, _, _, _, _, _, _, _),
1573 [3] = PINGROUP(3, qup0_se0, _, _, _, _, _, _, _, _),
1574 [4] = PINGROUP(4, qup0_se1, _, _, _, _, _, _, _, _),
1575 [5] = PINGROUP(5, qup0_se1, _, _, _, _, _, _, _, _),
1576 [6] = PINGROUP(6, qup0_se1, phase_flag, _, _, _, _, _, _, _),
1577 [7] = PINGROUP(7, qup0_se1, phase_flag, _, _, _, _, _, _, _),
1578 [8] = PINGROUP(8, qup0_se2, phase_flag, _, _, _, _, _, _, _),
1579 [9] = PINGROUP(9, qup0_se2, _, atest_usb, ddr_pxi0, _, _, _, _, _),
1580 [10] = PINGROUP(10, qup0_se2, _, atest_usb, ddr_pxi1, _, _, _, _, _),
1581 [11] = PINGROUP(11, qup0_se2, phase_flag, _, _, _, _, _, _, _),
1582 [12] = PINGROUP(12, qup0_se3, qup0_se7, phase_flag, _, _, _, _, _, _),
1583 [13] = PINGROUP(13, qup0_se3, qup0_se7, phase_flag, _, _, _, _, _, _),
1584 [14] = PINGROUP(14, qup0_se3, qup0_se7, phase_flag, _, _, _, _, _, _),
1585 [15] = PINGROUP(15, qup0_se3, qup0_se7, phase_flag, _, _, _, _, _, _),
1586 [16] = PINGROUP(16, qup0_se4, phase_flag, _, _, _, _, _, _, _),
1587 [17] = PINGROUP(17, qup0_se4, qup0_se2, phase_flag, _, _, _, _, _, _),
1588 [18] = PINGROUP(18, qup0_se4, qup0_se2, phase_flag, _, qdss_cti, _, _, _, _),
1589 [19] = PINGROUP(19, qup0_se4, qup0_se2, phase_flag, _, qdss_cti, _, _, _, _),
1590 [20] = PINGROUP(20, qup0_se5, _, phase_flag, _, _, _, _, _, _),
1591 [21] = PINGROUP(21, qup0_se5, qup0_se3, _, phase_flag, _, _, _, _, _),
1592 [22] = PINGROUP(22, qup0_se5, qup0_se3, _, phase_flag, _, _, _, _, _),
1593 [23] = PINGROUP(23, qup0_se5, qup0_se3, phase_flag, _, qdss_cti, _, _, _, _),
1594 [24] = PINGROUP(24, qup0_se6, phase_flag, _, _, _, _, _, _, _),
1595 [25] = PINGROUP(25, qup0_se6, phase_flag, _, _, _, _, _, _, _),
1596 [26] = PINGROUP(26, qup0_se6, phase_flag, _, _, _, _, _, _, _),
1597 [27] = PINGROUP(27, qup0_se6, phase_flag, _, qdss_cti, _, _, _, _, _),
1598 [28] = PINGROUP(28, pll_bist, _, _, _, _, _, _, _, _),
1599 [29] = PINGROUP(29, _, _, _, _, _, _, _, _, _),
1600 [30] = PINGROUP(30, _, _, _, _, _, _, _, _, _),
1601 [31] = PINGROUP(31, _, _, _, _, _, _, _, _, _),
1602 [32] = PINGROUP(32, qup1_se0, ibi_i3c, _, _, _, _, _, _, _),
1603 [33] = PINGROUP(33, qup1_se0, ibi_i3c, qup1_se3, _, _, _, _, _, _),
1604 [34] = PINGROUP(34, qup1_se0, qup1_se3, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, _, _, _),
1605 [35] = PINGROUP(35, qup1_se0, qup1_se3, pll_clk, atest_usb, _, _, _, _, _),
1606 [36] = PINGROUP(36, qup1_se1, ibi_i3c, _, _, _, _, _, _, _),
1607 [37] = PINGROUP(37, qup1_se1, ibi_i3c, _, _, _, _, _, _, _),
1608 [38] = PINGROUP(38, qup1_se1, vsense_trigger, atest_usb, ddr_pxi0, _, _, _, _, _),
1609 [39] = PINGROUP(39, qup1_se1, sys_throttle, phase_flag, _, _, _, _, _, _),
1610 [40] = PINGROUP(40, qup1_se2, phase_flag, _, _, _, _, _, _, _),
1611 [41] = PINGROUP(41, qup1_se2, atest_usb, ddr_pxi1, _, _, _, _, _, _),
1612 [42] = PINGROUP(42, qup1_se2, jitter_bist, atest_usb, ddr_pxi2, _, _, _, _, _),
1613 [43] = PINGROUP(43, qup1_se2, _, atest_usb, ddr_pxi2, _, _, _, _, _),
1614 [44] = PINGROUP(44, qup1_se3, _, atest_usb, ddr_pxi3, _, _, _, _, _),
1615 [45] = PINGROUP(45, qup1_se3, cmu_rng3, _, atest_usb, ddr_pxi3, _, _, _, _),
1616 [46] = PINGROUP(46, qup1_se3, cmu_rng2, _, atest_usb, ddr_pxi4, _, _, _, _),
1617 [47] = PINGROUP(47, qup1_se3, cmu_rng1, _, atest_usb, ddr_pxi4, _, _, _, _),
1618 [48] = PINGROUP(48, qup1_se4, cmu_rng0, _, atest_usb, ddr_pxi5, _, _, _, _),
1619 [49] = PINGROUP(49, qup1_se4, qup1_se2, _, atest_usb, ddr_pxi5, _, _, _, _),
1620 [50] = PINGROUP(50, qup1_se4, qup1_se2, _, atest_usb, ddr_pxi6, _, _, _, _),
1621 [51] = PINGROUP(51, qup1_se4, qup1_se2, dbg_out, atest_usb, ddr_pxi6, _, _, _, _),
1622 [52] = PINGROUP(52, qup1_se5, qup1_se7, atest_usb, ddr_pxi7, _, _, _, _, _),
1623 [53] = PINGROUP(53, qup1_se5, qup1_se7, _, atest_usb, ddr_pxi7, _, _, _, _),
1624 [54] = PINGROUP(54, qup1_se5, qup1_se7, ddr_bist, atest_usb, _, _, _, _, _),
1625 [55] = PINGROUP(55, qup1_se5, qup1_se7, ddr_bist, _, _, _, _, _, _),
1626 [56] = PINGROUP(56, qup1_se6, ddr_bist, _, _, _, _, _, _, _),
1627 [57] = PINGROUP(57, qup1_se6, ddr_bist, _, _, _, _, _, _, _),
1628 [58] = PINGROUP(58, qup1_se6, atest_usb, _, _, _, _, _, _, _),
1629 [59] = PINGROUP(59, qup1_se6, atest_usb, _, _, _, _, _, _, _),
1630 [60] = PINGROUP(60, aoss_cti, _, _, _, _, _, _, _, _),
1631 [61] = PINGROUP(61, aoss_cti, _, _, _, _, _, _, _, _),
1632 [62] = PINGROUP(62, aoss_cti, _, _, _, _, _, _, _, _),
1633 [63] = PINGROUP(63, aoss_cti, _, _, _, _, _, _, _, _),
1634 [64] = PINGROUP(64, qup2_se0, gcc_gp2, _, _, _, _, _, _, _),
1635 [65] = PINGROUP(65, qup2_se0, qup2_se3, tgu_ch1, atest_usb, _, _, _, _, _),
1636 [66] = PINGROUP(66, qup2_se0, qup2_se3, tgu_ch2, atest_usb, _, _, _, _, _),
1637 [67] = PINGROUP(67, qup2_se0, qup2_se3, tgu_ch3, atest_usb, _, _, _, _, _),
1638 [68] = PINGROUP(68, qup2_se1, ibi_i3c, tgu_ch4, _, _, _, _, _, _),
1639 [69] = PINGROUP(69, qup2_se1, ibi_i3c, tgu_ch5, _, _, _, _, _, _),
1640 [70] = PINGROUP(70, qup2_se1, _, _, _, _, _, _, _, _),
1641 [71] = PINGROUP(71, qup2_se1, gcc_gp1, _, _, _, _, _, _, _),
1642 [72] = PINGROUP(72, qup2_se2, gcc_gp1, atest_usb, _, _, _, _, _, _),
1643 [73] = PINGROUP(73, qup2_se2, gcc_gp2, atest_usb, _, _, _, _, _, _),
1644 [74] = PINGROUP(74, qup2_se2, gcc_gp3, atest_usb, _, _, _, _, _, _),
1645 [75] = PINGROUP(75, qup2_se2, atest_usb, _, _, _, _, _, _, _),
1646 [76] = PINGROUP(76, qup2_se3, phase_flag, _, _, _, _, _, _, _),
1647 [77] = PINGROUP(77, qup2_se3, phase_flag, _, _, _, _, _, _, _),
1648 [78] = PINGROUP(78, qup2_se3, phase_flag, _, _, _, _, _, _, _),
1649 [79] = PINGROUP(79, qup2_se3, _, _, _, _, _, _, _, _),
1650 [80] = PINGROUP(80, qup2_se4, tgu_ch7, atest_usb, _, _, _, _, _, _),
1651 [81] = PINGROUP(81, qup2_se4, qup2_se2, tgu_ch0, atest_usb, _, _, _, _, _),
1652 [82] = PINGROUP(82, qup2_se4, qup2_se2, gcc_gp3, _, _, _, _, _, _),
1653 [83] = PINGROUP(83, qup2_se4, qup2_se2, tgu_ch6, atest_usb, _, _, _, _, _),
1654 [84] = PINGROUP(84, qup2_se5, qup2_se7, _, _, _, _, _, _, _),
1655 [85] = PINGROUP(85, qup2_se5, qup2_se7, _, _, _, _, _, _, _),
1656 [86] = PINGROUP(86, qup2_se5, qup2_se7, _, _, _, _, _, _, _),
1657 [87] = PINGROUP(87, qup2_se5, qup2_se7, _, _, _, _, _, _, _),
1658 [88] = PINGROUP(88, qup2_se6, _, _, _, _, _, _, _, _),
1659 [89] = PINGROUP(89, qup2_se6, _, _, _, _, _, _, _, _),
1660 [90] = PINGROUP(90, qup2_se6, _, _, _, _, _, _, _, _),
1661 [91] = PINGROUP(91, qup2_se6, _, _, _, _, _, _, _, _),
1662 [92] = PINGROUP(92, tmess_prng0, _, _, _, _, _, _, _, _),
1663 [93] = PINGROUP(93, tmess_prng1, _, _, _, _, _, _, _, _),
1664 [94] = PINGROUP(94, sys_throttle, tmess_prng2, _, _, _, _, _, _, _),
1665 [95] = PINGROUP(95, tmess_prng3, _, _, _, _, _, _, _, _),
1666 [96] = PINGROUP(96, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1667 [97] = PINGROUP(97, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1668 [98] = PINGROUP(98, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1669 [99] = PINGROUP(99, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1670 [100] = PINGROUP(100, cam_aon, qdss_gpio, _, _, _, _, _, _, _),
1671 [101] = PINGROUP(101, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1672 [102] = PINGROUP(102, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1673 [103] = PINGROUP(103, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1674 [104] = PINGROUP(104, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1675 [105] = PINGROUP(105, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1676 [106] = PINGROUP(106, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1677 [107] = PINGROUP(107, qdss_gpio, _, _, _, _, _, _, _, _),
1678 [108] = PINGROUP(108, qdss_gpio, _, _, _, _, _, _, _, _),
1679 [109] = PINGROUP(109, cci_timer0, mdp_vsync4, qdss_gpio, _, _, _, _, _, _),
1680 [110] = PINGROUP(110, cci_timer1, mdp_vsync5, qdss_gpio, _, _, _, _, _, _),
1681 [111] = PINGROUP(111, cci_timer2, cci_async, mdp_vsync6, qdss_gpio, _, _, _, _, _),
1682 [112] = PINGROUP(112, cci_timer3, cci_async, mdp_vsync7, qdss_gpio, _, _, _, _, _),
1683 [113] = PINGROUP(113, cci_timer4, cci_async, mdp_vsync8, qdss_gpio, _, _, _, _, _),
1684 [114] = PINGROUP(114, mdp_vsync0, mdp_vsync1, _, _, _, _, _, _, _),
1685 [115] = PINGROUP(115, mdp_vsync3, mdp_vsync2, edp1_lcd, _, _, _, _, _, _),
1686 [116] = PINGROUP(116, _, _, _, _, _, _, _, _, _),
1687 [117] = PINGROUP(117, _, _, _, _, _, _, _, _, _),
1688 [118] = PINGROUP(118, _, _, _, _, _, _, _, _, _),
1689 [119] = PINGROUP(119, edp0_hot, edp1_lcd, _, _, _, _, _, _, _),
1690 [120] = PINGROUP(120, edp1_hot, edp0_lcd, _, _, _, _, _, _, _),
1691 [121] = PINGROUP(121, usb0_phy, _, _, _, _, _, _, _, _),
1692 [122] = PINGROUP(122, usb0_dp, _, _, _, _, _, _, _, _),
1693 [123] = PINGROUP(123, usb1_phy, _, _, _, _, _, _, _, _),
1694 [124] = PINGROUP(124, usb1_dp, _, _, _, _, _, _, _, _),
1695 [125] = PINGROUP(125, usb2_phy, _, _, _, _, _, _, _, _),
1696 [126] = PINGROUP(126, usb2_dp, _, _, _, _, _, _, _, _),
1697 [127] = PINGROUP(127, qspi0_clk, sdc4_clk, _, _, _, _, _, _, _),
1698 [128] = PINGROUP(128, qspi00, sdc4_data0, _, _, _, _, _, _, _),
1699 [129] = PINGROUP(129, qspi01, sdc4_data1, _, _, _, _, _, _, _),
1700 [130] = PINGROUP(130, qspi02, sdc4_data2, _, _, _, _, _, _, _),
1701 [131] = PINGROUP(131, qspi03, sdc4_data3, _, _, _, _, _, _, _),
1702 [132] = PINGROUP(132, qspi0_cs0, sdc4_cmd, _, _, _, _, _, _, _),
1703 [133] = PINGROUP(133, qspi0_cs1, tb_trig, _, _, _, _, _, _, _),
1704 [134] = PINGROUP(134, audio_ext, _, _, _, _, _, _, _, _),
1705 [135] = PINGROUP(135, i2s0_sck, _, _, _, _, _, _, _, _),
1706 [136] = PINGROUP(136, i2s0_data0, _, _, _, _, _, _, _, _),
1707 [137] = PINGROUP(137, i2s0_data1, tb_trig, _, _, _, _, _, _, _),
1708 [138] = PINGROUP(138, i2s0_ws, _, _, _, _, _, _, _, _),
1709 [139] = PINGROUP(139, i2s1_sck, _, _, _, _, _, _, _, _),
1710 [140] = PINGROUP(140, i2s1_data0, _, _, _, _, _, _, _, _),
1711 [141] = PINGROUP(141, i2s1_ws, _, _, _, _, _, _, _, _),
1712 [142] = PINGROUP(142, i2s1_data1, audio_ext, audio_ref, _, _, _, _, _, _),
1713 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
1714 [144] = PINGROUP(144, pcie3_clk, _, _, _, _, _, _, _, _),
1715 [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _),
1716 [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _),
1717 [147] = PINGROUP(147, pcie4_clk, _, _, _, _, _, _, _, _),
1718 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _),
1719 [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _),
1720 [150] = PINGROUP(150, pcie5_clk, _, _, _, _, _, _, _, _),
1721 [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _),
1722 [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _),
1723 [153] = PINGROUP(153, pcie6a_clk, _, _, _, _, _, _, _, _),
1724 [154] = PINGROUP(154, _, _, _, _, _, _, _, _, _),
1725 [155] = PINGROUP(155, _, _, _, _, _, _, _, _, _),
1726 [156] = PINGROUP(156, pcie6b_clk, _, _, _, _, _, _, _, _),
1727 [157] = PINGROUP(157, _, _, _, _, _, _, _, _, _),
1728 [158] = PINGROUP(158, _, _, _, _, _, _, _, _, _),
1729 [159] = PINGROUP(159, _, _, _, _, _, _, _, _, _),
1730 [160] = PINGROUP(160, RESOUT_GPIO, _, _, _, _, _, _, _, _),
1731 [161] = PINGROUP(161, qdss_cti, _, _, _, _, _, _, _, _),
1732 [162] = PINGROUP(162, sd_write, qdss_cti, _, _, _, _, _, _, _),
1733 [163] = PINGROUP(163, usb0_sbrx, _, _, _, _, _, _, _, _),
1734 [164] = PINGROUP(164, usb0_sbtx, _, _, _, _, _, _, _, _),
1735 [165] = PINGROUP(165, usb0_sbtx, _, _, _, _, _, _, _, _),
1736 [166] = PINGROUP(166, _, _, _, _, _, _, _, _, _),
1737 [167] = PINGROUP(167, _, _, _, _, _, _, _, _, _),
1738 [168] = PINGROUP(168, eusb0_ac, _, _, _, _, _, _, _, _),
1739 [169] = PINGROUP(169, eusb3_ac, _, _, _, _, _, _, _, _),
1740 [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _),
1741 [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _),
1742 [172] = PINGROUP(172, usb1_sbrx, _, _, _, _, _, _, _, _),
1743 [173] = PINGROUP(173, usb1_sbtx, _, _, _, _, _, _, _, _),
1744 [174] = PINGROUP(174, usb1_sbtx, _, _, _, _, _, _, _, _),
1745 [175] = PINGROUP(175, _, _, _, _, _, _, _, _, _),
1746 [176] = PINGROUP(176, _, _, _, _, _, _, _, _, _),
1747 [177] = PINGROUP(177, eusb1_ac, _, _, _, _, _, _, _, _),
1748 [178] = PINGROUP(178, eusb6_ac, _, _, _, _, _, _, _, _),
1749 [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _),
1750 [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _),
1751 [181] = PINGROUP(181, usb2_sbrx, prng_rosc3, phase_flag, _, atest_char, _, _, _, _),
1752 [182] = PINGROUP(182, usb2_sbtx, prng_rosc2, phase_flag, _, atest_char3, _, _, _, _),
1753 [183] = PINGROUP(183, usb2_sbtx, _, _, _, _, _, _, _, _),
1754 [184] = PINGROUP(184, phase_flag, _, atest_char1, _, _, _, _, _, _),
1755 [185] = PINGROUP(185, phase_flag, _, atest_char0, _, _, _, _, _, _),
1756 [186] = PINGROUP(186, eusb2_ac, prng_rosc0, phase_flag, _, _, _, _, _, _),
1757 [187] = PINGROUP(187, eusb5_ac, cri_trng, phase_flag, _, _, _, _, _, _),
1758 [188] = PINGROUP(188, prng_rosc1, phase_flag, _, atest_char2, _, _, _, _, _),
1759 [189] = PINGROUP(189, _, _, _, _, _, _, _, _, _),
1760 [190] = PINGROUP(190, _, _, _, _, _, _, _, _, _),
1761 [191] = PINGROUP(191, _, _, _, _, _, _, _, _, _),
1762 [192] = PINGROUP(192, _, _, _, _, _, _, _, _, _),
1763 [193] = PINGROUP(193, _, _, _, _, _, _, _, _, _),
1764 [194] = PINGROUP(194, _, _, _, _, _, _, _, _, _),
1765 [195] = PINGROUP(195, _, _, _, _, _, _, _, _, _),
1766 [196] = PINGROUP(196, _, _, _, _, _, _, _, _, _),
1767 [197] = PINGROUP(197, _, _, _, _, _, _, _, _, _),
1768 [198] = PINGROUP(198, _, _, _, _, _, _, _, _, _),
1769 [199] = PINGROUP(199, _, _, _, _, _, _, _, _, _),
1770 [200] = PINGROUP(200, _, _, _, _, _, _, _, _, _),
1771 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _),
1772 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _),
1773 [203] = PINGROUP(203, _, _, _, _, _, _, _, _, _),
1774 [204] = PINGROUP(204, _, _, _, _, _, _, _, _, _),
1775 [205] = PINGROUP(205, _, _, _, _, _, _, _, _, _),
1776 [206] = PINGROUP(206, _, _, _, _, _, _, _, _, _),
1777 [207] = PINGROUP(207, _, _, _, _, _, _, _, _, _),
1778 [208] = PINGROUP(208, _, _, _, _, _, _, _, _, _),
1779 [209] = PINGROUP(209, _, _, _, _, _, _, _, _, _),
1780 [210] = PINGROUP(210, _, _, _, _, _, _, _, _, _),
1781 [211] = PINGROUP(211, _, _, _, _, _, _, _, _, _),
1782 [212] = PINGROUP(212, _, _, _, _, _, _, _, _, _),
1783 [213] = PINGROUP(213, _, _, _, _, _, _, _, _, _),
1784 [214] = PINGROUP(214, _, _, _, _, _, _, _, _, _),
1785 [215] = PINGROUP(215, _, qdss_cti, _, _, _, _, _, _, _),
1786 [216] = PINGROUP(216, _, _, _, _, _, _, _, _, _),
1787 [217] = PINGROUP(217, _, qdss_cti, _, _, _, _, _, _, _),
1788 [218] = PINGROUP(218, _, _, _, _, _, _, _, _, _),
1789 [219] = PINGROUP(219, _, qdss_gpio, _, _, _, _, _, _, _),
1790 [220] = PINGROUP(220, _, qdss_gpio, _, _, _, _, _, _, _),
1791 [221] = PINGROUP(221, _, qdss_gpio, _, _, _, _, _, _, _),
1792 [222] = PINGROUP(222, _, qdss_gpio, _, _, _, _, _, _, _),
1793 [223] = PINGROUP(223, _, qdss_gpio, _, _, _, _, _, _, _),
1794 [224] = PINGROUP(224, _, qdss_gpio, _, _, _, _, _, _, _),
1795 [225] = PINGROUP(225, _, qdss_gpio, _, _, _, _, _, _, _),
1796 [226] = PINGROUP(226, _, qdss_gpio, _, _, _, _, _, _, _),
1797 [227] = PINGROUP(227, _, qdss_gpio, _, _, _, _, _, _, _),
1798 [228] = PINGROUP(228, _, qdss_gpio, _, _, _, _, _, _, _),
1799 [229] = PINGROUP(229, qdss_gpio, _, _, _, _, _, _, _, _),
1800 [230] = PINGROUP(230, qdss_gpio, _, _, _, _, _, _, _, _),
1801 [231] = PINGROUP(231, qdss_gpio, _, _, _, _, _, _, _, _),
1802 [232] = PINGROUP(232, qdss_gpio, _, _, _, _, _, _, _, _),
1803 [233] = PINGROUP(233, qdss_gpio, _, _, _, _, _, _, _, _),
1804 [234] = PINGROUP(234, qdss_gpio, _, _, _, _, _, _, _, _),
1805 [235] = PINGROUP(235, aon_cci, qdss_gpio, _, _, _, _, _, _, _),
1806 [236] = PINGROUP(236, aon_cci, qdss_gpio, _, _, _, _, _, _, _),
1807 [237] = PINGROUP(237, _, _, _, _, _, _, _, _, _),
1808 [238] = UFS_RESET(ufs_reset, 0xf9000),
1809 [239] = SDC_QDSD_PINGROUP(sdc2_clk, 0xf2000, 14, 6),
1810 [240] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xf2000, 11, 3),
1811 [241] = SDC_QDSD_PINGROUP(sdc2_data, 0xf2000, 9, 0),
1812 };
1813
1814 static const struct msm_gpio_wakeirq_map x1e80100_pdc_map[] = {
1815 { 0, 72 }, { 2, 70 }, { 3, 71 }, { 6, 123 }, { 7, 67 }, { 11, 85 },
1816 { 13, 86 }, { 15, 68 }, { 18, 122 }, { 19, 69 }, { 21, 158 }, { 23, 143 },
1817 { 24, 126 }, { 26, 129 }, { 27, 144 }, { 28, 77 }, { 29, 78 }, { 30, 92 },
1818 { 31, 159 }, { 32, 145 }, { 33, 115 }, { 34, 130 }, { 35, 146 }, { 36, 147 },
1819 { 38, 113 }, { 39, 80 }, { 43, 148 }, { 47, 149 }, { 51, 79 }, { 53, 89 },
1820 { 55, 81 }, { 59, 87 }, { 64, 90 }, { 65, 106 }, { 66, 142 }, { 67, 88 },
1821 { 68, 151 }, { 71, 91 }, { 75, 152 }, { 79, 153 }, { 80, 125 }, { 81, 128 },
1822 { 83, 154 }, { 84, 137 }, { 85, 155 }, { 87, 156 }, { 91, 157 }, { 92, 138 },
1823 { 93, 139 }, { 94, 140 }, { 95, 141 }, { 113, 84 }, { 121, 73 }, { 123, 74 },
1824 { 125, 75 }, { 129, 76 }, { 131, 82 }, { 134, 83 }, { 141, 93 }, { 144, 94 },
1825 { 145, 95 }, { 147, 96 }, { 148, 97 }, { 150, 102 }, { 151, 103 }, { 153, 104 },
1826 { 154, 100 }, { 156, 105 }, { 157, 107 }, { 163, 98 }, { 166, 112 }, { 172, 99 },
1827 { 175, 114 }, { 181, 101 }, { 184, 116 }, { 193, 117 }, { 196, 108 }, { 203, 133 },
1828 { 208, 134 }, { 212, 120 }, { 213, 150 }, { 214, 121 }, { 215, 118 }, { 217, 109 },
1829 { 219, 119 }, { 220, 110 }, { 221, 111 }, { 222, 124 }, { 224, 131 }, { 225, 132 },
1830 { 228, 135 }, { 230, 136 }, { 232, 162 },
1831 };
1832
1833 static const struct msm_pinctrl_soc_data x1e80100_pinctrl = {
1834 .pins = x1e80100_pins,
1835 .npins = ARRAY_SIZE(x1e80100_pins),
1836 .functions = x1e80100_functions,
1837 .nfunctions = ARRAY_SIZE(x1e80100_functions),
1838 .groups = x1e80100_groups,
1839 .ngroups = ARRAY_SIZE(x1e80100_groups),
1840 .ngpios = 239,
1841 .wakeirq_map = x1e80100_pdc_map,
1842 /* TODO: Enabling PDC currently breaks GPIO interrupts */
1843 .nwakeirq_map = 0,
1844 /* .nwakeirq_map = ARRAY_SIZE(x1e80100_pdc_map), */
1845 .egpio_func = 9,
1846 };
1847
x1e80100_pinctrl_probe(struct platform_device * pdev)1848 static int x1e80100_pinctrl_probe(struct platform_device *pdev)
1849 {
1850 return msm_pinctrl_probe(pdev, &x1e80100_pinctrl);
1851 }
1852
1853 static const struct of_device_id x1e80100_pinctrl_of_match[] = {
1854 { .compatible = "qcom,x1e80100-tlmm", },
1855 { },
1856 };
1857
1858 static struct platform_driver x1e80100_pinctrl_driver = {
1859 .driver = {
1860 .name = "x1e80100-tlmm",
1861 .of_match_table = x1e80100_pinctrl_of_match,
1862 },
1863 .probe = x1e80100_pinctrl_probe,
1864 .remove = msm_pinctrl_remove,
1865 };
1866
x1e80100_pinctrl_init(void)1867 static int __init x1e80100_pinctrl_init(void)
1868 {
1869 return platform_driver_register(&x1e80100_pinctrl_driver);
1870 }
1871 arch_initcall(x1e80100_pinctrl_init);
1872
x1e80100_pinctrl_exit(void)1873 static void __exit x1e80100_pinctrl_exit(void)
1874 {
1875 platform_driver_unregister(&x1e80100_pinctrl_driver);
1876 }
1877 module_exit(x1e80100_pinctrl_exit);
1878
1879 MODULE_DESCRIPTION("QTI X1E80100 TLMM pinctrl driver");
1880 MODULE_LICENSE("GPL");
1881 MODULE_DEVICE_TABLE(of, x1e80100_pinctrl_of_match);
1882