1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
7 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
35 */
36
37 #ifndef MTHCA_DEV_H
38 #define MTHCA_DEV_H
39
40 #include <linux/spinlock.h>
41 #include <linux/kernel.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/timer.h>
45 #include <linux/mutex.h>
46 #include <linux/list.h>
47 #include <linux/semaphore.h>
48
49 #include "mthca_provider.h"
50 #include "mthca_doorbell.h"
51
52 #define DRV_NAME "ib_mthca"
53 #define PFX DRV_NAME ": "
54 #ifndef DRV_VERSION
55 #define DRV_VERSION "1.0"
56 #endif
57 #define DRV_RELDATE "April 4, 2008"
58
59 enum {
60 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
61 MTHCA_FLAG_SRQ = 1 << 2,
62 MTHCA_FLAG_MSI_X = 1 << 3,
63 MTHCA_FLAG_NO_LAM = 1 << 4,
64 MTHCA_FLAG_FMR = 1 << 5,
65 MTHCA_FLAG_MEMFREE = 1 << 6,
66 MTHCA_FLAG_PCIE = 1 << 7,
67 MTHCA_FLAG_SINAI_OPT = 1 << 8
68 };
69
70 enum {
71 MTHCA_MAX_PORTS = 2
72 };
73
74 enum {
75 MTHCA_BOARD_ID_LEN = 64
76 };
77
78 enum {
79 MTHCA_EQ_CONTEXT_SIZE = 0x40,
80 MTHCA_CQ_CONTEXT_SIZE = 0x40,
81 MTHCA_QP_CONTEXT_SIZE = 0x200,
82 MTHCA_RDB_ENTRY_SIZE = 0x20,
83 MTHCA_AV_SIZE = 0x20,
84 MTHCA_MGM_ENTRY_SIZE = 0x100,
85
86 /* Arbel FW gives us these, but we need them for Tavor */
87 MTHCA_MPT_ENTRY_SIZE = 0x40,
88 MTHCA_MTT_SEG_SIZE = 0x40,
89
90 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
91 };
92
93 enum {
94 MTHCA_EQ_CMD,
95 MTHCA_EQ_ASYNC,
96 MTHCA_EQ_COMP,
97 MTHCA_NUM_EQ
98 };
99
100 enum {
101 MTHCA_OPCODE_NOP = 0x00,
102 MTHCA_OPCODE_RDMA_WRITE = 0x08,
103 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
104 MTHCA_OPCODE_SEND = 0x0a,
105 MTHCA_OPCODE_SEND_IMM = 0x0b,
106 MTHCA_OPCODE_RDMA_READ = 0x10,
107 MTHCA_OPCODE_ATOMIC_CS = 0x11,
108 MTHCA_OPCODE_ATOMIC_FA = 0x12,
109 MTHCA_OPCODE_BIND_MW = 0x18,
110 MTHCA_OPCODE_INVALID = 0xff
111 };
112
113 enum {
114 MTHCA_CMD_USE_EVENTS = 1 << 0,
115 MTHCA_CMD_POST_DOORBELLS = 1 << 1
116 };
117
118 enum {
119 MTHCA_CMD_NUM_DBELL_DWORDS = 8
120 };
121
122 struct mthca_cmd {
123 struct pci_pool *pool;
124 struct mutex hcr_mutex;
125 struct semaphore poll_sem;
126 struct semaphore event_sem;
127 int max_cmds;
128 spinlock_t context_lock;
129 int free_head;
130 struct mthca_cmd_context *context;
131 u16 token_mask;
132 u32 flags;
133 void __iomem *dbell_map;
134 u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
135 };
136
137 struct mthca_limits {
138 int num_ports;
139 int vl_cap;
140 int mtu_cap;
141 int gid_table_len;
142 int pkey_table_len;
143 int local_ca_ack_delay;
144 int num_uars;
145 int max_sg;
146 int num_qps;
147 int max_wqes;
148 int max_desc_sz;
149 int max_qp_init_rdma;
150 int reserved_qps;
151 int num_srqs;
152 int max_srq_wqes;
153 int max_srq_sge;
154 int reserved_srqs;
155 int num_eecs;
156 int reserved_eecs;
157 int num_cqs;
158 int max_cqes;
159 int reserved_cqs;
160 int num_eqs;
161 int reserved_eqs;
162 int num_mpts;
163 int num_mtt_segs;
164 int mtt_seg_size;
165 int fmr_reserved_mtts;
166 int reserved_mtts;
167 int reserved_mrws;
168 int reserved_uars;
169 int num_mgms;
170 int num_amgms;
171 int reserved_mcgs;
172 int num_pds;
173 int reserved_pds;
174 u32 page_size_cap;
175 u32 flags;
176 u16 stat_rate_support;
177 u8 port_width_cap;
178 };
179
180 struct mthca_alloc {
181 u32 last;
182 u32 top;
183 u32 max;
184 u32 mask;
185 spinlock_t lock;
186 unsigned long *table;
187 };
188
189 struct mthca_array {
190 struct {
191 void **page;
192 int used;
193 } *page_list;
194 };
195
196 struct mthca_uar_table {
197 struct mthca_alloc alloc;
198 u64 uarc_base;
199 int uarc_size;
200 };
201
202 struct mthca_pd_table {
203 struct mthca_alloc alloc;
204 };
205
206 struct mthca_buddy {
207 unsigned long **bits;
208 int *num_free;
209 int max_order;
210 spinlock_t lock;
211 };
212
213 struct mthca_mr_table {
214 struct mthca_alloc mpt_alloc;
215 struct mthca_buddy mtt_buddy;
216 struct mthca_buddy *fmr_mtt_buddy;
217 u64 mtt_base;
218 u64 mpt_base;
219 struct mthca_icm_table *mtt_table;
220 struct mthca_icm_table *mpt_table;
221 struct {
222 void __iomem *mpt_base;
223 void __iomem *mtt_base;
224 struct mthca_buddy mtt_buddy;
225 } tavor_fmr;
226 };
227
228 struct mthca_eq_table {
229 struct mthca_alloc alloc;
230 void __iomem *clr_int;
231 u32 clr_mask;
232 u32 arm_mask;
233 struct mthca_eq eq[MTHCA_NUM_EQ];
234 u64 icm_virt;
235 struct page *icm_page;
236 dma_addr_t icm_dma;
237 int have_irq;
238 u8 inta_pin;
239 };
240
241 struct mthca_cq_table {
242 struct mthca_alloc alloc;
243 spinlock_t lock;
244 struct mthca_array cq;
245 struct mthca_icm_table *table;
246 };
247
248 struct mthca_srq_table {
249 struct mthca_alloc alloc;
250 spinlock_t lock;
251 struct mthca_array srq;
252 struct mthca_icm_table *table;
253 };
254
255 struct mthca_qp_table {
256 struct mthca_alloc alloc;
257 u32 rdb_base;
258 int rdb_shift;
259 int sqp_start;
260 spinlock_t lock;
261 struct mthca_array qp;
262 struct mthca_icm_table *qp_table;
263 struct mthca_icm_table *eqp_table;
264 struct mthca_icm_table *rdb_table;
265 };
266
267 struct mthca_av_table {
268 struct pci_pool *pool;
269 int num_ddr_avs;
270 u64 ddr_av_base;
271 void __iomem *av_map;
272 struct mthca_alloc alloc;
273 };
274
275 struct mthca_mcg_table {
276 struct mutex mutex;
277 struct mthca_alloc alloc;
278 struct mthca_icm_table *table;
279 };
280
281 struct mthca_catas_err {
282 u64 addr;
283 u32 __iomem *map;
284 u32 size;
285 struct timer_list timer;
286 struct list_head list;
287 };
288
289 extern struct mutex mthca_device_mutex;
290
291 struct mthca_dev {
292 struct ib_device ib_dev;
293 struct pci_dev *pdev;
294
295 int hca_type;
296 unsigned long mthca_flags;
297 unsigned long device_cap_flags;
298
299 u32 rev_id;
300 char board_id[MTHCA_BOARD_ID_LEN];
301
302 /* firmware info */
303 u64 fw_ver;
304 union {
305 struct {
306 u64 fw_start;
307 u64 fw_end;
308 } tavor;
309 struct {
310 u64 clr_int_base;
311 u64 eq_arm_base;
312 u64 eq_set_ci_base;
313 struct mthca_icm *fw_icm;
314 struct mthca_icm *aux_icm;
315 u16 fw_pages;
316 } arbel;
317 } fw;
318
319 u64 ddr_start;
320 u64 ddr_end;
321
322 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
323 struct mutex cap_mask_mutex;
324
325 void __iomem *hcr;
326 void __iomem *kar;
327 void __iomem *clr_base;
328 union {
329 struct {
330 void __iomem *ecr_base;
331 } tavor;
332 struct {
333 void __iomem *eq_arm;
334 void __iomem *eq_set_ci_base;
335 } arbel;
336 } eq_regs;
337
338 struct mthca_cmd cmd;
339 struct mthca_limits limits;
340
341 struct mthca_uar_table uar_table;
342 struct mthca_pd_table pd_table;
343 struct mthca_mr_table mr_table;
344 struct mthca_eq_table eq_table;
345 struct mthca_cq_table cq_table;
346 struct mthca_srq_table srq_table;
347 struct mthca_qp_table qp_table;
348 struct mthca_av_table av_table;
349 struct mthca_mcg_table mcg_table;
350
351 struct mthca_catas_err catas_err;
352
353 struct mthca_uar driver_uar;
354 struct mthca_db_table *db_tab;
355 struct mthca_pd driver_pd;
356 struct mthca_mr driver_mr;
357
358 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
359 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
360 spinlock_t sm_lock;
361 u8 rate[MTHCA_MAX_PORTS];
362 bool active;
363 };
364
365 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
366 extern int mthca_debug_level;
367
368 #define mthca_dbg(mdev, format, arg...) \
369 do { \
370 if (mthca_debug_level) \
371 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
372 } while (0)
373
374 #else /* CONFIG_INFINIBAND_MTHCA_DEBUG */
375
376 #define mthca_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
377
378 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
379
380 #define mthca_err(mdev, format, arg...) \
381 dev_err(&mdev->pdev->dev, format, ## arg)
382 #define mthca_info(mdev, format, arg...) \
383 dev_info(&mdev->pdev->dev, format, ## arg)
384 #define mthca_warn(mdev, format, arg...) \
385 dev_warn(&mdev->pdev->dev, format, ## arg)
386
387 extern void __buggy_use_of_MTHCA_GET(void);
388 extern void __buggy_use_of_MTHCA_PUT(void);
389
390 #define MTHCA_GET(dest, source, offset) \
391 do { \
392 void *__p = (char *) (source) + (offset); \
393 switch (sizeof (dest)) { \
394 case 1: (dest) = *(u8 *) __p; break; \
395 case 2: (dest) = be16_to_cpup(__p); break; \
396 case 4: (dest) = be32_to_cpup(__p); break; \
397 case 8: (dest) = be64_to_cpup(__p); break; \
398 default: __buggy_use_of_MTHCA_GET(); \
399 } \
400 } while (0)
401
402 #define MTHCA_PUT(dest, source, offset) \
403 do { \
404 void *__d = ((char *) (dest) + (offset)); \
405 switch (sizeof(source)) { \
406 case 1: *(u8 *) __d = (source); break; \
407 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
408 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
409 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
410 default: __buggy_use_of_MTHCA_PUT(); \
411 } \
412 } while (0)
413
414 int mthca_reset(struct mthca_dev *mdev);
415
416 u32 mthca_alloc(struct mthca_alloc *alloc);
417 void mthca_free(struct mthca_alloc *alloc, u32 obj);
418 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
419 u32 reserved);
420 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
421 void *mthca_array_get(struct mthca_array *array, int index);
422 int mthca_array_set(struct mthca_array *array, int index, void *value);
423 void mthca_array_clear(struct mthca_array *array, int index);
424 int mthca_array_init(struct mthca_array *array, int nent);
425 void mthca_array_cleanup(struct mthca_array *array, int nent);
426 int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
427 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
428 int hca_write, struct mthca_mr *mr);
429 void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
430 int is_direct, struct mthca_mr *mr);
431
432 int mthca_init_uar_table(struct mthca_dev *dev);
433 int mthca_init_pd_table(struct mthca_dev *dev);
434 int mthca_init_mr_table(struct mthca_dev *dev);
435 int mthca_init_eq_table(struct mthca_dev *dev);
436 int mthca_init_cq_table(struct mthca_dev *dev);
437 int mthca_init_srq_table(struct mthca_dev *dev);
438 int mthca_init_qp_table(struct mthca_dev *dev);
439 int mthca_init_av_table(struct mthca_dev *dev);
440 int mthca_init_mcg_table(struct mthca_dev *dev);
441
442 void mthca_cleanup_uar_table(struct mthca_dev *dev);
443 void mthca_cleanup_pd_table(struct mthca_dev *dev);
444 void mthca_cleanup_mr_table(struct mthca_dev *dev);
445 void mthca_cleanup_eq_table(struct mthca_dev *dev);
446 void mthca_cleanup_cq_table(struct mthca_dev *dev);
447 void mthca_cleanup_srq_table(struct mthca_dev *dev);
448 void mthca_cleanup_qp_table(struct mthca_dev *dev);
449 void mthca_cleanup_av_table(struct mthca_dev *dev);
450 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
451
452 int mthca_register_device(struct mthca_dev *dev);
453 void mthca_unregister_device(struct mthca_dev *dev);
454
455 void mthca_start_catas_poll(struct mthca_dev *dev);
456 void mthca_stop_catas_poll(struct mthca_dev *dev);
457 int __mthca_restart_one(struct pci_dev *pdev);
458 int mthca_catas_init(void);
459 void mthca_catas_cleanup(void);
460
461 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
462 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
463
464 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
465 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
466
467 int mthca_write_mtt_size(struct mthca_dev *dev);
468
469 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
470 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
471 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
472 int start_index, u64 *buffer_list, int list_len);
473 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
474 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
475 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
476 u32 access, struct mthca_mr *mr);
477 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
478 u64 *buffer_list, int buffer_size_shift,
479 int list_len, u64 iova, u64 total_size,
480 u32 access, struct mthca_mr *mr);
481 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
482
483 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
484 u32 access, struct mthca_fmr *fmr);
485 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
486 int list_len, u64 iova);
487 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
488 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
489 int list_len, u64 iova);
490 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
491 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
492
493 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
494 void mthca_unmap_eq_icm(struct mthca_dev *dev);
495
496 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
497 struct ib_wc *entry);
498 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
499 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
500 int mthca_init_cq(struct mthca_dev *dev, int nent,
501 struct mthca_ucontext *ctx, u32 pdn,
502 struct mthca_cq *cq);
503 void mthca_free_cq(struct mthca_dev *dev,
504 struct mthca_cq *cq);
505 void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
506 void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
507 enum ib_event_type event_type);
508 void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
509 struct mthca_srq *srq);
510 void mthca_cq_resize_copy_cqes(struct mthca_cq *cq);
511 int mthca_alloc_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int nent);
512 void mthca_free_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int cqe);
513
514 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
515 struct ib_srq_attr *attr, struct mthca_srq *srq,
516 struct ib_udata *udata);
517 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
518 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
519 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
520 int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
521 int mthca_max_srq_sge(struct mthca_dev *dev);
522 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
523 enum ib_event_type event_type);
524 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
525 int mthca_tavor_post_srq_recv(struct ib_srq *srq, const struct ib_recv_wr *wr,
526 const struct ib_recv_wr **bad_wr);
527 int mthca_arbel_post_srq_recv(struct ib_srq *srq, const struct ib_recv_wr *wr,
528 const struct ib_recv_wr **bad_wr);
529
530 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
531 enum ib_event_type event_type);
532 int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
533 struct ib_qp_init_attr *qp_init_attr);
534 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
535 struct ib_udata *udata);
536 int mthca_tavor_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
537 const struct ib_send_wr **bad_wr);
538 int mthca_tavor_post_receive(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
539 const struct ib_recv_wr **bad_wr);
540 int mthca_arbel_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
541 const struct ib_send_wr **bad_wr);
542 int mthca_arbel_post_receive(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
543 const struct ib_recv_wr **bad_wr);
544 void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
545 int index, int *dbd, __be32 *new_wqe);
546 int mthca_alloc_qp(struct mthca_dev *dev,
547 struct mthca_pd *pd,
548 struct mthca_cq *send_cq,
549 struct mthca_cq *recv_cq,
550 enum ib_qp_type type,
551 enum ib_sig_type send_policy,
552 struct ib_qp_cap *cap,
553 struct mthca_qp *qp,
554 struct ib_udata *udata);
555 int mthca_alloc_sqp(struct mthca_dev *dev,
556 struct mthca_pd *pd,
557 struct mthca_cq *send_cq,
558 struct mthca_cq *recv_cq,
559 enum ib_sig_type send_policy,
560 struct ib_qp_cap *cap,
561 int qpn,
562 int port,
563 struct mthca_sqp *sqp,
564 struct ib_udata *udata);
565 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
566 int mthca_create_ah(struct mthca_dev *dev,
567 struct mthca_pd *pd,
568 struct ib_ah_attr *ah_attr,
569 struct mthca_ah *ah);
570 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
571 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
572 struct ib_ud_header *header);
573 int mthca_ah_query(struct ib_ah *ibah, struct ib_ah_attr *attr);
574 int mthca_ah_grh_present(struct mthca_ah *ah);
575 u8 mthca_get_rate(struct mthca_dev *dev, int static_rate, u8 port);
576 enum ib_rate mthca_rate_to_ib(struct mthca_dev *dev, u8 mthca_rate, u8 port);
577
578 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
579 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
580
581 int mthca_process_mad(struct ib_device *ibdev,
582 int mad_flags,
583 u8 port_num,
584 const struct ib_wc *in_wc,
585 const struct ib_grh *in_grh,
586 const struct ib_mad_hdr *in, size_t in_mad_size,
587 struct ib_mad_hdr *out, size_t *out_mad_size,
588 u16 *out_mad_pkey_index);
589 int mthca_create_agents(struct mthca_dev *dev);
590 void mthca_free_agents(struct mthca_dev *dev);
591
to_mdev(struct ib_device * ibdev)592 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
593 {
594 return container_of(ibdev, struct mthca_dev, ib_dev);
595 }
596
mthca_is_memfree(struct mthca_dev * dev)597 static inline int mthca_is_memfree(struct mthca_dev *dev)
598 {
599 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
600 }
601
602 #endif /* MTHCA_DEV_H */
603