xref: /titanic_41/usr/src/uts/common/sys/usb/hcd/ehci/ehci_hub.h (revision 3d89ea2cb152540ea63c36bf45e4d31127ee2290)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_USB_EHCI_HUB_H
27 #define	_SYS_USB_EHCI_HUB_H
28 
29 
30 #ifdef	__cplusplus
31 extern "C" {
32 #endif
33 
34 /*
35  * Enchanced Host Controller Driver (EHCI)
36  *
37  * The EHCI driver is a software driver which interfaces to the Universal
38  * Serial Bus layer (USBA) and the Host Controller (HC). The interface to
39  * the Host Controller is defined by the EHCI Host Controller Interface.
40  *
41  * This header file describes the data structures required by the EHCI
42  * Driver for the root hub operations.
43  */
44 
45 /*
46  * Root hub information structure
47  *
48  * The Root hub is a Universal Serial Bus hub attached directly to the
49  * Host Controller (HC) and all the internal registers of the root hub
50  * are exposed to the Host Controller Driver (HCD) which is responsible
51  * for providing the proper hub-class protocol with the  USB driver and
52  * proper control of the root hub. This structure contains information
53  * about the root hub and its ports.
54  */
55 typedef struct ehci_root_hub {
56 	/* Copy of the Root Hub descriptor */
57 	usb_hub_descr_t		rh_descr;
58 
59 	/* Number of Companion Controllers */
60 	uint_t			rh_companion_controllers;
61 
62 	/* Last state & status for each root hub port */
63 	uint_t			rh_port_status[EHCI_MAX_RH_PORTS];
64 	uint_t			rh_port_state[EHCI_MAX_RH_PORTS];
65 
66 	/* Root hub control pipe handle */
67 	usba_pipe_handle_data_t	*rh_ctrl_pipe_handle;
68 
69 	/* Current control request pointer */
70 	usb_ctrl_req_t		*rh_curr_ctrl_reqp;
71 
72 	/* Root hub control pipe state */
73 	uint_t			rh_ctrl_pipe_state;
74 
75 	/* Root hub interrupt pipe handle */
76 	usba_pipe_handle_data_t	*rh_intr_pipe_handle;
77 
78 	/* Current interrupt request pointer */
79 	usb_intr_req_t		*rh_curr_intr_reqp;
80 
81 	/* Saved original interrupt request pointer */
82 	usb_intr_req_t		*rh_client_intr_reqp;
83 
84 	/* Root hub interrupt pipe state and timer-id */
85 	uint_t			rh_intr_pipe_state;
86 	usb_port_mask_t		rh_intr_pending_status;
87 	timeout_id_t		rh_intr_pipe_timer_id;
88 } ehci_root_hub_t;
89 
90 /* Port States */
91 #define	UNINIT		0x00	/* Uninitialized port */
92 #define	POWERED_OFF	0x01	/* Port has no power */
93 #define	DISCONNECTED	0x02	/* Port has power, no dev */
94 #define	DISABLED	0x03	/* Dev connected, no data */
95 #define	ENABLED		0x04	/* Downstream data is enabled */
96 #define	SUSPEND		0x05	/* Suspended port */
97 
98 /*
99  * Time waits for the different EHCI Root Hub specific operations.
100  * These timeout values are specified in terms of microseconds.
101  */
102 #define	EHCI_RH_POLL_TIME		256000	/* RH polling interval */
103 #define	EHCI_PORT_RESET_TIMEWAIT	50000	/* RH port reset time */
104 #define	EHCI_PORT_RESET_COMP_TIMEWAIT	2000	/* RH port reset complete */
105 #define	EHCI_PORT_SUSPEND_TIMEWAIT	10000	/* RH port suspend time */
106 #define	EHCI_PORT_RESUME_TIMEWAIT	20000	/* RH port resume time */
107 #define	EHCI_PORT_RESUME_COMP_TIMEWAIT	2000	/* RH port resume complete */
108 #define	EHCI_PORT_RESET_RETRY_MAX	10	/* RH port reset retry max */
109 #define	EHCI_PORT_RESUME_RETRY_MAX	10	/* RH port resume retry max */
110 
111 #ifdef __cplusplus
112 }
113 #endif
114 
115 #endif /* _SYS_USB_EHCI_HUB_H */
116