1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Based on Ocelot Linux port, which is 4 * Copyright 2001 MontaVista Software Inc. 5 * Author: jsun@mvista.com or jsun@junsun.net 6 * 7 * Copyright 2003 ICT CAS 8 * Author: Michael Guo <guoyi@ict.ac.cn> 9 * 10 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology 11 * Author: Fuxin Zhang, zhangfx@lemote.com 12 * 13 * Copyright (C) 2009 Lemote Inc. 14 * Author: Wu Zhangjin, wuzhangjin@gmail.com 15 */ 16 17 #include <linux/dma-map-ops.h> 18 #include <linux/export.h> 19 #include <linux/pci_ids.h> 20 #include <linux/string_choices.h> 21 #include <asm/bootinfo.h> 22 #include <loongson.h> 23 #include <boot_param.h> 24 #include <builtin_dtbs.h> 25 #include <workarounds.h> 26 27 #define HOST_BRIDGE_CONFIG_ADDR ((void __iomem *)TO_UNCAC(0x1a000000)) 28 29 u32 cpu_clock_freq; 30 EXPORT_SYMBOL(cpu_clock_freq); 31 struct efi_memory_map_loongson *loongson_memmap; 32 struct loongson_system_configuration loongson_sysconf; 33 34 struct board_devices *eboard; 35 struct interface_info *einter; 36 struct loongson_special_attribute *especial; 37 38 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180}; 39 u64 loongson_chiptemp[MAX_PACKAGES]; 40 u64 loongson_freqctrl[MAX_PACKAGES]; 41 42 unsigned long long smp_group[4]; 43 44 const char *get_system_type(void) 45 { 46 return "Generic Loongson64 System"; 47 } 48 49 50 void __init prom_dtb_init_env(void) 51 { 52 if ((fw_arg2 < CKSEG0 || fw_arg2 > CKSEG1) 53 && (fw_arg2 < XKPHYS || fw_arg2 > XKSEG)) 54 55 loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin; 56 else 57 loongson_fdt_blob = (void *)fw_arg2; 58 } 59 60 void __init prom_lefi_init_env(void) 61 { 62 struct boot_params *boot_p; 63 struct loongson_params *loongson_p; 64 struct system_loongson *esys; 65 struct efi_cpuinfo_loongson *ecpu; 66 struct irq_source_routing_table *eirq_source; 67 u32 id; 68 u16 vendor; 69 70 /* firmware arguments are initialized in head.S */ 71 boot_p = (struct boot_params *)fw_arg2; 72 loongson_p = &(boot_p->efi.smbios.lp); 73 74 esys = (struct system_loongson *) 75 ((u64)loongson_p + loongson_p->system_offset); 76 ecpu = (struct efi_cpuinfo_loongson *) 77 ((u64)loongson_p + loongson_p->cpu_offset); 78 eboard = (struct board_devices *) 79 ((u64)loongson_p + loongson_p->boarddev_table_offset); 80 einter = (struct interface_info *) 81 ((u64)loongson_p + loongson_p->interface_offset); 82 especial = (struct loongson_special_attribute *) 83 ((u64)loongson_p + loongson_p->special_offset); 84 eirq_source = (struct irq_source_routing_table *) 85 ((u64)loongson_p + loongson_p->irq_offset); 86 loongson_memmap = (struct efi_memory_map_loongson *) 87 ((u64)loongson_p + loongson_p->memory_offset); 88 89 cpu_clock_freq = ecpu->cpu_clock_freq; 90 loongson_sysconf.cputype = ecpu->cputype; 91 switch (ecpu->cputype) { 92 case Legacy_2K: 93 case Loongson_2K: 94 smp_group[0] = 0x900000001fe11000; 95 loongson_sysconf.cores_per_node = 2; 96 loongson_sysconf.cores_per_package = 2; 97 break; 98 case Legacy_3A: 99 case Loongson_3A: 100 loongson_sysconf.cores_per_node = 4; 101 loongson_sysconf.cores_per_package = 4; 102 smp_group[0] = 0x900000003ff01000; 103 smp_group[1] = 0x900010003ff01000; 104 smp_group[2] = 0x900020003ff01000; 105 smp_group[3] = 0x900030003ff01000; 106 loongson_chipcfg[0] = 0x900000001fe00180; 107 loongson_chipcfg[1] = 0x900010001fe00180; 108 loongson_chipcfg[2] = 0x900020001fe00180; 109 loongson_chipcfg[3] = 0x900030001fe00180; 110 loongson_chiptemp[0] = 0x900000001fe0019c; 111 loongson_chiptemp[1] = 0x900010001fe0019c; 112 loongson_chiptemp[2] = 0x900020001fe0019c; 113 loongson_chiptemp[3] = 0x900030001fe0019c; 114 loongson_freqctrl[0] = 0x900000001fe001d0; 115 loongson_freqctrl[1] = 0x900010001fe001d0; 116 loongson_freqctrl[2] = 0x900020001fe001d0; 117 loongson_freqctrl[3] = 0x900030001fe001d0; 118 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ; 119 break; 120 case Legacy_3B: 121 case Loongson_3B: 122 loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */ 123 loongson_sysconf.cores_per_package = 8; 124 smp_group[0] = 0x900000003ff01000; 125 smp_group[1] = 0x900010003ff05000; 126 smp_group[2] = 0x900020003ff09000; 127 smp_group[3] = 0x900030003ff0d000; 128 loongson_chipcfg[0] = 0x900000001fe00180; 129 loongson_chipcfg[1] = 0x900020001fe00180; 130 loongson_chipcfg[2] = 0x900040001fe00180; 131 loongson_chipcfg[3] = 0x900060001fe00180; 132 loongson_chiptemp[0] = 0x900000001fe0019c; 133 loongson_chiptemp[1] = 0x900020001fe0019c; 134 loongson_chiptemp[2] = 0x900040001fe0019c; 135 loongson_chiptemp[3] = 0x900060001fe0019c; 136 loongson_freqctrl[0] = 0x900000001fe001d0; 137 loongson_freqctrl[1] = 0x900020001fe001d0; 138 loongson_freqctrl[2] = 0x900040001fe001d0; 139 loongson_freqctrl[3] = 0x900060001fe001d0; 140 loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG; 141 break; 142 default: 143 loongson_sysconf.cores_per_node = 1; 144 loongson_sysconf.cores_per_package = 1; 145 loongson_chipcfg[0] = 0x900000001fe00180; 146 } 147 148 loongson_sysconf.nr_cpus = ecpu->nr_cpus; 149 loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id; 150 loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask; 151 if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0) 152 loongson_sysconf.nr_cpus = NR_CPUS; 153 loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus + 154 loongson_sysconf.cores_per_node - 1) / 155 loongson_sysconf.cores_per_node; 156 157 loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits; 158 if (loongson_sysconf.dma_mask_bits < 32 || 159 loongson_sysconf.dma_mask_bits > 64) { 160 loongson_sysconf.dma_mask_bits = 32; 161 dma_default_coherent = true; 162 } else { 163 dma_default_coherent = !eirq_source->dma_noncoherent; 164 } 165 166 pr_info("Firmware: Coherent DMA: %s\n", str_on_off(dma_default_coherent)); 167 168 loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm; 169 loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown; 170 loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend; 171 172 loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios; 173 pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n", 174 loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr, 175 loongson_sysconf.vgabios_addr); 176 177 loongson_sysconf.workarounds |= esys->workarounds; 178 179 pr_info("CpuClock = %u\n", cpu_clock_freq); 180 181 /* Read the ID of PCI host bridge to detect bridge type */ 182 id = readl(HOST_BRIDGE_CONFIG_ADDR); 183 vendor = id & 0xffff; 184 185 switch (vendor) { 186 case PCI_VENDOR_ID_LOONGSON: 187 pr_info("The bridge chip is LS7A\n"); 188 loongson_sysconf.bridgetype = LS7A; 189 loongson_sysconf.early_config = ls7a_early_config; 190 break; 191 case PCI_VENDOR_ID_AMD: 192 case PCI_VENDOR_ID_ATI: 193 pr_info("The bridge chip is RS780E or SR5690\n"); 194 loongson_sysconf.bridgetype = RS780E; 195 loongson_sysconf.early_config = rs780e_early_config; 196 break; 197 default: 198 pr_info("The bridge chip is VIRTUAL\n"); 199 loongson_sysconf.bridgetype = VIRTUAL; 200 loongson_sysconf.early_config = virtual_early_config; 201 loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin; 202 break; 203 } 204 205 if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) { 206 switch (read_c0_prid() & PRID_REV_MASK) { 207 case PRID_REV_LOONGSON3A_R1: 208 case PRID_REV_LOONGSON3A_R2_0: 209 case PRID_REV_LOONGSON3A_R2_1: 210 case PRID_REV_LOONGSON3A_R3_0: 211 case PRID_REV_LOONGSON3A_R3_1: 212 switch (loongson_sysconf.bridgetype) { 213 case LS7A: 214 loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin; 215 break; 216 case RS780E: 217 loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin; 218 break; 219 default: 220 break; 221 } 222 break; 223 case PRID_REV_LOONGSON3B_R1: 224 case PRID_REV_LOONGSON3B_R2: 225 if (loongson_sysconf.bridgetype == RS780E) 226 loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin; 227 break; 228 default: 229 break; 230 } 231 } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) { 232 loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin; 233 } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) { 234 if (loongson_sysconf.bridgetype == LS7A) 235 loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin; 236 } 237 238 if (!loongson_fdt_blob) 239 pr_err("Failed to determine built-in Loongson64 dtb\n"); 240 } 241