1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_edid.h>
34 #include <drm/drm_probe_helper.h>
35
36 #include "i915_drv.h"
37 #include "i915_reg.h"
38 #include "intel_connector.h"
39 #include "intel_de.h"
40 #include "intel_display_driver.h"
41 #include "intel_display_types.h"
42 #include "intel_dvo.h"
43 #include "intel_dvo_dev.h"
44 #include "intel_dvo_regs.h"
45 #include "intel_gmbus.h"
46 #include "intel_panel.h"
47
48 #define INTEL_DVO_CHIP_NONE 0
49 #define INTEL_DVO_CHIP_LVDS 1
50 #define INTEL_DVO_CHIP_TMDS 2
51 #define INTEL_DVO_CHIP_TVOUT 4
52 #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5
53
54 #define SIL164_ADDR 0x38
55 #define CH7xxx_ADDR 0x76
56 #define TFP410_ADDR 0x38
57 #define NS2501_ADDR 0x38
58
59 static const struct intel_dvo_device intel_dvo_devices[] = {
60 {
61 .type = INTEL_DVO_CHIP_TMDS,
62 .name = "sil164",
63 .port = PORT_C,
64 .target_addr = SIL164_ADDR,
65 .dev_ops = &sil164_ops,
66 },
67 {
68 .type = INTEL_DVO_CHIP_TMDS,
69 .name = "ch7xxx",
70 .port = PORT_C,
71 .target_addr = CH7xxx_ADDR,
72 .dev_ops = &ch7xxx_ops,
73 },
74 {
75 .type = INTEL_DVO_CHIP_TMDS,
76 .name = "ch7xxx",
77 .port = PORT_C,
78 .target_addr = 0x75, /* For some ch7010 */
79 .dev_ops = &ch7xxx_ops,
80 },
81 {
82 .type = INTEL_DVO_CHIP_LVDS,
83 .name = "ivch",
84 .port = PORT_A,
85 .target_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
86 .dev_ops = &ivch_ops,
87 },
88 {
89 .type = INTEL_DVO_CHIP_TMDS,
90 .name = "tfp410",
91 .port = PORT_C,
92 .target_addr = TFP410_ADDR,
93 .dev_ops = &tfp410_ops,
94 },
95 {
96 .type = INTEL_DVO_CHIP_LVDS,
97 .name = "ch7017",
98 .port = PORT_C,
99 .target_addr = 0x75,
100 .gpio = GMBUS_PIN_DPB,
101 .dev_ops = &ch7017_ops,
102 },
103 {
104 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
105 .name = "ns2501",
106 .port = PORT_B,
107 .target_addr = NS2501_ADDR,
108 .dev_ops = &ns2501_ops,
109 },
110 };
111
112 struct intel_dvo {
113 struct intel_encoder base;
114
115 struct intel_dvo_device dev;
116
117 struct intel_connector *attached_connector;
118 };
119
enc_to_dvo(struct intel_encoder * encoder)120 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
121 {
122 return container_of(encoder, struct intel_dvo, base);
123 }
124
intel_attached_dvo(struct intel_connector * connector)125 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
126 {
127 return enc_to_dvo(intel_attached_encoder(connector));
128 }
129
intel_dvo_connector_get_hw_state(struct intel_connector * connector)130 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
131 {
132 struct drm_i915_private *i915 = to_i915(connector->base.dev);
133 struct intel_encoder *encoder = intel_attached_encoder(connector);
134 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
135 enum port port = encoder->port;
136 u32 tmp;
137
138 tmp = intel_de_read(i915, DVO(port));
139
140 if (!(tmp & DVO_ENABLE))
141 return false;
142
143 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
144 }
145
intel_dvo_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)146 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
147 enum pipe *pipe)
148 {
149 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
150 enum port port = encoder->port;
151 u32 tmp;
152
153 tmp = intel_de_read(i915, DVO(port));
154
155 *pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp);
156
157 return tmp & DVO_ENABLE;
158 }
159
intel_dvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)160 static void intel_dvo_get_config(struct intel_encoder *encoder,
161 struct intel_crtc_state *pipe_config)
162 {
163 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
164 enum port port = encoder->port;
165 u32 tmp, flags = 0;
166
167 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
168
169 tmp = intel_de_read(i915, DVO(port));
170 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
171 flags |= DRM_MODE_FLAG_PHSYNC;
172 else
173 flags |= DRM_MODE_FLAG_NHSYNC;
174 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
175 flags |= DRM_MODE_FLAG_PVSYNC;
176 else
177 flags |= DRM_MODE_FLAG_NVSYNC;
178
179 pipe_config->hw.adjusted_mode.flags |= flags;
180
181 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
182 }
183
intel_disable_dvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)184 static void intel_disable_dvo(struct intel_atomic_state *state,
185 struct intel_encoder *encoder,
186 const struct intel_crtc_state *old_crtc_state,
187 const struct drm_connector_state *old_conn_state)
188 {
189 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
190 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
191 enum port port = encoder->port;
192
193 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
194
195 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0);
196 intel_de_posting_read(i915, DVO(port));
197 }
198
intel_enable_dvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)199 static void intel_enable_dvo(struct intel_atomic_state *state,
200 struct intel_encoder *encoder,
201 const struct intel_crtc_state *pipe_config,
202 const struct drm_connector_state *conn_state)
203 {
204 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
205 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
206 enum port port = encoder->port;
207
208 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
209 &pipe_config->hw.mode,
210 &pipe_config->hw.adjusted_mode);
211
212 intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE);
213 intel_de_posting_read(i915, DVO(port));
214
215 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
216 }
217
218 static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector * _connector,struct drm_display_mode * mode)219 intel_dvo_mode_valid(struct drm_connector *_connector,
220 struct drm_display_mode *mode)
221 {
222 struct intel_connector *connector = to_intel_connector(_connector);
223 struct drm_i915_private *i915 = to_i915(connector->base.dev);
224 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
225 const struct drm_display_mode *fixed_mode =
226 intel_panel_fixed_mode(connector, mode);
227 int max_dotclk = to_i915(connector->base.dev)->display.cdclk.max_dotclk_freq;
228 int target_clock = mode->clock;
229 enum drm_mode_status status;
230
231 status = intel_cpu_transcoder_mode_valid(i915, mode);
232 if (status != MODE_OK)
233 return status;
234
235 /* XXX: Validate clock range */
236
237 if (fixed_mode) {
238 enum drm_mode_status status;
239
240 status = intel_panel_mode_valid(connector, mode);
241 if (status != MODE_OK)
242 return status;
243
244 target_clock = fixed_mode->clock;
245 }
246
247 if (target_clock > max_dotclk)
248 return MODE_CLOCK_HIGH;
249
250 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
251 }
252
intel_dvo_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)253 static int intel_dvo_compute_config(struct intel_encoder *encoder,
254 struct intel_crtc_state *pipe_config,
255 struct drm_connector_state *conn_state)
256 {
257 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
258 struct intel_connector *connector = to_intel_connector(conn_state->connector);
259 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
260 const struct drm_display_mode *fixed_mode =
261 intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
262
263 /*
264 * If we have timings from the BIOS for the panel, put them in
265 * to the adjusted mode. The CRTC will be set up for this mode,
266 * with the panel scaling set up to source from the H/VDisplay
267 * of the original mode.
268 */
269 if (fixed_mode) {
270 int ret;
271
272 ret = intel_panel_compute_config(connector, adjusted_mode);
273 if (ret)
274 return ret;
275 }
276
277 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
278 return -EINVAL;
279
280 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
281 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
282
283 return 0;
284 }
285
intel_dvo_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)286 static void intel_dvo_pre_enable(struct intel_atomic_state *state,
287 struct intel_encoder *encoder,
288 const struct intel_crtc_state *pipe_config,
289 const struct drm_connector_state *conn_state)
290 {
291 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
292 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
293 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
294 enum port port = encoder->port;
295 enum pipe pipe = crtc->pipe;
296 u32 dvo_val;
297
298 /* Save the active data order, since I don't know what it should be set to. */
299 dvo_val = intel_de_read(i915, DVO(port)) &
300 (DVO_DEDICATED_INT_ENABLE |
301 DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK);
302 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
303 DVO_BLANK_ACTIVE_HIGH;
304
305 dvo_val |= DVO_PIPE_SEL(pipe);
306 dvo_val |= DVO_PIPE_STALL;
307 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
308 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
309 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
310 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
311
312 intel_de_write(i915, DVO_SRCDIM(port),
313 DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) |
314 DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay));
315 intel_de_write(i915, DVO(port), dvo_val);
316 }
317
318 static enum drm_connector_status
intel_dvo_detect(struct drm_connector * _connector,bool force)319 intel_dvo_detect(struct drm_connector *_connector, bool force)
320 {
321 struct intel_display *display = to_intel_display(_connector->dev);
322 struct intel_connector *connector = to_intel_connector(_connector);
323 struct drm_i915_private *i915 = to_i915(connector->base.dev);
324 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
325
326 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
327 connector->base.base.id, connector->base.name);
328
329 if (!intel_display_device_enabled(display))
330 return connector_status_disconnected;
331
332 if (!intel_display_driver_check_access(display))
333 return connector->base.status;
334
335 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
336 }
337
intel_dvo_get_modes(struct drm_connector * _connector)338 static int intel_dvo_get_modes(struct drm_connector *_connector)
339 {
340 struct intel_display *display = to_intel_display(_connector->dev);
341 struct intel_connector *connector = to_intel_connector(_connector);
342 int num_modes;
343
344 if (!intel_display_driver_check_access(display))
345 return drm_edid_connector_add_modes(&connector->base);
346
347 /*
348 * We should probably have an i2c driver get_modes function for those
349 * devices which will have a fixed set of modes determined by the chip
350 * (TV-out, for example), but for now with just TMDS and LVDS,
351 * that's not the case.
352 */
353 num_modes = intel_ddc_get_modes(&connector->base, connector->base.ddc);
354 if (num_modes)
355 return num_modes;
356
357 return intel_panel_get_modes(connector);
358 }
359
360 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
361 .detect = intel_dvo_detect,
362 .late_register = intel_connector_register,
363 .early_unregister = intel_connector_unregister,
364 .destroy = intel_connector_destroy,
365 .fill_modes = drm_helper_probe_single_connector_modes,
366 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
367 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
368 };
369
370 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
371 .mode_valid = intel_dvo_mode_valid,
372 .get_modes = intel_dvo_get_modes,
373 };
374
intel_dvo_enc_destroy(struct drm_encoder * encoder)375 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
376 {
377 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
378
379 if (intel_dvo->dev.dev_ops->destroy)
380 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
381
382 intel_encoder_destroy(encoder);
383 }
384
385 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
386 .destroy = intel_dvo_enc_destroy,
387 };
388
intel_dvo_encoder_type(const struct intel_dvo_device * dvo)389 static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo)
390 {
391 switch (dvo->type) {
392 case INTEL_DVO_CHIP_TMDS:
393 return DRM_MODE_ENCODER_TMDS;
394 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
395 case INTEL_DVO_CHIP_LVDS:
396 return DRM_MODE_ENCODER_LVDS;
397 default:
398 MISSING_CASE(dvo->type);
399 return DRM_MODE_ENCODER_NONE;
400 }
401 }
402
intel_dvo_connector_type(const struct intel_dvo_device * dvo)403 static int intel_dvo_connector_type(const struct intel_dvo_device *dvo)
404 {
405 switch (dvo->type) {
406 case INTEL_DVO_CHIP_TMDS:
407 return DRM_MODE_CONNECTOR_DVII;
408 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
409 case INTEL_DVO_CHIP_LVDS:
410 return DRM_MODE_CONNECTOR_LVDS;
411 default:
412 MISSING_CASE(dvo->type);
413 return DRM_MODE_CONNECTOR_Unknown;
414 }
415 }
416
intel_dvo_init_dev(struct drm_i915_private * dev_priv,struct intel_dvo * intel_dvo,const struct intel_dvo_device * dvo)417 static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv,
418 struct intel_dvo *intel_dvo,
419 const struct intel_dvo_device *dvo)
420 {
421 struct intel_display *display = &dev_priv->display;
422 struct i2c_adapter *i2c;
423 u32 dpll[I915_MAX_PIPES];
424 enum pipe pipe;
425 int gpio;
426 bool ret;
427
428 /*
429 * Allow the I2C driver info to specify the GPIO to be used in
430 * special cases, but otherwise default to what's defined
431 * in the spec.
432 */
433 if (intel_gmbus_is_valid_pin(display, dvo->gpio))
434 gpio = dvo->gpio;
435 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
436 gpio = GMBUS_PIN_SSC;
437 else
438 gpio = GMBUS_PIN_DPB;
439
440 /*
441 * Set up the I2C bus necessary for the chip we're probing.
442 * It appears that everything is on GPIOE except for panels
443 * on i830 laptops, which are on GPIOB (DVOA).
444 */
445 i2c = intel_gmbus_get_adapter(display, gpio);
446
447 intel_dvo->dev = *dvo;
448
449 /*
450 * GMBUS NAK handling seems to be unstable, hence let the
451 * transmitter detection run in bit banging mode for now.
452 */
453 intel_gmbus_force_bit(i2c, true);
454
455 /*
456 * ns2501 requires the DVO 2x clock before it will
457 * respond to i2c accesses, so make sure we have
458 * the clock enabled before we attempt to initialize
459 * the device.
460 */
461 for_each_pipe(dev_priv, pipe)
462 dpll[pipe] = intel_de_rmw(dev_priv, DPLL(dev_priv, pipe), 0,
463 DPLL_DVO_2X_MODE);
464
465 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
466
467 /* restore the DVO 2x clock state to original */
468 for_each_pipe(dev_priv, pipe) {
469 intel_de_write(dev_priv, DPLL(dev_priv, pipe), dpll[pipe]);
470 }
471
472 intel_gmbus_force_bit(i2c, false);
473
474 return ret;
475 }
476
intel_dvo_probe(struct drm_i915_private * i915,struct intel_dvo * intel_dvo)477 static bool intel_dvo_probe(struct drm_i915_private *i915,
478 struct intel_dvo *intel_dvo)
479 {
480 int i;
481
482 /* Now, try to find a controller */
483 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
484 if (intel_dvo_init_dev(i915, intel_dvo,
485 &intel_dvo_devices[i]))
486 return true;
487 }
488
489 return false;
490 }
491
intel_dvo_init(struct drm_i915_private * i915)492 void intel_dvo_init(struct drm_i915_private *i915)
493 {
494 struct intel_display *display = &i915->display;
495 struct intel_connector *connector;
496 struct intel_encoder *encoder;
497 struct intel_dvo *intel_dvo;
498
499 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
500 if (!intel_dvo)
501 return;
502
503 connector = intel_connector_alloc();
504 if (!connector) {
505 kfree(intel_dvo);
506 return;
507 }
508
509 intel_dvo->attached_connector = connector;
510
511 encoder = &intel_dvo->base;
512
513 encoder->disable = intel_disable_dvo;
514 encoder->enable = intel_enable_dvo;
515 encoder->get_hw_state = intel_dvo_get_hw_state;
516 encoder->get_config = intel_dvo_get_config;
517 encoder->compute_config = intel_dvo_compute_config;
518 encoder->pre_enable = intel_dvo_pre_enable;
519 connector->get_hw_state = intel_dvo_connector_get_hw_state;
520
521 if (!intel_dvo_probe(i915, intel_dvo)) {
522 kfree(intel_dvo);
523 intel_connector_free(connector);
524 return;
525 }
526
527 assert_port_valid(i915, intel_dvo->dev.port);
528
529 encoder->type = INTEL_OUTPUT_DVO;
530 encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
531 encoder->port = intel_dvo->dev.port;
532 encoder->pipe_mask = ~0;
533
534 if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS)
535 encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) |
536 BIT(INTEL_OUTPUT_DVO);
537
538 drm_encoder_init(&i915->drm, &encoder->base,
539 &intel_dvo_enc_funcs,
540 intel_dvo_encoder_type(&intel_dvo->dev),
541 "DVO %c", port_name(encoder->port));
542
543 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n",
544 encoder->base.base.id, encoder->base.name,
545 intel_dvo->dev.name);
546
547 if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS)
548 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
549 DRM_CONNECTOR_POLL_DISCONNECT;
550 connector->base.polled = connector->polled;
551
552 drm_connector_init_with_ddc(&i915->drm, &connector->base,
553 &intel_dvo_connector_funcs,
554 intel_dvo_connector_type(&intel_dvo->dev),
555 intel_gmbus_get_adapter(display, GMBUS_PIN_DPC));
556
557 drm_connector_helper_add(&connector->base,
558 &intel_dvo_connector_helper_funcs);
559 connector->base.display_info.subpixel_order = SubPixelHorizontalRGB;
560
561 intel_connector_attach_encoder(connector, encoder);
562
563 if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) {
564 /*
565 * For our LVDS chipsets, we should hopefully be able
566 * to dig the fixed panel mode out of the BIOS data.
567 * However, it's in a different format from the BIOS
568 * data on chipsets with integrated LVDS (stored in AIM
569 * headers, likely), so for now, just get the current
570 * mode being output through DVO.
571 */
572 intel_panel_add_encoder_fixed_mode(connector, encoder);
573
574 intel_panel_init(connector, NULL);
575 }
576 }
577