| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn201/ |
| H A D | dcn201_dccg.c | 47 static void dccg201_update_dpp_dto(struct dccg *dccg, int dpp_inst, in dccg201_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/ |
| H A D | dcn303_hwseq.c | 46 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn303_dpp_pg_control()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn21/ |
| H A D | dcn21_dccg.c | 46 static void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg21_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/ |
| H A D | dcn302_hwseq.c | 45 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn302_dpp_pg_control()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| H A D | dcn401_dccg.c | 56 uint32_t dpp_inst, uint32_t enable) in dcn401_set_dppclk_enable()
77 void dccg401_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg401_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.c | 47 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg2_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| H A D | dcn314_dccg.c | 331 unsigned int dpp_inst, in dccg314_dpp_root_clock_control()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_hwseq.c | 429 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) in dcn314_dpp_root_clock_control()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 111 int dpp_inst, dppclk_khz, prev_dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 114 int dpp_inst, dppclk_khz, prev_dppclk_khz; in rn_update_clocks_update_dpp_dto() local
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
| H A D | dcn31_dccg.c | 46 void dccg31_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg31_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 217 int dpp_inst = 0, dppclk_khz, prev_dppclk_khz; in dcn35_update_clocks_update_dpp_dto() local
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 462 void dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) in dcn35_dpp_root_clock_control()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 321 int dpp_inst = 0, dppclk_khz, prev_dppclk_khz; in dcn32_update_clocks_update_dpp_dto() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 537 int dpp_inst = 0, dppclk_khz, prev_dppclk_khz; in dcn401_update_clocks_update_dpp_dto() local
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 679 unsigned int dpp_inst, in dcn10_dpp_pg_control()
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| /linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 2884 uint8_t dpp_inst; member
3614 uint8_t dpp_inst; member
|