xref: /linux/drivers/dpll/dpll_nl.c (revision 8be4d31cb8aaeea27bde4b7ddb26e28a89062ebf)
1 // SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 /* Do not edit directly, auto-generated from: */
3 /*	Documentation/netlink/specs/dpll.yaml */
4 /* YNL-GEN kernel source */
5 
6 #include <net/netlink.h>
7 #include <net/genetlink.h>
8 
9 #include "dpll_nl.h"
10 
11 #include <uapi/linux/dpll.h>
12 
13 /* Common nested types */
14 const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1] = {
15 	[DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, },
16 	[DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
17 	[DPLL_A_PIN_PRIO] = { .type = NLA_U32, },
18 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
19 	[DPLL_A_PIN_PHASE_OFFSET] = { .type = NLA_S64, },
20 };
21 
22 const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = {
23 	[DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, },
24 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
25 };
26 
27 const struct nla_policy dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = {
28 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
29 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
30 };
31 
32 /* DPLL_CMD_DEVICE_ID_GET - do */
33 static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = {
34 	[DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },
35 	[DPLL_A_CLOCK_ID] = { .type = NLA_U64, },
36 	[DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
37 };
38 
39 /* DPLL_CMD_DEVICE_GET - do */
40 static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = {
41 	[DPLL_A_ID] = { .type = NLA_U32, },
42 };
43 
44 /* DPLL_CMD_DEVICE_SET - do */
45 static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_PHASE_OFFSET_MONITOR + 1] = {
46 	[DPLL_A_ID] = { .type = NLA_U32, },
47 	[DPLL_A_PHASE_OFFSET_MONITOR] = NLA_POLICY_MAX(NLA_U32, 1),
48 };
49 
50 /* DPLL_CMD_PIN_ID_GET - do */
51 static const struct nla_policy dpll_pin_id_get_nl_policy[DPLL_A_PIN_TYPE + 1] = {
52 	[DPLL_A_PIN_MODULE_NAME] = { .type = NLA_NUL_STRING, },
53 	[DPLL_A_PIN_CLOCK_ID] = { .type = NLA_U64, },
54 	[DPLL_A_PIN_BOARD_LABEL] = { .type = NLA_NUL_STRING, },
55 	[DPLL_A_PIN_PANEL_LABEL] = { .type = NLA_NUL_STRING, },
56 	[DPLL_A_PIN_PACKAGE_LABEL] = { .type = NLA_NUL_STRING, },
57 	[DPLL_A_PIN_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 5),
58 };
59 
60 /* DPLL_CMD_PIN_GET - do */
61 static const struct nla_policy dpll_pin_get_do_nl_policy[DPLL_A_PIN_ID + 1] = {
62 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
63 };
64 
65 /* DPLL_CMD_PIN_GET - dump */
66 static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = {
67 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
68 };
69 
70 /* DPLL_CMD_PIN_SET - do */
71 static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_REFERENCE_SYNC + 1] = {
72 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
73 	[DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, },
74 	[DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
75 	[DPLL_A_PIN_PRIO] = { .type = NLA_U32, },
76 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
77 	[DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy),
78 	[DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy),
79 	[DPLL_A_PIN_PHASE_ADJUST] = { .type = NLA_S32, },
80 	[DPLL_A_PIN_ESYNC_FREQUENCY] = { .type = NLA_U64, },
81 	[DPLL_A_PIN_REFERENCE_SYNC] = NLA_POLICY_NESTED(dpll_reference_sync_nl_policy),
82 };
83 
84 /* Ops table for dpll */
85 static const struct genl_split_ops dpll_nl_ops[] = {
86 	{
87 		.cmd		= DPLL_CMD_DEVICE_ID_GET,
88 		.pre_doit	= dpll_lock_doit,
89 		.doit		= dpll_nl_device_id_get_doit,
90 		.post_doit	= dpll_unlock_doit,
91 		.policy		= dpll_device_id_get_nl_policy,
92 		.maxattr	= DPLL_A_TYPE,
93 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
94 	},
95 	{
96 		.cmd		= DPLL_CMD_DEVICE_GET,
97 		.pre_doit	= dpll_pre_doit,
98 		.doit		= dpll_nl_device_get_doit,
99 		.post_doit	= dpll_post_doit,
100 		.policy		= dpll_device_get_nl_policy,
101 		.maxattr	= DPLL_A_ID,
102 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
103 	},
104 	{
105 		.cmd	= DPLL_CMD_DEVICE_GET,
106 		.dumpit	= dpll_nl_device_get_dumpit,
107 		.flags	= GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP,
108 	},
109 	{
110 		.cmd		= DPLL_CMD_DEVICE_SET,
111 		.pre_doit	= dpll_pre_doit,
112 		.doit		= dpll_nl_device_set_doit,
113 		.post_doit	= dpll_post_doit,
114 		.policy		= dpll_device_set_nl_policy,
115 		.maxattr	= DPLL_A_PHASE_OFFSET_MONITOR,
116 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
117 	},
118 	{
119 		.cmd		= DPLL_CMD_PIN_ID_GET,
120 		.pre_doit	= dpll_lock_doit,
121 		.doit		= dpll_nl_pin_id_get_doit,
122 		.post_doit	= dpll_unlock_doit,
123 		.policy		= dpll_pin_id_get_nl_policy,
124 		.maxattr	= DPLL_A_PIN_TYPE,
125 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
126 	},
127 	{
128 		.cmd		= DPLL_CMD_PIN_GET,
129 		.pre_doit	= dpll_pin_pre_doit,
130 		.doit		= dpll_nl_pin_get_doit,
131 		.post_doit	= dpll_pin_post_doit,
132 		.policy		= dpll_pin_get_do_nl_policy,
133 		.maxattr	= DPLL_A_PIN_ID,
134 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
135 	},
136 	{
137 		.cmd		= DPLL_CMD_PIN_GET,
138 		.dumpit		= dpll_nl_pin_get_dumpit,
139 		.policy		= dpll_pin_get_dump_nl_policy,
140 		.maxattr	= DPLL_A_PIN_ID,
141 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP,
142 	},
143 	{
144 		.cmd		= DPLL_CMD_PIN_SET,
145 		.pre_doit	= dpll_pin_pre_doit,
146 		.doit		= dpll_nl_pin_set_doit,
147 		.post_doit	= dpll_pin_post_doit,
148 		.policy		= dpll_pin_set_nl_policy,
149 		.maxattr	= DPLL_A_PIN_REFERENCE_SYNC,
150 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
151 	},
152 };
153 
154 static const struct genl_multicast_group dpll_nl_mcgrps[] = {
155 	[DPLL_NLGRP_MONITOR] = { "monitor", },
156 };
157 
158 struct genl_family dpll_nl_family __ro_after_init = {
159 	.name		= DPLL_FAMILY_NAME,
160 	.version	= DPLL_FAMILY_VERSION,
161 	.netnsok	= true,
162 	.parallel_ops	= true,
163 	.module		= THIS_MODULE,
164 	.split_ops	= dpll_nl_ops,
165 	.n_split_ops	= ARRAY_SIZE(dpll_nl_ops),
166 	.mcgrps		= dpll_nl_mcgrps,
167 	.n_mcgrps	= ARRAY_SIZE(dpll_nl_mcgrps),
168 };
169