xref: /linux/drivers/gpu/drm/gma500/cdv_intel_crt.c (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *	Eric Anholt <eric@anholt.net>
25  */
26 
27 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/pm_runtime.h>
30 
31 #include <drm/drm_crtc_helper.h>
32 #include <drm/drm_modeset_helper_vtables.h>
33 #include <drm/drm_simple_kms_helper.h>
34 
35 #include "cdv_device.h"
36 #include "intel_bios.h"
37 #include "power.h"
38 #include "psb_drv.h"
39 #include "psb_intel_drv.h"
40 #include "psb_intel_reg.h"
41 
42 
cdv_intel_crt_dpms(struct drm_encoder * encoder,int mode)43 static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
44 {
45 	struct drm_device *dev = encoder->dev;
46 	u32 temp, reg;
47 	reg = ADPA;
48 
49 	temp = REG_READ(reg);
50 	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
51 	temp &= ~ADPA_DAC_ENABLE;
52 
53 	switch (mode) {
54 	case DRM_MODE_DPMS_ON:
55 		temp |= ADPA_DAC_ENABLE;
56 		break;
57 	case DRM_MODE_DPMS_STANDBY:
58 		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
59 		break;
60 	case DRM_MODE_DPMS_SUSPEND:
61 		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
62 		break;
63 	case DRM_MODE_DPMS_OFF:
64 		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
65 		break;
66 	}
67 
68 	REG_WRITE(reg, temp);
69 }
70 
cdv_intel_crt_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)71 static enum drm_mode_status cdv_intel_crt_mode_valid(struct drm_connector *connector,
72 				struct drm_display_mode *mode)
73 {
74 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
75 		return MODE_NO_DBLESCAN;
76 
77 	/* The lowest clock for CDV is 20000KHz */
78 	if (mode->clock < 20000)
79 		return MODE_CLOCK_LOW;
80 
81 	/* The max clock for CDV is 355 instead of 400 */
82 	if (mode->clock > 355000)
83 		return MODE_CLOCK_HIGH;
84 
85 	return MODE_OK;
86 }
87 
cdv_intel_crt_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)88 static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
89 			       struct drm_display_mode *mode,
90 			       struct drm_display_mode *adjusted_mode)
91 {
92 
93 	struct drm_device *dev = encoder->dev;
94 	struct drm_crtc *crtc = encoder->crtc;
95 	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
96 	int dpll_md_reg;
97 	u32 adpa, dpll_md;
98 	u32 adpa_reg;
99 
100 	if (gma_crtc->pipe == 0)
101 		dpll_md_reg = DPLL_A_MD;
102 	else
103 		dpll_md_reg = DPLL_B_MD;
104 
105 	adpa_reg = ADPA;
106 
107 	/*
108 	 * Disable separate mode multiplier used when cloning SDVO to CRT
109 	 * XXX this needs to be adjusted when we really are cloning
110 	 */
111 	{
112 		dpll_md = REG_READ(dpll_md_reg);
113 		REG_WRITE(dpll_md_reg,
114 			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
115 	}
116 
117 	adpa = 0;
118 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
119 		adpa |= ADPA_HSYNC_ACTIVE_HIGH;
120 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
121 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
122 
123 	if (gma_crtc->pipe == 0)
124 		adpa |= ADPA_PIPE_A_SELECT;
125 	else
126 		adpa |= ADPA_PIPE_B_SELECT;
127 
128 	REG_WRITE(adpa_reg, adpa);
129 }
130 
131 
132 /*
133  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
134  *
135  * \return true if CRT is connected.
136  * \return false if CRT is disconnected.
137  */
cdv_intel_crt_detect_hotplug(struct drm_connector * connector,bool force)138 static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
139 								bool force)
140 {
141 	struct drm_device *dev = connector->dev;
142 	u32 hotplug_en;
143 	int i, tries = 0, ret = false;
144 	u32 orig;
145 
146 	/*
147 	 * On a CDV thep, CRT detect sequence need to be done twice
148 	 * to get a reliable result.
149 	 */
150 	tries = 2;
151 
152 	orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
153 	hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
154 	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
155 
156 	hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
157 	hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
158 
159 	for (i = 0; i < tries ; i++) {
160 		unsigned long timeout;
161 		/* turn on the FORCE_DETECT */
162 		REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
163 		timeout = jiffies + msecs_to_jiffies(1000);
164 		/* wait for FORCE_DETECT to go off */
165 		do {
166 			if (!(REG_READ(PORT_HOTPLUG_EN) &
167 					CRT_HOTPLUG_FORCE_DETECT))
168 				break;
169 			msleep(1);
170 		} while (time_after(timeout, jiffies));
171 	}
172 
173 	if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
174 	    CRT_HOTPLUG_MONITOR_NONE)
175 		ret = true;
176 
177 	 /* clear the interrupt we just generated, if any */
178 	REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
179 
180 	/* and put the bits back */
181 	REG_WRITE(PORT_HOTPLUG_EN, orig);
182 	return ret;
183 }
184 
cdv_intel_crt_detect(struct drm_connector * connector,bool force)185 static enum drm_connector_status cdv_intel_crt_detect(
186 				struct drm_connector *connector, bool force)
187 {
188 	if (cdv_intel_crt_detect_hotplug(connector, force))
189 		return connector_status_connected;
190 	else
191 		return connector_status_disconnected;
192 }
193 
cdv_intel_crt_destroy(struct drm_connector * connector)194 static void cdv_intel_crt_destroy(struct drm_connector *connector)
195 {
196 	struct gma_connector *gma_connector = to_gma_connector(connector);
197 	struct gma_i2c_chan *ddc_bus = to_gma_i2c_chan(connector->ddc);
198 
199 	gma_i2c_destroy(ddc_bus);
200 	drm_connector_cleanup(connector);
201 	kfree(gma_connector);
202 }
203 
cdv_intel_crt_get_modes(struct drm_connector * connector)204 static int cdv_intel_crt_get_modes(struct drm_connector *connector)
205 {
206 	return psb_intel_ddc_get_modes(connector, connector->ddc);
207 }
208 
cdv_intel_crt_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t value)209 static int cdv_intel_crt_set_property(struct drm_connector *connector,
210 				  struct drm_property *property,
211 				  uint64_t value)
212 {
213 	return 0;
214 }
215 
216 /*
217  * Routines for controlling stuff on the analog port
218  */
219 
220 static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
221 	.dpms = cdv_intel_crt_dpms,
222 	.prepare = gma_encoder_prepare,
223 	.commit = gma_encoder_commit,
224 	.mode_set = cdv_intel_crt_mode_set,
225 };
226 
227 static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
228 	.dpms = drm_helper_connector_dpms,
229 	.detect = cdv_intel_crt_detect,
230 	.fill_modes = drm_helper_probe_single_connector_modes,
231 	.destroy = cdv_intel_crt_destroy,
232 	.set_property = cdv_intel_crt_set_property,
233 };
234 
235 static const struct drm_connector_helper_funcs
236 				cdv_intel_crt_connector_helper_funcs = {
237 	.mode_valid = cdv_intel_crt_mode_valid,
238 	.get_modes = cdv_intel_crt_get_modes,
239 	.best_encoder = gma_best_encoder,
240 };
241 
cdv_intel_crt_init(struct drm_device * dev,struct psb_intel_mode_device * mode_dev)242 void cdv_intel_crt_init(struct drm_device *dev,
243 			struct psb_intel_mode_device *mode_dev)
244 {
245 
246 	struct gma_connector *gma_connector;
247 	struct gma_encoder *gma_encoder;
248 	struct gma_i2c_chan *ddc_bus;
249 	struct drm_connector *connector;
250 	struct drm_encoder *encoder;
251 	int ret;
252 
253 	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
254 	if (!gma_encoder)
255 		return;
256 
257 	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
258 	if (!gma_connector)
259 		goto err_free_encoder;
260 
261 	/* Set up the DDC bus. */
262 	ddc_bus = gma_i2c_create(dev, GPIOA, "CRTDDC_A");
263 	if (!ddc_bus) {
264 		dev_printk(KERN_ERR, dev->dev, "DDC bus registration failed.\n");
265 		goto err_free_connector;
266 	}
267 
268 	connector = &gma_connector->base;
269 	connector->polled = DRM_CONNECTOR_POLL_HPD;
270 	ret = drm_connector_init_with_ddc(dev, connector,
271 					  &cdv_intel_crt_connector_funcs,
272 					  DRM_MODE_CONNECTOR_VGA,
273 					  &ddc_bus->base);
274 	if (ret)
275 		goto err_ddc_destroy;
276 
277 	encoder = &gma_encoder->base;
278 	ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
279 	if (ret)
280 		goto err_connector_cleanup;
281 
282 	gma_connector_attach_encoder(gma_connector, gma_encoder);
283 
284 	gma_encoder->type = INTEL_OUTPUT_ANALOG;
285 	connector->interlace_allowed = 0;
286 	connector->doublescan_allowed = 0;
287 
288 	drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
289 	drm_connector_helper_add(connector,
290 					&cdv_intel_crt_connector_helper_funcs);
291 
292 	return;
293 
294 err_connector_cleanup:
295 	drm_connector_cleanup(&gma_connector->base);
296 err_ddc_destroy:
297 	gma_i2c_destroy(ddc_bus);
298 err_free_connector:
299 	kfree(gma_connector);
300 err_free_encoder:
301 	kfree(gma_encoder);
302 	return;
303 }
304