1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef LINUX_MSI_H
3 #define LINUX_MSI_H
4
5 /*
6 * This header file contains MSI data structures and functions which are
7 * only relevant for:
8 * - Interrupt core code
9 * - PCI/MSI core code
10 * - MSI interrupt domain implementations
11 * - IOMMU, low level VFIO, NTB and other justified exceptions
12 * dealing with low level MSI details.
13 *
14 * Regular device drivers have no business with any of these functions and
15 * especially storing MSI descriptor pointers in random code is considered
16 * abuse.
17 *
18 * Device driver relevant functions are available in <linux/msi_api.h>
19 */
20
21 #include <linux/irqdomain_defs.h>
22 #include <linux/cpumask_types.h>
23 #include <linux/msi_api.h>
24 #include <linux/irq.h>
25
26 #include <asm/msi.h>
27
28 /* Dummy shadow structures if an architecture does not define them */
29 #ifndef arch_msi_msg_addr_lo
30 typedef struct arch_msi_msg_addr_lo {
31 u32 address_lo;
32 } __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
33 #endif
34
35 #ifndef arch_msi_msg_addr_hi
36 typedef struct arch_msi_msg_addr_hi {
37 u32 address_hi;
38 } __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
39 #endif
40
41 #ifndef arch_msi_msg_data
42 typedef struct arch_msi_msg_data {
43 u32 data;
44 } __attribute__ ((packed)) arch_msi_msg_data_t;
45 #endif
46
47 #ifndef arch_is_isolated_msi
48 #define arch_is_isolated_msi() false
49 #endif
50
51 /**
52 * msi_msg - Representation of a MSI message
53 * @address_lo: Low 32 bits of msi message address
54 * @arch_addrlo: Architecture specific shadow of @address_lo
55 * @address_hi: High 32 bits of msi message address
56 * (only used when device supports it)
57 * @arch_addrhi: Architecture specific shadow of @address_hi
58 * @data: MSI message data (usually 16 bits)
59 * @arch_data: Architecture specific shadow of @data
60 */
61 struct msi_msg {
62 union {
63 u32 address_lo;
64 arch_msi_msg_addr_lo_t arch_addr_lo;
65 };
66 union {
67 u32 address_hi;
68 arch_msi_msg_addr_hi_t arch_addr_hi;
69 };
70 union {
71 u32 data;
72 arch_msi_msg_data_t arch_data;
73 };
74 };
75
76 /* Helper functions */
77 struct msi_desc;
78 struct pci_dev;
79 struct device_attribute;
80 struct irq_domain;
81 struct irq_affinity_desc;
82
83 #ifdef CONFIG_GENERIC_MSI_IRQ
84 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
85 #else
get_cached_msi_msg(unsigned int irq,struct msi_msg * msg)86 static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { }
87 #endif
88
89 typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
90 struct msi_msg *msg);
91
92 /**
93 * pci_msi_desc - PCI/MSI specific MSI descriptor data
94 *
95 * @msi_mask: [PCI MSI] MSI cached mask bits
96 * @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits
97 * @is_msix: [PCI MSI/X] True if MSI-X
98 * @multiple: [PCI MSI/X] log2 num of messages allocated
99 * @multi_cap: [PCI MSI/X] log2 num of messages supported
100 * @can_mask: [PCI MSI/X] Masking supported?
101 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
102 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
103 * @mask_pos: [PCI MSI] Mask register position
104 * @mask_base: [PCI MSI-X] Mask register base address
105 */
106 struct pci_msi_desc {
107 union {
108 u32 msi_mask;
109 u32 msix_ctrl;
110 };
111 struct {
112 u8 is_msix : 1;
113 u8 multiple : 3;
114 u8 multi_cap : 3;
115 u8 can_mask : 1;
116 u8 is_64 : 1;
117 u8 is_virtual : 1;
118 unsigned default_irq;
119 } msi_attrib;
120 union {
121 u8 mask_pos;
122 void __iomem *mask_base;
123 };
124 };
125
126 /**
127 * union msi_domain_cookie - Opaque MSI domain specific data
128 * @value: u64 value store
129 * @ptr: Pointer to domain specific data
130 * @iobase: Domain specific IOmem pointer
131 *
132 * The content of this data is implementation defined and used by the MSI
133 * domain to store domain specific information which is requried for
134 * interrupt chip callbacks.
135 */
136 union msi_domain_cookie {
137 u64 value;
138 void *ptr;
139 void __iomem *iobase;
140 };
141
142 /**
143 * struct msi_desc_data - Generic MSI descriptor data
144 * @dcookie: Cookie for MSI domain specific data which is required
145 * for irq_chip callbacks
146 * @icookie: Cookie for the MSI interrupt instance provided by
147 * the usage site to the allocation function
148 *
149 * The content of this data is implementation defined, e.g. PCI/IMS
150 * implementations define the meaning of the data. The MSI core ignores
151 * this data completely.
152 */
153 struct msi_desc_data {
154 union msi_domain_cookie dcookie;
155 union msi_instance_cookie icookie;
156 };
157
158 #define MSI_MAX_INDEX ((unsigned int)USHRT_MAX)
159
160 /**
161 * struct msi_desc - Descriptor structure for MSI based interrupts
162 * @irq: The base interrupt number
163 * @nvec_used: The number of vectors used
164 * @dev: Pointer to the device which uses this descriptor
165 * @msg: The last set MSI message cached for reuse
166 * @affinity: Optional pointer to a cpu affinity mask for this descriptor
167 * @iommu_msi_iova: Optional shifted IOVA from the IOMMU to override the msi_addr.
168 * Only used if iommu_msi_shift != 0
169 * @iommu_msi_shift: Indicates how many bits of the original address should be
170 * preserved when using iommu_msi_iova.
171 * @sysfs_attr: Pointer to sysfs device attribute
172 *
173 * @write_msi_msg: Callback that may be called when the MSI message
174 * address or data changes
175 * @write_msi_msg_data: Data parameter for the callback.
176 *
177 * @msi_index: Index of the msi descriptor
178 * @pci: PCI specific msi descriptor data
179 * @data: Generic MSI descriptor data
180 */
181 struct msi_desc {
182 /* Shared device/bus type independent data */
183 unsigned int irq;
184 unsigned int nvec_used;
185 struct device *dev;
186 struct msi_msg msg;
187 struct irq_affinity_desc *affinity;
188 #ifdef CONFIG_IRQ_MSI_IOMMU
189 u64 iommu_msi_iova : 58;
190 u64 iommu_msi_shift : 6;
191 #endif
192 #ifdef CONFIG_SYSFS
193 struct device_attribute *sysfs_attrs;
194 #endif
195
196 void (*write_msi_msg)(struct msi_desc *entry, void *data);
197 void *write_msi_msg_data;
198
199 u16 msi_index;
200 union {
201 struct pci_msi_desc pci;
202 struct msi_desc_data data;
203 };
204 };
205
206 /*
207 * Filter values for the MSI descriptor iterators and accessor functions.
208 */
209 enum msi_desc_filter {
210 /* All descriptors */
211 MSI_DESC_ALL,
212 /* Descriptors which have no interrupt associated */
213 MSI_DESC_NOTASSOCIATED,
214 /* Descriptors which have an interrupt associated */
215 MSI_DESC_ASSOCIATED,
216 };
217
218
219 /**
220 * struct msi_dev_domain - The internals of MSI domain info per device
221 * @store: Xarray for storing MSI descriptor pointers
222 * @irqdomain: Pointer to a per device interrupt domain
223 */
224 struct msi_dev_domain {
225 struct xarray store;
226 struct irq_domain *domain;
227 };
228
229 int msi_setup_device_data(struct device *dev);
230
231 void __msi_lock_descs(struct device *dev);
232 void __msi_unlock_descs(struct device *dev);
233
234 DEFINE_LOCK_GUARD_1(msi_descs_lock, struct device, __msi_lock_descs(_T->lock),
235 __msi_unlock_descs(_T->lock));
236
237 struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid,
238 enum msi_desc_filter filter);
239
240 /**
241 * msi_first_desc - Get the first MSI descriptor of the default irqdomain
242 * @dev: Device to operate on
243 * @filter: Descriptor state filter
244 *
245 * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs()
246 * must be invoked before the call.
247 *
248 * Return: Pointer to the first MSI descriptor matching the search
249 * criteria, NULL if none found.
250 */
msi_first_desc(struct device * dev,enum msi_desc_filter filter)251 static inline struct msi_desc *msi_first_desc(struct device *dev,
252 enum msi_desc_filter filter)
253 {
254 return msi_domain_first_desc(dev, MSI_DEFAULT_DOMAIN, filter);
255 }
256
257 struct msi_desc *msi_next_desc(struct device *dev, unsigned int domid,
258 enum msi_desc_filter filter);
259
260 /**
261 * msi_domain_for_each_desc - Iterate the MSI descriptors in a specific domain
262 *
263 * @desc: struct msi_desc pointer used as iterator
264 * @dev: struct device pointer - device to iterate
265 * @domid: The id of the interrupt domain which should be walked.
266 * @filter: Filter for descriptor selection
267 *
268 * Notes:
269 * - The loop must be protected with a msi_lock_descs()/msi_unlock_descs()
270 * pair.
271 * - It is safe to remove a retrieved MSI descriptor in the loop.
272 */
273 #define msi_domain_for_each_desc(desc, dev, domid, filter) \
274 for ((desc) = msi_domain_first_desc((dev), (domid), (filter)); (desc); \
275 (desc) = msi_next_desc((dev), (domid), (filter)))
276
277 /**
278 * msi_for_each_desc - Iterate the MSI descriptors in the default irqdomain
279 *
280 * @desc: struct msi_desc pointer used as iterator
281 * @dev: struct device pointer - device to iterate
282 * @filter: Filter for descriptor selection
283 *
284 * Notes:
285 * - The loop must be protected with a msi_lock_descs()/msi_unlock_descs()
286 * pair.
287 * - It is safe to remove a retrieved MSI descriptor in the loop.
288 */
289 #define msi_for_each_desc(desc, dev, filter) \
290 msi_domain_for_each_desc((desc), (dev), MSI_DEFAULT_DOMAIN, (filter))
291
292 #define msi_desc_to_dev(desc) ((desc)->dev)
293
msi_desc_set_iommu_msi_iova(struct msi_desc * desc,u64 msi_iova,unsigned int msi_shift)294 static inline void msi_desc_set_iommu_msi_iova(struct msi_desc *desc, u64 msi_iova,
295 unsigned int msi_shift)
296 {
297 #ifdef CONFIG_IRQ_MSI_IOMMU
298 desc->iommu_msi_iova = msi_iova >> msi_shift;
299 desc->iommu_msi_shift = msi_shift;
300 #endif
301 }
302
303 /**
304 * msi_msg_set_addr() - Set MSI address in an MSI message
305 *
306 * @desc: MSI descriptor that may carry an IOVA base address for MSI via @iommu_msi_iova/shift
307 * @msg: Target MSI message to set its address_hi and address_lo
308 * @msi_addr: Physical address to set the MSI message
309 *
310 * Notes:
311 * - Override @msi_addr using the IOVA base address in the @desc if @iommu_msi_shift is set
312 * - Otherwise, simply set @msi_addr to @msg
313 */
msi_msg_set_addr(struct msi_desc * desc,struct msi_msg * msg,phys_addr_t msi_addr)314 static inline void msi_msg_set_addr(struct msi_desc *desc, struct msi_msg *msg,
315 phys_addr_t msi_addr)
316 {
317 #ifdef CONFIG_IRQ_MSI_IOMMU
318 if (desc->iommu_msi_shift) {
319 u64 msi_iova = desc->iommu_msi_iova << desc->iommu_msi_shift;
320
321 msg->address_hi = upper_32_bits(msi_iova);
322 msg->address_lo = lower_32_bits(msi_iova) |
323 (msi_addr & ((1 << desc->iommu_msi_shift) - 1));
324 return;
325 }
326 #endif
327 msg->address_hi = upper_32_bits(msi_addr);
328 msg->address_lo = lower_32_bits(msi_addr);
329 }
330
331 int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid,
332 struct msi_desc *init_desc);
333 /**
334 * msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the
335 * default irqdomain and insert it at @init_desc->msi_index
336 * @dev: Pointer to the device for which the descriptor is allocated
337 * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor
338 *
339 * Return: 0 on success or an appropriate failure code.
340 */
msi_insert_msi_desc(struct device * dev,struct msi_desc * init_desc)341 static inline int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc)
342 {
343 return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc);
344 }
345
346 void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid,
347 unsigned int first, unsigned int last);
348
349 /**
350 * msi_free_msi_descs_range - Free a range of MSI descriptors of a device
351 * in the default irqdomain
352 *
353 * @dev: Device for which to free the descriptors
354 * @first: Index to start freeing from (inclusive)
355 * @last: Last index to be freed (inclusive)
356 */
msi_free_msi_descs_range(struct device * dev,unsigned int first,unsigned int last)357 static inline void msi_free_msi_descs_range(struct device *dev, unsigned int first,
358 unsigned int last)
359 {
360 msi_domain_free_msi_descs_range(dev, MSI_DEFAULT_DOMAIN, first, last);
361 }
362
363 /**
364 * msi_free_msi_descs - Free all MSI descriptors of a device in the default irqdomain
365 * @dev: Device to free the descriptors
366 */
msi_free_msi_descs(struct device * dev)367 static inline void msi_free_msi_descs(struct device *dev)
368 {
369 msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX);
370 }
371
372 /*
373 * The arch hooks to setup up msi irqs. Default functions are implemented
374 * as weak symbols so that they /can/ be overriden by architecture specific
375 * code if needed. These hooks can only be enabled by the architecture.
376 *
377 * If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by
378 * stubs with warnings.
379 */
380 #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
381 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
382 void arch_teardown_msi_irq(unsigned int irq);
383 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
384 void arch_teardown_msi_irqs(struct pci_dev *dev);
385 #endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */
386
387 /*
388 * Xen uses non-default msi_domain_ops and hence needs a way to populate sysfs
389 * entries of MSI IRQs.
390 */
391 #if defined(CONFIG_PCI_XEN) || defined(CONFIG_PCI_MSI_ARCH_FALLBACKS)
392 #ifdef CONFIG_SYSFS
393 int msi_device_populate_sysfs(struct device *dev);
394 void msi_device_destroy_sysfs(struct device *dev);
395 #else /* CONFIG_SYSFS */
msi_device_populate_sysfs(struct device * dev)396 static inline int msi_device_populate_sysfs(struct device *dev) { return 0; }
msi_device_destroy_sysfs(struct device * dev)397 static inline void msi_device_destroy_sysfs(struct device *dev) { }
398 #endif /* !CONFIG_SYSFS */
399 #endif /* CONFIG_PCI_XEN || CONFIG_PCI_MSI_ARCH_FALLBACKS */
400
401 /*
402 * The restore hook is still available even for fully irq domain based
403 * setups. Courtesy to XEN/X86.
404 */
405 bool arch_restore_msi_irqs(struct pci_dev *dev);
406
407 #ifdef CONFIG_GENERIC_MSI_IRQ
408
409 #include <linux/irqhandler.h>
410
411 struct irq_domain;
412 struct irq_domain_ops;
413 struct irq_chip;
414 struct irq_fwspec;
415 struct device_node;
416 struct fwnode_handle;
417 struct msi_domain_info;
418
419 /**
420 * struct msi_domain_ops - MSI interrupt domain callbacks
421 * @get_hwirq: Retrieve the resulting hw irq number
422 * @msi_init: Domain specific init function for MSI interrupts
423 * @msi_free: Domain specific function to free a MSI interrupts
424 * @msi_prepare: Prepare the allocation of the interrupts in the domain
425 * @prepare_desc: Optional function to prepare the allocated MSI descriptor
426 * in the domain
427 * @set_desc: Set the msi descriptor for an interrupt
428 * @domain_alloc_irqs: Optional function to override the default allocation
429 * function.
430 * @domain_free_irqs: Optional function to override the default free
431 * function.
432 * @msi_post_free: Optional function which is invoked after freeing
433 * all interrupts.
434 * @msi_translate: Optional translate callback to support the odd wire to
435 * MSI bridges, e.g. MBIGEN
436 *
437 * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying
438 * irqdomain.
439 *
440 * @msi_check, @msi_prepare, @prepare_desc and @set_desc are callbacks used by the
441 * msi_domain_alloc/free_irqs*() variants.
442 *
443 * @domain_alloc_irqs, @domain_free_irqs can be used to override the
444 * default allocation/free functions (__msi_domain_alloc/free_irqs). This
445 * is initially for a wrapper around XENs seperate MSI universe which can't
446 * be wrapped into the regular irq domains concepts by mere mortals. This
447 * allows to universally use msi_domain_alloc/free_irqs without having to
448 * special case XEN all over the place.
449 */
450 struct msi_domain_ops {
451 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
452 msi_alloc_info_t *arg);
453 int (*msi_init)(struct irq_domain *domain,
454 struct msi_domain_info *info,
455 unsigned int virq, irq_hw_number_t hwirq,
456 msi_alloc_info_t *arg);
457 void (*msi_free)(struct irq_domain *domain,
458 struct msi_domain_info *info,
459 unsigned int virq);
460 int (*msi_prepare)(struct irq_domain *domain,
461 struct device *dev, int nvec,
462 msi_alloc_info_t *arg);
463 void (*prepare_desc)(struct irq_domain *domain, msi_alloc_info_t *arg,
464 struct msi_desc *desc);
465 void (*set_desc)(msi_alloc_info_t *arg,
466 struct msi_desc *desc);
467 int (*domain_alloc_irqs)(struct irq_domain *domain,
468 struct device *dev, int nvec);
469 void (*domain_free_irqs)(struct irq_domain *domain,
470 struct device *dev);
471 void (*msi_post_free)(struct irq_domain *domain,
472 struct device *dev);
473 int (*msi_translate)(struct irq_domain *domain, struct irq_fwspec *fwspec,
474 irq_hw_number_t *hwirq, unsigned int *type);
475 };
476
477 /**
478 * struct msi_domain_info - MSI interrupt domain data
479 * @flags: Flags to decribe features and capabilities
480 * @bus_token: The domain bus token
481 * @hwsize: The hardware table size or the software index limit.
482 * If 0 then the size is considered unlimited and
483 * gets initialized to the maximum software index limit
484 * by the domain creation code.
485 * @ops: The callback data structure
486 * @chip: Optional: associated interrupt chip
487 * @chip_data: Optional: associated interrupt chip data
488 * @handler: Optional: associated interrupt flow handler
489 * @handler_data: Optional: associated interrupt flow handler data
490 * @handler_name: Optional: associated interrupt flow handler name
491 * @data: Optional: domain specific data
492 */
493 struct msi_domain_info {
494 u32 flags;
495 enum irq_domain_bus_token bus_token;
496 unsigned int hwsize;
497 struct msi_domain_ops *ops;
498 struct irq_chip *chip;
499 void *chip_data;
500 irq_flow_handler_t handler;
501 void *handler_data;
502 const char *handler_name;
503 void *data;
504 };
505
506 /**
507 * struct msi_domain_template - Template for MSI device domains
508 * @name: Storage for the resulting name. Filled in by the core.
509 * @chip: Interrupt chip for this domain
510 * @ops: MSI domain ops
511 * @info: MSI domain info data
512 */
513 struct msi_domain_template {
514 char name[48];
515 struct irq_chip chip;
516 struct msi_domain_ops ops;
517 struct msi_domain_info info;
518 };
519
520 /*
521 * Flags for msi_domain_info
522 *
523 * Bit 0-15: Generic MSI functionality which is not subject to restriction
524 * by parent domains
525 *
526 * Bit 16-31: Functionality which depends on the underlying parent domain and
527 * can be masked out by msi_parent_ops::init_dev_msi_info() when
528 * a device MSI domain is initialized.
529 */
530 enum {
531 /*
532 * Init non implemented ops callbacks with default MSI domain
533 * callbacks.
534 */
535 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
536 /*
537 * Init non implemented chip callbacks with default MSI chip
538 * callbacks.
539 */
540 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
541 /* Needs early activate, required for PCI */
542 MSI_FLAG_ACTIVATE_EARLY = (1 << 2),
543 /*
544 * Must reactivate when irq is started even when
545 * MSI_FLAG_ACTIVATE_EARLY has been set.
546 */
547 MSI_FLAG_MUST_REACTIVATE = (1 << 3),
548 /* Populate sysfs on alloc() and destroy it on free() */
549 MSI_FLAG_DEV_SYSFS = (1 << 4),
550 /* Allocate simple MSI descriptors */
551 MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS = (1 << 5),
552 /* Free MSI descriptors */
553 MSI_FLAG_FREE_MSI_DESCS = (1 << 6),
554 /* Use dev->fwnode for MSI device domain creation */
555 MSI_FLAG_USE_DEV_FWNODE = (1 << 7),
556 /* Set parent->dev into domain->pm_dev on device domain creation */
557 MSI_FLAG_PARENT_PM_DEV = (1 << 8),
558 /* Support for parent mask/unmask */
559 MSI_FLAG_PCI_MSI_MASK_PARENT = (1 << 9),
560
561 /* Mask for the generic functionality */
562 MSI_GENERIC_FLAGS_MASK = GENMASK(15, 0),
563
564 /* Mask for the domain specific functionality */
565 MSI_DOMAIN_FLAGS_MASK = GENMASK(31, 16),
566
567 /* Support multiple PCI MSI interrupts */
568 MSI_FLAG_MULTI_PCI_MSI = (1 << 16),
569 /* Support PCI MSIX interrupts */
570 MSI_FLAG_PCI_MSIX = (1 << 17),
571 /* Is level-triggered capable, using two messages */
572 MSI_FLAG_LEVEL_CAPABLE = (1 << 18),
573 /* MSI-X entries must be contiguous */
574 MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19),
575 /* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */
576 MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20),
577 /* PCI MSIs cannot be steered separately to CPU cores */
578 MSI_FLAG_NO_AFFINITY = (1 << 21),
579 /* Inhibit usage of entry masking */
580 MSI_FLAG_NO_MASK = (1 << 22),
581 };
582
583 /*
584 * Flags for msi_parent_ops::chip_flags
585 */
586 enum {
587 MSI_CHIP_FLAG_SET_EOI = (1 << 0),
588 MSI_CHIP_FLAG_SET_ACK = (1 << 1),
589 };
590
591 /**
592 * struct msi_parent_ops - MSI parent domain callbacks and configuration info
593 *
594 * @supported_flags: Required: The supported MSI flags of the parent domain
595 * @required_flags: Optional: The required MSI flags of the parent MSI domain
596 * @chip_flags: Optional: Select MSI chip callbacks to update with defaults
597 * in msi_lib_init_dev_msi_info().
598 * @bus_select_token: Optional: The bus token of the real parent domain for
599 * irq_domain::select()
600 * @bus_select_mask: Optional: A mask of supported BUS_DOMAINs for
601 * irq_domain::select()
602 * @prefix: Optional: Prefix for the domain and chip name
603 * @init_dev_msi_info: Required: Callback for MSI parent domains to setup parent
604 * domain specific domain flags, domain ops and interrupt chip
605 * callbacks when a per device domain is created.
606 */
607 struct msi_parent_ops {
608 u32 supported_flags;
609 u32 required_flags;
610 u32 chip_flags;
611 u32 bus_select_token;
612 u32 bus_select_mask;
613 const char *prefix;
614 bool (*init_dev_msi_info)(struct device *dev, struct irq_domain *domain,
615 struct irq_domain *msi_parent_domain,
616 struct msi_domain_info *msi_child_info);
617 };
618
619 bool msi_parent_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
620 struct irq_domain *msi_parent_domain,
621 struct msi_domain_info *msi_child_info);
622
623 int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
624 bool force);
625
626 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
627 struct msi_domain_info *info,
628 struct irq_domain *parent);
629
630 bool msi_create_device_irq_domain(struct device *dev, unsigned int domid,
631 const struct msi_domain_template *template,
632 unsigned int hwsize, void *domain_data,
633 void *chip_data);
634 void msi_remove_device_irq_domain(struct device *dev, unsigned int domid);
635
636 bool msi_match_device_irq_domain(struct device *dev, unsigned int domid,
637 enum irq_domain_bus_token bus_token);
638
639 int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid,
640 unsigned int first, unsigned int last);
641 int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs);
642
643 struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, unsigned int index,
644 const struct irq_affinity_desc *affdesc,
645 union msi_instance_cookie *cookie);
646
647 void msi_domain_free_irqs_range(struct device *dev, unsigned int domid,
648 unsigned int first, unsigned int last);
649 void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid);
650 void msi_domain_free_irqs_all(struct device *dev, unsigned int domid);
651
652 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
653
654 /* Per device platform MSI */
655 int platform_device_msi_init_and_alloc_irqs(struct device *dev, unsigned int nvec,
656 irq_write_msi_msg_t write_msi_msg);
657 void platform_device_msi_free_irqs_all(struct device *dev);
658
659 bool msi_device_has_isolated_msi(struct device *dev);
660
msi_domain_alloc_irqs(struct device * dev,unsigned int domid,int nirqs)661 static inline int msi_domain_alloc_irqs(struct device *dev, unsigned int domid, int nirqs)
662 {
663 return msi_domain_alloc_irqs_range(dev, domid, 0, nirqs - 1);
664 }
665
666 #else /* CONFIG_GENERIC_MSI_IRQ */
msi_device_has_isolated_msi(struct device * dev)667 static inline bool msi_device_has_isolated_msi(struct device *dev)
668 {
669 /*
670 * Arguably if the platform does not enable MSI support then it has
671 * "isolated MSI", as an interrupt controller that cannot receive MSIs
672 * is inherently isolated by our definition. The default definition for
673 * arch_is_isolated_msi() is conservative and returns false anyhow.
674 */
675 return arch_is_isolated_msi();
676 }
677 #endif /* CONFIG_GENERIC_MSI_IRQ */
678
679 /* PCI specific interfaces */
680 #ifdef CONFIG_PCI_MSI
681 struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
682 void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
683 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
684 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
685 void pci_msi_mask_irq(struct irq_data *data);
686 void pci_msi_unmask_irq(struct irq_data *data);
687 struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
688 struct msi_domain_info *info,
689 struct irq_domain *parent);
690 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
691 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
692 #else /* CONFIG_PCI_MSI */
pci_msi_get_device_domain(struct pci_dev * pdev)693 static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
694 {
695 return NULL;
696 }
pci_write_msi_msg(unsigned int irq,struct msi_msg * msg)697 static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) { }
698 #endif /* !CONFIG_PCI_MSI */
699
700 #endif /* LINUX_MSI_H */
701