1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Regular cardbus driver ("yenta_socket")
4 *
5 * (C) Copyright 1999, 2000 Linus Torvalds
6 *
7 * Changelog:
8 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
9 * Dynamically adjust the size of the bridge resource
10 *
11 * May 2003: Dominik Brodowski <linux@brodo.de>
12 * Merge pci_socket.c and yenta.c into one file
13 */
14 #include <linux/init.h>
15 #include <linux/pci.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20 #include <linux/io.h>
21 #include <linux/slab.h>
22
23 #include <pcmcia/ss.h>
24
25 #include "yenta_socket.h"
26 #include "i82365.h"
27
28 static bool disable_clkrun;
29 module_param(disable_clkrun, bool, 0444);
30 MODULE_PARM_DESC(disable_clkrun,
31 "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)");
32
33 static bool isa_probe = 1;
34 module_param(isa_probe, bool, 0444);
35 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
36
37 static bool pwr_irqs_off;
38 module_param(pwr_irqs_off, bool, 0644);
39 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
40
41 static char o2_speedup[] = "default";
42 module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
43 MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
44 "or 'default' (uses recommended behaviour for the detected bridge)");
45
46 /*
47 * Only probe "regular" interrupts, don't
48 * touch dangerous spots like the mouse irq,
49 * because there are mice that apparently
50 * get really confused if they get fondled
51 * too intimately.
52 *
53 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
54 */
55 static u32 isa_interrupts = 0x0ef8;
56
57
58 #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
59
60 /* Don't ask.. */
61 #define to_cycles(ns) ((ns)/120)
62 #define to_ns(cycles) ((cycles)*120)
63
64 /*
65 * yenta PCI irq probing.
66 * currently only used in the TI/EnE initialization code
67 */
68 #ifdef CONFIG_YENTA_TI
69 static int yenta_probe_cb_irq(struct yenta_socket *socket);
70 static unsigned int yenta_probe_irq(struct yenta_socket *socket,
71 u32 isa_irq_mask);
72 #endif
73
74
75 static unsigned int override_bios;
76 module_param(override_bios, uint, 0000);
77 MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
78
79 /*
80 * Generate easy-to-use ways of reading a cardbus sockets
81 * regular memory space ("cb_xxx"), configuration space
82 * ("config_xxx") and compatibility space ("exca_xxxx")
83 */
cb_readl(struct yenta_socket * socket,unsigned reg)84 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
85 {
86 u32 val = readl(socket->base + reg);
87 debug("%04x %08x\n", socket, reg, val);
88 return val;
89 }
90
cb_writel(struct yenta_socket * socket,unsigned reg,u32 val)91 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
92 {
93 debug("%04x %08x\n", socket, reg, val);
94 writel(val, socket->base + reg);
95 readl(socket->base + reg); /* avoid problems with PCI write posting */
96 }
97
config_readb(struct yenta_socket * socket,unsigned offset)98 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
99 {
100 u8 val;
101 pci_read_config_byte(socket->dev, offset, &val);
102 debug("%04x %02x\n", socket, offset, val);
103 return val;
104 }
105
config_readw(struct yenta_socket * socket,unsigned offset)106 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
107 {
108 u16 val;
109 pci_read_config_word(socket->dev, offset, &val);
110 debug("%04x %04x\n", socket, offset, val);
111 return val;
112 }
113
config_readl(struct yenta_socket * socket,unsigned offset)114 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
115 {
116 u32 val;
117 pci_read_config_dword(socket->dev, offset, &val);
118 debug("%04x %08x\n", socket, offset, val);
119 return val;
120 }
121
config_writeb(struct yenta_socket * socket,unsigned offset,u8 val)122 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
123 {
124 debug("%04x %02x\n", socket, offset, val);
125 pci_write_config_byte(socket->dev, offset, val);
126 }
127
config_writew(struct yenta_socket * socket,unsigned offset,u16 val)128 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
129 {
130 debug("%04x %04x\n", socket, offset, val);
131 pci_write_config_word(socket->dev, offset, val);
132 }
133
config_writel(struct yenta_socket * socket,unsigned offset,u32 val)134 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
135 {
136 debug("%04x %08x\n", socket, offset, val);
137 pci_write_config_dword(socket->dev, offset, val);
138 }
139
exca_readb(struct yenta_socket * socket,unsigned reg)140 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
141 {
142 u8 val = readb(socket->base + 0x800 + reg);
143 debug("%04x %02x\n", socket, reg, val);
144 return val;
145 }
146
147 /*
148 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
149 {
150 u16 val;
151 val = readb(socket->base + 0x800 + reg);
152 val |= readb(socket->base + 0x800 + reg + 1) << 8;
153 debug("%04x %04x\n", socket, reg, val);
154 return val;
155 }
156 */
157
exca_writeb(struct yenta_socket * socket,unsigned reg,u8 val)158 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
159 {
160 debug("%04x %02x\n", socket, reg, val);
161 writeb(val, socket->base + 0x800 + reg);
162 readb(socket->base + 0x800 + reg); /* PCI write posting... */
163 }
164
exca_writew(struct yenta_socket * socket,unsigned reg,u16 val)165 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
166 {
167 debug("%04x %04x\n", socket, reg, val);
168 writeb(val, socket->base + 0x800 + reg);
169 writeb(val >> 8, socket->base + 0x800 + reg + 1);
170
171 /* PCI write posting... */
172 readb(socket->base + 0x800 + reg);
173 readb(socket->base + 0x800 + reg + 1);
174 }
175
show_yenta_registers(struct device * yentadev,struct device_attribute * attr,char * buf)176 static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
177 {
178 struct yenta_socket *socket = dev_get_drvdata(yentadev);
179 int offset = 0, i;
180
181 offset = sysfs_emit(buf, "CB registers:");
182 for (i = 0; i < 0x24; i += 4) {
183 unsigned val;
184 if (!(i & 15))
185 offset += sysfs_emit_at(buf, offset, "\n%02x:", i);
186 val = cb_readl(socket, i);
187 offset += sysfs_emit_at(buf, offset, " %08x", val);
188 }
189
190 offset += sysfs_emit_at(buf, offset, "\n\nExCA registers:");
191 for (i = 0; i < 0x45; i++) {
192 unsigned char val;
193 if (!(i & 7)) {
194 if (i & 8) {
195 memcpy(buf + offset, " -", 2);
196 offset += 2;
197 } else
198 offset += sysfs_emit_at(buf, offset, "\n%02x:", i);
199 }
200 val = exca_readb(socket, i);
201 offset += sysfs_emit_at(buf, offset, " %02x", val);
202 }
203 sysfs_emit_at(buf, offset, "\n");
204 return offset;
205 }
206
207 static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
208
209 /*
210 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
211 * on what kind of card is inserted..
212 */
yenta_get_status(struct pcmcia_socket * sock,unsigned int * value)213 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
214 {
215 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
216 unsigned int val;
217 u32 state = cb_readl(socket, CB_SOCKET_STATE);
218
219 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
220 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
221 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
222 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
223
224
225 if (state & CB_CBCARD) {
226 val |= SS_CARDBUS;
227 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
228 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
229 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
230 } else if (state & CB_16BITCARD) {
231 u8 status = exca_readb(socket, I365_STATUS);
232 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
233 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
234 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
235 } else {
236 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
237 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
238 }
239 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
240 val |= (status & I365_CS_READY) ? SS_READY : 0;
241 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
242 }
243
244 *value = val;
245 return 0;
246 }
247
yenta_set_power(struct yenta_socket * socket,socket_state_t * state)248 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
249 {
250 /* some birdges require to use the ExCA registers to power 16bit cards */
251 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
252 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
253 u8 reg, old;
254 reg = old = exca_readb(socket, I365_POWER);
255 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
256
257 /* i82365SL-DF style */
258 if (socket->flags & YENTA_16BIT_POWER_DF) {
259 switch (state->Vcc) {
260 case 33:
261 reg |= I365_VCC_3V;
262 break;
263 case 50:
264 reg |= I365_VCC_5V;
265 break;
266 default:
267 reg = 0;
268 break;
269 }
270 switch (state->Vpp) {
271 case 33:
272 case 50:
273 reg |= I365_VPP1_5V;
274 break;
275 case 120:
276 reg |= I365_VPP1_12V;
277 break;
278 }
279 } else {
280 /* i82365SL-B style */
281 switch (state->Vcc) {
282 case 50:
283 reg |= I365_VCC_5V;
284 break;
285 default:
286 reg = 0;
287 break;
288 }
289 switch (state->Vpp) {
290 case 50:
291 reg |= I365_VPP1_5V | I365_VPP2_5V;
292 break;
293 case 120:
294 reg |= I365_VPP1_12V | I365_VPP2_12V;
295 break;
296 }
297 }
298
299 if (reg != old)
300 exca_writeb(socket, I365_POWER, reg);
301 } else {
302 u32 reg = 0; /* CB_SC_STPCLK? */
303 switch (state->Vcc) {
304 case 33:
305 reg = CB_SC_VCC_3V;
306 break;
307 case 50:
308 reg = CB_SC_VCC_5V;
309 break;
310 default:
311 reg = 0;
312 break;
313 }
314 switch (state->Vpp) {
315 case 33:
316 reg |= CB_SC_VPP_3V;
317 break;
318 case 50:
319 reg |= CB_SC_VPP_5V;
320 break;
321 case 120:
322 reg |= CB_SC_VPP_12V;
323 break;
324 }
325 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
326 cb_writel(socket, CB_SOCKET_CONTROL, reg);
327 }
328 }
329
yenta_set_socket(struct pcmcia_socket * sock,socket_state_t * state)330 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
331 {
332 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
333 u16 bridge;
334
335 /* if powering down: do it immediately */
336 if (state->Vcc == 0)
337 yenta_set_power(socket, state);
338
339 socket->io_irq = state->io_irq;
340 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
341 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
342 u8 intr;
343 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
344
345 /* ISA interrupt control? */
346 intr = exca_readb(socket, I365_INTCTL);
347 intr = (intr & ~0xf);
348 if (!socket->dev->irq) {
349 intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
350 bridge |= CB_BRIDGE_INTR;
351 }
352 exca_writeb(socket, I365_INTCTL, intr);
353 } else {
354 u8 reg;
355
356 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
357 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
358 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
359 if (state->io_irq != socket->dev->irq) {
360 reg |= state->io_irq;
361 bridge |= CB_BRIDGE_INTR;
362 }
363 exca_writeb(socket, I365_INTCTL, reg);
364
365 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
366 reg |= I365_PWR_NORESET;
367 if (state->flags & SS_PWR_AUTO)
368 reg |= I365_PWR_AUTO;
369 if (state->flags & SS_OUTPUT_ENA)
370 reg |= I365_PWR_OUT;
371 if (exca_readb(socket, I365_POWER) != reg)
372 exca_writeb(socket, I365_POWER, reg);
373
374 /* CSC interrupt: no ISA irq for CSC */
375 reg = exca_readb(socket, I365_CSCINT);
376 reg &= I365_CSC_IRQ_MASK;
377 reg |= I365_CSC_DETECT;
378 if (state->flags & SS_IOCARD) {
379 if (state->csc_mask & SS_STSCHG)
380 reg |= I365_CSC_STSCHG;
381 } else {
382 if (state->csc_mask & SS_BATDEAD)
383 reg |= I365_CSC_BVD1;
384 if (state->csc_mask & SS_BATWARN)
385 reg |= I365_CSC_BVD2;
386 if (state->csc_mask & SS_READY)
387 reg |= I365_CSC_READY;
388 }
389 exca_writeb(socket, I365_CSCINT, reg);
390 exca_readb(socket, I365_CSC);
391 if (sock->zoom_video)
392 sock->zoom_video(sock, state->flags & SS_ZVCARD);
393 }
394 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
395 /* Socket event mask: get card insert/remove events.. */
396 cb_writel(socket, CB_SOCKET_EVENT, -1);
397 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
398
399 /* if powering up: do it as the last step when the socket is configured */
400 if (state->Vcc != 0)
401 yenta_set_power(socket, state);
402 return 0;
403 }
404
yenta_set_io_map(struct pcmcia_socket * sock,struct pccard_io_map * io)405 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
406 {
407 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
408 int map;
409 unsigned char ioctl, addr, enable;
410
411 map = io->map;
412
413 if (map > 1)
414 return -EINVAL;
415
416 enable = I365_ENA_IO(map);
417 addr = exca_readb(socket, I365_ADDRWIN);
418
419 /* Disable the window before changing it.. */
420 if (addr & enable) {
421 addr &= ~enable;
422 exca_writeb(socket, I365_ADDRWIN, addr);
423 }
424
425 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
426 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
427
428 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
429 if (io->flags & MAP_0WS)
430 ioctl |= I365_IOCTL_0WS(map);
431 if (io->flags & MAP_16BIT)
432 ioctl |= I365_IOCTL_16BIT(map);
433 if (io->flags & MAP_AUTOSZ)
434 ioctl |= I365_IOCTL_IOCS16(map);
435 exca_writeb(socket, I365_IOCTL, ioctl);
436
437 if (io->flags & MAP_ACTIVE)
438 exca_writeb(socket, I365_ADDRWIN, addr | enable);
439 return 0;
440 }
441
yenta_set_mem_map(struct pcmcia_socket * sock,struct pccard_mem_map * mem)442 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
443 {
444 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
445 struct pci_bus_region region;
446 int map;
447 unsigned char addr, enable;
448 unsigned int start, stop, card_start;
449 unsigned short word;
450
451 pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res);
452
453 map = mem->map;
454 start = region.start;
455 stop = region.end;
456 card_start = mem->card_start;
457
458 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
459 (card_start >> 26) || mem->speed > 1000)
460 return -EINVAL;
461
462 enable = I365_ENA_MEM(map);
463 addr = exca_readb(socket, I365_ADDRWIN);
464 if (addr & enable) {
465 addr &= ~enable;
466 exca_writeb(socket, I365_ADDRWIN, addr);
467 }
468
469 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
470
471 word = (start >> 12) & 0x0fff;
472 if (mem->flags & MAP_16BIT)
473 word |= I365_MEM_16BIT;
474 if (mem->flags & MAP_0WS)
475 word |= I365_MEM_0WS;
476 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
477
478 word = (stop >> 12) & 0x0fff;
479 switch (to_cycles(mem->speed)) {
480 case 0:
481 break;
482 case 1:
483 word |= I365_MEM_WS0;
484 break;
485 case 2:
486 word |= I365_MEM_WS1;
487 break;
488 default:
489 word |= I365_MEM_WS1 | I365_MEM_WS0;
490 break;
491 }
492 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
493
494 word = ((card_start - start) >> 12) & 0x3fff;
495 if (mem->flags & MAP_WRPROT)
496 word |= I365_MEM_WRPROT;
497 if (mem->flags & MAP_ATTRIB)
498 word |= I365_MEM_REG;
499 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
500
501 if (mem->flags & MAP_ACTIVE)
502 exca_writeb(socket, I365_ADDRWIN, addr | enable);
503 return 0;
504 }
505
506
507
yenta_interrupt(int irq,void * dev_id)508 static irqreturn_t yenta_interrupt(int irq, void *dev_id)
509 {
510 unsigned int events;
511 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
512 u8 csc;
513 u32 cb_event;
514
515 /* Clear interrupt status for the event */
516 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
517 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
518
519 csc = exca_readb(socket, I365_CSC);
520
521 if (!(cb_event || csc))
522 return IRQ_NONE;
523
524 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
525 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
526 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
527 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
528 } else {
529 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
530 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
531 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
532 }
533
534 if (events)
535 pcmcia_parse_events(&socket->socket, events);
536
537 return IRQ_HANDLED;
538 }
539
yenta_interrupt_wrapper(struct timer_list * t)540 static void yenta_interrupt_wrapper(struct timer_list *t)
541 {
542 struct yenta_socket *socket = timer_container_of(socket, t,
543 poll_timer);
544
545 yenta_interrupt(0, (void *)socket);
546 socket->poll_timer.expires = jiffies + HZ;
547 add_timer(&socket->poll_timer);
548 }
549
yenta_clear_maps(struct yenta_socket * socket)550 static void yenta_clear_maps(struct yenta_socket *socket)
551 {
552 int i;
553 struct resource res = { .start = 0, .end = 0x0fff };
554 pccard_io_map io = { 0, 0, 0, 0, 1 };
555 pccard_mem_map mem = { .res = &res, };
556
557 yenta_set_socket(&socket->socket, &dead_socket);
558 for (i = 0; i < 2; i++) {
559 io.map = i;
560 yenta_set_io_map(&socket->socket, &io);
561 }
562 for (i = 0; i < 5; i++) {
563 mem.map = i;
564 yenta_set_mem_map(&socket->socket, &mem);
565 }
566 }
567
568 /* redoes voltage interrogation if required */
yenta_interrogate(struct yenta_socket * socket)569 static void yenta_interrogate(struct yenta_socket *socket)
570 {
571 u32 state;
572
573 state = cb_readl(socket, CB_SOCKET_STATE);
574 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
575 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
576 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
577 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
578 }
579
580 /* Called at resume and initialization events */
yenta_sock_init(struct pcmcia_socket * sock)581 static int yenta_sock_init(struct pcmcia_socket *sock)
582 {
583 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
584
585 exca_writeb(socket, I365_GBLCTL, 0x00);
586 exca_writeb(socket, I365_GENCTL, 0x00);
587
588 /* Redo card voltage interrogation */
589 yenta_interrogate(socket);
590
591 yenta_clear_maps(socket);
592
593 if (socket->type && socket->type->sock_init)
594 socket->type->sock_init(socket);
595
596 /* Re-enable CSC interrupts */
597 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
598
599 return 0;
600 }
601
yenta_sock_suspend(struct pcmcia_socket * sock)602 static int yenta_sock_suspend(struct pcmcia_socket *sock)
603 {
604 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
605
606 /* Disable CSC interrupts */
607 cb_writel(socket, CB_SOCKET_MASK, 0x0);
608
609 return 0;
610 }
611
612 /*
613 * Use an adaptive allocation for the memory resource,
614 * sometimes the memory behind pci bridges is limited:
615 * 1/8 of the size of the io window of the parent.
616 * max 4 MB, min 16 kB. We try very hard to not get below
617 * the "ACC" values, though.
618 */
619 #define BRIDGE_MEM_MAX (4*1024*1024)
620 #define BRIDGE_MEM_ACC (128*1024)
621 #define BRIDGE_MEM_MIN (16*1024)
622
623 #define BRIDGE_IO_MAX 512
624 #define BRIDGE_IO_ACC 256
625 #define BRIDGE_IO_MIN 32
626
627 #ifndef PCIBIOS_MIN_CARDBUS_IO
628 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
629 #endif
630
yenta_search_one_res(struct resource * root,struct resource * res,u32 min)631 static int yenta_search_one_res(struct resource *root, struct resource *res,
632 u32 min)
633 {
634 u32 align, size, start, end;
635
636 if (res->flags & IORESOURCE_IO) {
637 align = 1024;
638 size = BRIDGE_IO_MAX;
639 start = PCIBIOS_MIN_CARDBUS_IO;
640 end = ~0U;
641 } else {
642 unsigned long avail = resource_size(root);
643 int i;
644 size = BRIDGE_MEM_MAX;
645 if (size > (avail - 1) / 8) {
646 size = avail / 8;
647 /* round size down to next power of 2 */
648 i = 0;
649 while ((size /= 2) != 0)
650 i++;
651 size = 1 << i;
652 }
653 if (size < min)
654 size = min;
655 align = size;
656 start = PCIBIOS_MIN_MEM;
657 end = ~0U;
658 }
659
660 do {
661 if (allocate_resource(root, res, size, start, end, align,
662 NULL, NULL) == 0) {
663 return 1;
664 }
665 size = size/2;
666 align = size;
667 } while (size >= min);
668
669 return 0;
670 }
671
672
yenta_search_res(struct yenta_socket * socket,struct resource * res,u32 min)673 static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
674 u32 min)
675 {
676 struct resource *root;
677 int i;
678
679 pci_bus_for_each_resource(socket->dev->bus, root, i) {
680 if (!root)
681 continue;
682
683 if ((res->flags ^ root->flags) &
684 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
685 continue; /* Wrong type */
686
687 if (yenta_search_one_res(root, res, min))
688 return 1;
689 }
690 return 0;
691 }
692
yenta_allocate_res(struct yenta_socket * socket,int nr,unsigned type,int addr_start,int addr_end)693 static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
694 {
695 struct pci_dev *dev = socket->dev;
696 struct resource *res;
697 struct pci_bus_region region;
698 unsigned mask;
699
700 res = &dev->resource[nr];
701 /* Already allocated? */
702 if (res->parent)
703 return 0;
704
705 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
706 mask = ~0xfff;
707 if (type & IORESOURCE_IO)
708 mask = ~3;
709
710 res->name = dev->subordinate->name;
711 res->flags = type;
712
713 region.start = config_readl(socket, addr_start) & mask;
714 region.end = config_readl(socket, addr_end) | ~mask;
715 if (region.start && region.end > region.start && !override_bios) {
716 pcibios_bus_to_resource(dev->bus, res, ®ion);
717 if (pci_claim_resource(dev, nr) == 0)
718 return 0;
719 dev_info(&dev->dev,
720 "Preassigned resource %d busy or not available, reconfiguring...\n",
721 nr);
722 }
723
724 if (type & IORESOURCE_IO) {
725 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
726 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
727 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
728 return 1;
729 } else {
730 if (type & IORESOURCE_PREFETCH) {
731 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
732 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
733 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
734 return 1;
735 /* Approximating prefetchable by non-prefetchable */
736 res->flags = IORESOURCE_MEM;
737 }
738 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
739 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
740 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
741 return 1;
742 }
743
744 dev_info(&dev->dev,
745 "no resource of type %x available, trying to continue...\n",
746 type);
747 res->start = res->end = res->flags = 0;
748 return 0;
749 }
750
yenta_free_res(struct yenta_socket * socket,int nr)751 static void yenta_free_res(struct yenta_socket *socket, int nr)
752 {
753 struct pci_dev *dev = socket->dev;
754 struct resource *res;
755
756 res = &dev->resource[nr];
757 if (res->start != 0 && res->end != 0)
758 release_resource(res);
759
760 res->start = res->end = res->flags = 0;
761 }
762
763 /*
764 * Allocate the bridge mappings for the device..
765 */
yenta_allocate_resources(struct yenta_socket * socket)766 static void yenta_allocate_resources(struct yenta_socket *socket)
767 {
768 int program = 0;
769 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
770 IORESOURCE_IO,
771 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
772 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
773 IORESOURCE_IO,
774 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
775 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
776 IORESOURCE_MEM | IORESOURCE_PREFETCH,
777 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
778 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
779 IORESOURCE_MEM,
780 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
781 if (program)
782 pci_setup_cardbus(socket->dev->subordinate);
783 }
784
785
786 /*
787 * Free the bridge mappings for the device..
788 */
yenta_free_resources(struct yenta_socket * socket)789 static void yenta_free_resources(struct yenta_socket *socket)
790 {
791 yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
792 yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
793 yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
794 yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
795 }
796
797
798 /*
799 * Close it down - release our resources and go home..
800 */
yenta_close(struct pci_dev * dev)801 static void yenta_close(struct pci_dev *dev)
802 {
803 struct yenta_socket *sock = pci_get_drvdata(dev);
804
805 /* Remove the register attributes */
806 device_remove_file(&dev->dev, &dev_attr_yenta_registers);
807
808 /* we don't want a dying socket registered */
809 pcmcia_unregister_socket(&sock->socket);
810
811 /* Disable all events so we don't die in an IRQ storm */
812 cb_writel(sock, CB_SOCKET_MASK, 0x0);
813 exca_writeb(sock, I365_CSCINT, 0);
814
815 if (sock->cb_irq)
816 free_irq(sock->cb_irq, sock);
817 else
818 timer_shutdown_sync(&sock->poll_timer);
819
820 iounmap(sock->base);
821 yenta_free_resources(sock);
822
823 pci_release_regions(dev);
824 pci_disable_device(dev);
825 pci_set_drvdata(dev, NULL);
826 kfree(sock);
827 }
828
829
830 static struct pccard_operations yenta_socket_operations = {
831 .init = yenta_sock_init,
832 .suspend = yenta_sock_suspend,
833 .get_status = yenta_get_status,
834 .set_socket = yenta_set_socket,
835 .set_io_map = yenta_set_io_map,
836 .set_mem_map = yenta_set_mem_map,
837 };
838
839
840 #ifdef CONFIG_YENTA_TI
841 #include "ti113x.h"
842 #endif
843 #ifdef CONFIG_YENTA_RICOH
844 #include "ricoh.h"
845 #endif
846 #ifdef CONFIG_YENTA_TOSHIBA
847 #include "topic.h"
848 #endif
849 #ifdef CONFIG_YENTA_O2
850 #include "o2micro.h"
851 #endif
852
853 enum {
854 CARDBUS_TYPE_DEFAULT = -1,
855 CARDBUS_TYPE_TI,
856 CARDBUS_TYPE_TI113X,
857 CARDBUS_TYPE_TI12XX,
858 CARDBUS_TYPE_TI1250,
859 CARDBUS_TYPE_RICOH,
860 CARDBUS_TYPE_TOPIC95,
861 CARDBUS_TYPE_TOPIC97,
862 CARDBUS_TYPE_O2MICRO,
863 CARDBUS_TYPE_ENE,
864 };
865
866 /*
867 * Different cardbus controllers have slightly different
868 * initialization sequences etc details. List them here..
869 */
870 static struct cardbus_type cardbus_type[] = {
871 #ifdef CONFIG_YENTA_TI
872 [CARDBUS_TYPE_TI] = {
873 .override = ti_override,
874 .save_state = ti_save_state,
875 .restore_state = ti_restore_state,
876 .sock_init = ti_init,
877 },
878 [CARDBUS_TYPE_TI113X] = {
879 .override = ti113x_override,
880 .save_state = ti_save_state,
881 .restore_state = ti_restore_state,
882 .sock_init = ti_init,
883 },
884 [CARDBUS_TYPE_TI12XX] = {
885 .override = ti12xx_override,
886 .save_state = ti_save_state,
887 .restore_state = ti_restore_state,
888 .sock_init = ti_init,
889 },
890 [CARDBUS_TYPE_TI1250] = {
891 .override = ti1250_override,
892 .save_state = ti_save_state,
893 .restore_state = ti_restore_state,
894 .sock_init = ti_init,
895 },
896 [CARDBUS_TYPE_ENE] = {
897 .override = ene_override,
898 .save_state = ti_save_state,
899 .restore_state = ti_restore_state,
900 .sock_init = ti_init,
901 },
902 #endif
903 #ifdef CONFIG_YENTA_RICOH
904 [CARDBUS_TYPE_RICOH] = {
905 .override = ricoh_override,
906 .save_state = ricoh_save_state,
907 .restore_state = ricoh_restore_state,
908 },
909 #endif
910 #ifdef CONFIG_YENTA_TOSHIBA
911 [CARDBUS_TYPE_TOPIC95] = {
912 .override = topic95_override,
913 },
914 [CARDBUS_TYPE_TOPIC97] = {
915 .override = topic97_override,
916 },
917 #endif
918 #ifdef CONFIG_YENTA_O2
919 [CARDBUS_TYPE_O2MICRO] = {
920 .override = o2micro_override,
921 .restore_state = o2micro_restore_state,
922 },
923 #endif
924 };
925
926
yenta_probe_irq(struct yenta_socket * socket,u32 isa_irq_mask)927 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
928 {
929 int i;
930 unsigned long val;
931 u32 mask;
932 u8 reg;
933
934 /*
935 * Probe for usable interrupts using the force
936 * register to generate bogus card status events.
937 */
938 cb_writel(socket, CB_SOCKET_EVENT, -1);
939 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
940 reg = exca_readb(socket, I365_CSCINT);
941 exca_writeb(socket, I365_CSCINT, 0);
942 val = probe_irq_on() & isa_irq_mask;
943 for (i = 1; i < 16; i++) {
944 if (!((val >> i) & 1))
945 continue;
946 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
947 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
948 udelay(100);
949 cb_writel(socket, CB_SOCKET_EVENT, -1);
950 }
951 cb_writel(socket, CB_SOCKET_MASK, 0);
952 exca_writeb(socket, I365_CSCINT, reg);
953
954 mask = probe_irq_mask(val) & 0xffff;
955
956 return mask;
957 }
958
959
960 /*
961 * yenta PCI irq probing.
962 * currently only used in the TI/EnE initialization code
963 */
964 #ifdef CONFIG_YENTA_TI
965
966 /* interrupt handler, only used during probing */
yenta_probe_handler(int irq,void * dev_id)967 static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
968 {
969 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
970 u8 csc;
971 u32 cb_event;
972
973 /* Clear interrupt status for the event */
974 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
975 cb_writel(socket, CB_SOCKET_EVENT, -1);
976 csc = exca_readb(socket, I365_CSC);
977
978 if (cb_event || csc) {
979 socket->probe_status = 1;
980 return IRQ_HANDLED;
981 }
982
983 return IRQ_NONE;
984 }
985
986 /* probes the PCI interrupt, use only on override functions */
yenta_probe_cb_irq(struct yenta_socket * socket)987 static int yenta_probe_cb_irq(struct yenta_socket *socket)
988 {
989 u8 reg = 0;
990
991 if (!socket->cb_irq)
992 return -1;
993
994 socket->probe_status = 0;
995
996 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
997 dev_warn(&socket->dev->dev,
998 "request_irq() in yenta_probe_cb_irq() failed!\n");
999 return -1;
1000 }
1001
1002 /* generate interrupt, wait */
1003 if (!socket->dev->irq)
1004 reg = exca_readb(socket, I365_CSCINT);
1005 exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
1006 cb_writel(socket, CB_SOCKET_EVENT, -1);
1007 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
1008 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
1009
1010 msleep(100);
1011
1012 /* disable interrupts */
1013 cb_writel(socket, CB_SOCKET_MASK, 0);
1014 exca_writeb(socket, I365_CSCINT, reg);
1015 cb_writel(socket, CB_SOCKET_EVENT, -1);
1016 exca_readb(socket, I365_CSC);
1017
1018 free_irq(socket->cb_irq, socket);
1019
1020 return (int) socket->probe_status;
1021 }
1022
1023 #endif /* CONFIG_YENTA_TI */
1024
1025
1026 /*
1027 * Set static data that doesn't need re-initializing..
1028 */
yenta_get_socket_capabilities(struct yenta_socket * socket,u32 isa_irq_mask)1029 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1030 {
1031 socket->socket.pci_irq = socket->cb_irq;
1032 if (isa_probe)
1033 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1034 else
1035 socket->socket.irq_mask = 0;
1036
1037 dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
1038 socket->socket.irq_mask, socket->cb_irq);
1039 }
1040
1041 /*
1042 * Initialize the standard cardbus registers
1043 */
yenta_config_init(struct yenta_socket * socket)1044 static void yenta_config_init(struct yenta_socket *socket)
1045 {
1046 u16 bridge;
1047 struct pci_dev *dev = socket->dev;
1048 struct pci_bus_region region;
1049
1050 pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]);
1051
1052 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1053 config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1054 config_writew(socket, PCI_COMMAND,
1055 PCI_COMMAND_IO |
1056 PCI_COMMAND_MEMORY |
1057 PCI_COMMAND_MASTER |
1058 PCI_COMMAND_WAIT);
1059
1060 /* MAGIC NUMBERS! Fixme */
1061 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1062 config_writeb(socket, PCI_LATENCY_TIMER, 168);
1063 config_writel(socket, PCI_PRIMARY_BUS,
1064 (176 << 24) | /* sec. latency timer */
1065 ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */
1066 ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */
1067 dev->subordinate->primary); /* primary bus */
1068
1069 /*
1070 * Set up the bridging state:
1071 * - enable write posting.
1072 * - memory window 0 prefetchable, window 1 non-prefetchable
1073 * - PCI interrupts enabled if a PCI interrupt exists..
1074 */
1075 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1076 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1077 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1078 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1079 }
1080
1081 /**
1082 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
1083 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1084 *
1085 * Checks if devices on the bus which the CardBus bridge bridges to would be
1086 * invisible during PCI scans because of a misconfigured subordinate number
1087 * of the parent brige - some BIOSes seem to be too lazy to set it right.
1088 * Does the fixup carefully by checking how far it can go without conflicts.
1089 * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
1090 */
yenta_fixup_parent_bridge(struct pci_bus * cardbus_bridge)1091 static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1092 {
1093 struct pci_bus *sibling;
1094 unsigned char upper_limit;
1095 /*
1096 * We only check and fix the parent bridge: All systems which need
1097 * this fixup that have been reviewed are laptops and the only bridge
1098 * which needed fixing was the parent bridge of the CardBus bridge:
1099 */
1100 struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1101
1102 /* Check bus numbers are already set up correctly: */
1103 if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
1104 return; /* The subordinate number is ok, nothing to do */
1105
1106 if (!bridge_to_fix->parent)
1107 return; /* Root bridges are ok */
1108
1109 /* stay within the limits of the bus range of the parent: */
1110 upper_limit = bridge_to_fix->parent->busn_res.end;
1111
1112 /* check the bus ranges of all sibling bridges to prevent overlap */
1113 list_for_each_entry(sibling, &bridge_to_fix->parent->children,
1114 node) {
1115 /*
1116 * If the sibling has a higher secondary bus number
1117 * and it's secondary is equal or smaller than our
1118 * current upper limit, set the new upper limit to
1119 * the bus number below the sibling's range:
1120 */
1121 if (sibling->busn_res.start > bridge_to_fix->busn_res.end
1122 && sibling->busn_res.start <= upper_limit)
1123 upper_limit = sibling->busn_res.start - 1;
1124 }
1125
1126 /* Show that the wanted subordinate number is not possible: */
1127 if (cardbus_bridge->busn_res.end > upper_limit)
1128 dev_warn(&cardbus_bridge->dev,
1129 "Upper limit for fixing this bridge's parent bridge: #%02x\n",
1130 upper_limit);
1131
1132 /* If we have room to increase the bridge's subordinate number, */
1133 if (bridge_to_fix->busn_res.end < upper_limit) {
1134
1135 /* use the highest number of the hidden bus, within limits */
1136 unsigned char subordinate_to_assign =
1137 min_t(int, cardbus_bridge->busn_res.end, upper_limit);
1138
1139 dev_info(&bridge_to_fix->dev,
1140 "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
1141 bridge_to_fix->number,
1142 (int)bridge_to_fix->busn_res.end,
1143 subordinate_to_assign);
1144
1145 /* Save the new subordinate in the bus struct of the bridge */
1146 bridge_to_fix->busn_res.end = subordinate_to_assign;
1147
1148 /* and update the PCI config space with the new subordinate */
1149 pci_write_config_byte(bridge_to_fix->self,
1150 PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
1151 }
1152 }
1153
1154 /*
1155 * Initialize a cardbus controller. Make sure we have a usable
1156 * interrupt, and that we can map the cardbus area. Fill in the
1157 * socket information structure..
1158 */
yenta_probe(struct pci_dev * dev,const struct pci_device_id * id)1159 static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1160 {
1161 struct yenta_socket *socket;
1162 int ret;
1163
1164 /*
1165 * If we failed to assign proper bus numbers for this cardbus
1166 * controller during PCI probe, its subordinate pci_bus is NULL.
1167 * Bail out if so.
1168 */
1169 if (!dev->subordinate) {
1170 dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
1171 return -ENODEV;
1172 }
1173
1174 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1175 if (!socket)
1176 return -ENOMEM;
1177
1178 /* prepare pcmcia_socket */
1179 socket->socket.ops = ¥ta_socket_operations;
1180 socket->socket.resource_ops = &pccard_nonstatic_ops;
1181 socket->socket.dev.parent = &dev->dev;
1182 socket->socket.driver_data = socket;
1183 socket->socket.owner = THIS_MODULE;
1184 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1185 socket->socket.map_size = 0x1000;
1186 socket->socket.cb_dev = dev;
1187
1188 /* prepare struct yenta_socket */
1189 socket->dev = dev;
1190 pci_set_drvdata(dev, socket);
1191
1192 /*
1193 * Do some basic sanity checking..
1194 */
1195 if (pci_enable_device(dev)) {
1196 ret = -EBUSY;
1197 goto free;
1198 }
1199
1200 ret = pci_request_regions(dev, "yenta_socket");
1201 if (ret)
1202 goto disable;
1203
1204 if (!pci_resource_start(dev, 0)) {
1205 dev_err(&dev->dev, "No cardbus resource!\n");
1206 ret = -ENODEV;
1207 goto release;
1208 }
1209
1210 /*
1211 * Ok, start setup.. Map the cardbus registers,
1212 * and request the IRQ.
1213 */
1214 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1215 if (!socket->base) {
1216 ret = -ENOMEM;
1217 goto release;
1218 }
1219
1220 /*
1221 * report the subsystem vendor and device for help debugging
1222 * the irq stuff...
1223 */
1224 dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
1225 dev->subsystem_vendor, dev->subsystem_device);
1226
1227 yenta_config_init(socket);
1228
1229 /* Disable all events */
1230 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1231
1232 /* Set up the bridge regions.. */
1233 yenta_allocate_resources(socket);
1234
1235 socket->cb_irq = dev->irq;
1236
1237 /* Do we have special options for the device? */
1238 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1239 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1240 socket->type = &cardbus_type[id->driver_data];
1241
1242 ret = socket->type->override(socket);
1243 if (ret < 0)
1244 goto unmap;
1245 }
1246
1247 /* We must finish initialization here */
1248
1249 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1250 /* No IRQ or request_irq failed. Poll */
1251 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1252 timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
1253 mod_timer(&socket->poll_timer, jiffies + HZ);
1254 dev_info(&dev->dev,
1255 "no PCI IRQ, CardBus support disabled for this socket.\n");
1256 dev_info(&dev->dev,
1257 "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1258 } else {
1259 socket->socket.features |= SS_CAP_CARDBUS;
1260 }
1261
1262 /* Figure out what the dang thing can do for the PCMCIA layer... */
1263 yenta_interrogate(socket);
1264 yenta_get_socket_capabilities(socket, isa_interrupts);
1265 dev_info(&dev->dev, "Socket status: %08x\n",
1266 cb_readl(socket, CB_SOCKET_STATE));
1267
1268 yenta_fixup_parent_bridge(dev->subordinate);
1269
1270 /* Register it with the pcmcia layer.. */
1271 ret = pcmcia_register_socket(&socket->socket);
1272 if (ret)
1273 goto free_irq;
1274
1275 /* Add the yenta register attributes */
1276 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1277 if (ret)
1278 goto unregister_socket;
1279
1280 return ret;
1281
1282 /* error path... */
1283 unregister_socket:
1284 pcmcia_unregister_socket(&socket->socket);
1285 free_irq:
1286 if (socket->cb_irq)
1287 free_irq(socket->cb_irq, socket);
1288 else
1289 timer_shutdown_sync(&socket->poll_timer);
1290 unmap:
1291 iounmap(socket->base);
1292 yenta_free_resources(socket);
1293 release:
1294 pci_release_regions(dev);
1295 disable:
1296 pci_disable_device(dev);
1297 free:
1298 pci_set_drvdata(dev, NULL);
1299 kfree(socket);
1300 return ret;
1301 }
1302
1303 #ifdef CONFIG_PM_SLEEP
yenta_dev_suspend_noirq(struct device * dev)1304 static int yenta_dev_suspend_noirq(struct device *dev)
1305 {
1306 struct pci_dev *pdev = to_pci_dev(dev);
1307 struct yenta_socket *socket = pci_get_drvdata(pdev);
1308
1309 if (!socket)
1310 return 0;
1311
1312 if (socket->type && socket->type->save_state)
1313 socket->type->save_state(socket);
1314
1315 pci_save_state(pdev);
1316 pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1317 pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1318 pci_disable_device(pdev);
1319
1320 return 0;
1321 }
1322
yenta_dev_resume_noirq(struct device * dev)1323 static int yenta_dev_resume_noirq(struct device *dev)
1324 {
1325 struct pci_dev *pdev = to_pci_dev(dev);
1326 struct yenta_socket *socket = pci_get_drvdata(pdev);
1327 int ret;
1328
1329 if (!socket)
1330 return 0;
1331
1332 pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1333 pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1334
1335 ret = pci_enable_device(pdev);
1336 if (ret)
1337 return ret;
1338
1339 pci_set_master(pdev);
1340
1341 if (socket->type && socket->type->restore_state)
1342 socket->type->restore_state(socket);
1343
1344 return 0;
1345 }
1346
1347 static const struct dev_pm_ops yenta_pm_ops = {
1348 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(yenta_dev_suspend_noirq, yenta_dev_resume_noirq)
1349 };
1350
1351 #define YENTA_PM_OPS (¥ta_pm_ops)
1352 #else
1353 #define YENTA_PM_OPS NULL
1354 #endif
1355
1356 #define CB_ID(vend, dev, type) \
1357 { \
1358 .vendor = vend, \
1359 .device = dev, \
1360 .subvendor = PCI_ANY_ID, \
1361 .subdevice = PCI_ANY_ID, \
1362 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1363 .class_mask = ~0, \
1364 .driver_data = CARDBUS_TYPE_##type, \
1365 }
1366
1367 static const struct pci_device_id yenta_table[] = {
1368 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1369
1370 /*
1371 * TBD: Check if these TI variants can use more
1372 * advanced overrides instead. (I can't get the
1373 * data sheets for these devices. --rmk)
1374 */
1375 #ifdef CONFIG_YENTA_TI
1376 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1377
1378 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1379 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1380
1381 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1382 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1383 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1384 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1385 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1386 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1387 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1388 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1389 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1390 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1391 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1392 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1393 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1394 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1395 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1396 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1397 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1398
1399 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1400 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1401
1402 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1403 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1404 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1405 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1406 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1407 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1408 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1409 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1410
1411 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1412 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1413 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1414 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1415 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1416 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1417 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1418 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1419 #endif /* CONFIG_YENTA_TI */
1420
1421 #ifdef CONFIG_YENTA_RICOH
1422 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1423 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1424 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1425 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1426 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1427 #endif
1428
1429 #ifdef CONFIG_YENTA_TOSHIBA
1430 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1431 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1432 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1433 #endif
1434
1435 #ifdef CONFIG_YENTA_O2
1436 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1437 #endif
1438
1439 /* match any cardbus bridge */
1440 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1441 { /* all zeroes */ }
1442 };
1443 MODULE_DEVICE_TABLE(pci, yenta_table);
1444
1445
1446 static struct pci_driver yenta_cardbus_driver = {
1447 .name = "yenta_cardbus",
1448 .id_table = yenta_table,
1449 .probe = yenta_probe,
1450 .remove = yenta_close,
1451 .driver.pm = YENTA_PM_OPS,
1452 };
1453
1454 module_pci_driver(yenta_cardbus_driver);
1455
1456 MODULE_DESCRIPTION("Driver for CardBus yenta-compatible bridges");
1457 MODULE_LICENSE("GPL");
1458