1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
23 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
24 /* All Rights Reserved */
25
26 /*
27 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Milan Jurik. All rights reserved.
29 * Copyright (c) 2016 by Delphix. All rights reserved.
30 * Copyright 2026 Oxide Computer Company
31 * Copyright 2024 Hans Rosenfeld
32 */
33
34
35 /*
36 * Serial I/O driver for 8250/16450/16550A/16650/16750/16950 chips.
37 */
38
39 #include <sys/param.h>
40 #include <sys/types.h>
41 #include <sys/signal.h>
42 #include <sys/stream.h>
43 #include <sys/termio.h>
44 #include <sys/errno.h>
45 #include <sys/file.h>
46 #include <sys/cmn_err.h>
47 #include <sys/stropts.h>
48 #include <sys/strsubr.h>
49 #include <sys/strtty.h>
50 #include <sys/debug.h>
51 #include <sys/kbio.h>
52 #include <sys/cred.h>
53 #include <sys/stat.h>
54 #include <sys/consdev.h>
55 #include <sys/mkdev.h>
56 #include <sys/kmem.h>
57 #include <sys/cred.h>
58 #include <sys/strsun.h>
59 #ifdef DEBUG
60 #include <sys/promif.h>
61 #endif
62 #include <sys/modctl.h>
63 #include <sys/ddi.h>
64 #include <sys/sunddi.h>
65 #include <sys/pci.h>
66 #include <sys/asy.h>
67 #include <sys/policy.h>
68 #include <sys/sysmacros.h>
69 #include <sys/cpu.h>
70
71 /*
72 * set the RX FIFO trigger_level to half the RX FIFO size for now
73 * we may want to make this configurable later.
74 */
75 static int asy_trig_level = ASY_FCR_RHR_TRIG_8;
76
77 int asy_drain_check = 15000000; /* tunable: exit drain check time */
78 int asy_min_dtr_low = 500000; /* tunable: minimum DTR down time */
79 int asy_min_utbrk = 100000; /* tunable: minumum untimed brk time */
80
81 int asymaxchip = ASY_MAXCHIP; /* tunable: limit chip support we look for */
82
83 /*
84 * Just in case someone has a chip with broken loopback mode, we provide a
85 * means to disable the loopback test. By default, we only loopback test
86 * UARTs which look like they have FIFOs bigger than 16 bytes.
87 * Set to 0 to suppress test, or to 2 to enable test on any size FIFO.
88 */
89 int asy_fifo_test = 1; /* tunable: set to 0, 1, or 2 */
90
91 /*
92 * Allow ability to switch off testing of the scratch register.
93 * Some UART emulators might not have it. This will also disable the test
94 * for Exar/Startech ST16C650, as that requires use of the SCR register.
95 */
96 int asy_scr_test = 1; /* tunable: set to 0 to disable SCR reg test */
97
98 /*
99 * As we don't yet support on-chip flow control, it's a bad idea to put a
100 * large number of characters in the TX FIFO, since if other end tells us
101 * to stop transmitting, we can only stop filling the TX FIFO, but it will
102 * still carry on draining by itself, so remote end still gets what's left
103 * in the FIFO.
104 */
105 int asy_max_tx_fifo = 16; /* tunable: max fill of TX FIFO */
106
107 #define async_stopc async_ttycommon.t_stopc
108 #define async_startc async_ttycommon.t_startc
109
110 #define ASY_INIT 1
111 #define ASY_NOINIT 0
112
113 /* enum value for sw and hw flow control action */
114 typedef enum {
115 FLOW_CHECK,
116 FLOW_STOP,
117 FLOW_START
118 } async_flowc_action;
119
120 #ifdef DEBUG
121
122 typedef enum {
123 ASY_DEBUG_INIT = 1 << 0, /* Output during driver initialization. */
124 ASY_DEBUG_INPUT = 1 << 1, /* Report characters received during int. */
125 ASY_DEBUG_EOT = 1 << 2, /* Output when wait for xmit to finish. */
126 ASY_DEBUG_CLOSE = 1 << 3, /* Output when driver open/close called */
127 ASY_DEBUG_HFLOW = 1 << 4, /* Output when H/W flowcontrol is active */
128 ASY_DEBUG_PROCS = 1 << 5, /* Output each proc name as it is entered. */
129 ASY_DEBUG_STATE = 1 << 6, /* Output value of Interrupt Service Reg. */
130 ASY_DEBUG_INTR = 1 << 7, /* Output value of Interrupt Service Reg. */
131 ASY_DEBUG_OUT = 1 << 8, /* Output about output events. */
132 ASY_DEBUG_BUSY = 1 << 9, /* Output when xmit is enabled/disabled */
133 ASY_DEBUG_MODEM = 1 << 10, /* Output about modem status & control. */
134 ASY_DEBUG_MODM2 = 1 << 11, /* Output about modem status & control. */
135 ASY_DEBUG_IOCTL = 1 << 12, /* Output about ioctl messages. */
136 ASY_DEBUG_CHIP = 1 << 13, /* Output about chip identification. */
137 ASY_DEBUG_SFLOW = 1 << 14, /* Output when S/W flowcontrol is active */
138 } asy_debug_t;
139
140 static asy_debug_t debug = 0;
141
142 #define ASY_DEBUG(asy, x) (asy->asy_debug & (x))
143 #define ASY_DPRINTF(asy, fac, format, ...) \
144 if (ASY_DEBUG(asy, fac)) \
145 asyerror(asy, CE_CONT, "!%s: " format, __func__, ##__VA_ARGS__)
146 #else
147 #define ASY_DEBUG(asy, x) B_FALSE
148 #define ASY_DPRINTF(asy, fac, format, ...)
149 #endif
150
151 /*
152 * PPS (Pulse Per Second) support.
153 */
154 void ddi_hardpps(struct timeval *, int);
155 /*
156 * This is protected by the asy_excl_hi of the port on which PPS event
157 * handling is enabled. Note that only one port should have this enabled at
158 * any one time. Enabling PPS handling on multiple ports will result in
159 * unpredictable (but benign) results.
160 */
161 static struct ppsclockev asy_ppsev;
162
163 #ifdef PPSCLOCKLED
164 /* XXX Use these to observe PPS latencies and jitter on a scope */
165 #define LED_ON
166 #define LED_OFF
167 #else
168 #define LED_ON
169 #define LED_OFF
170 #endif
171
172 static void asy_put_idx(const struct asycom *, asy_reg_t, uint8_t);
173 static uint8_t asy_get_idx(const struct asycom *, asy_reg_t);
174
175 static void asy_put_add(const struct asycom *, asy_reg_t, uint8_t);
176 static uint8_t asy_get_add(const struct asycom *, asy_reg_t);
177
178 static void asy_put_ext(const struct asycom *, asy_reg_t, uint8_t);
179 static uint8_t asy_get_ext(const struct asycom *, asy_reg_t);
180
181 static void asy_put_reg(const struct asycom *, asy_reg_t, uint8_t);
182 static uint8_t asy_get_reg(const struct asycom *, asy_reg_t);
183
184 static void asy_put(const struct asycom *, asy_reg_t, uint8_t);
185 static uint8_t asy_get(const struct asycom *, asy_reg_t);
186
187 static void asy_set(const struct asycom *, asy_reg_t, uint8_t);
188 static void asy_clr(const struct asycom *, asy_reg_t, uint8_t);
189
190 static void asy_enable_interrupts(const struct asycom *, uint8_t);
191 static void asy_disable_interrupts(const struct asycom *, uint8_t);
192 static void asy_set_baudrate(const struct asycom *, int);
193 static void asy_wait_baudrate(struct asycom *);
194
195 #define BAUDINDEX(cflg) (((cflg) & CBAUDEXT) ? \
196 (((cflg) & CBAUD) + CBAUD + 1) : ((cflg) & CBAUD))
197
198 static void asysetsoft(struct asycom *);
199 static uint_t asysoftintr(caddr_t, caddr_t);
200 static uint_t asyintr(caddr_t, caddr_t);
201
202 static boolean_t abort_charseq_recognize(uchar_t ch);
203
204 /* The async interrupt entry points */
205 static void async_txint(struct asycom *asy);
206 static void async_rxint(struct asycom *asy, uchar_t lsr);
207 static void async_msint(struct asycom *asy);
208 static void async_softint(struct asycom *asy);
209
210 static void async_ioctl(struct asyncline *async, queue_t *q, mblk_t *mp);
211 static void async_reioctl(void *unit);
212 static void async_iocdata(queue_t *q, mblk_t *mp);
213 static void async_restart(void *arg);
214 static void async_start(struct asyncline *async);
215 static void async_resume(struct asyncline *async);
216 static void asy_program(struct asycom *asy, int mode);
217 static void asyinit(struct asycom *asy);
218 static void asy_waiteot(struct asycom *asy);
219 static void asyputchar(cons_polledio_arg_t, uchar_t c);
220 static int asygetchar(cons_polledio_arg_t);
221 static boolean_t asyischar(cons_polledio_arg_t);
222 static void asy_polledio_enter(cons_polledio_arg_t);
223 static void asy_polledio_exit(cons_polledio_arg_t);
224
225 static int asymctl(struct asycom *, int, int);
226 static int asytodm(int, int);
227 static int dmtoasy(struct asycom *, int);
228 static void asyerror(const struct asycom *, int, const char *, ...)
229 __KPRINTFLIKE(3);
230 static void asy_parse_mode(dev_info_t *devi, struct asycom *asy);
231 static void asy_soft_state_free(struct asycom *);
232 static char *asy_hw_name(struct asycom *asy);
233 static void async_hold_utbrk(void *arg);
234 static void async_resume_utbrk(struct asyncline *async);
235 static void async_dtr_free(struct asyncline *async);
236 static int asy_identify_chip(dev_info_t *devi, struct asycom *asy);
237 static void asy_reset_fifo(struct asycom *asy, uchar_t flags);
238 static void asy_carrier_check(struct asycom *);
239 static int asy_getproperty(dev_info_t *devi, struct asycom *asy,
240 const char *property);
241 static boolean_t async_flowcontrol_sw_input(struct asycom *asy,
242 async_flowc_action onoff, int type);
243 static void async_flowcontrol_sw_output(struct asycom *asy,
244 async_flowc_action onoff);
245 static void async_flowcontrol_hw_input(struct asycom *asy,
246 async_flowc_action onoff, int type);
247 static void async_flowcontrol_hw_output(struct asycom *asy,
248 async_flowc_action onoff);
249
250 #define GET_PROP(devi, pname, pflag, pval, plen) \
251 (ddi_prop_op(DDI_DEV_T_ANY, (devi), PROP_LEN_AND_VAL_BUF, \
252 (pflag), (pname), (caddr_t)(pval), (plen)))
253
254 kmutex_t asy_glob_lock; /* lock protecting global data manipulation */
255 void *asy_soft_state;
256
257 /* Standard COM port I/O addresses */
258 static const int standard_com_ports[] = {
259 COM1_IOADDR, COM2_IOADDR, COM3_IOADDR, COM4_IOADDR
260 };
261
262 static int *com_ports;
263 static uint_t num_com_ports;
264
265 #ifdef DEBUG
266 /*
267 * Set this to true to make the driver pretend to do a suspend. Useful
268 * for debugging suspend/resume code with a serial debugger.
269 */
270 boolean_t asy_nosuspend = B_FALSE;
271 #endif
272
273
274 /*
275 * Baud rate table. Indexed by #defines found in sys/termios.h
276 *
277 * The default crystal frequency is 1.8432 MHz. The 8250A used a fixed /16
278 * prescaler and a 16bit divisor, split in two registers (DLH and DLL).
279 *
280 * The 16950 adds TCR and CKS registers. The TCR can be used to set the
281 * prescaler from /4 to /16. The CKS can be used, among other things, to
282 * select a isochronous 1x mode, effectively disabling the prescaler.
283 * This would theoretically allow a baud rate of 1843200 driven directly
284 * by the default crystal frequency, although the highest termios.h-defined
285 * baud rate we can support is half of that, 921600 baud.
286 */
287 #define UNSUPPORTED 0x00, 0x00, 0x00
288 static struct {
289 uint8_t asy_dlh;
290 uint8_t asy_dll;
291 uint8_t asy_tcr;
292 } asy_baud_tab[] = {
293 [B0] = { UNSUPPORTED }, /* 0 baud */
294 [B50] = { 0x09, 0x00, 0x00 }, /* 50 baud */
295 [B75] = { 0x06, 0x00, 0x00 }, /* 75 baud */
296 [B110] = { 0x04, 0x17, 0x00 }, /* 110 baud (0.026% error) */
297 [B134] = { 0x03, 0x59, 0x00 }, /* 134 baud (0.058% error) */
298 [B150] = { 0x03, 0x00, 0x00 }, /* 150 baud */
299 [B200] = { 0x02, 0x40, 0x00 }, /* 200 baud */
300 [B300] = { 0x01, 0x80, 0x00 }, /* 300 baud */
301 [B600] = { 0x00, 0xc0, 0x00 }, /* 600 baud */
302 [B1200] = { 0x00, 0x60, 0x00 }, /* 1200 baud */
303 [B1800] = { 0x00, 0x40, 0x00 }, /* 1800 baud */
304 [B2400] = { 0x00, 0x30, 0x00 }, /* 2400 baud */
305 [B4800] = { 0x00, 0x18, 0x00 }, /* 4800 baud */
306 [B9600] = { 0x00, 0x0c, 0x00 }, /* 9600 baud */
307 [B19200] = { 0x00, 0x06, 0x00 }, /* 19200 baud */
308 [B38400] = { 0x00, 0x03, 0x00 }, /* 38400 baud */
309 [B57600] = { 0x00, 0x02, 0x00 }, /* 57600 baud */
310 [B76800] = { 0x00, 0x06, 0x04 }, /* 76800 baud (16950) */
311 [B115200] = { 0x00, 0x01, 0x00 }, /* 115200 baud */
312 [B153600] = { 0x00, 0x03, 0x04 }, /* 153600 baud (16950) */
313 [B230400] = { 0x00, 0x02, 0x04 }, /* 230400 baud (16950) */
314 [B307200] = { 0x00, 0x01, 0x06 }, /* 307200 baud (16950) */
315 [B460800] = { 0x00, 0x01, 0x04 }, /* 460800 baud (16950) */
316 [B921600] = { 0x00, 0x02, 0x01 }, /* 921600 baud (16950) */
317 [B1000000] = { UNSUPPORTED }, /* 1000000 baud */
318 [B1152000] = { UNSUPPORTED }, /* 1152000 baud */
319 [B1500000] = { UNSUPPORTED }, /* 1500000 baud */
320 [B2000000] = { UNSUPPORTED }, /* 2000000 baud */
321 [B2500000] = { UNSUPPORTED }, /* 2500000 baud */
322 [B3000000] = { UNSUPPORTED }, /* 3000000 baud */
323 [B3500000] = { UNSUPPORTED }, /* 3500000 baud */
324 [B4000000] = { UNSUPPORTED }, /* 4000000 baud */
325 };
326
327 /*
328 * Register table. For each logical register, we define the minimum hwtype, the
329 * register offset, and function pointers for reading and writing the register.
330 * A NULL pointer indicates the register cannot be read from or written to,
331 * respectively.
332 */
333 static struct {
334 int asy_min_hwtype;
335 int8_t asy_reg_off;
336 uint8_t (*asy_get_reg)(const struct asycom *, asy_reg_t);
337 void (*asy_put_reg)(const struct asycom *, asy_reg_t, uint8_t);
338 } asy_reg_table[] = {
339 [ASY_ILLEGAL] = { 0, -1, NULL, NULL },
340 /* 8250 / 16450 / 16550 registers */
341 [ASY_THR] = { ASY_8250A, 0, NULL, asy_put_reg },
342 [ASY_RHR] = { ASY_8250A, 0, asy_get_reg, NULL },
343 [ASY_IER] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
344 [ASY_FCR] = { ASY_16550, 2, NULL, asy_put_reg },
345 [ASY_ISR] = { ASY_8250A, 2, asy_get_reg, NULL },
346 [ASY_LCR] = { ASY_8250A, 3, asy_get_reg, asy_put_reg },
347 [ASY_MCR] = { ASY_8250A, 4, asy_get_reg, asy_put_reg },
348 [ASY_LSR] = { ASY_8250A, 5, asy_get_reg, NULL },
349 [ASY_MSR] = { ASY_8250A, 6, asy_get_reg, NULL },
350 [ASY_SPR] = { ASY_8250A, 7, asy_get_reg, asy_put_reg },
351 [ASY_DLL] = { ASY_8250A, 0, asy_get_reg, asy_put_reg },
352 [ASY_DLH] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
353 /* 16750 extended register */
354 [ASY_EFR] = { ASY_16750, 2, asy_get_ext, asy_put_ext },
355 /* 16650 extended registers */
356 [ASY_XON1] = { ASY_16650, 4, asy_get_ext, asy_put_ext },
357 [ASY_XON2] = { ASY_16650, 5, asy_get_ext, asy_put_ext },
358 [ASY_XOFF1] = { ASY_16650, 6, asy_get_ext, asy_put_ext },
359 [ASY_XOFF2] = { ASY_16650, 7, asy_get_ext, asy_put_ext },
360 /* 16950 additional registers */
361 [ASY_ASR] = { ASY_16950, 1, asy_get_add, asy_put_add },
362 [ASY_RFL] = { ASY_16950, 3, asy_get_add, NULL },
363 [ASY_TFL] = { ASY_16950, 4, asy_get_add, NULL },
364 [ASY_ICR] = { ASY_16950, 5, asy_get_reg, asy_put_reg },
365 /* 16950 indexed registers */
366 [ASY_ACR] = { ASY_16950, 0, asy_get_idx, asy_put_idx },
367 [ASY_CPR] = { ASY_16950, 1, asy_get_idx, asy_put_idx },
368 [ASY_TCR] = { ASY_16950, 2, asy_get_idx, asy_put_idx },
369 [ASY_CKS] = { ASY_16950, 3, asy_get_idx, asy_put_idx },
370 [ASY_TTL] = { ASY_16950, 4, asy_get_idx, asy_put_idx },
371 [ASY_RTL] = { ASY_16950, 5, asy_get_idx, asy_put_idx },
372 [ASY_FCL] = { ASY_16950, 6, asy_get_idx, asy_put_idx },
373 [ASY_FCH] = { ASY_16950, 7, asy_get_idx, asy_put_idx },
374 [ASY_ID1] = { ASY_16950, 8, asy_get_idx, NULL },
375 [ASY_ID2] = { ASY_16950, 9, asy_get_idx, NULL },
376 [ASY_ID3] = { ASY_16950, 10, asy_get_idx, NULL },
377 [ASY_REV] = { ASY_16950, 11, asy_get_idx, NULL },
378 [ASY_CSR] = { ASY_16950, 12, NULL, asy_put_idx },
379 [ASY_NMR] = { ASY_16950, 13, asy_get_idx, asy_put_idx },
380 };
381
382
383 static int asyrsrv(queue_t *q);
384 static int asyopen(queue_t *rq, dev_t *dev, int flag, int sflag, cred_t *cr);
385 static int asyclose(queue_t *q, int flag, cred_t *credp);
386 static int asywputdo(queue_t *q, mblk_t *mp, boolean_t);
387 static int asywput(queue_t *q, mblk_t *mp);
388
389 struct module_info asy_info = {
390 0,
391 "asy",
392 0,
393 INFPSZ,
394 4096,
395 128
396 };
397
398 static struct qinit asy_rint = {
399 putq,
400 asyrsrv,
401 asyopen,
402 asyclose,
403 NULL,
404 &asy_info,
405 NULL
406 };
407
408 static struct qinit asy_wint = {
409 asywput,
410 NULL,
411 NULL,
412 NULL,
413 NULL,
414 &asy_info,
415 NULL
416 };
417
418 struct streamtab asy_str_info = {
419 &asy_rint,
420 &asy_wint,
421 NULL,
422 NULL
423 };
424
425 static void asy_intr_free(struct asycom *);
426 static int asy_intr_setup(struct asycom *, int);
427
428 static void asy_softintr_free(struct asycom *);
429 static int asy_softintr_setup(struct asycom *);
430
431 static int asy_suspend(struct asycom *);
432 static int asy_resume(dev_info_t *);
433
434 static int asyinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg,
435 void **result);
436 static int asyprobe(dev_info_t *);
437 static int asyattach(dev_info_t *, ddi_attach_cmd_t);
438 static int asydetach(dev_info_t *, ddi_detach_cmd_t);
439 static int asyquiesce(dev_info_t *);
440
441 static struct cb_ops cb_asy_ops = {
442 nodev, /* cb_open */
443 nodev, /* cb_close */
444 nodev, /* cb_strategy */
445 nodev, /* cb_print */
446 nodev, /* cb_dump */
447 nodev, /* cb_read */
448 nodev, /* cb_write */
449 nodev, /* cb_ioctl */
450 nodev, /* cb_devmap */
451 nodev, /* cb_mmap */
452 nodev, /* cb_segmap */
453 nochpoll, /* cb_chpoll */
454 ddi_prop_op, /* cb_prop_op */
455 &asy_str_info, /* cb_stream */
456 D_MP /* cb_flag */
457 };
458
459 struct dev_ops asy_ops = {
460 DEVO_REV, /* devo_rev */
461 0, /* devo_refcnt */
462 asyinfo, /* devo_getinfo */
463 nulldev, /* devo_identify */
464 asyprobe, /* devo_probe */
465 asyattach, /* devo_attach */
466 asydetach, /* devo_detach */
467 nodev, /* devo_reset */
468 &cb_asy_ops, /* devo_cb_ops */
469 NULL, /* devo_bus_ops */
470 NULL, /* power */
471 asyquiesce, /* quiesce */
472 };
473
474 static struct modldrv modldrv = {
475 &mod_driverops, /* Type of module. This one is a driver */
476 "ASY driver",
477 &asy_ops, /* driver ops */
478 };
479
480 static struct modlinkage modlinkage = {
481 MODREV_1,
482 (void *)&modldrv,
483 NULL
484 };
485
486 int
_init(void)487 _init(void)
488 {
489 int i;
490
491 i = ddi_soft_state_init(&asy_soft_state, sizeof (struct asycom), 2);
492 if (i == 0) {
493 mutex_init(&asy_glob_lock, NULL, MUTEX_DRIVER, NULL);
494 if ((i = mod_install(&modlinkage)) != 0) {
495 mutex_destroy(&asy_glob_lock);
496 ddi_soft_state_fini(&asy_soft_state);
497 #ifdef DEBUG
498 } else {
499 if (debug & ASY_DEBUG_INIT)
500 cmn_err(CE_NOTE, "!%s, debug = %x",
501 modldrv.drv_linkinfo, debug);
502 #endif
503 }
504 }
505 return (i);
506 }
507
508 int
_fini(void)509 _fini(void)
510 {
511 int i;
512
513 if ((i = mod_remove(&modlinkage)) == 0) {
514 #ifdef DEBUG
515 if (debug & ASY_DEBUG_INIT)
516 cmn_err(CE_NOTE, "!%s unloading",
517 modldrv.drv_linkinfo);
518 #endif
519 mutex_destroy(&asy_glob_lock);
520 /* free "motherboard-serial-ports" property if allocated */
521 if (com_ports != NULL && com_ports != (int *)standard_com_ports)
522 ddi_prop_free(com_ports);
523 com_ports = NULL;
524 ddi_soft_state_fini(&asy_soft_state);
525 }
526 return (i);
527 }
528
529 int
_info(struct modinfo * modinfop)530 _info(struct modinfo *modinfop)
531 {
532 return (mod_info(&modlinkage, modinfop));
533 }
534
535 static void
asy_put_idx(const struct asycom * asy,asy_reg_t reg,uint8_t val)536 asy_put_idx(const struct asycom *asy, asy_reg_t reg, uint8_t val)
537 {
538 ASSERT(asy->asy_hwtype >= ASY_16950);
539
540 ASSERT(reg >= ASY_ACR);
541 ASSERT(reg <= ASY_NREG);
542
543 /*
544 * The last value written to LCR must not have been the magic value for
545 * EFR access. Every time the driver writes that magic value to access
546 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
547 * value of LCR, so we should be good here.
548 *
549 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
550 */
551
552 /* Write indexed register offset to SPR. */
553 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
554
555 /* Write value to ICR. */
556 asy_put(asy, ASY_ICR, val);
557 }
558
559 static uint8_t
asy_get_idx(const struct asycom * asy,asy_reg_t reg)560 asy_get_idx(const struct asycom *asy, asy_reg_t reg)
561 {
562 uint8_t val;
563
564 ASSERT(asy->asy_hwtype >= ASY_16950);
565
566 ASSERT(reg >= ASY_ACR);
567 ASSERT(reg <= ASY_NREG);
568
569 /* Enable access to ICR in ACR. */
570 asy_put(asy, ASY_ACR, ASY_ACR_ICR | asy->asy_acr);
571
572 /* Write indexed register offset to SPR. */
573 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
574
575 /* Read value from ICR. */
576 val = asy_get(asy, ASY_ICR);
577
578 /* Restore ACR. */
579 asy_put(asy, ASY_ACR, asy->asy_acr);
580
581 return (val);
582 }
583
584 static void
asy_put_add(const struct asycom * asy,asy_reg_t reg,uint8_t val)585 asy_put_add(const struct asycom *asy, asy_reg_t reg, uint8_t val)
586 {
587 ASSERT(asy->asy_hwtype >= ASY_16950);
588
589 /* Only ASR is writable, RFL and TFL are read-only. */
590 ASSERT(reg == ASY_ASR);
591
592 /*
593 * Only ASR[0] (Transmitter Disabled) and ASR[1] (Remote Transmitter
594 * Disabled) are writable.
595 */
596 ASSERT((val & ~(ASY_ASR_TD | ASY_ASR_RTD)) == 0);
597
598 /* Enable access to ASR in ACR. */
599 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
600
601 /* Write value to ASR. */
602 asy_put_reg(asy, reg, val);
603
604 /* Restore ACR. */
605 asy_put(asy, ASY_ACR, asy->asy_acr);
606 }
607
608 static uint8_t
asy_get_add(const struct asycom * asy,asy_reg_t reg)609 asy_get_add(const struct asycom *asy, asy_reg_t reg)
610 {
611 uint8_t val;
612
613 ASSERT(asy->asy_hwtype >= ASY_16950);
614
615 ASSERT(reg >= ASY_ASR);
616 ASSERT(reg <= ASY_TFL);
617
618 /*
619 * The last value written to LCR must not have been the magic value for
620 * EFR access. Every time the driver writes that magic value to access
621 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
622 * value of LCR, so we should be good here.
623 *
624 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
625 */
626
627 /* Enable access to ASR in ACR. */
628 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
629
630 /* Read value from register. */
631 val = asy_get_reg(asy, reg);
632
633 /* Restore ACR. */
634 asy_put(asy, ASY_ACR, 0 | asy->asy_acr);
635
636 return (val);
637 }
638
639 static void
asy_put_ext(const struct asycom * asy,asy_reg_t reg,uint8_t val)640 asy_put_ext(const struct asycom *asy, asy_reg_t reg, uint8_t val)
641 {
642 uint8_t lcr;
643
644 /*
645 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
646 * Only two bits are assigned for auto RTS/CTS, which we don't support
647 * yet.
648 *
649 * So insist we have a 16650 or up.
650 */
651 ASSERT(asy->asy_hwtype >= ASY_16650);
652
653 ASSERT(reg >= ASY_EFR);
654 ASSERT(reg <= ASY_XOFF2);
655
656 /* Save LCR contents. */
657 lcr = asy_get(asy, ASY_LCR);
658
659 /* Enable extended register access. */
660 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
661
662 /* Write extended register */
663 asy_put_reg(asy, reg, val);
664
665 /* Restore previous LCR contents, disabling extended register access. */
666 asy_put(asy, ASY_LCR, lcr);
667 }
668
669 static uint8_t
asy_get_ext(const struct asycom * asy,asy_reg_t reg)670 asy_get_ext(const struct asycom *asy, asy_reg_t reg)
671 {
672 uint8_t lcr, val;
673
674 /*
675 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
676 * Only two bits are assigned for auto RTS/CTS, which we don't support
677 * yet.
678 *
679 * So insist we have a 16650 or up.
680 */
681 ASSERT(asy->asy_hwtype >= ASY_16650);
682
683 ASSERT(reg >= ASY_EFR);
684 ASSERT(reg <= ASY_XOFF2);
685
686 /* Save LCR contents. */
687 lcr = asy_get(asy, ASY_LCR);
688
689 /* Enable extended register access. */
690 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
691
692 /* Read extended register */
693 val = asy_get_reg(asy, reg);
694
695 /* Restore previous LCR contents, disabling extended register access. */
696 asy_put(asy, ASY_LCR, lcr);
697
698 return (val);
699 }
700
701 static void
asy_put_reg(const struct asycom * asy,asy_reg_t reg,uint8_t val)702 asy_put_reg(const struct asycom *asy, asy_reg_t reg, uint8_t val)
703 {
704 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
705
706 ddi_put8(asy->asy_iohandle,
707 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off, val);
708 }
709
710 static uint8_t
asy_get_reg(const struct asycom * asy,asy_reg_t reg)711 asy_get_reg(const struct asycom *asy, asy_reg_t reg)
712 {
713 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
714
715 return (ddi_get8(asy->asy_iohandle,
716 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off));
717 }
718
719 static void
asy_put(const struct asycom * asy,asy_reg_t reg,uint8_t val)720 asy_put(const struct asycom *asy, asy_reg_t reg, uint8_t val)
721 {
722 ASSERT(mutex_owned(&asy->asy_excl_hi));
723
724 ASSERT(reg > ASY_ILLEGAL);
725 ASSERT(reg < ASY_NREG);
726
727 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
728 ASSERT(asy_reg_table[reg].asy_put_reg != NULL);
729
730 asy_reg_table[reg].asy_put_reg(asy, reg, val);
731 }
732
733 static uint8_t
asy_get(const struct asycom * asy,asy_reg_t reg)734 asy_get(const struct asycom *asy, asy_reg_t reg)
735 {
736 uint8_t val;
737
738 ASSERT(mutex_owned(&asy->asy_excl_hi));
739
740 ASSERT(reg > ASY_ILLEGAL);
741 ASSERT(reg < ASY_NREG);
742
743 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
744 ASSERT(asy_reg_table[reg].asy_get_reg != NULL);
745
746 val = asy_reg_table[reg].asy_get_reg(asy, reg);
747
748 return (val);
749 }
750
751 static void
asy_set(const struct asycom * asy,asy_reg_t reg,uint8_t bits)752 asy_set(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
753 {
754 uint8_t val = asy_get(asy, reg);
755
756 asy_put(asy, reg, val | bits);
757 }
758
759 static void
asy_clr(const struct asycom * asy,asy_reg_t reg,uint8_t bits)760 asy_clr(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
761 {
762 uint8_t val = asy_get(asy, reg);
763
764 asy_put(asy, reg, val & ~bits);
765 }
766
767 static void
asy_enable_interrupts(const struct asycom * asy,uint8_t intr)768 asy_enable_interrupts(const struct asycom *asy, uint8_t intr)
769 {
770 /* Don't touch any IER bits we don't support. */
771 intr &= ASY_IER_ALL;
772
773 asy_set(asy, ASY_IER, intr);
774 }
775
776 static void
asy_disable_interrupts(const struct asycom * asy,uint8_t intr)777 asy_disable_interrupts(const struct asycom *asy, uint8_t intr)
778 {
779 /* Don't touch any IER bits we don't support. */
780 intr &= ASY_IER_ALL;
781
782 asy_clr(asy, ASY_IER, intr);
783 }
784
785 static void
asy_set_baudrate(const struct asycom * asy,int baudrate)786 asy_set_baudrate(const struct asycom *asy, int baudrate)
787 {
788 uint8_t tcr;
789
790 if (baudrate == 0)
791 return;
792
793 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
794 return;
795
796 tcr = asy_baud_tab[baudrate].asy_tcr;
797
798 if (tcr != 0 && asy->asy_hwtype < ASY_16950)
799 return;
800
801 if (asy->asy_hwtype >= ASY_16950) {
802 if (tcr == 0x01) {
803 /* Isochronous 1x mode is selected in CKS, not TCR. */
804 asy_put(asy, ASY_CKS,
805 ASY_CKS_RCLK_1X | ASY_CKS_TCLK_1X);
806 asy_put(asy, ASY_TCR, 0);
807 } else {
808 /* Reset CKS in case it was set to 1x mode. */
809 asy_put(asy, ASY_CKS, 0);
810
811 ASSERT(tcr == 0x00 || tcr >= 0x04 || tcr <= 0x0f);
812 asy_put(asy, ASY_TCR, tcr);
813 }
814 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
815 "setting baudrate %d, CKS 0x%02x, TCR 0x%02x",
816 baudrate, asy_get(asy, ASY_CKS), asy_get(asy, ASY_TCR));
817 }
818
819 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
820 "setting baudrate %d, divisor 0x%02x%02x",
821 baudrate, asy_baud_tab[baudrate].asy_dlh,
822 asy_baud_tab[baudrate].asy_dll);
823
824 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
825
826 asy_put(asy, ASY_DLL, asy_baud_tab[baudrate].asy_dll);
827 asy_put(asy, ASY_DLH, asy_baud_tab[baudrate].asy_dlh);
828
829 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
830 }
831
832 /*
833 * Loop until the TSR is empty.
834 *
835 * The wait period is clock / (baud * 16) * 16 * 2.
836 */
837 static void
asy_wait_baudrate(struct asycom * asy)838 asy_wait_baudrate(struct asycom *asy)
839 {
840 struct asyncline *async = asy->asy_priv;
841 int rate = BAUDINDEX(async->async_ttycommon.t_cflag);
842 clock_t usec =
843 ((((clock_t)asy_baud_tab[rate].asy_dlh) << 8) |
844 ((clock_t)asy_baud_tab[rate].asy_dll)) * 16 * 2;
845
846 ASSERT(mutex_owned(&asy->asy_excl));
847 ASSERT(mutex_owned(&asy->asy_excl_hi));
848
849 while ((asy_get(asy, ASY_LSR) & ASY_LSR_TEMT) == 0) {
850 mutex_exit(&asy->asy_excl_hi);
851 mutex_exit(&asy->asy_excl);
852 drv_usecwait(usec);
853 mutex_enter(&asy->asy_excl);
854 mutex_enter(&asy->asy_excl_hi);
855 }
856 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
857 }
858
859 void
async_put_suspq(struct asycom * asy,mblk_t * mp)860 async_put_suspq(struct asycom *asy, mblk_t *mp)
861 {
862 struct asyncline *async = asy->asy_priv;
863
864 ASSERT(mutex_owned(&asy->asy_excl));
865
866 if (async->async_suspqf == NULL)
867 async->async_suspqf = mp;
868 else
869 async->async_suspqb->b_next = mp;
870
871 async->async_suspqb = mp;
872 }
873
874 static mblk_t *
async_get_suspq(struct asycom * asy)875 async_get_suspq(struct asycom *asy)
876 {
877 struct asyncline *async = asy->asy_priv;
878 mblk_t *mp;
879
880 ASSERT(mutex_owned(&asy->asy_excl));
881
882 if ((mp = async->async_suspqf) != NULL) {
883 async->async_suspqf = mp->b_next;
884 mp->b_next = NULL;
885 } else {
886 async->async_suspqb = NULL;
887 }
888 return (mp);
889 }
890
891 static void
async_process_suspq(struct asycom * asy)892 async_process_suspq(struct asycom *asy)
893 {
894 struct asyncline *async = asy->asy_priv;
895 mblk_t *mp;
896
897 ASSERT(mutex_owned(&asy->asy_excl));
898
899 while ((mp = async_get_suspq(asy)) != NULL) {
900 queue_t *q;
901
902 q = async->async_ttycommon.t_writeq;
903 ASSERT(q != NULL);
904 mutex_exit(&asy->asy_excl);
905 (void) asywputdo(q, mp, B_FALSE);
906 mutex_enter(&asy->asy_excl);
907 }
908 async->async_flags &= ~ASYNC_DDI_SUSPENDED;
909 cv_broadcast(&async->async_flags_cv);
910 }
911
912 static int
asy_get_bus_type(dev_info_t * devinfo)913 asy_get_bus_type(dev_info_t *devinfo)
914 {
915 char *prop;
916 int bustype;
917
918 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "device_type",
919 &prop) != DDI_PROP_SUCCESS &&
920 ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "bus-type",
921 &prop) != DDI_PROP_SUCCESS) {
922 dev_err(devinfo, CE_WARN,
923 "!%s: can't figure out device type for parent \"%s\"",
924 __func__, ddi_get_name(ddi_get_parent(devinfo)));
925 return (ASY_BUS_UNKNOWN);
926 }
927
928 if (strcmp(prop, "isa") == 0)
929 bustype = ASY_BUS_ISA;
930 else if (strcmp(prop, "pci") == 0)
931 bustype = ASY_BUS_PCI;
932 else if (strcmp(prop, "pciex") == 0)
933 return (ASY_BUS_PCI);
934 else
935 bustype = ASY_BUS_UNKNOWN;
936
937 ddi_prop_free(prop);
938 return (bustype);
939 }
940
941 static int
asy_get_io_regnum_pci(dev_info_t * devi,struct asycom * asy)942 asy_get_io_regnum_pci(dev_info_t *devi, struct asycom *asy)
943 {
944 int reglen, nregs;
945 int regnum, i;
946 uint64_t size;
947 struct pci_phys_spec *reglist;
948
949 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
950 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
951 dev_err(devi, CE_WARN, "!%s: reg property"
952 " not found in devices property list", __func__);
953 return (-1);
954 }
955
956 regnum = -1;
957 nregs = reglen / sizeof (*reglist);
958 for (i = 0; i < nregs; i++) {
959 switch (reglist[i].pci_phys_hi & PCI_ADDR_MASK) {
960 case PCI_ADDR_IO: /* I/O bus reg property */
961 if (regnum == -1) /* use only the first one */
962 regnum = i;
963 break;
964
965 default:
966 break;
967 }
968 }
969
970 /* check for valid count of registers */
971 if (regnum >= 0) {
972 size = ((uint64_t)reglist[regnum].pci_size_low) |
973 ((uint64_t)reglist[regnum].pci_size_hi) << 32;
974 if (size < 8)
975 regnum = -1;
976 }
977 kmem_free(reglist, reglen);
978 return (regnum);
979 }
980
981 static int
asy_get_io_regnum_isa(dev_info_t * devi,struct asycom * asy)982 asy_get_io_regnum_isa(dev_info_t *devi, struct asycom *asy)
983 {
984 int regnum = -1;
985 int reglen, nregs;
986 struct {
987 uint_t bustype;
988 int base;
989 int size;
990 } *reglist;
991
992 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
993 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
994 dev_err(devi, CE_WARN, "!%s: reg property not found "
995 "in devices property list", __func__);
996 return (-1);
997 }
998
999 nregs = reglen / sizeof (*reglist);
1000
1001 /*
1002 * Find the first I/O bus in the "reg" property.
1003 */
1004 for (int i = 0; i < nregs && regnum == -1; i++) {
1005 if (reglist[i].bustype == 1) {
1006 regnum = i;
1007 break;
1008 }
1009 }
1010
1011 /* check for valid count of registers */
1012 if ((regnum < 0) || (reglist[regnum].size < 8))
1013 regnum = -1;
1014
1015 kmem_free(reglist, reglen);
1016
1017 return (regnum);
1018 }
1019
1020 static int
asy_get_io_regnum(dev_info_t * devinfo,struct asycom * asy)1021 asy_get_io_regnum(dev_info_t *devinfo, struct asycom *asy)
1022 {
1023 switch (asy_get_bus_type(devinfo)) {
1024 case ASY_BUS_ISA:
1025 return (asy_get_io_regnum_isa(devinfo, asy));
1026 case ASY_BUS_PCI:
1027 return (asy_get_io_regnum_pci(devinfo, asy));
1028 default:
1029 return (-1);
1030 }
1031 }
1032
1033 static void
asy_intr_free(struct asycom * asy)1034 asy_intr_free(struct asycom *asy)
1035 {
1036 int i;
1037
1038 for (i = 0; i < asy->asy_intr_cnt; i++) {
1039 if (asy->asy_inth[i] == NULL)
1040 break;
1041
1042 if ((asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK) != 0)
1043 (void) ddi_intr_block_disable(&asy->asy_inth[i], 1);
1044 else
1045 (void) ddi_intr_disable(asy->asy_inth[i]);
1046
1047 (void) ddi_intr_remove_handler(asy->asy_inth[i]);
1048 (void) ddi_intr_free(asy->asy_inth[i]);
1049 }
1050
1051 kmem_free(asy->asy_inth, asy->asy_inth_sz);
1052 asy->asy_inth = NULL;
1053 asy->asy_inth_sz = 0;
1054 }
1055
1056 static int
asy_intr_setup(struct asycom * asy,int intr_type)1057 asy_intr_setup(struct asycom *asy, int intr_type)
1058 {
1059 int nintrs, navail, count;
1060 int ret;
1061 int i;
1062
1063 if (asy->asy_intr_types == 0) {
1064 ret = ddi_intr_get_supported_types(asy->asy_dip,
1065 &asy->asy_intr_types);
1066 if (ret != DDI_SUCCESS) {
1067 asyerror(asy, CE_WARN,
1068 "ddi_intr_get_supported_types failed");
1069 return (ret);
1070 }
1071 }
1072
1073 if ((asy->asy_intr_types & intr_type) == 0)
1074 return (DDI_FAILURE);
1075
1076 ret = ddi_intr_get_nintrs(asy->asy_dip, intr_type, &nintrs);
1077 if (ret != DDI_SUCCESS) {
1078 asyerror(asy, CE_WARN, "ddi_intr_get_nintrs failed, type %d",
1079 intr_type);
1080 return (ret);
1081 }
1082
1083 if (nintrs < 1) {
1084 asyerror(asy, CE_WARN, "no interrupts of type %d", intr_type);
1085 return (DDI_FAILURE);
1086 }
1087
1088 ret = ddi_intr_get_navail(asy->asy_dip, intr_type, &navail);
1089 if (ret != DDI_SUCCESS) {
1090 asyerror(asy, CE_WARN, "ddi_intr_get_navail failed, type %d",
1091 intr_type);
1092 return (ret);
1093 }
1094
1095 if (navail < 1) {
1096 asyerror(asy, CE_WARN, "no available interrupts, type %d",
1097 intr_type);
1098 return (DDI_FAILURE);
1099 }
1100
1101 /*
1102 * Some PCI(e) RS232 adapters seem to support more than one interrupt,
1103 * but the asy driver really doesn't.
1104 */
1105 asy->asy_inth_sz = sizeof (ddi_intr_handle_t);
1106 asy->asy_inth = kmem_zalloc(asy->asy_inth_sz, KM_SLEEP);
1107 ret = ddi_intr_alloc(asy->asy_dip, asy->asy_inth, intr_type, 0, 1,
1108 &count, 0);
1109 if (ret != DDI_SUCCESS) {
1110 asyerror(asy, CE_WARN, "ddi_intr_alloc failed, count %d, "
1111 "type %d", navail, intr_type);
1112 goto fail;
1113 }
1114
1115 if (count != 1) {
1116 asyerror(asy, CE_WARN, "ddi_intr_alloc returned not 1 but %d "
1117 "interrupts of type %d", count, intr_type);
1118 goto fail;
1119 }
1120
1121 asy->asy_intr_cnt = count;
1122
1123 ret = ddi_intr_get_pri(asy->asy_inth[0], &asy->asy_intr_pri);
1124 if (ret != DDI_SUCCESS) {
1125 asyerror(asy, CE_WARN, "ddi_intr_get_pri failed, type %d",
1126 intr_type);
1127 goto fail;
1128 }
1129
1130 for (i = 0; i < count; i++) {
1131 ret = ddi_intr_add_handler(asy->asy_inth[i], asyintr,
1132 (void *)asy, (void *)(uintptr_t)i);
1133 if (ret != DDI_SUCCESS) {
1134 asyerror(asy, CE_WARN, "ddi_intr_add_handler failed, "
1135 "int %d, type %d", i, intr_type);
1136 goto fail;
1137 }
1138 }
1139
1140 (void) ddi_intr_get_cap(asy->asy_inth[0], &asy->asy_intr_cap);
1141
1142 for (i = 0; i < count; i++) {
1143 if (asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK)
1144 ret = ddi_intr_block_enable(&asy->asy_inth[i], 1);
1145 else
1146 ret = ddi_intr_enable(asy->asy_inth[i]);
1147
1148 if (ret != DDI_SUCCESS) {
1149 asyerror(asy, CE_WARN,
1150 "enabling interrupt %d failed, type %d",
1151 i, intr_type);
1152 goto fail;
1153 }
1154 }
1155
1156 asy->asy_intr_type = intr_type;
1157 return (DDI_SUCCESS);
1158
1159 fail:
1160 asy_intr_free(asy);
1161 return (ret);
1162 }
1163
1164 static void
asy_softintr_free(struct asycom * asy)1165 asy_softintr_free(struct asycom *asy)
1166 {
1167 (void) ddi_intr_remove_softint(asy->asy_soft_inth);
1168 }
1169
1170 static int
asy_softintr_setup(struct asycom * asy)1171 asy_softintr_setup(struct asycom *asy)
1172 {
1173 int ret;
1174
1175 ret = ddi_intr_add_softint(asy->asy_dip, &asy->asy_soft_inth,
1176 ASY_SOFT_INT_PRI, asysoftintr, asy);
1177 if (ret != DDI_SUCCESS) {
1178 asyerror(asy, CE_WARN, "ddi_intr_add_softint failed");
1179 return (ret);
1180 }
1181
1182 /*
1183 * This may seem pointless since we specified ASY_SOFT_INT_PRI above,
1184 * but then it's probably a good idea to consider the soft interrupt
1185 * priority an opaque value and don't hardcode any assumptions about
1186 * its actual value here.
1187 */
1188 ret = ddi_intr_get_softint_pri(asy->asy_soft_inth,
1189 &asy->asy_soft_intr_pri);
1190 if (ret != DDI_SUCCESS) {
1191 asyerror(asy, CE_WARN, "ddi_intr_get_softint_pri failed");
1192 return (ret);
1193 }
1194
1195 return (DDI_SUCCESS);
1196 }
1197
1198
1199 static int
asy_resume(dev_info_t * devi)1200 asy_resume(dev_info_t *devi)
1201 {
1202 struct asyncline *async;
1203 struct asycom *asy;
1204 int instance = ddi_get_instance(devi); /* find out which unit */
1205
1206 #ifdef DEBUG
1207 if (asy_nosuspend)
1208 return (DDI_SUCCESS);
1209 #endif
1210 asy = ddi_get_soft_state(asy_soft_state, instance);
1211 if (asy == NULL)
1212 return (DDI_FAILURE);
1213
1214 mutex_enter(&asy->asy_soft_sr);
1215 mutex_enter(&asy->asy_excl);
1216 mutex_enter(&asy->asy_excl_hi);
1217
1218 async = asy->asy_priv;
1219 asy_disable_interrupts(asy, ASY_IER_ALL);
1220 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1221 mutex_exit(&asy->asy_excl_hi);
1222 mutex_exit(&asy->asy_excl);
1223 mutex_exit(&asy->asy_soft_sr);
1224 ASY_DPRINTF(asy, ASY_DEBUG_INIT,
1225 "Cannot identify UART chip at %p",
1226 (void *)asy->asy_ioaddr);
1227 return (DDI_FAILURE);
1228 }
1229 asy->asy_flags &= ~ASY_DDI_SUSPENDED;
1230 if (async->async_flags & ASYNC_ISOPEN) {
1231 asy_program(asy, ASY_INIT);
1232 /* Kick off output */
1233 if (async->async_ocnt > 0) {
1234 async_resume(async);
1235 } else {
1236 mutex_exit(&asy->asy_excl_hi);
1237 if (async->async_xmitblk)
1238 freeb(async->async_xmitblk);
1239 async->async_xmitblk = NULL;
1240 async_start(async);
1241 mutex_enter(&asy->asy_excl_hi);
1242 }
1243 asysetsoft(asy);
1244 }
1245 mutex_exit(&asy->asy_excl_hi);
1246 mutex_exit(&asy->asy_excl);
1247 mutex_exit(&asy->asy_soft_sr);
1248
1249 mutex_enter(&asy->asy_excl);
1250 if (async->async_flags & ASYNC_RESUME_BUFCALL) {
1251 async->async_wbufcid = bufcall(async->async_wbufcds,
1252 BPRI_HI, (void (*)(void *)) async_reioctl,
1253 (void *)(intptr_t)async->async_common->asy_unit);
1254 async->async_flags &= ~ASYNC_RESUME_BUFCALL;
1255 }
1256 async_process_suspq(asy);
1257 mutex_exit(&asy->asy_excl);
1258 return (DDI_SUCCESS);
1259 }
1260
1261 static int
asy_suspend(struct asycom * asy)1262 asy_suspend(struct asycom *asy)
1263 {
1264 struct asyncline *async = asy->asy_priv;
1265 unsigned i;
1266 uchar_t lsr;
1267
1268 #ifdef DEBUG
1269 if (asy_nosuspend)
1270 return (DDI_SUCCESS);
1271 #endif
1272 mutex_enter(&asy->asy_excl);
1273
1274 ASSERT(async->async_ops >= 0);
1275 while (async->async_ops > 0)
1276 cv_wait(&async->async_ops_cv, &asy->asy_excl);
1277
1278 async->async_flags |= ASYNC_DDI_SUSPENDED;
1279
1280 /* Wait for timed break and delay to complete */
1281 while ((async->async_flags & (ASYNC_BREAK|ASYNC_DELAY))) {
1282 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0) {
1283 async_process_suspq(asy);
1284 mutex_exit(&asy->asy_excl);
1285 return (DDI_FAILURE);
1286 }
1287 }
1288
1289 /* Clear untimed break */
1290 if (async->async_flags & ASYNC_OUT_SUSPEND)
1291 async_resume_utbrk(async);
1292
1293 mutex_exit(&asy->asy_excl);
1294
1295 mutex_enter(&asy->asy_soft_sr);
1296 mutex_enter(&asy->asy_excl);
1297 if (async->async_wbufcid != 0) {
1298 bufcall_id_t bcid = async->async_wbufcid;
1299 async->async_wbufcid = 0;
1300 async->async_flags |= ASYNC_RESUME_BUFCALL;
1301 mutex_exit(&asy->asy_excl);
1302 unbufcall(bcid);
1303 mutex_enter(&asy->asy_excl);
1304 }
1305 mutex_enter(&asy->asy_excl_hi);
1306
1307 asy_disable_interrupts(asy, ASY_IER_ALL);
1308 asy->asy_flags |= ASY_DDI_SUSPENDED;
1309
1310 /*
1311 * Hardware interrupts are disabled we can drop our high level
1312 * lock and proceed.
1313 */
1314 mutex_exit(&asy->asy_excl_hi);
1315
1316 /* Process remaining RX characters and RX errors, if any */
1317 lsr = asy_get(asy, ASY_LSR);
1318 async_rxint(asy, lsr);
1319
1320 /* Wait for TX to drain */
1321 for (i = 1000; i > 0; i--) {
1322 lsr = asy_get(asy, ASY_LSR);
1323 if ((lsr & (ASY_LSR_TEMT | ASY_LSR_THRE)) ==
1324 (ASY_LSR_TEMT | ASY_LSR_THRE))
1325 break;
1326 delay(drv_usectohz(10000));
1327 }
1328 if (i == 0)
1329 asyerror(asy, CE_WARN, "transmitter wasn't drained before "
1330 "driver was suspended");
1331
1332 mutex_exit(&asy->asy_excl);
1333 mutex_exit(&asy->asy_soft_sr);
1334
1335 return (DDI_SUCCESS);
1336 }
1337
1338 static int
asydetach(dev_info_t * devi,ddi_detach_cmd_t cmd)1339 asydetach(dev_info_t *devi, ddi_detach_cmd_t cmd)
1340 {
1341 int instance;
1342 struct asycom *asy;
1343
1344 instance = ddi_get_instance(devi); /* find out which unit */
1345
1346 asy = ddi_get_soft_state(asy_soft_state, instance);
1347 if (asy == NULL)
1348 return (DDI_FAILURE);
1349
1350 switch (cmd) {
1351 case DDI_DETACH:
1352 break;
1353
1354 case DDI_SUSPEND:
1355 return (asy_suspend(asy));
1356
1357 default:
1358 return (DDI_FAILURE);
1359 }
1360
1361 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "%s shutdown", asy_hw_name(asy));
1362
1363 /*
1364 * Ensure that interrupts are disabled prior to destroying data and
1365 * mutexes that they depend on.
1366 */
1367 if ((asy->asy_progress & ASY_PROGRESS_INT) != 0)
1368 asy_intr_free(asy);
1369
1370 if ((asy->asy_progress & ASY_PROGRESS_SOFTINT) != 0)
1371 asy_softintr_free(asy);
1372
1373 if ((asy->asy_progress & ASY_PROGRESS_ASYNC) != 0) {
1374 struct asyncline *async = asy->asy_priv;
1375
1376 asy->asy_priv = NULL;
1377 /* cancel DTR hold timeout */
1378 if (async->async_dtrtid != 0) {
1379 (void) untimeout(async->async_dtrtid);
1380 async->async_dtrtid = 0;
1381 }
1382 cv_destroy(&async->async_flags_cv);
1383 kmem_free(async, sizeof (struct asyncline));
1384 }
1385
1386 if ((asy->asy_progress & ASY_PROGRESS_MINOR) != 0)
1387 ddi_remove_minor_node(devi, NULL);
1388
1389 if ((asy->asy_progress & ASY_PROGRESS_MUTEX) != 0) {
1390 mutex_destroy(&asy->asy_excl);
1391 mutex_destroy(&asy->asy_excl_hi);
1392 mutex_destroy(&asy->asy_soft_lock);
1393 }
1394
1395 if ((asy->asy_progress & ASY_PROGRESS_REGS) != 0)
1396 ddi_regs_map_free(&asy->asy_iohandle);
1397
1398 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "shutdown complete");
1399 ddi_set_driver_private(devi, NULL);
1400 asy_soft_state_free(asy);
1401
1402 return (DDI_SUCCESS);
1403 }
1404
1405 /*
1406 * asyprobe
1407 * We don't bother probing for the hardware, as since Solaris 2.6, device
1408 * nodes are only created for auto-detected hardware or nodes explicitly
1409 * created by the user, e.g. via the DCA. However, we should check the
1410 * device node is at least vaguely usable, i.e. we have a block of 8 i/o
1411 * ports. This prevents attempting to attach to bogus serial ports which
1412 * some BIOSs still partially report when they are disabled in the BIOS.
1413 */
1414 static int
asyprobe(dev_info_t * devi)1415 asyprobe(dev_info_t *devi)
1416 {
1417 return ((asy_get_io_regnum(devi, NULL) < 0) ?
1418 DDI_PROBE_FAILURE : DDI_PROBE_DONTCARE);
1419 }
1420
1421 static int
asyattach(dev_info_t * devi,ddi_attach_cmd_t cmd)1422 asyattach(dev_info_t *devi, ddi_attach_cmd_t cmd)
1423 {
1424 int instance;
1425 int mcr;
1426 int ret;
1427 int regnum = 0;
1428 int i;
1429 struct asycom *asy;
1430 char name[ASY_MINOR_LEN];
1431 int status;
1432 static ddi_device_acc_attr_t ioattr = {
1433 .devacc_attr_version = DDI_DEVICE_ATTR_V1,
1434 .devacc_attr_endian_flags = DDI_NEVERSWAP_ACC,
1435 .devacc_attr_dataorder = DDI_STRICTORDER_ACC,
1436 .devacc_attr_access = DDI_DEFAULT_ACC
1437 };
1438
1439 switch (cmd) {
1440 case DDI_ATTACH:
1441 break;
1442
1443 case DDI_RESUME:
1444 return (asy_resume(devi));
1445
1446 default:
1447 return (DDI_FAILURE);
1448 }
1449
1450 mutex_enter(&asy_glob_lock);
1451 if (com_ports == NULL) { /* need to initialize com_ports */
1452 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, devi, 0,
1453 "motherboard-serial-ports", &com_ports, &num_com_ports) !=
1454 DDI_PROP_SUCCESS) {
1455 /* Use our built-in COM[1234] values */
1456 com_ports = (int *)standard_com_ports;
1457 num_com_ports = sizeof (standard_com_ports) /
1458 sizeof (standard_com_ports[0]);
1459 }
1460 if (num_com_ports > 10) {
1461 /* We run out of single digits for device properties */
1462 num_com_ports = 10;
1463 cmn_err(CE_WARN,
1464 "%s: more than %d motherboard-serial-ports",
1465 asy_info.mi_idname, num_com_ports);
1466 }
1467 }
1468 mutex_exit(&asy_glob_lock);
1469
1470 instance = ddi_get_instance(devi); /* find out which unit */
1471 ret = ddi_soft_state_zalloc(asy_soft_state, instance);
1472 if (ret != DDI_SUCCESS)
1473 return (DDI_FAILURE);
1474 asy = ddi_get_soft_state(asy_soft_state, instance);
1475
1476 asy->asy_dip = devi;
1477 #ifdef DEBUG
1478 asy->asy_debug = debug;
1479 #endif
1480 asy->asy_unit = instance;
1481
1482 regnum = asy_get_io_regnum(devi, asy);
1483
1484 if (regnum < 0 ||
1485 ddi_regs_map_setup(devi, regnum, (caddr_t *)&asy->asy_ioaddr,
1486 (offset_t)0, (offset_t)0, &ioattr, &asy->asy_iohandle)
1487 != DDI_SUCCESS) {
1488 asyerror(asy, CE_WARN, "could not map UART registers @ %p",
1489 (void *)asy->asy_ioaddr);
1490 goto fail;
1491 }
1492
1493 asy->asy_progress |= ASY_PROGRESS_REGS;
1494
1495 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p", (void *)asy->asy_ioaddr);
1496
1497 /*
1498 * Lookup the i/o address to see if this is a standard COM port
1499 * in which case we assign it the correct tty[a-d] to match the
1500 * COM port number, or some other i/o address in which case it
1501 * will be assigned /dev/term/[0123...] in some rather arbitrary
1502 * fashion.
1503 */
1504 for (i = 0; i < num_com_ports; i++) {
1505 if (asy->asy_ioaddr == (uint8_t *)(uintptr_t)com_ports[i]) {
1506 asy->asy_com_port = i + 1;
1507 break;
1508 }
1509 }
1510
1511 /*
1512 * It appears that there was async hardware that on reset did not clear
1513 * IER. Hence when we enable interrupts, this hardware would cause the
1514 * system to hang if there was input available.
1515 *
1516 * Don't use asy_disable_interrupts() as the mutexes haven't been
1517 * initialized yet.
1518 */
1519 ddi_put8(asy->asy_iohandle,
1520 asy->asy_ioaddr + asy_reg_table[ASY_IER].asy_reg_off, 0);
1521
1522 /*
1523 * Establish default settings:
1524 * - use RTS/DTR after open
1525 * - 8N1 data format
1526 * - 9600 baud
1527 */
1528 asy->asy_mcr |= ASY_MCR_RTS | ASY_MCR_DTR;
1529 asy->asy_lcr = ASY_LCR_STOP1 | ASY_LCR_BITS8;
1530 asy->asy_bidx = B9600;
1531 asy->asy_fifo_buf = 1;
1532 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
1533
1534 #ifdef DEBUG
1535 asy->asy_msint_cnt = 0; /* # of times in async_msint */
1536 #endif
1537 mcr = 0; /* don't enable until open */
1538
1539 if (asy->asy_com_port != 0) {
1540 /*
1541 * For motherboard ports, emulate tty eeprom properties.
1542 * Actually, we can't tell if a port is motherboard or not,
1543 * so for "motherboard ports", read standard DOS COM ports.
1544 */
1545 switch (asy_getproperty(devi, asy, "ignore-cd")) {
1546 case 0: /* *-ignore-cd=False */
1547 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1548 "clear ASY_IGNORE_CD");
1549 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1550 break;
1551 case 1: /* *-ignore-cd=True */
1552 /*FALLTHRU*/
1553 default: /* *-ignore-cd not defined */
1554 /*
1555 * We set rather silly defaults of soft carrier on
1556 * and DTR/RTS raised here because it might be that
1557 * one of the motherboard ports is the system console.
1558 */
1559 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1560 "set ASY_IGNORE_CD, set RTS & DTR");
1561 mcr = asy->asy_mcr; /* rts/dtr on */
1562 asy->asy_flags |= ASY_IGNORE_CD; /* ignore cd */
1563 break;
1564 }
1565
1566 /* Property for not raising DTR/RTS */
1567 switch (asy_getproperty(devi, asy, "rts-dtr-off")) {
1568 case 0: /* *-rts-dtr-off=False */
1569 asy->asy_flags |= ASY_RTS_DTR_OFF; /* OFF */
1570 mcr = asy->asy_mcr; /* rts/dtr on */
1571 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1572 "ASY_RTS_DTR_OFF set and DTR & RTS set");
1573 break;
1574 case 1: /* *-rts-dtr-off=True */
1575 /*FALLTHRU*/
1576 default: /* *-rts-dtr-off undefined */
1577 break;
1578 }
1579
1580 /* Parse property for tty modes */
1581 asy_parse_mode(devi, asy);
1582 } else {
1583 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1584 "clear ASY_IGNORE_CD, clear RTS & DTR");
1585 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1586 }
1587
1588 /*
1589 * Install per instance software interrupt handler.
1590 */
1591 if (asy_softintr_setup(asy) != DDI_SUCCESS) {
1592 asyerror(asy, CE_WARN, "Cannot set soft interrupt");
1593 goto fail;
1594 }
1595
1596 asy->asy_progress |= ASY_PROGRESS_SOFTINT;
1597
1598 /*
1599 * Install interrupt handler for this device.
1600 */
1601 if ((asy_intr_setup(asy, DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) &&
1602 (asy_intr_setup(asy, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) &&
1603 (asy_intr_setup(asy, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS)) {
1604 asyerror(asy, CE_WARN, "Cannot set device interrupt");
1605 goto fail;
1606 }
1607
1608 asy->asy_progress |= ASY_PROGRESS_INT;
1609
1610 /*
1611 * Initialize mutexes before accessing the hardware
1612 */
1613 mutex_init(&asy->asy_soft_lock, NULL, MUTEX_DRIVER,
1614 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1615 mutex_init(&asy->asy_soft_sr, NULL, MUTEX_DRIVER,
1616 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1617
1618 mutex_init(&asy->asy_excl, NULL, MUTEX_DRIVER, NULL);
1619 mutex_init(&asy->asy_excl_hi, NULL, MUTEX_DRIVER,
1620 DDI_INTR_PRI(asy->asy_intr_pri));
1621
1622 asy->asy_progress |= ASY_PROGRESS_MUTEX;
1623
1624 mutex_enter(&asy->asy_excl);
1625 mutex_enter(&asy->asy_excl_hi);
1626
1627 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1628 ASY_DPRINTF(asy, ASY_DEBUG_INIT,
1629 "Cannot identify UART chip at %p",
1630 (void *)asy->asy_ioaddr);
1631 goto fail;
1632 }
1633
1634 asy_disable_interrupts(asy, ASY_IER_ALL);
1635 asy_put(asy, ASY_LCR, asy->asy_lcr);
1636 asy_set_baudrate(asy, asy->asy_bidx);
1637 asy_put(asy, ASY_MCR, mcr);
1638
1639 mutex_exit(&asy->asy_excl_hi);
1640 mutex_exit(&asy->asy_excl);
1641
1642 asyinit(asy); /* initialize the asyncline structure */
1643 asy->asy_progress |= ASY_PROGRESS_ASYNC;
1644
1645 /* create minor device nodes for this device */
1646 if (asy->asy_com_port != 0) {
1647 /*
1648 * For DOS COM ports, add letter suffix so
1649 * devfsadm can create correct link names.
1650 */
1651 name[0] = asy->asy_com_port + 'a' - 1;
1652 name[1] = '\0';
1653 } else {
1654 /*
1655 * asy port which isn't a standard DOS COM
1656 * port gets a numeric name based on instance
1657 */
1658 (void) snprintf(name, ASY_MINOR_LEN, "%d", instance);
1659 }
1660 status = ddi_create_minor_node(devi, name, S_IFCHR, instance,
1661 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB : DDI_NT_SERIAL, 0);
1662 if (status == DDI_SUCCESS) {
1663 (void) strcat(name, ",cu");
1664 status = ddi_create_minor_node(devi, name, S_IFCHR,
1665 OUTLINE | instance,
1666 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB_DO :
1667 DDI_NT_SERIAL_DO, 0);
1668 }
1669
1670 if (status != DDI_SUCCESS)
1671 goto fail;
1672
1673 asy->asy_progress |= ASY_PROGRESS_MINOR;
1674
1675 /*
1676 * Fill in the polled I/O structure.
1677 */
1678 asy->polledio.cons_polledio_version = CONSPOLLEDIO_V0;
1679 asy->polledio.cons_polledio_argument = (cons_polledio_arg_t)asy;
1680 asy->polledio.cons_polledio_putchar = asyputchar;
1681 asy->polledio.cons_polledio_getchar = asygetchar;
1682 asy->polledio.cons_polledio_ischar = asyischar;
1683 asy->polledio.cons_polledio_enter = asy_polledio_enter;
1684 asy->polledio.cons_polledio_exit = asy_polledio_exit;
1685
1686 ddi_set_driver_private(devi, asy);
1687 ddi_report_dev(devi);
1688 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
1689 return (DDI_SUCCESS);
1690
1691 fail:
1692 (void) asydetach(devi, DDI_DETACH);
1693 return (DDI_FAILURE);
1694 }
1695
1696 static int
asyinfo(dev_info_t * dip __unused,ddi_info_cmd_t infocmd,void * arg,void ** result)1697 asyinfo(dev_info_t *dip __unused, ddi_info_cmd_t infocmd, void *arg,
1698 void **result)
1699 {
1700 dev_t dev = (dev_t)arg;
1701 int instance, error;
1702 struct asycom *asy;
1703
1704 instance = UNIT(dev);
1705
1706 switch (infocmd) {
1707 case DDI_INFO_DEVT2DEVINFO:
1708 asy = ddi_get_soft_state(asy_soft_state, instance);
1709 if ((asy == NULL) || (asy->asy_dip == NULL))
1710 error = DDI_FAILURE;
1711 else {
1712 *result = (void *) asy->asy_dip;
1713 error = DDI_SUCCESS;
1714 }
1715 break;
1716 case DDI_INFO_DEVT2INSTANCE:
1717 *result = (void *)(intptr_t)instance;
1718 error = DDI_SUCCESS;
1719 break;
1720 default:
1721 error = DDI_FAILURE;
1722 }
1723 return (error);
1724 }
1725
1726 /* asy_getproperty -- walk through all name variants until we find a match */
1727
1728 static int
asy_getproperty(dev_info_t * devi,struct asycom * asy,const char * property)1729 asy_getproperty(dev_info_t *devi, struct asycom *asy, const char *property)
1730 {
1731 int len;
1732 int ret;
1733 char letter = asy->asy_com_port + 'a' - 1; /* for ttya */
1734 char number = asy->asy_com_port + '0'; /* for COM1 */
1735 char val[40];
1736 char name[40];
1737
1738 /* Property for ignoring DCD */
1739 (void) sprintf(name, "tty%c-%s", letter, property);
1740 len = sizeof (val);
1741 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1742 if (ret != DDI_PROP_SUCCESS) {
1743 (void) sprintf(name, "com%c-%s", number, property);
1744 len = sizeof (val);
1745 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1746 }
1747 if (ret != DDI_PROP_SUCCESS) {
1748 (void) sprintf(name, "tty0%c-%s", number, property);
1749 len = sizeof (val);
1750 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1751 }
1752 if (ret != DDI_PROP_SUCCESS) {
1753 (void) sprintf(name, "port-%c-%s", letter, property);
1754 len = sizeof (val);
1755 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1756 }
1757 if (ret != DDI_PROP_SUCCESS)
1758 return (-1); /* property non-existant */
1759 if (val[0] == 'f' || val[0] == 'F' || val[0] == '0')
1760 return (0); /* property false/0 */
1761 return (1); /* property true/!0 */
1762 }
1763
1764 /* asy_soft_state_free - local wrapper for ddi_soft_state_free(9F) */
1765
1766 static void
asy_soft_state_free(struct asycom * asy)1767 asy_soft_state_free(struct asycom *asy)
1768 {
1769 if (asy->asy_priv != NULL) {
1770 kmem_free(asy->asy_priv, sizeof (struct asyncline));
1771 asy->asy_priv = NULL;
1772 }
1773 ddi_soft_state_free(asy_soft_state, asy->asy_unit);
1774 }
1775
1776 static char *
asy_hw_name(struct asycom * asy)1777 asy_hw_name(struct asycom *asy)
1778 {
1779 switch (asy->asy_hwtype) {
1780 case ASY_8250A:
1781 return ("8250A/16450");
1782 case ASY_16550:
1783 return ("16550");
1784 case ASY_16550A:
1785 return ("16550A");
1786 case ASY_16650:
1787 return ("16650");
1788 case ASY_16750:
1789 return ("16750");
1790 case ASY_16950:
1791 return ("16950");
1792 }
1793
1794 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "unknown asy_hwtype: %d",
1795 asy->asy_hwtype);
1796 return ("?");
1797 }
1798
1799 static boolean_t
asy_is_devid(struct asycom * asy,char * venprop,char * devprop,int venid,int devid)1800 asy_is_devid(struct asycom *asy, char *venprop, char *devprop,
1801 int venid, int devid)
1802 {
1803 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1804 venprop, 0) != venid) {
1805 return (B_FALSE);
1806 }
1807
1808 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1809 devprop, 0) != devid) {
1810 return (B_FALSE);
1811 }
1812
1813 return (B_FALSE);
1814 }
1815
1816 static void
asy_check_loopback(struct asycom * asy)1817 asy_check_loopback(struct asycom *asy)
1818 {
1819 if (asy_get_bus_type(asy->asy_dip) != ASY_BUS_PCI)
1820 return;
1821
1822 /* Check if this is a Agere/Lucent Venus PCI modem chipset. */
1823 if (asy_is_devid(asy, "vendor-id", "device-id", 0x11c1, 0x0480) ||
1824 asy_is_devid(asy, "subsystem-vendor-id", "subsystem-id", 0x11c1,
1825 0x0480))
1826 asy->asy_flags2 |= ASY2_NO_LOOPBACK;
1827 }
1828
1829 static int
asy_identify_chip(dev_info_t * devi,struct asycom * asy)1830 asy_identify_chip(dev_info_t *devi, struct asycom *asy)
1831 {
1832 int isr, lsr, mcr, spr;
1833 dev_t dev;
1834 uint_t hwtype;
1835
1836 /*
1837 * Initially, we'll assume we have the highest supported chip model
1838 * until we find out what we actually have.
1839 */
1840 asy->asy_hwtype = ASY_MAXCHIP;
1841
1842 /*
1843 * First, see if we can even do the loopback check, which may not work
1844 * on certain hardware.
1845 */
1846 asy_check_loopback(asy);
1847
1848 if (asy_scr_test) {
1849 /* Check that the scratch register works. */
1850
1851 /* write to scratch register */
1852 asy_put(asy, ASY_SPR, ASY_SPR_TEST);
1853 /* make sure that pattern doesn't just linger on the bus */
1854 asy_put(asy, ASY_FCR, 0x00);
1855 /* read data back from scratch register */
1856 spr = asy_get(asy, ASY_SPR);
1857 if (spr != ASY_SPR_TEST) {
1858 /*
1859 * Scratch register not working.
1860 * Probably not an async chip.
1861 * 8250 and 8250B don't have scratch registers,
1862 * but only worked in ancient PC XT's anyway.
1863 */
1864 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p "
1865 "scratch register: expected 0x5a, got 0x%02x",
1866 (void *)asy->asy_ioaddr, spr);
1867 return (DDI_FAILURE);
1868 }
1869 }
1870 /*
1871 * Use 16550 fifo reset sequence specified in NS application
1872 * note. Disable fifos until chip is initialized.
1873 */
1874 asy_put(asy, ASY_FCR, 0x00); /* disable */
1875 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN); /* enable */
1876 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN | ASY_FCR_RHR_FL); /* reset */
1877 if (asymaxchip >= ASY_16650 && asy_scr_test) {
1878 /*
1879 * Reset 16650 enhanced regs also, in case we have one of these
1880 */
1881 asy_put(asy, ASY_EFR, 0);
1882 }
1883
1884 /*
1885 * See what sort of FIFO we have.
1886 * Try enabling it and see what chip makes of this.
1887 */
1888
1889 asy->asy_fifor = 0;
1890 if (asymaxchip >= ASY_16550A)
1891 asy->asy_fifor |=
1892 ASY_FCR_FIFO_EN | ASY_FCR_DMA | (asy_trig_level & 0xff);
1893
1894 /*
1895 * On the 16750, FCR[5] enables the 64 byte FIFO. FCR[5] can only be set
1896 * while LCR[7] = 1 (DLAB), which is taken care of by asy_reset_fifo().
1897 */
1898 if (asymaxchip >= ASY_16750)
1899 asy->asy_fifor |= ASY_FCR_FIFO64;
1900
1901 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
1902
1903 mcr = asy_get(asy, ASY_MCR);
1904 isr = asy_get(asy, ASY_ISR);
1905
1906 /*
1907 * Note we get 0xff if chip didn't return us anything,
1908 * e.g. if there's no chip there.
1909 */
1910 if (isr == 0xff) {
1911 asyerror(asy, CE_WARN, "UART @ %p interrupt register: got 0xff",
1912 (void *)asy->asy_ioaddr);
1913 return (DDI_FAILURE);
1914 }
1915
1916 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
1917 "probe fifo FIFOR=0x%02x ISR=0x%02x MCR=0x%02x",
1918 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1919
1920 /*
1921 * Detect the chip type by comparing ISR[7,6] and ISR[5].
1922 *
1923 * When the FIFOs are enabled by setting FCR[0], ISR[7,6] read as 1.
1924 * Additionally on a 16750, the 64 byte FIFOs are enabled by setting
1925 * FCR[5], and ISR[5] will read as 1, too.
1926 *
1927 * We will check later whether we have a 16650, which requires EFR[4]=1
1928 * to enable its deeper FIFOs and extra features. It does not use FCR[5]
1929 * and ISR[5] to enable deeper FIFOs like the 16750 does.
1930 */
1931 switch (isr & (ASY_ISR_FIFOEN | ASY_ISR_FIFO64)) {
1932 case 0x40: /* 16550 with broken FIFOs */
1933 hwtype = ASY_16550;
1934 asy->asy_fifor = 0;
1935 break;
1936
1937 case ASY_ISR_FIFOEN: /* 16550A with working FIFOs */
1938 hwtype = ASY_16550A;
1939 asy->asy_fifo_buf = 16;
1940 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1941 asy->asy_fifor &= ~ASY_FCR_FIFO64;
1942 break;
1943
1944 case ASY_ISR_FIFOEN | ASY_ISR_FIFO64: /* 16750 with 64byte FIFOs */
1945 hwtype = ASY_16750;
1946 asy->asy_fifo_buf = 64;
1947 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1948 break;
1949
1950 default: /* 8250A/16450 without FIFOs */
1951 hwtype = ASY_8250A;
1952 asy->asy_fifor = 0;
1953 }
1954
1955 if (hwtype > asymaxchip) {
1956 asyerror(asy, CE_WARN, "UART @ %p "
1957 "unexpected probe result: "
1958 "FCR=0x%02x ISR=0x%02x MCR=0x%02x",
1959 (void *)asy->asy_ioaddr,
1960 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1961 return (DDI_FAILURE);
1962 }
1963
1964 /*
1965 * Now reset the FIFO operation appropriate for the chip type.
1966 * Note we must call asy_reset_fifo() before any possible
1967 * downgrade of the asy->asy_hwtype, or it may not disable
1968 * the more advanced features we specifically want downgraded.
1969 */
1970 asy_reset_fifo(asy, 0);
1971
1972 /*
1973 * Check for Exar/Startech ST16C650 or newer, which will still look like
1974 * a 16550A until we enable its enhanced mode.
1975 */
1976 if (hwtype >= ASY_16550A && asymaxchip >= ASY_16650 &&
1977 asy_scr_test) {
1978 /*
1979 * Write the XOFF2 register, which shadows SPR on the 16650.
1980 * On other chips, SPR will be overwritten.
1981 */
1982 asy_put(asy, ASY_XOFF2, 0);
1983
1984 /* read back scratch register */
1985 spr = asy_get(asy, ASY_SPR);
1986
1987 if (spr == ASY_SPR_TEST) {
1988 /* looks like we have an ST16650 -- enable it */
1989 hwtype = ASY_16650;
1990 asy_put(asy, ASY_EFR, ASY_EFR_ENH_EN);
1991
1992 /*
1993 * Some 16650-compatible chips are also compatible with
1994 * the 16750 and have deeper FIFOs, which we may have
1995 * detected above. Don't downgrade the FIFO size.
1996 */
1997 if (asy->asy_fifo_buf < 32)
1998 asy->asy_fifo_buf = 32;
1999
2000 /*
2001 * Use a 24 byte transmit FIFO trigger only if were
2002 * allowed to use >16 transmit FIFO depth by the
2003 * global tunable.
2004 */
2005 if (asy_max_tx_fifo >= asy->asy_fifo_buf)
2006 asy->asy_fifor |= ASY_FCR_THR_TRIG_24;
2007 asy_reset_fifo(asy, 0);
2008 }
2009 }
2010
2011 /*
2012 * If we think we got a 16650, we may actually have a 16950, so check
2013 * for that.
2014 */
2015 if (hwtype >= ASY_16650 && asymaxchip >= ASY_16950) {
2016 uint8_t ier, asr;
2017
2018 /*
2019 * First, clear IER and read it back. That should be a no-op as
2020 * either asyattach() or asy_resume() disabled all interrupts
2021 * before we were called.
2022 */
2023 asy_put(asy, ASY_IER, 0);
2024 ier = asy_get(asy, ASY_IER);
2025 if (ier != 0) {
2026 dev_err(asy->asy_dip, CE_WARN, "!%s: UART @ %p "
2027 "interrupt enable register: got 0x%02x", __func__,
2028 (void *)asy->asy_ioaddr, ier);
2029 return (DDI_FAILURE);
2030 }
2031
2032 /*
2033 * Next, try to read ASR, which shares the register offset with
2034 * IER. ASR can only be read if the ASR enable bit is set in
2035 * ACR, which itself is an indexed registers. This is taken care
2036 * of by asy_get().
2037 *
2038 * There are a few bits in ASR which should be 1 at this point,
2039 * definitely the TX idle bit (ASR[7]) and also the FIFO size
2040 * bit (ASR[6]) since we've done everything we can to enable any
2041 * deeper FIFO support.
2042 *
2043 * Thus if we read back ASR as 0, we failed to read it, and this
2044 * isn't the chip we're looking for.
2045 */
2046 asr = asy_get(asy, ASY_ASR);
2047
2048 if (asr != ier) {
2049 hwtype = ASY_16950;
2050
2051 if ((asr & ASY_ASR_FIFOSZ) != 0)
2052 asy->asy_fifo_buf = 128;
2053 else
2054 asy->asy_fifo_buf = 16;
2055
2056 asy_reset_fifo(asy, 0);
2057
2058 /*
2059 * Enable 16950 specific trigger level registers. Set
2060 * DTR pin to be compatible to 16450, 16550, and 16750.
2061 */
2062 asy->asy_acr = ASY_ACR_TRIG | ASY_ACR_DTR_NORM;
2063 asy_put(asy, ASY_ACR, asy->asy_acr);
2064
2065 /* Set half the FIFO size as receive trigger level. */
2066 asy_put(asy, ASY_RTL, asy->asy_fifo_buf/2);
2067
2068 /*
2069 * Set the transmit trigger level to 1.
2070 *
2071 * While one would expect that any transmit trigger
2072 * level would work (the 16550 uses a hardwired level
2073 * of 16), in my tests with a 16950 compatible chip
2074 * (MosChip 9912) I would never see a TX interrupt
2075 * on any transmit trigger level > 1.
2076 */
2077 asy_put(asy, ASY_TTL, 1);
2078
2079 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ASR 0x%02x", asr);
2080 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RFL 0x%02x",
2081 asy_get(asy, ASY_RFL));
2082 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TFL 0x%02x",
2083 asy_get(asy, ASY_TFL));
2084
2085 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ACR 0x%02x",
2086 asy_get(asy, ASY_ACR));
2087 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CPR 0x%02x",
2088 asy_get(asy, ASY_CPR));
2089 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TCR 0x%02x",
2090 asy_get(asy, ASY_TCR));
2091 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CKS 0x%02x",
2092 asy_get(asy, ASY_CKS));
2093 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TTL 0x%02x",
2094 asy_get(asy, ASY_TTL));
2095 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RTL 0x%02x",
2096 asy_get(asy, ASY_RTL));
2097 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCL 0x%02x",
2098 asy_get(asy, ASY_FCL));
2099 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCH 0x%02x",
2100 asy_get(asy, ASY_FCH));
2101
2102 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2103 "Chip ID: %02x%02x%02x,%02x",
2104 asy_get(asy, ASY_ID1), asy_get(asy, ASY_ID2),
2105 asy_get(asy, ASY_ID3), asy_get(asy, ASY_REV));
2106
2107 }
2108 }
2109
2110 asy->asy_hwtype = hwtype;
2111
2112 /*
2113 * If we think we might have a FIFO larger than 16 characters,
2114 * measure FIFO size and check it against expected.
2115 */
2116 if (asy_fifo_test > 0 &&
2117 !(asy->asy_flags2 & ASY2_NO_LOOPBACK) &&
2118 (asy->asy_fifo_buf > 16 ||
2119 (asy_fifo_test > 1 && asy->asy_use_fifo == ASY_FCR_FIFO_EN) ||
2120 ASY_DEBUG(asy, ASY_DEBUG_CHIP))) {
2121 int i;
2122
2123 /* Set baud rate to 57600 (fairly arbitrary choice) */
2124 asy_set_baudrate(asy, B57600);
2125 /* Set 8 bits, 1 stop bit */
2126 asy_put(asy, ASY_LCR, ASY_LCR_STOP1 | ASY_LCR_BITS8);
2127 /* Set loopback mode */
2128 asy_put(asy, ASY_MCR, ASY_MCR_LOOPBACK);
2129
2130 /* Overfill fifo */
2131 for (i = 0; i < asy->asy_fifo_buf * 2; i++) {
2132 asy_put(asy, ASY_THR, i);
2133 }
2134 /*
2135 * Now there's an interesting question here about which
2136 * FIFO we're testing the size of, RX or TX. We just
2137 * filled the TX FIFO much faster than it can empty,
2138 * although it is possible one or two characters may
2139 * have gone from it to the TX shift register.
2140 * We wait for enough time for all the characters to
2141 * move into the RX FIFO and any excess characters to
2142 * have been lost, and then read all the RX FIFO. So
2143 * the answer we finally get will be the size which is
2144 * the MIN(RX FIFO,(TX FIFO + 1 or 2)). The critical
2145 * one is actually the TX FIFO, because if we overfill
2146 * it in normal operation, the excess characters are
2147 * lost with no warning.
2148 */
2149 /*
2150 * Wait for characters to move into RX FIFO.
2151 * In theory, 200 * asy->asy_fifo_buf * 2 should be
2152 * enough. However, in practice it isn't always, so we
2153 * increase to 400 so some slow 16550A's finish, and we
2154 * increase to 3 so we spot more characters coming back
2155 * than we sent, in case that should ever happen.
2156 */
2157 delay(drv_usectohz(400 * asy->asy_fifo_buf * 3));
2158
2159 /* Now see how many characters we can read back */
2160 for (i = 0; i < asy->asy_fifo_buf * 3; i++) {
2161 lsr = asy_get(asy, ASY_LSR);
2162 if (!(lsr & ASY_LSR_DR))
2163 break; /* FIFO emptied */
2164 (void) asy_get(asy, ASY_RHR); /* lose another */
2165 }
2166
2167 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2168 "FIFO size: expected=%d, measured=%d",
2169 asy->asy_fifo_buf, i);
2170
2171 hwtype = asy->asy_hwtype;
2172 if (i < asy->asy_fifo_buf) {
2173 /*
2174 * FIFO is somewhat smaller than we anticipated.
2175 * If we have 16 characters usable, then this
2176 * UART will probably work well enough in
2177 * 16550A mode. If less than 16 characters,
2178 * then we'd better not use it at all.
2179 * UARTs with busted FIFOs do crop up.
2180 */
2181 if (i >= 16 && asy->asy_fifo_buf >= 16) {
2182 /* fall back to a 16550A */
2183 hwtype = ASY_16550A;
2184 asy->asy_fifo_buf = 16;
2185 asy->asy_fifor &=
2186 ~(ASY_FCR_THR_TR0 | ASY_FCR_THR_TR1);
2187 } else {
2188 /* fall back to no FIFO at all */
2189 hwtype = ASY_16550;
2190 asy->asy_fifo_buf = 1;
2191 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
2192 asy->asy_fifor = 0;
2193 }
2194 } else if (i > asy->asy_fifo_buf) {
2195 /*
2196 * The FIFO is larger than expected. Use it if it is
2197 * a power of 2.
2198 */
2199 if (ISP2(i))
2200 asy->asy_fifo_buf = i;
2201 }
2202
2203 /*
2204 * We will need to reprogram the FIFO if we changed
2205 * our mind about how to drive it above, and in any
2206 * case, it would be a good idea to flush any garbage
2207 * out incase the loopback test left anything behind.
2208 * Again as earlier above, we must call asy_reset_fifo()
2209 * before any possible downgrade of asy->asy_hwtype.
2210 */
2211 if (asy->asy_hwtype >= ASY_16650 && hwtype < ASY_16650) {
2212 /* Disable 16650 enhanced mode */
2213 asy_put(asy, ASY_EFR, 0);
2214 }
2215 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
2216 asy->asy_hwtype = hwtype;
2217
2218 /* Clear loopback mode and restore DTR/RTS */
2219 asy_put(asy, ASY_MCR, mcr);
2220 }
2221
2222 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "%s @ %p",
2223 asy_hw_name(asy), (void *)asy->asy_ioaddr);
2224
2225 /* Make UART type visible in device tree for prtconf, etc */
2226 dev = makedevice(DDI_MAJOR_T_UNKNOWN, asy->asy_unit);
2227 (void) ddi_prop_update_string(dev, devi, "uart", asy_hw_name(asy));
2228
2229 if (asy->asy_hwtype == ASY_16550) /* for broken 16550's, */
2230 asy->asy_hwtype = ASY_8250A; /* drive them as 8250A */
2231
2232 return (DDI_SUCCESS);
2233 }
2234
2235 /*
2236 * asyinit() initializes the TTY protocol-private data for this channel
2237 * before enabling the interrupts.
2238 */
2239 static void
asyinit(struct asycom * asy)2240 asyinit(struct asycom *asy)
2241 {
2242 struct asyncline *async;
2243
2244 asy->asy_priv = kmem_zalloc(sizeof (struct asyncline), KM_SLEEP);
2245 async = asy->asy_priv;
2246 mutex_enter(&asy->asy_excl);
2247 async->async_common = asy;
2248 cv_init(&async->async_flags_cv, NULL, CV_DRIVER, NULL);
2249 mutex_exit(&asy->asy_excl);
2250 }
2251
2252 static int
asyopen(queue_t * rq,dev_t * dev,int flag,int sflag __unused,cred_t * cr)2253 asyopen(queue_t *rq, dev_t *dev, int flag, int sflag __unused, cred_t *cr)
2254 {
2255 struct asycom *asy;
2256 struct asyncline *async;
2257 int unit;
2258 int len;
2259 struct termios *termiosp;
2260
2261 unit = UNIT(*dev);
2262 asy = ddi_get_soft_state(asy_soft_state, unit);
2263 if (asy == NULL)
2264 return (ENXIO); /* unit not configured */
2265 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "enter");
2266 async = asy->asy_priv;
2267 mutex_enter(&asy->asy_excl);
2268
2269 again:
2270 mutex_enter(&asy->asy_excl_hi);
2271
2272 /*
2273 * Block waiting for carrier to come up, unless this is a no-delay open.
2274 */
2275 if (!(async->async_flags & ASYNC_ISOPEN)) {
2276 /*
2277 * Set the default termios settings (cflag).
2278 * Others are set in ldterm.
2279 */
2280 mutex_exit(&asy->asy_excl_hi);
2281
2282 if (ddi_getlongprop(DDI_DEV_T_ANY, ddi_root_node(),
2283 0, "ttymodes",
2284 (caddr_t)&termiosp, &len) == DDI_PROP_SUCCESS &&
2285 len == sizeof (struct termios)) {
2286 async->async_ttycommon.t_cflag = termiosp->c_cflag;
2287 kmem_free(termiosp, len);
2288 } else {
2289 asyerror(asy, CE_WARN,
2290 "couldn't get ttymodes property");
2291 }
2292 mutex_enter(&asy->asy_excl_hi);
2293
2294 /* eeprom mode support - respect properties */
2295 if (asy->asy_cflag)
2296 async->async_ttycommon.t_cflag = asy->asy_cflag;
2297
2298 async->async_ttycommon.t_iflag = 0;
2299 async->async_ttycommon.t_iocpending = NULL;
2300 async->async_ttycommon.t_size.ws_row = 0;
2301 async->async_ttycommon.t_size.ws_col = 0;
2302 async->async_ttycommon.t_size.ws_xpixel = 0;
2303 async->async_ttycommon.t_size.ws_ypixel = 0;
2304 async->async_dev = *dev;
2305 async->async_wbufcid = 0;
2306
2307 async->async_startc = CSTART;
2308 async->async_stopc = CSTOP;
2309 asy_program(asy, ASY_INIT);
2310 } else if ((async->async_ttycommon.t_flags & TS_XCLUDE) &&
2311 secpolicy_excl_open(cr) != 0) {
2312 mutex_exit(&asy->asy_excl_hi);
2313 mutex_exit(&asy->asy_excl);
2314 return (EBUSY);
2315 } else if ((*dev & OUTLINE) && !(async->async_flags & ASYNC_OUT)) {
2316 mutex_exit(&asy->asy_excl_hi);
2317 mutex_exit(&asy->asy_excl);
2318 return (EBUSY);
2319 }
2320
2321 if (*dev & OUTLINE)
2322 async->async_flags |= ASYNC_OUT;
2323
2324 /* Raise DTR on every open, but delay if it was just lowered. */
2325 while (async->async_flags & ASYNC_DTR_DELAY) {
2326 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2327 "waiting for the ASYNC_DTR_DELAY to be clear");
2328 mutex_exit(&asy->asy_excl_hi);
2329 if (cv_wait_sig(&async->async_flags_cv,
2330 &asy->asy_excl) == 0) {
2331 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2332 "interrupted by signal, exiting");
2333 mutex_exit(&asy->asy_excl);
2334 return (EINTR);
2335 }
2336 mutex_enter(&asy->asy_excl_hi);
2337 }
2338
2339 asy_set(asy, ASY_MCR, asy->asy_mcr & ASY_MCR_DTR);
2340
2341 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "\"Raise DTR on every open\": "
2342 "make mcr = %x, make TS_SOFTCAR = %s", asy_get(asy, ASY_MCR),
2343 (asy->asy_flags & ASY_IGNORE_CD) ? "ON" : "OFF");
2344
2345 if (asy->asy_flags & ASY_IGNORE_CD) {
2346 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2347 "ASY_IGNORE_CD set, set TS_SOFTCAR");
2348 async->async_ttycommon.t_flags |= TS_SOFTCAR;
2349 } else {
2350 async->async_ttycommon.t_flags &= ~TS_SOFTCAR;
2351 }
2352
2353 /*
2354 * Check carrier.
2355 */
2356 asy->asy_msr = asy_get(asy, ASY_MSR);
2357 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "TS_SOFTCAR is %s, MSR & DCD is %s",
2358 (async->async_ttycommon.t_flags & TS_SOFTCAR) ? "set" : "clear",
2359 (asy->asy_msr & ASY_MSR_DCD) ? "set" : "clear");
2360
2361 if (asy->asy_msr & ASY_MSR_DCD)
2362 async->async_flags |= ASYNC_CARR_ON;
2363 else
2364 async->async_flags &= ~ASYNC_CARR_ON;
2365 mutex_exit(&asy->asy_excl_hi);
2366
2367 /*
2368 * If FNDELAY and FNONBLOCK are clear, block until carrier up.
2369 * Quit on interrupt.
2370 */
2371 if (!(flag & (FNDELAY|FNONBLOCK)) &&
2372 !(async->async_ttycommon.t_cflag & CLOCAL)) {
2373 if ((!(async->async_flags & (ASYNC_CARR_ON|ASYNC_OUT)) &&
2374 !(async->async_ttycommon.t_flags & TS_SOFTCAR)) ||
2375 ((async->async_flags & ASYNC_OUT) &&
2376 !(*dev & OUTLINE))) {
2377 async->async_flags |= ASYNC_WOPEN;
2378 if (cv_wait_sig(&async->async_flags_cv,
2379 &asy->asy_excl) == B_FALSE) {
2380 async->async_flags &= ~ASYNC_WOPEN;
2381 mutex_exit(&asy->asy_excl);
2382 return (EINTR);
2383 }
2384 async->async_flags &= ~ASYNC_WOPEN;
2385 goto again;
2386 }
2387 } else if ((async->async_flags & ASYNC_OUT) && !(*dev & OUTLINE)) {
2388 mutex_exit(&asy->asy_excl);
2389 return (EBUSY);
2390 }
2391
2392 async->async_ttycommon.t_readq = rq;
2393 async->async_ttycommon.t_writeq = WR(rq);
2394 rq->q_ptr = WR(rq)->q_ptr = (caddr_t)async;
2395 mutex_exit(&asy->asy_excl);
2396 /*
2397 * Caution here -- qprocson sets the pointers that are used by canput
2398 * called by async_softint. ASYNC_ISOPEN must *not* be set until those
2399 * pointers are valid.
2400 */
2401 qprocson(rq);
2402 async->async_flags |= ASYNC_ISOPEN;
2403 async->async_polltid = 0;
2404 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
2405 return (0);
2406 }
2407
2408 static void
async_progress_check(void * arg)2409 async_progress_check(void *arg)
2410 {
2411 struct asyncline *async = arg;
2412 struct asycom *asy = async->async_common;
2413 mblk_t *bp;
2414
2415 /*
2416 * We define "progress" as either waiting on a timed break or delay, or
2417 * having had at least one transmitter interrupt. If none of these are
2418 * true, then just terminate the output and wake up that close thread.
2419 */
2420 mutex_enter(&asy->asy_excl);
2421 mutex_enter(&asy->asy_excl_hi);
2422 if (!(async->async_flags & (ASYNC_BREAK|ASYNC_DELAY|ASYNC_PROGRESS))) {
2423 async->async_ocnt = 0;
2424 async->async_flags &= ~ASYNC_BUSY;
2425 async->async_timer = 0;
2426 bp = async->async_xmitblk;
2427 async->async_xmitblk = NULL;
2428 mutex_exit(&asy->asy_excl_hi);
2429 if (bp != NULL)
2430 freeb(bp);
2431 /*
2432 * Since this timer is running, we know that we're in exit(2).
2433 * That means that the user can't possibly be waiting on any
2434 * valid ioctl(2) completion anymore, and we should just flush
2435 * everything.
2436 */
2437 flushq(async->async_ttycommon.t_writeq, FLUSHALL);
2438 cv_broadcast(&async->async_flags_cv);
2439 } else {
2440 async->async_flags &= ~ASYNC_PROGRESS;
2441 async->async_timer = timeout(async_progress_check, async,
2442 drv_usectohz(asy_drain_check));
2443 mutex_exit(&asy->asy_excl_hi);
2444 }
2445 mutex_exit(&asy->asy_excl);
2446 }
2447
2448 /*
2449 * Release DTR so that asyopen() can raise it.
2450 */
2451 static void
async_dtr_free(struct asyncline * async)2452 async_dtr_free(struct asyncline *async)
2453 {
2454 struct asycom *asy = async->async_common;
2455
2456 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2457 "async_dtr_free, clearing ASYNC_DTR_DELAY");
2458 mutex_enter(&asy->asy_excl);
2459 async->async_flags &= ~ASYNC_DTR_DELAY;
2460 async->async_dtrtid = 0;
2461 cv_broadcast(&async->async_flags_cv);
2462 mutex_exit(&asy->asy_excl);
2463 }
2464
2465 /*
2466 * Close routine.
2467 */
2468 static int
asyclose(queue_t * q,int flag,cred_t * credp __unused)2469 asyclose(queue_t *q, int flag, cred_t *credp __unused)
2470 {
2471 struct asyncline *async;
2472 struct asycom *asy;
2473
2474 async = (struct asyncline *)q->q_ptr;
2475 ASSERT(async != NULL);
2476
2477 asy = async->async_common;
2478
2479 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "enter");
2480
2481 mutex_enter(&asy->asy_excl);
2482 async->async_flags |= ASYNC_CLOSING;
2483
2484 /*
2485 * Turn off PPS handling early to avoid events occuring during
2486 * close. Also reset the DCD edge monitoring bit.
2487 */
2488 mutex_enter(&asy->asy_excl_hi);
2489 asy->asy_flags &= ~(ASY_PPS | ASY_PPS_EDGE);
2490 mutex_exit(&asy->asy_excl_hi);
2491
2492 /*
2493 * There are two flavors of break -- timed (M_BREAK or TCSBRK) and
2494 * untimed (TIOCSBRK). For the timed case, these are enqueued on our
2495 * write queue and there's a timer running, so we don't have to worry
2496 * about them. For the untimed case, though, the user obviously made a
2497 * mistake, because these are handled immediately. We'll terminate the
2498 * break now and honor their implicit request by discarding the rest of
2499 * the data.
2500 */
2501 if (async->async_flags & ASYNC_OUT_SUSPEND) {
2502 if (async->async_utbrktid != 0) {
2503 (void) untimeout(async->async_utbrktid);
2504 async->async_utbrktid = 0;
2505 }
2506 mutex_enter(&asy->asy_excl_hi);
2507 (void) asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
2508 mutex_exit(&asy->asy_excl_hi);
2509 async->async_flags &= ~ASYNC_OUT_SUSPEND;
2510 goto nodrain;
2511 }
2512
2513 /*
2514 * If the user told us not to delay the close ("non-blocking"), then
2515 * don't bother trying to drain.
2516 *
2517 * If the user did M_STOP (ASYNC_STOPPED), there's no hope of ever
2518 * getting an M_START (since these messages aren't enqueued), and the
2519 * only other way to clear the stop condition is by loss of DCD, which
2520 * would discard the queue data. Thus, we drop the output data if
2521 * ASYNC_STOPPED is set.
2522 */
2523 if ((flag & (FNDELAY|FNONBLOCK)) ||
2524 (async->async_flags & ASYNC_STOPPED)) {
2525 goto nodrain;
2526 }
2527
2528 /*
2529 * If there's any pending output, then we have to try to drain it.
2530 * There are two main cases to be handled:
2531 * - called by close(2): need to drain until done or until
2532 * a signal is received. No timeout.
2533 * - called by exit(2): need to drain while making progress
2534 * or until a timeout occurs. No signals.
2535 *
2536 * If we can't rely on receiving a signal to get us out of a hung
2537 * session, then we have to use a timer. In this case, we set a timer
2538 * to check for progress in sending the output data -- all that we ask
2539 * (at each interval) is that there's been some progress made. Since
2540 * the interrupt routine grabs buffers from the write queue, we can't
2541 * trust changes in async_ocnt. Instead, we use a progress flag.
2542 *
2543 * Note that loss of carrier will cause the output queue to be flushed,
2544 * and we'll wake up again and finish normally.
2545 */
2546 if (!ddi_can_receive_sig() && asy_drain_check != 0) {
2547 async->async_flags &= ~ASYNC_PROGRESS;
2548 async->async_timer = timeout(async_progress_check, async,
2549 drv_usectohz(asy_drain_check));
2550 }
2551 while (async->async_ocnt > 0 ||
2552 async->async_ttycommon.t_writeq->q_first != NULL ||
2553 (async->async_flags & (ASYNC_BUSY|ASYNC_BREAK|ASYNC_DELAY))) {
2554 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0)
2555 break;
2556 }
2557 if (async->async_timer != 0) {
2558 (void) untimeout(async->async_timer);
2559 async->async_timer = 0;
2560 }
2561
2562 nodrain:
2563 async->async_ocnt = 0;
2564 if (async->async_xmitblk != NULL)
2565 freeb(async->async_xmitblk);
2566 async->async_xmitblk = NULL;
2567
2568 /*
2569 * If line has HUPCL set or is incompletely opened fix up the modem
2570 * lines.
2571 */
2572 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "next check HUPCL flag");
2573 mutex_enter(&asy->asy_excl_hi);
2574 if ((async->async_ttycommon.t_cflag & HUPCL) ||
2575 (async->async_flags & ASYNC_WOPEN)) {
2576 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2577 "HUPCL flag = %x, ASYNC_WOPEN flag = %x",
2578 async->async_ttycommon.t_cflag & HUPCL,
2579 async->async_ttycommon.t_cflag & ASYNC_WOPEN);
2580 async->async_flags |= ASYNC_DTR_DELAY;
2581
2582 /* turn off DTR, RTS but NOT interrupt to 386 */
2583 if (asy->asy_flags & (ASY_IGNORE_CD|ASY_RTS_DTR_OFF)) {
2584 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2585 "ASY_IGNORE_CD flag = %x, "
2586 "ASY_RTS_DTR_OFF flag = %x",
2587 asy->asy_flags & ASY_IGNORE_CD,
2588 asy->asy_flags & ASY_RTS_DTR_OFF);
2589
2590 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2591 } else {
2592 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2593 "Dropping DTR and RTS");
2594 asy_put(asy, ASY_MCR, ASY_MCR_OUT2);
2595 }
2596 async->async_dtrtid =
2597 timeout((void (*)())async_dtr_free,
2598 (caddr_t)async, drv_usectohz(asy_min_dtr_low));
2599 }
2600 /*
2601 * If nobody's using it now, turn off receiver interrupts.
2602 */
2603 if ((async->async_flags & (ASYNC_WOPEN|ASYNC_ISOPEN)) == 0)
2604 asy_disable_interrupts(asy, ASY_IER_RIEN);
2605
2606 mutex_exit(&asy->asy_excl_hi);
2607
2608 ttycommon_close(&async->async_ttycommon);
2609
2610 /*
2611 * Cancel outstanding "bufcall" request.
2612 */
2613 if (async->async_wbufcid != 0) {
2614 unbufcall(async->async_wbufcid);
2615 async->async_wbufcid = 0;
2616 }
2617
2618 /* Note that qprocsoff can't be done until after interrupts are off */
2619 qprocsoff(q);
2620 q->q_ptr = WR(q)->q_ptr = NULL;
2621 async->async_ttycommon.t_readq = NULL;
2622 async->async_ttycommon.t_writeq = NULL;
2623
2624 /*
2625 * Clear out device state, except persistant device property flags.
2626 */
2627 async->async_flags &= (ASYNC_DTR_DELAY|ASY_RTS_DTR_OFF);
2628 cv_broadcast(&async->async_flags_cv);
2629 mutex_exit(&asy->asy_excl);
2630
2631 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "done");
2632 return (0);
2633 }
2634
2635 static boolean_t
asy_isbusy(struct asycom * asy)2636 asy_isbusy(struct asycom *asy)
2637 {
2638 struct asyncline *async;
2639
2640 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2641 async = asy->asy_priv;
2642 ASSERT(mutex_owned(&asy->asy_excl));
2643 ASSERT(mutex_owned(&asy->asy_excl_hi));
2644 /*
2645 * XXXX this should be recoded
2646 */
2647 return ((async->async_ocnt > 0) ||
2648 ((asy_get(asy, ASY_LSR) & (ASY_LSR_TEMT | ASY_LSR_THRE)) == 0));
2649 }
2650
2651 static void
asy_waiteot(struct asycom * asy)2652 asy_waiteot(struct asycom *asy)
2653 {
2654 /*
2655 * Wait for the current transmission block and the
2656 * current fifo data to transmit. Once this is done
2657 * we may go on.
2658 */
2659 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2660 ASSERT(mutex_owned(&asy->asy_excl));
2661 ASSERT(mutex_owned(&asy->asy_excl_hi));
2662 while (asy_isbusy(asy)) {
2663 mutex_exit(&asy->asy_excl_hi);
2664 mutex_exit(&asy->asy_excl);
2665 drv_usecwait(10000); /* wait .01 */
2666 mutex_enter(&asy->asy_excl);
2667 mutex_enter(&asy->asy_excl_hi);
2668 }
2669 }
2670
2671 /* asy_reset_fifo -- flush fifos and [re]program fifo control register */
2672 static void
asy_reset_fifo(struct asycom * asy,uchar_t flush)2673 asy_reset_fifo(struct asycom *asy, uchar_t flush)
2674 {
2675 ASSERT(mutex_owned(&asy->asy_excl_hi));
2676
2677 /* On a 16750, we have to set DLAB in order to set ASY_FCR_FIFO64. */
2678 if (asy->asy_hwtype >= ASY_16750)
2679 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
2680
2681 asy_put(asy, ASY_FCR, asy->asy_fifor | flush);
2682
2683 /* Clear DLAB */
2684 if (asy->asy_hwtype >= ASY_16750)
2685 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
2686 }
2687
2688 /*
2689 * Program the ASY port. Most of the async operation is based on the values
2690 * of 'c_iflag' and 'c_cflag'.
2691 */
2692 static void
asy_program(struct asycom * asy,int mode)2693 asy_program(struct asycom *asy, int mode)
2694 {
2695 struct asyncline *async;
2696 int baudrate, c_flag;
2697 uint8_t ier;
2698 int flush_reg;
2699 int ocflags;
2700
2701 ASSERT(mutex_owned(&asy->asy_excl));
2702 ASSERT(mutex_owned(&asy->asy_excl_hi));
2703
2704 async = asy->asy_priv;
2705 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "mode = 0x%08X, enter", mode);
2706
2707 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2708
2709 async->async_ttycommon.t_cflag &= ~(CIBAUD);
2710
2711 if (baudrate > CBAUD) {
2712 async->async_ttycommon.t_cflag |= CIBAUDEXT;
2713 async->async_ttycommon.t_cflag |=
2714 (((baudrate - CBAUD - 1) << IBSHIFT) & CIBAUD);
2715 } else {
2716 async->async_ttycommon.t_cflag &= ~CIBAUDEXT;
2717 async->async_ttycommon.t_cflag |=
2718 ((baudrate << IBSHIFT) & CIBAUD);
2719 }
2720
2721 c_flag = async->async_ttycommon.t_cflag &
2722 (CLOCAL|CREAD|CSTOPB|CSIZE|PARENB|PARODD|CBAUD|CBAUDEXT);
2723
2724 asy_disable_interrupts(asy, ASY_IER_ALL);
2725
2726 ocflags = asy->asy_ocflag;
2727
2728 /* flush/reset the status registers */
2729 (void) asy_get(asy, ASY_ISR);
2730 (void) asy_get(asy, ASY_LSR);
2731 asy->asy_msr = flush_reg = asy_get(asy, ASY_MSR);
2732 /*
2733 * The device is programmed in the open sequence, if we
2734 * have to hardware handshake, then this is a good time
2735 * to check if the device can receive any data.
2736 */
2737
2738 if ((CRTSCTS & async->async_ttycommon.t_cflag) &&
2739 !(flush_reg & ASY_MSR_CTS)) {
2740 async_flowcontrol_hw_output(asy, FLOW_STOP);
2741 } else {
2742 /*
2743 * We can not use async_flowcontrol_hw_output(asy, FLOW_START)
2744 * here, because if CRTSCTS is clear, we need clear
2745 * ASYNC_HW_OUT_FLW bit.
2746 */
2747 async->async_flags &= ~ASYNC_HW_OUT_FLW;
2748 }
2749
2750 /*
2751 * If IXON is not set, clear ASYNC_SW_OUT_FLW;
2752 * If IXON is set, no matter what IXON flag is before this
2753 * function call to asy_program,
2754 * we will use the old ASYNC_SW_OUT_FLW status.
2755 * Because of handling IXON in the driver, we also should re-calculate
2756 * the value of ASYNC_OUT_FLW_RESUME bit, but in fact,
2757 * the TCSET* commands which call asy_program
2758 * are put into the write queue, so there is no output needed to
2759 * be resumed at this point.
2760 */
2761 if (!(IXON & async->async_ttycommon.t_iflag))
2762 async->async_flags &= ~ASYNC_SW_OUT_FLW;
2763
2764 /* manually flush receive buffer or fifo (workaround for buggy fifos) */
2765 if (mode == ASY_INIT) {
2766 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
2767 for (flush_reg = asy->asy_fifo_buf; flush_reg-- > 0; ) {
2768 (void) asy_get(asy, ASY_RHR);
2769 }
2770 } else {
2771 flush_reg = asy_get(asy, ASY_RHR);
2772 }
2773 }
2774
2775 if (ocflags != (c_flag & ~CLOCAL) || mode == ASY_INIT) {
2776 /* Set line control */
2777 uint8_t lcr = 0;
2778
2779 if (c_flag & CSTOPB)
2780 lcr |= ASY_LCR_STOP2; /* 2 stop bits */
2781
2782 if (c_flag & PARENB)
2783 lcr |= ASY_LCR_PEN;
2784
2785 if ((c_flag & PARODD) == 0)
2786 lcr |= ASY_LCR_EPS;
2787
2788 switch (c_flag & CSIZE) {
2789 case CS5:
2790 lcr |= ASY_LCR_BITS5;
2791 break;
2792 case CS6:
2793 lcr |= ASY_LCR_BITS6;
2794 break;
2795 case CS7:
2796 lcr |= ASY_LCR_BITS7;
2797 break;
2798 case CS8:
2799 lcr |= ASY_LCR_BITS8;
2800 break;
2801 }
2802
2803 asy_clr(asy, ASY_LCR, ASY_LCR_WLS0 | ASY_LCR_WLS1 |
2804 ASY_LCR_STB | ASY_LCR_PEN | ASY_LCR_EPS);
2805 asy_set(asy, ASY_LCR, lcr);
2806 asy_set_baudrate(asy, baudrate);
2807
2808 /*
2809 * If we have a FIFO buffer, enable/flush
2810 * at intialize time, flush if transitioning from
2811 * CREAD off to CREAD on.
2812 */
2813 if (((ocflags & CREAD) == 0 && (c_flag & CREAD)) ||
2814 mode == ASY_INIT) {
2815 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN)
2816 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
2817 }
2818
2819 /* remember the new cflags */
2820 asy->asy_ocflag = c_flag & ~CLOCAL;
2821 }
2822
2823 if (baudrate == 0)
2824 asy_put(asy, ASY_MCR,
2825 (asy->asy_mcr & ASY_MCR_RTS) | ASY_MCR_OUT2);
2826 else
2827 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2828
2829 /*
2830 * Call the modem status interrupt handler to check for the carrier
2831 * in case CLOCAL was turned off after the carrier came on.
2832 * (Note: Modem status interrupt is not enabled if CLOCAL is ON.)
2833 */
2834 async_msint(asy);
2835
2836 /* Set interrupt control */
2837 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
2838 "c_flag & CLOCAL = %x t_cflag & CRTSCTS = %x",
2839 c_flag & CLOCAL, async->async_ttycommon.t_cflag & CRTSCTS);
2840
2841
2842 /* Always enable transmit and line status interrupts. */
2843 ier = ASY_IER_TIEN | ASY_IER_SIEN;
2844
2845 /*
2846 * Enable Modem status interrupt if hardware flow control is enabled or
2847 * this isn't a direct-wired (local) line, which ignores DCD.
2848 */
2849 if (((c_flag & CLOCAL) == 0) ||
2850 (async->async_ttycommon.t_cflag & CRTSCTS))
2851 ier |= ASY_IER_MIEN;
2852
2853 if (c_flag & CREAD)
2854 ier |= ASY_IER_RIEN;
2855
2856 asy_enable_interrupts(asy, ier);
2857 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
2858 }
2859
2860 static boolean_t
asy_baudok(struct asycom * asy)2861 asy_baudok(struct asycom *asy)
2862 {
2863 struct asyncline *async = asy->asy_priv;
2864 int baudrate;
2865
2866
2867 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2868
2869 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
2870 return (0);
2871
2872 return (baudrate == 0 ||
2873 asy_baud_tab[baudrate].asy_dll != 0 ||
2874 asy_baud_tab[baudrate].asy_dlh != 0);
2875 }
2876
2877 /*
2878 * asyintr() is the High Level Interrupt Handler.
2879 *
2880 * There are four different interrupt types indexed by ISR register values:
2881 * 0: modem
2882 * 1: Tx holding register is empty, ready for next char
2883 * 2: Rx register now holds a char to be picked up
2884 * 3: error or break on line
2885 * This routine checks the Bit 0 (interrupt-not-pending) to determine if
2886 * the interrupt is from this port.
2887 */
2888 uint_t
asyintr(caddr_t argasy,caddr_t argunused __unused)2889 asyintr(caddr_t argasy, caddr_t argunused __unused)
2890 {
2891 struct asycom *asy = (struct asycom *)argasy;
2892 struct asyncline *async;
2893 int ret_status = DDI_INTR_UNCLAIMED;
2894
2895 mutex_enter(&asy->asy_excl_hi);
2896 async = asy->asy_priv;
2897 if (async == NULL ||
2898 (async->async_flags & (ASYNC_ISOPEN|ASYNC_WOPEN)) == 0) {
2899 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2900
2901 ASY_DPRINTF(asy, ASY_DEBUG_INTR,
2902 "not open async=%p flags=0x%x interrupt_id=0x%x",
2903 async, async == NULL ? 0 : async->async_flags, intr_id);
2904
2905 if ((intr_id & ASY_ISR_NOINTR) == 0) {
2906 /*
2907 * reset the device by:
2908 * reading line status
2909 * reading any data from data status register
2910 * reading modem status
2911 */
2912 (void) asy_get(asy, ASY_LSR);
2913 (void) asy_get(asy, ASY_RHR);
2914 asy->asy_msr = asy_get(asy, ASY_MSR);
2915 ret_status = DDI_INTR_CLAIMED;
2916 }
2917 mutex_exit(&asy->asy_excl_hi);
2918 return (ret_status);
2919 }
2920
2921 /* By this point we're sure this is for us. */
2922 ret_status = DDI_INTR_CLAIMED;
2923
2924 /*
2925 * Before this flag was set, interrupts were disabled. We may still get
2926 * here if asyintr() waited on the mutex.
2927 */
2928 if (asy->asy_flags & ASY_DDI_SUSPENDED) {
2929 mutex_exit(&asy->asy_excl_hi);
2930 return (ret_status);
2931 }
2932
2933 /*
2934 * We will loop until the interrupt line is pulled low. asy
2935 * interrupt is edge triggered.
2936 */
2937 for (;;) {
2938 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2939 /*
2940 * Reading LSR will clear any error bits (ASY_LSR_ERRORS) which
2941 * are set which is why the value is passed through to
2942 * async_rxint() and not re-read there. In the unexpected event
2943 * that we've ended up here without a pending interrupt, the
2944 * ASY_ISR_NOINTR case, it should do no harm to have cleared
2945 * the error bits, and it means we can get some additional
2946 * information in the debug message if it's enabled.
2947 */
2948 const uint8_t lsr = asy_get(asy, ASY_LSR);
2949
2950 ASY_DPRINTF(asy, ASY_DEBUG_INTR,
2951 "interrupt_id=0x%x LSR=0x%x",
2952 intr_id, lsr);
2953
2954 if (intr_id & ASY_ISR_NOINTR)
2955 break;
2956
2957 switch (intr_id & ASY_ISR_MASK) {
2958 case ASY_ISR_ID_RLST:
2959 case ASY_ISR_ID_RDA:
2960 case ASY_ISR_ID_TMO:
2961 /* receiver interrupt or receiver errors */
2962 async_rxint(asy, lsr);
2963 break;
2964
2965 case ASY_ISR_ID_THRE:
2966 /*
2967 * The transmit-ready interrupt implies an empty
2968 * transmit-hold register (or FIFO). Check that it is
2969 * present before attempting to transmit more data.
2970 */
2971 if ((lsr & ASY_LSR_THRE) == 0) {
2972 /*
2973 * Taking a THRE interrupt only to find THRE
2974 * absent would be a surprise, except for a
2975 * racing asyputchar(), which ignores the
2976 * excl_hi mutex when writing to the device.
2977 */
2978 continue;
2979 }
2980 async_txint(asy);
2981 /*
2982 * Unlike the other interrupts which fall through to
2983 * attempting to fill the output register/FIFO, THRE
2984 * has no need having just done so.
2985 */
2986 continue;
2987
2988 case ASY_ISR_ID_MST:
2989 /* modem status interrupt */
2990 async_msint(asy);
2991 break;
2992 }
2993
2994 /* Refill the output FIFO if it has gone empty */
2995 if ((lsr & ASY_LSR_THRE) && (async->async_flags & ASYNC_BUSY) &&
2996 async->async_ocnt > 0)
2997 async_txint(asy);
2998 }
2999
3000 mutex_exit(&asy->asy_excl_hi);
3001 return (ret_status);
3002 }
3003
3004 /*
3005 * Transmitter interrupt service routine.
3006 * If there is more data to transmit in the current pseudo-DMA block,
3007 * send the next character if output is not stopped or draining.
3008 * Otherwise, queue up a soft interrupt.
3009 *
3010 * XXX - Needs review for HW FIFOs.
3011 */
3012 static void
async_txint(struct asycom * asy)3013 async_txint(struct asycom *asy)
3014 {
3015 struct asyncline *async = asy->asy_priv;
3016 int fifo_len;
3017
3018 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3019
3020 /*
3021 * If ASYNC_BREAK or ASYNC_OUT_SUSPEND has been set, return to
3022 * asyintr()'s context to claim the interrupt without performing
3023 * any action. No character will be loaded into FIFO/THR until
3024 * timed or untimed break is removed
3025 */
3026 if (async->async_flags & (ASYNC_BREAK|ASYNC_OUT_SUSPEND))
3027 return;
3028
3029 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3030 if (fifo_len > asy_max_tx_fifo)
3031 fifo_len = asy_max_tx_fifo;
3032
3033 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3034 fifo_len--;
3035
3036 if (async->async_ocnt > 0 && fifo_len > 0 &&
3037 !(async->async_flags &
3038 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_STOPPED))) {
3039 while (fifo_len-- > 0 && async->async_ocnt-- > 0) {
3040 asy_put(asy, ASY_THR, *async->async_optr++);
3041 }
3042 async->async_flags |= ASYNC_PROGRESS;
3043 }
3044
3045 if (fifo_len <= 0)
3046 return;
3047
3048 asysetsoft(asy);
3049 }
3050
3051 /*
3052 * Interrupt on port: handle PPS event. This function is only called
3053 * for a port on which PPS event handling has been enabled.
3054 */
3055 static void
asy_ppsevent(struct asycom * asy,int msr)3056 asy_ppsevent(struct asycom *asy, int msr)
3057 {
3058 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3059
3060 if (asy->asy_flags & ASY_PPS_EDGE) {
3061 /* Have seen leading edge, now look for and record drop */
3062 if ((msr & ASY_MSR_DCD) == 0)
3063 asy->asy_flags &= ~ASY_PPS_EDGE;
3064 /*
3065 * Waiting for leading edge, look for rise; stamp event and
3066 * calibrate kernel clock.
3067 */
3068 } else if (msr & ASY_MSR_DCD) {
3069 /*
3070 * This code captures a timestamp at the designated
3071 * transition of the PPS signal (DCD asserted). The
3072 * code provides a pointer to the timestamp, as well
3073 * as the hardware counter value at the capture.
3074 *
3075 * Note: the kernel has nano based time values while
3076 * NTP requires micro based, an in-line fast algorithm
3077 * to convert nsec to usec is used here -- see hrt2ts()
3078 * in common/os/timers.c for a full description.
3079 */
3080 struct timeval *tvp = &asy_ppsev.tv;
3081 timestruc_t ts;
3082 long nsec, usec;
3083
3084 asy->asy_flags |= ASY_PPS_EDGE;
3085 LED_OFF;
3086 gethrestime(&ts);
3087 LED_ON;
3088 nsec = ts.tv_nsec;
3089 usec = nsec + (nsec >> 2);
3090 usec = nsec + (usec >> 1);
3091 usec = nsec + (usec >> 2);
3092 usec = nsec + (usec >> 4);
3093 usec = nsec - (usec >> 3);
3094 usec = nsec + (usec >> 2);
3095 usec = nsec + (usec >> 3);
3096 usec = nsec + (usec >> 4);
3097 usec = nsec + (usec >> 1);
3098 usec = nsec + (usec >> 6);
3099 tvp->tv_usec = usec >> 10;
3100 tvp->tv_sec = ts.tv_sec;
3101
3102 ++asy_ppsev.serial;
3103
3104 /*
3105 * Because the kernel keeps a high-resolution time,
3106 * pass the current highres timestamp in tvp and zero
3107 * in usec.
3108 */
3109 ddi_hardpps(tvp, 0);
3110 }
3111 }
3112
3113 /*
3114 * Receiver interrupt: RDA interrupt, FIFO timeout interrupt or receive
3115 * error interrupt.
3116 * Try to put the character into the circular buffer for this line; if it
3117 * overflows, indicate a circular buffer overrun. If this port is always
3118 * to be serviced immediately, or the character is a STOP character, or
3119 * more than 15 characters have arrived, queue up a soft interrupt to
3120 * drain the circular buffer.
3121 * XXX - needs review for hw FIFOs support.
3122 */
3123
3124 static void
async_rxint(struct asycom * asy,uchar_t lsr)3125 async_rxint(struct asycom *asy, uchar_t lsr)
3126 {
3127 struct asyncline *async = asy->asy_priv;
3128 uchar_t c;
3129 uint_t s, needsoft = 0;
3130 tty_common_t *tp;
3131 int looplim = asy->asy_fifo_buf * 2;
3132
3133 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3134
3135 tp = &async->async_ttycommon;
3136 if (!(tp->t_cflag & CREAD)) {
3137 /* Line is not open for reading. Flush receiver FIFO. */
3138 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3139 (void) asy_get(asy, ASY_RHR);
3140 lsr = asy_get(asy, ASY_LSR);
3141 if (looplim-- < 0) /* limit loop */
3142 break;
3143 }
3144 return;
3145 }
3146
3147 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3148 c = 0;
3149 s = 0; /* reset error status */
3150 if (lsr & ASY_LSR_DR) {
3151 c = asy_get(asy, ASY_RHR);
3152
3153 /*
3154 * We handle XON/XOFF char if IXON is set,
3155 * but if received char is _POSIX_VDISABLE,
3156 * we left it to the up level module.
3157 */
3158 if (tp->t_iflag & IXON) {
3159 if ((c == async->async_stopc) &&
3160 (c != _POSIX_VDISABLE)) {
3161 async_flowcontrol_sw_output(asy,
3162 FLOW_STOP);
3163 goto check_looplim;
3164 } else if ((c == async->async_startc) &&
3165 (c != _POSIX_VDISABLE)) {
3166 async_flowcontrol_sw_output(asy,
3167 FLOW_START);
3168 needsoft = 1;
3169 goto check_looplim;
3170 }
3171 if ((tp->t_iflag & IXANY) &&
3172 (async->async_flags & ASYNC_SW_OUT_FLW)) {
3173 async_flowcontrol_sw_output(asy,
3174 FLOW_START);
3175 needsoft = 1;
3176 }
3177 }
3178 }
3179
3180 /*
3181 * Check for character break sequence
3182 */
3183 if ((abort_enable == KIOCABORTALTERNATE) &&
3184 (asy->asy_flags & ASY_CONSOLE)) {
3185 if (abort_charseq_recognize(c))
3186 abort_sequence_enter((char *)NULL);
3187 }
3188
3189 /* Handle framing errors */
3190 if (lsr & ASY_LSR_ERRORS) {
3191 if (lsr & ASY_LSR_PE) {
3192 if (tp->t_iflag & INPCK) /* parity enabled */
3193 s |= PERROR;
3194 }
3195
3196 if (lsr & (ASY_LSR_FE | ASY_LSR_BI))
3197 s |= FRERROR;
3198 if (lsr & ASY_LSR_OE) {
3199 async->async_hw_overrun = 1;
3200 s |= OVERRUN;
3201 }
3202 }
3203
3204 if (s == 0)
3205 if ((tp->t_iflag & PARMRK) &&
3206 !(tp->t_iflag & (IGNPAR|ISTRIP)) &&
3207 (c == 0377))
3208 if (RING_POK(async, 2)) {
3209 RING_PUT(async, 0377);
3210 RING_PUT(async, c);
3211 } else
3212 async->async_sw_overrun = 1;
3213 else
3214 if (RING_POK(async, 1))
3215 RING_PUT(async, c);
3216 else
3217 async->async_sw_overrun = 1;
3218 else
3219 if (s & FRERROR) /* Handle framing errors */
3220 if (c == 0)
3221 if ((asy->asy_flags & ASY_CONSOLE) &&
3222 (abort_enable !=
3223 KIOCABORTALTERNATE))
3224 abort_sequence_enter((char *)0);
3225 else
3226 async->async_break++;
3227 else
3228 if (RING_POK(async, 1))
3229 RING_MARK(async, c, s);
3230 else
3231 async->async_sw_overrun = 1;
3232 else /* Parity errors are handled by ldterm */
3233 if (RING_POK(async, 1))
3234 RING_MARK(async, c, s);
3235 else
3236 async->async_sw_overrun = 1;
3237 check_looplim:
3238 lsr = asy_get(asy, ASY_LSR);
3239 if (looplim-- < 0) /* limit loop */
3240 break;
3241 }
3242 if ((RING_CNT(async) > (RINGSIZE * 3)/4) &&
3243 !(async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3244 async_flowcontrol_hw_input(asy, FLOW_STOP, IN_FLOW_RINGBUFF);
3245 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3246 IN_FLOW_RINGBUFF);
3247 }
3248
3249 if ((async->async_flags & ASYNC_SERVICEIMM) || needsoft ||
3250 (RING_FRAC(async)) || (async->async_polltid == 0)) {
3251 asysetsoft(asy); /* need a soft interrupt */
3252 }
3253 }
3254
3255 /*
3256 * Modem status interrupt.
3257 *
3258 * (Note: It is assumed that the MSR hasn't been read by asyintr().)
3259 */
3260
3261 static void
async_msint(struct asycom * asy)3262 async_msint(struct asycom *asy)
3263 {
3264 struct asyncline *async = asy->asy_priv;
3265 int msr, t_cflag = async->async_ttycommon.t_cflag;
3266
3267 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3268
3269 async_msint_retry:
3270 /* this resets the interrupt */
3271 msr = asy_get(asy, ASY_MSR);
3272 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "call #%d:",
3273 ++(asy->asy_msint_cnt));
3274 ASY_DPRINTF(asy, ASY_DEBUG_STATE, " transition: %3s %3s %3s %3s",
3275 (msr & ASY_MSR_DCTS) ? "DCTS" : " ",
3276 (msr & ASY_MSR_DDSR) ? "DDSR" : " ",
3277 (msr & ASY_MSR_TERI) ? "TERI" : " ",
3278 (msr & ASY_MSR_DDCD) ? "DDCD" : " ");
3279 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "current state: %3s %3s %3s %3s",
3280 (msr & ASY_MSR_CTS) ? "CTS " : " ",
3281 (msr & ASY_MSR_DSR) ? "DSR " : " ",
3282 (msr & ASY_MSR_RI) ? "RI " : " ",
3283 (msr & ASY_MSR_DCD) ? "DCD " : " ");
3284
3285 /* If CTS status is changed, do H/W output flow control */
3286 if ((t_cflag & CRTSCTS) && (((asy->asy_msr ^ msr) & ASY_MSR_CTS) != 0))
3287 async_flowcontrol_hw_output(asy,
3288 msr & ASY_MSR_CTS ? FLOW_START : FLOW_STOP);
3289 /*
3290 * Reading MSR resets the interrupt, we save the
3291 * value of msr so that other functions could examine MSR by
3292 * looking at asy_msr.
3293 */
3294 asy->asy_msr = (uchar_t)msr;
3295
3296 /* Handle PPS event */
3297 if (asy->asy_flags & ASY_PPS)
3298 asy_ppsevent(asy, msr);
3299
3300 async->async_ext++;
3301 asysetsoft(asy);
3302 /*
3303 * We will make sure that the modem status presented to us
3304 * during the previous read has not changed. If the chip samples
3305 * the modem status on the falling edge of the interrupt line,
3306 * and uses this state as the base for detecting change of modem
3307 * status, we would miss a change of modem status event that occured
3308 * after we initiated a read MSR operation.
3309 */
3310 msr = asy_get(asy, ASY_MSR);
3311 if (ASY_MSR_STATES(msr) != ASY_MSR_STATES(asy->asy_msr))
3312 goto async_msint_retry;
3313 }
3314
3315 /*
3316 * Pend a soft interrupt if one isn't already pending.
3317 */
3318 static void
asysetsoft(struct asycom * asy)3319 asysetsoft(struct asycom *asy)
3320 {
3321 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3322
3323 if (mutex_tryenter(&asy->asy_soft_lock) == 0)
3324 return;
3325
3326 asy->asy_flags |= ASY_NEEDSOFT;
3327 if (!asy->asysoftpend) {
3328 asy->asysoftpend = 1;
3329 mutex_exit(&asy->asy_soft_lock);
3330 (void) ddi_intr_trigger_softint(asy->asy_soft_inth, NULL);
3331 } else {
3332 mutex_exit(&asy->asy_soft_lock);
3333 }
3334 }
3335
3336 /*
3337 * Check the carrier signal DCD and handle carrier coming up or
3338 * going down, cleaning up as needed and signalling waiters.
3339 */
3340 static void
asy_carrier_check(struct asycom * asy)3341 asy_carrier_check(struct asycom *asy)
3342 {
3343 struct asyncline *async = asy->asy_priv;
3344 tty_common_t *tp = &async->async_ttycommon;
3345 queue_t *q = tp->t_readq;
3346 mblk_t *bp;
3347 int flushflag;
3348
3349 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
3350 "asy_msr & DCD = %x, tp->t_flags & TS_SOFTCAR = %x",
3351 asy->asy_msr & ASY_MSR_DCD, tp->t_flags & TS_SOFTCAR);
3352
3353 if (asy->asy_msr & ASY_MSR_DCD) {
3354 /*
3355 * The DCD line is on. If we already had a carrier,
3356 * nothing changed and there's nothing to do.
3357 */
3358 if ((async->async_flags & ASYNC_CARR_ON) != 0)
3359 return;
3360
3361 ASY_DPRINTF(asy, ASY_DEBUG_MODM2, "set ASYNC_CARR_ON");
3362 async->async_flags |= ASYNC_CARR_ON;
3363 if (async->async_flags & ASYNC_ISOPEN) {
3364 mutex_exit(&asy->asy_excl_hi);
3365 mutex_exit(&asy->asy_excl);
3366 (void) putctl(q, M_UNHANGUP);
3367 mutex_enter(&asy->asy_excl);
3368 mutex_enter(&asy->asy_excl_hi);
3369 }
3370 cv_broadcast(&async->async_flags_cv);
3371
3372 return;
3373 }
3374
3375 /*
3376 * The DCD line is off. If we had no carrier, nothing changed
3377 * and there's nothing to do.
3378 */
3379 if ((async->async_flags & ASYNC_CARR_ON) == 0)
3380 return;
3381
3382 /*
3383 * The DCD line is off, but we had a carrier. If we're on a local line,
3384 * where carrier is ignored, or we're using a soft carrier, we're done
3385 * here.
3386 */
3387 if ((tp->t_cflag & CLOCAL) != 0 || (tp->t_flags & TS_SOFTCAR) != 0)
3388 goto out;
3389
3390 /*
3391 * Else, drop DTR, abort any output in progress, indicate that output
3392 * is not stopped.
3393 */
3394 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "carrier dropped, so drop DTR");
3395 asy_clr(asy, ASY_MCR, ASY_MCR_DTR);
3396
3397 if (async->async_flags & ASYNC_BUSY) {
3398 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3399 "Carrier dropped. Clearing async_ocnt");
3400 async->async_ocnt = 0;
3401 }
3402
3403 async->async_flags &= ~ASYNC_STOPPED;
3404
3405 /* If nobody had the device open, we're done here. */
3406 if ((async->async_flags & ASYNC_ISOPEN) == 0)
3407 goto out;
3408
3409 /* Else, send a hangup notification upstream and clean up. */
3410 mutex_exit(&asy->asy_excl_hi);
3411 mutex_exit(&asy->asy_excl);
3412 (void) putctl(q, M_HANGUP);
3413 mutex_enter(&asy->asy_excl);
3414 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "putctl(q, M_HANGUP)");
3415
3416 /*
3417 * Flush the transmit FIFO. Any data left in there is invalid now.
3418 */
3419 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3420 mutex_enter(&asy->asy_excl_hi);
3421 asy_reset_fifo(asy, ASY_FCR_THR_FL);
3422 mutex_exit(&asy->asy_excl_hi);
3423 }
3424
3425 /*
3426 * Flush our write queue if we have one. If we're in the midst of close,
3427 * then flush everything. Don't leave stale ioctls lying about.
3428 */
3429 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
3430 "Flushing to prevent HUPCL hanging");
3431 flushflag = (async->async_flags & ASYNC_CLOSING) ? FLUSHALL : FLUSHDATA;
3432 flushq(tp->t_writeq, flushflag);
3433
3434 /* Free the last active msg. */
3435 bp = async->async_xmitblk;
3436 if (bp != NULL) {
3437 freeb(bp);
3438 async->async_xmitblk = NULL;
3439 }
3440
3441 mutex_enter(&asy->asy_excl_hi);
3442 async->async_flags &= ~ASYNC_BUSY;
3443
3444
3445 out:
3446 /* Clear our carrier flag and signal anyone waiting. */
3447 async->async_flags &= ~ASYNC_CARR_ON;
3448 cv_broadcast(&async->async_flags_cv);
3449 }
3450
3451 /*
3452 * Handle a second-stage interrupt.
3453 */
3454 uint_t
asysoftintr(caddr_t intarg,caddr_t unusedarg __unused)3455 asysoftintr(caddr_t intarg, caddr_t unusedarg __unused)
3456 {
3457 struct asycom *asy = (struct asycom *)intarg;
3458 struct asyncline *async;
3459 int rv;
3460 uint_t cc;
3461
3462 /*
3463 * Test and clear soft interrupt.
3464 */
3465 mutex_enter(&asy->asy_soft_lock);
3466 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3467 rv = asy->asysoftpend;
3468 if (rv != 0)
3469 asy->asysoftpend = 0;
3470 mutex_exit(&asy->asy_soft_lock);
3471
3472 if (rv) {
3473 if (asy->asy_priv == NULL)
3474 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3475 async = (struct asyncline *)asy->asy_priv;
3476 mutex_enter(&asy->asy_excl_hi);
3477 if (asy->asy_flags & ASY_NEEDSOFT) {
3478 asy->asy_flags &= ~ASY_NEEDSOFT;
3479 mutex_exit(&asy->asy_excl_hi);
3480 async_softint(asy);
3481 mutex_enter(&asy->asy_excl_hi);
3482 }
3483
3484 /*
3485 * There are some instances where the softintr is not
3486 * scheduled and hence not called. It so happens that
3487 * causes the last few characters to be stuck in the
3488 * ringbuffer. Hence, call the handler once again so
3489 * the last few characters are cleared.
3490 */
3491 cc = RING_CNT(async);
3492 mutex_exit(&asy->asy_excl_hi);
3493 if (cc > 0)
3494 (void) async_softint(asy);
3495 }
3496 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3497 }
3498
3499 /*
3500 * Handle a software interrupt.
3501 */
3502 static void
async_softint(struct asycom * asy)3503 async_softint(struct asycom *asy)
3504 {
3505 struct asyncline *async = asy->asy_priv;
3506 uint_t cc;
3507 mblk_t *bp;
3508 queue_t *q;
3509 uchar_t c;
3510 tty_common_t *tp;
3511 int nb;
3512
3513 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3514 mutex_enter(&asy->asy_excl_hi);
3515 if (asy->asy_flags & ASY_DOINGSOFT) {
3516 asy->asy_flags |= ASY_DOINGSOFT_RETRY;
3517 mutex_exit(&asy->asy_excl_hi);
3518 return;
3519 }
3520 asy->asy_flags |= ASY_DOINGSOFT;
3521 begin:
3522 asy->asy_flags &= ~ASY_DOINGSOFT_RETRY;
3523 mutex_exit(&asy->asy_excl_hi);
3524 mutex_enter(&asy->asy_excl);
3525 tp = &async->async_ttycommon;
3526 q = tp->t_readq;
3527
3528 if (async->async_flags & ASYNC_OUT_FLW_RESUME) {
3529 if (async->async_ocnt > 0) {
3530 mutex_enter(&asy->asy_excl_hi);
3531 async_resume(async);
3532 mutex_exit(&asy->asy_excl_hi);
3533 } else {
3534 if (async->async_xmitblk)
3535 freeb(async->async_xmitblk);
3536 async->async_xmitblk = NULL;
3537 async_start(async);
3538 }
3539 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
3540 }
3541
3542 mutex_enter(&asy->asy_excl_hi);
3543 if (async->async_ext) {
3544 async->async_ext = 0;
3545 asy_carrier_check(asy);
3546 }
3547 mutex_exit(&asy->asy_excl_hi);
3548
3549 /*
3550 * If data has been added to the circular buffer, remove
3551 * it from the buffer, and send it up the stream if there's
3552 * somebody listening. Try to do it 16 bytes at a time. If we
3553 * have more than 16 bytes to move, move 16 byte chunks and
3554 * leave the rest for next time around (maybe it will grow).
3555 */
3556 mutex_enter(&asy->asy_excl_hi);
3557 if (!(async->async_flags & ASYNC_ISOPEN)) {
3558 RING_INIT(async);
3559 goto rv;
3560 }
3561 if ((cc = RING_CNT(async)) == 0)
3562 goto rv;
3563 mutex_exit(&asy->asy_excl_hi);
3564
3565 if (!canput(q)) {
3566 mutex_enter(&asy->asy_excl_hi);
3567 if (!(async->async_inflow_source & IN_FLOW_STREAMS)) {
3568 async_flowcontrol_hw_input(asy, FLOW_STOP,
3569 IN_FLOW_STREAMS);
3570 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3571 IN_FLOW_STREAMS);
3572 }
3573 goto rv;
3574 }
3575 if (async->async_inflow_source & IN_FLOW_STREAMS) {
3576 mutex_enter(&asy->asy_excl_hi);
3577 async_flowcontrol_hw_input(asy, FLOW_START,
3578 IN_FLOW_STREAMS);
3579 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3580 IN_FLOW_STREAMS);
3581 mutex_exit(&asy->asy_excl_hi);
3582 }
3583
3584 ASY_DPRINTF(asy, ASY_DEBUG_INPUT, "%d char(s) in queue", cc);
3585
3586 if (!(bp = allocb(cc, BPRI_MED))) {
3587 mutex_exit(&asy->asy_excl);
3588 ttycommon_qfull(&async->async_ttycommon, q);
3589 mutex_enter(&asy->asy_excl);
3590 mutex_enter(&asy->asy_excl_hi);
3591 goto rv;
3592 }
3593 mutex_enter(&asy->asy_excl_hi);
3594 do {
3595 if (RING_ERR(async, S_ERRORS)) {
3596 RING_UNMARK(async);
3597 c = RING_GET(async);
3598 break;
3599 } else {
3600 *bp->b_wptr++ = RING_GET(async);
3601 }
3602 } while (--cc);
3603 mutex_exit(&asy->asy_excl_hi);
3604 mutex_exit(&asy->asy_excl);
3605 if (bp->b_wptr > bp->b_rptr) {
3606 if (!canput(q)) {
3607 asyerror(asy, CE_WARN, "local queue full");
3608 freemsg(bp);
3609 } else {
3610 (void) putq(q, bp);
3611 }
3612 } else {
3613 freemsg(bp);
3614 }
3615 /*
3616 * If we have a parity error, then send
3617 * up an M_BREAK with the "bad"
3618 * character as an argument. Let ldterm
3619 * figure out what to do with the error.
3620 */
3621 if (cc)
3622 (void) putctl1(q, M_BREAK, c);
3623 mutex_enter(&asy->asy_excl);
3624 mutex_enter(&asy->asy_excl_hi);
3625 if (cc) {
3626 asysetsoft(asy); /* finish cc chars */
3627 }
3628 rv:
3629 if ((RING_CNT(async) < (RINGSIZE/4)) &&
3630 (async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3631 async_flowcontrol_hw_input(asy, FLOW_START, IN_FLOW_RINGBUFF);
3632 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3633 IN_FLOW_RINGBUFF);
3634 }
3635
3636 /*
3637 * If a transmission has finished, indicate that it's finished,
3638 * and start that line up again.
3639 */
3640 if (async->async_break > 0) {
3641 nb = async->async_break;
3642 async->async_break = 0;
3643 if (async->async_flags & ASYNC_ISOPEN) {
3644 mutex_exit(&asy->asy_excl_hi);
3645 mutex_exit(&asy->asy_excl);
3646 for (; nb > 0; nb--)
3647 (void) putctl(q, M_BREAK);
3648 mutex_enter(&asy->asy_excl);
3649 mutex_enter(&asy->asy_excl_hi);
3650 }
3651 }
3652 if (async->async_ocnt <= 0 && (async->async_flags & ASYNC_BUSY)) {
3653 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3654 "Clearing ASYNC_BUSY, async_ocnt=%d", async->async_ocnt);
3655 async->async_flags &= ~ASYNC_BUSY;
3656 mutex_exit(&asy->asy_excl_hi);
3657 if (async->async_xmitblk)
3658 freeb(async->async_xmitblk);
3659 async->async_xmitblk = NULL;
3660 async_start(async);
3661 /*
3662 * If the flag isn't set after doing the async_start above, we
3663 * may have finished all the queued output. Signal any thread
3664 * stuck in close.
3665 */
3666 if (!(async->async_flags & ASYNC_BUSY))
3667 cv_broadcast(&async->async_flags_cv);
3668 mutex_enter(&asy->asy_excl_hi);
3669 }
3670 /*
3671 * A note about these overrun bits: all they do is *tell* someone
3672 * about an error- They do not track multiple errors. In fact,
3673 * you could consider them latched register bits if you like.
3674 * We are only interested in printing the error message once for
3675 * any cluster of overrun errors.
3676 */
3677 if (async->async_hw_overrun) {
3678 if (async->async_flags & ASYNC_ISOPEN) {
3679 mutex_exit(&asy->asy_excl_hi);
3680 mutex_exit(&asy->asy_excl);
3681 asyerror(asy, CE_WARN, "silo overflow");
3682 mutex_enter(&asy->asy_excl);
3683 mutex_enter(&asy->asy_excl_hi);
3684 }
3685 async->async_hw_overrun = 0;
3686 }
3687 if (async->async_sw_overrun) {
3688 if (async->async_flags & ASYNC_ISOPEN) {
3689 mutex_exit(&asy->asy_excl_hi);
3690 mutex_exit(&asy->asy_excl);
3691 asyerror(asy, CE_WARN, "ring buffer overflow");
3692 mutex_enter(&asy->asy_excl);
3693 mutex_enter(&asy->asy_excl_hi);
3694 }
3695 async->async_sw_overrun = 0;
3696 }
3697 if (asy->asy_flags & ASY_DOINGSOFT_RETRY) {
3698 mutex_exit(&asy->asy_excl);
3699 goto begin;
3700 }
3701 asy->asy_flags &= ~ASY_DOINGSOFT;
3702 mutex_exit(&asy->asy_excl_hi);
3703 mutex_exit(&asy->asy_excl);
3704 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
3705 }
3706
3707 /*
3708 * Restart output on a line after a delay or break timer expired.
3709 */
3710 static void
async_restart(void * arg)3711 async_restart(void *arg)
3712 {
3713 struct asyncline *async = (struct asyncline *)arg;
3714 struct asycom *asy = async->async_common;
3715
3716 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3717
3718 /*
3719 * If break timer expired, turn off the break bit.
3720 */
3721
3722 mutex_enter(&asy->asy_excl);
3723 /*
3724 * If ASYNC_OUT_SUSPEND is also set, we don't really
3725 * clean the HW break, TIOCCBRK is responsible for this.
3726 */
3727 if ((async->async_flags & ASYNC_BREAK) &&
3728 !(async->async_flags & ASYNC_OUT_SUSPEND)) {
3729 mutex_enter(&asy->asy_excl_hi);
3730 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3731 mutex_exit(&asy->asy_excl_hi);
3732 }
3733 async->async_flags &= ~(ASYNC_DELAY|ASYNC_BREAK);
3734 cv_broadcast(&async->async_flags_cv);
3735 async_start(async);
3736
3737 mutex_exit(&asy->asy_excl);
3738 }
3739
3740 /*
3741 * Start output on a line, unless it's busy, frozen, or otherwise.
3742 */
3743 static void
async_start(struct asyncline * async)3744 async_start(struct asyncline *async)
3745 {
3746 struct asycom *asy = async->async_common;
3747 int cc;
3748 queue_t *q;
3749 mblk_t *bp;
3750 uchar_t *xmit_addr;
3751 int fifo_len = 1;
3752 boolean_t didsome;
3753 mblk_t *nbp;
3754
3755 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3756
3757 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3758 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3759 if (fifo_len > asy_max_tx_fifo)
3760 fifo_len = asy_max_tx_fifo;
3761 }
3762
3763 ASSERT(mutex_owned(&asy->asy_excl));
3764
3765 /*
3766 * If the chip is busy (i.e., we're waiting for a break timeout
3767 * to expire, or for the current transmission to finish, or for
3768 * output to finish draining from chip), don't grab anything new.
3769 */
3770 if (async->async_flags & (ASYNC_BREAK|ASYNC_BUSY)) {
3771 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "%s",
3772 async->async_flags & ASYNC_BREAK ? "break" : "busy");
3773 return;
3774 }
3775
3776 /*
3777 * Check only pended sw input flow control.
3778 */
3779 mutex_enter(&asy->asy_excl_hi);
3780 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3781 fifo_len--;
3782 mutex_exit(&asy->asy_excl_hi);
3783
3784 /*
3785 * If we're waiting for a delay timeout to expire, don't grab
3786 * anything new.
3787 */
3788 if (async->async_flags & ASYNC_DELAY) {
3789 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start ASYNC_DELAY");
3790 return;
3791 }
3792
3793 if ((q = async->async_ttycommon.t_writeq) == NULL) {
3794 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start writeq is null");
3795 return; /* not attached to a stream */
3796 }
3797
3798 for (;;) {
3799 if ((bp = getq(q)) == NULL)
3800 return; /* no data to transmit */
3801
3802 /*
3803 * We have a message block to work on.
3804 * Check whether it's a break, a delay, or an ioctl (the latter
3805 * occurs if the ioctl in question was waiting for the output
3806 * to drain). If it's one of those, process it immediately.
3807 */
3808 switch (bp->b_datap->db_type) {
3809
3810 case M_BREAK:
3811 /*
3812 * Set the break bit, and arrange for "async_restart"
3813 * to be called in 1/4 second; it will turn the
3814 * break bit off, and call "async_start" to grab
3815 * the next message.
3816 */
3817 mutex_enter(&asy->asy_excl_hi);
3818 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
3819 mutex_exit(&asy->asy_excl_hi);
3820 async->async_flags |= ASYNC_BREAK;
3821 (void) timeout(async_restart, (caddr_t)async,
3822 drv_usectohz(1000000)/4);
3823 freemsg(bp);
3824 return; /* wait for this to finish */
3825
3826 case M_DELAY:
3827 /*
3828 * Arrange for "async_restart" to be called when the
3829 * delay expires; it will turn ASYNC_DELAY off,
3830 * and call "async_start" to grab the next message.
3831 */
3832 (void) timeout(async_restart, (caddr_t)async,
3833 (int)(*(unsigned char *)bp->b_rptr + 6));
3834 async->async_flags |= ASYNC_DELAY;
3835 freemsg(bp);
3836 return; /* wait for this to finish */
3837
3838 case M_IOCTL:
3839 /*
3840 * This ioctl was waiting for the output ahead of
3841 * it to drain; obviously, it has. Do it, and
3842 * then grab the next message after it.
3843 */
3844 mutex_exit(&asy->asy_excl);
3845 async_ioctl(async, q, bp);
3846 mutex_enter(&asy->asy_excl);
3847 continue;
3848 }
3849
3850 while (bp != NULL && ((cc = MBLKL(bp)) == 0)) {
3851 nbp = bp->b_cont;
3852 freeb(bp);
3853 bp = nbp;
3854 }
3855 if (bp != NULL)
3856 break;
3857 }
3858
3859 /*
3860 * We have data to transmit. If output is stopped, put
3861 * it back and try again later.
3862 */
3863 if (async->async_flags & (ASYNC_HW_OUT_FLW | ASYNC_SW_OUT_FLW |
3864 ASYNC_STOPPED | ASYNC_OUT_SUSPEND)) {
3865 (void) putbq(q, bp);
3866 return;
3867 }
3868
3869 async->async_xmitblk = bp;
3870 xmit_addr = bp->b_rptr;
3871 bp = bp->b_cont;
3872 if (bp != NULL)
3873 (void) putbq(q, bp); /* not done with this message yet */
3874
3875 /*
3876 * In 5-bit mode, the high order bits are used
3877 * to indicate character sizes less than five,
3878 * so we need to explicitly mask before transmitting
3879 */
3880 if ((async->async_ttycommon.t_cflag & CSIZE) == CS5) {
3881 unsigned char *p = xmit_addr;
3882 int cnt = cc;
3883
3884 while (cnt--)
3885 *p++ &= (unsigned char) 0x1f;
3886 }
3887
3888 /*
3889 * Set up this block for pseudo-DMA.
3890 */
3891 mutex_enter(&asy->asy_excl_hi);
3892 /*
3893 * If the transmitter is ready, shove the first
3894 * character out.
3895 */
3896 didsome = B_FALSE;
3897 while (--fifo_len >= 0 && cc > 0) {
3898 if (!(asy_get(asy, ASY_LSR) & ASY_LSR_THRE))
3899 break;
3900 asy_put(asy, ASY_THR, *xmit_addr++);
3901 cc--;
3902 didsome = B_TRUE;
3903 }
3904 async->async_optr = xmit_addr;
3905 async->async_ocnt = cc;
3906 if (didsome)
3907 async->async_flags |= ASYNC_PROGRESS;
3908 ASY_DPRINTF(asy, ASY_DEBUG_BUSY, "Set ASYNC_BUSY, async_ocnt=%d",
3909 async->async_ocnt);
3910 async->async_flags |= ASYNC_BUSY;
3911 mutex_exit(&asy->asy_excl_hi);
3912 }
3913
3914 /*
3915 * Resume output by poking the transmitter.
3916 */
3917 static void
async_resume(struct asyncline * async)3918 async_resume(struct asyncline *async)
3919 {
3920 struct asycom *asy = async->async_common;
3921
3922 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3923 ASSERT(mutex_owned(&asy->asy_excl_hi));
3924
3925 if (asy_get(asy, ASY_LSR) & ASY_LSR_THRE) {
3926 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3927 return;
3928 if (async->async_ocnt > 0 &&
3929 !(async->async_flags &
3930 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_OUT_SUSPEND))) {
3931 asy_put(asy, ASY_THR, *async->async_optr++);
3932 async->async_ocnt--;
3933 async->async_flags |= ASYNC_PROGRESS;
3934 }
3935 }
3936 }
3937
3938 /*
3939 * Hold the untimed break to last the minimum time.
3940 */
3941 static void
async_hold_utbrk(void * arg)3942 async_hold_utbrk(void *arg)
3943 {
3944 struct asyncline *async = arg;
3945 struct asycom *asy = async->async_common;
3946
3947 mutex_enter(&asy->asy_excl);
3948 async->async_flags &= ~ASYNC_HOLD_UTBRK;
3949 cv_broadcast(&async->async_flags_cv);
3950 async->async_utbrktid = 0;
3951 mutex_exit(&asy->asy_excl);
3952 }
3953
3954 /*
3955 * Resume the untimed break.
3956 */
3957 static void
async_resume_utbrk(struct asyncline * async)3958 async_resume_utbrk(struct asyncline *async)
3959 {
3960 struct asycom *asy = async->async_common;
3961 ASSERT(mutex_owned(&asy->asy_excl));
3962
3963 /*
3964 * Because the wait time is very short,
3965 * so we use uninterruptably wait.
3966 */
3967 while (async->async_flags & ASYNC_HOLD_UTBRK) {
3968 cv_wait(&async->async_flags_cv, &asy->asy_excl);
3969 }
3970 mutex_enter(&asy->asy_excl_hi);
3971 /*
3972 * Timed break and untimed break can exist simultaneously,
3973 * if ASYNC_BREAK is also set at here, we don't
3974 * really clean the HW break.
3975 */
3976 if (!(async->async_flags & ASYNC_BREAK))
3977 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3978
3979 async->async_flags &= ~ASYNC_OUT_SUSPEND;
3980 cv_broadcast(&async->async_flags_cv);
3981 if (async->async_ocnt > 0) {
3982 async_resume(async);
3983 mutex_exit(&asy->asy_excl_hi);
3984 } else {
3985 async->async_flags &= ~ASYNC_BUSY;
3986 mutex_exit(&asy->asy_excl_hi);
3987 if (async->async_xmitblk != NULL) {
3988 freeb(async->async_xmitblk);
3989 async->async_xmitblk = NULL;
3990 }
3991 async_start(async);
3992 }
3993 }
3994
3995 /*
3996 * Process an "ioctl" message sent down to us.
3997 * Note that we don't need to get any locks until we are ready to access
3998 * the hardware. Nothing we access until then is going to be altered
3999 * outside of the STREAMS framework, so we should be safe.
4000 */
4001 int asydelay = 10000;
4002 static void
async_ioctl(struct asyncline * async,queue_t * wq,mblk_t * mp)4003 async_ioctl(struct asyncline *async, queue_t *wq, mblk_t *mp)
4004 {
4005 struct asycom *asy = async->async_common;
4006 tty_common_t *tp = &async->async_ttycommon;
4007 struct iocblk *iocp;
4008 unsigned datasize;
4009 int error = 0;
4010 mblk_t *datamp;
4011
4012 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
4013
4014 if (tp->t_iocpending != NULL) {
4015 /*
4016 * We were holding an "ioctl" response pending the
4017 * availability of an "mblk" to hold data to be passed up;
4018 * another "ioctl" came through, which means that "ioctl"
4019 * must have timed out or been aborted.
4020 */
4021 freemsg(async->async_ttycommon.t_iocpending);
4022 async->async_ttycommon.t_iocpending = NULL;
4023 }
4024
4025 iocp = (struct iocblk *)mp->b_rptr;
4026
4027 /*
4028 * For TIOCMGET and the PPS ioctls, do NOT call ttycommon_ioctl()
4029 * because this function frees up the message block (mp->b_cont) that
4030 * contains the user location where we pass back the results.
4031 *
4032 * Similarly, CONSOPENPOLLEDIO needs ioc_count, which ttycommon_ioctl
4033 * zaps. We know that ttycommon_ioctl doesn't know any CONS*
4034 * ioctls, so keep the others safe too.
4035 */
4036 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL, "%s",
4037 iocp->ioc_cmd == TIOCMGET ? "TIOCMGET" :
4038 iocp->ioc_cmd == TIOCMSET ? "TIOCMSET" :
4039 iocp->ioc_cmd == TIOCMBIS ? "TIOCMBIS" :
4040 iocp->ioc_cmd == TIOCMBIC ? "TIOCMBIC" :
4041 "other");
4042
4043 switch (iocp->ioc_cmd) {
4044 case TIOCMGET:
4045 case TIOCGPPS:
4046 case TIOCSPPS:
4047 case TIOCGPPSEV:
4048 case CONSOPENPOLLEDIO:
4049 case CONSCLOSEPOLLEDIO:
4050 case CONSSETABORTENABLE:
4051 case CONSGETABORTENABLE:
4052 error = -1; /* Do Nothing */
4053 break;
4054 default:
4055
4056 /*
4057 * The only way in which "ttycommon_ioctl" can fail is if the
4058 * "ioctl" requires a response containing data to be returned
4059 * to the user, and no mblk could be allocated for the data.
4060 * No such "ioctl" alters our state. Thus, we always go ahead
4061 * and do any state-changes the "ioctl" calls for. If we
4062 * couldn't allocate the data, "ttycommon_ioctl" has stashed
4063 * the "ioctl" away safely, so we just call "bufcall" to
4064 * request that we be called back when we stand a better
4065 * chance of allocating the data.
4066 */
4067 if ((datasize = ttycommon_ioctl(tp, wq, mp, &error)) != 0) {
4068 if (async->async_wbufcid)
4069 unbufcall(async->async_wbufcid);
4070 async->async_wbufcid = bufcall(datasize, BPRI_HI,
4071 (void (*)(void *)) async_reioctl,
4072 (void *)(intptr_t)async->async_common->asy_unit);
4073 return;
4074 }
4075 }
4076
4077 mutex_enter(&asy->asy_excl);
4078
4079 if (error == 0) {
4080 /*
4081 * "ttycommon_ioctl" did most of the work; we just use the
4082 * data it set up.
4083 */
4084 switch (iocp->ioc_cmd) {
4085
4086 case TCSETS:
4087 mutex_enter(&asy->asy_excl_hi);
4088 if (asy_baudok(asy))
4089 asy_program(asy, ASY_NOINIT);
4090 else
4091 error = EINVAL;
4092 mutex_exit(&asy->asy_excl_hi);
4093 break;
4094 case TCSETSF:
4095 case TCSETSW:
4096 case TCSETA:
4097 case TCSETAW:
4098 case TCSETAF:
4099 mutex_enter(&asy->asy_excl_hi);
4100 if (!asy_baudok(asy))
4101 error = EINVAL;
4102 else {
4103 if (asy_isbusy(asy))
4104 asy_waiteot(asy);
4105 asy_program(asy, ASY_NOINIT);
4106 }
4107 mutex_exit(&asy->asy_excl_hi);
4108 break;
4109 }
4110 } else if (error < 0) {
4111 /*
4112 * "ttycommon_ioctl" didn't do anything; we process it here.
4113 */
4114 error = 0;
4115 switch (iocp->ioc_cmd) {
4116
4117 case TIOCGPPS:
4118 /*
4119 * Get PPS on/off.
4120 */
4121 if (mp->b_cont != NULL)
4122 freemsg(mp->b_cont);
4123
4124 mp->b_cont = allocb(sizeof (int), BPRI_HI);
4125 if (mp->b_cont == NULL) {
4126 error = ENOMEM;
4127 break;
4128 }
4129 if (asy->asy_flags & ASY_PPS)
4130 *(int *)mp->b_cont->b_wptr = 1;
4131 else
4132 *(int *)mp->b_cont->b_wptr = 0;
4133 mp->b_cont->b_wptr += sizeof (int);
4134 mp->b_datap->db_type = M_IOCACK;
4135 iocp->ioc_count = sizeof (int);
4136 break;
4137
4138 case TIOCSPPS:
4139 /*
4140 * Set PPS on/off.
4141 */
4142 error = miocpullup(mp, sizeof (int));
4143 if (error != 0)
4144 break;
4145
4146 mutex_enter(&asy->asy_excl_hi);
4147 if (*(int *)mp->b_cont->b_rptr)
4148 asy->asy_flags |= ASY_PPS;
4149 else
4150 asy->asy_flags &= ~ASY_PPS;
4151 /* Reset edge sense */
4152 asy->asy_flags &= ~ASY_PPS_EDGE;
4153 mutex_exit(&asy->asy_excl_hi);
4154 mp->b_datap->db_type = M_IOCACK;
4155 break;
4156
4157 case TIOCGPPSEV:
4158 {
4159 /*
4160 * Get PPS event data.
4161 */
4162 mblk_t *bp;
4163 void *buf;
4164 #ifdef _SYSCALL32_IMPL
4165 struct ppsclockev32 p32;
4166 #endif
4167 struct ppsclockev ppsclockev;
4168
4169 if (mp->b_cont != NULL) {
4170 freemsg(mp->b_cont);
4171 mp->b_cont = NULL;
4172 }
4173
4174 if ((asy->asy_flags & ASY_PPS) == 0) {
4175 error = ENXIO;
4176 break;
4177 }
4178
4179 /* Protect from incomplete asy_ppsev */
4180 mutex_enter(&asy->asy_excl_hi);
4181 ppsclockev = asy_ppsev;
4182 mutex_exit(&asy->asy_excl_hi);
4183
4184 #ifdef _SYSCALL32_IMPL
4185 if ((iocp->ioc_flag & IOC_MODELS) != IOC_NATIVE) {
4186 TIMEVAL_TO_TIMEVAL32(&p32.tv, &ppsclockev.tv);
4187 p32.serial = ppsclockev.serial;
4188 buf = &p32;
4189 iocp->ioc_count = sizeof (struct ppsclockev32);
4190 } else
4191 #endif
4192 {
4193 buf = &ppsclockev;
4194 iocp->ioc_count = sizeof (struct ppsclockev);
4195 }
4196
4197 if ((bp = allocb(iocp->ioc_count, BPRI_HI)) == NULL) {
4198 error = ENOMEM;
4199 break;
4200 }
4201 mp->b_cont = bp;
4202
4203 bcopy(buf, bp->b_wptr, iocp->ioc_count);
4204 bp->b_wptr += iocp->ioc_count;
4205 mp->b_datap->db_type = M_IOCACK;
4206 break;
4207 }
4208
4209 case TCSBRK:
4210 error = miocpullup(mp, sizeof (int));
4211 if (error != 0)
4212 break;
4213
4214 if (*(int *)mp->b_cont->b_rptr == 0) {
4215
4216 /*
4217 * XXX Arrangements to ensure that a break
4218 * isn't in progress should be sufficient.
4219 * This ugly delay() is the only thing
4220 * that seems to work on the NCR Worldmark.
4221 * It should be replaced. Note that an
4222 * asy_waiteot() also does not work.
4223 */
4224 if (asydelay)
4225 delay(drv_usectohz(asydelay));
4226
4227 while (async->async_flags & ASYNC_BREAK) {
4228 cv_wait(&async->async_flags_cv,
4229 &asy->asy_excl);
4230 }
4231 mutex_enter(&asy->asy_excl_hi);
4232 /*
4233 * Wait until TSR is empty and then set the
4234 * break. ASYNC_BREAK has been set to ensure
4235 * that no characters are transmitted while the
4236 * TSR is being flushed and SOUT is being used
4237 * for the break signal.
4238 */
4239 async->async_flags |= ASYNC_BREAK;
4240 asy_wait_baudrate(asy);
4241 /*
4242 * Arrange for "async_restart"
4243 * to be called in 1/4 second;
4244 * it will turn the break bit off, and call
4245 * "async_start" to grab the next message.
4246 */
4247 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
4248 mutex_exit(&asy->asy_excl_hi);
4249 (void) timeout(async_restart, (caddr_t)async,
4250 drv_usectohz(1000000)/4);
4251 } else {
4252 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4253 "wait for flush");
4254 mutex_enter(&asy->asy_excl_hi);
4255 asy_waiteot(asy);
4256 mutex_exit(&asy->asy_excl_hi);
4257 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4258 "ldterm satisfied");
4259 }
4260 break;
4261
4262 case TIOCSBRK:
4263 if (!(async->async_flags & ASYNC_OUT_SUSPEND)) {
4264 mutex_enter(&asy->asy_excl_hi);
4265 async->async_flags |= ASYNC_OUT_SUSPEND;
4266 async->async_flags |= ASYNC_HOLD_UTBRK;
4267 asy_wait_baudrate(asy);
4268 mutex_exit(&asy->asy_excl_hi);
4269 /* wait for 100ms to hold BREAK */
4270 async->async_utbrktid =
4271 timeout((void (*)())async_hold_utbrk,
4272 (caddr_t)async,
4273 drv_usectohz(asy_min_utbrk));
4274 }
4275 mioc2ack(mp, NULL, 0, 0);
4276 break;
4277
4278 case TIOCCBRK:
4279 if (async->async_flags & ASYNC_OUT_SUSPEND)
4280 async_resume_utbrk(async);
4281 mioc2ack(mp, NULL, 0, 0);
4282 break;
4283
4284 case TIOCMSET:
4285 case TIOCMBIS:
4286 case TIOCMBIC:
4287 if (iocp->ioc_count != TRANSPARENT) {
4288 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4289 "non-transparent");
4290
4291 error = miocpullup(mp, sizeof (int));
4292 if (error != 0)
4293 break;
4294
4295 mutex_enter(&asy->asy_excl_hi);
4296 (void) asymctl(asy,
4297 dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4298 iocp->ioc_cmd);
4299 mutex_exit(&asy->asy_excl_hi);
4300 iocp->ioc_error = 0;
4301 mp->b_datap->db_type = M_IOCACK;
4302 } else {
4303 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4304 "transparent");
4305 mcopyin(mp, NULL, sizeof (int), NULL);
4306 }
4307 break;
4308
4309 case TIOCMGET:
4310 datamp = allocb(sizeof (int), BPRI_MED);
4311 if (datamp == NULL) {
4312 error = EAGAIN;
4313 break;
4314 }
4315
4316 mutex_enter(&asy->asy_excl_hi);
4317 *(int *)datamp->b_rptr = asymctl(asy, 0, TIOCMGET);
4318 mutex_exit(&asy->asy_excl_hi);
4319
4320 if (iocp->ioc_count == TRANSPARENT) {
4321 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4322 "transparent");
4323 mcopyout(mp, NULL, sizeof (int), NULL, datamp);
4324 } else {
4325 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4326 "non-transparent");
4327 mioc2ack(mp, datamp, sizeof (int), 0);
4328 }
4329 break;
4330
4331 case CONSOPENPOLLEDIO:
4332 error = miocpullup(mp, sizeof (struct cons_polledio *));
4333 if (error != 0)
4334 break;
4335
4336 *(struct cons_polledio **)mp->b_cont->b_rptr =
4337 &asy->polledio;
4338
4339 mp->b_datap->db_type = M_IOCACK;
4340 break;
4341
4342 case CONSCLOSEPOLLEDIO:
4343 mp->b_datap->db_type = M_IOCACK;
4344 iocp->ioc_error = 0;
4345 iocp->ioc_rval = 0;
4346 break;
4347
4348 case CONSSETABORTENABLE:
4349 error = secpolicy_console(iocp->ioc_cr);
4350 if (error != 0)
4351 break;
4352
4353 if (iocp->ioc_count != TRANSPARENT) {
4354 error = EINVAL;
4355 break;
4356 }
4357
4358 mutex_enter(&asy->asy_excl_hi);
4359 if (*(intptr_t *)mp->b_cont->b_rptr)
4360 asy->asy_flags |= ASY_CONSOLE;
4361 else
4362 asy->asy_flags &= ~ASY_CONSOLE;
4363 mutex_exit(&asy->asy_excl_hi);
4364
4365 mp->b_datap->db_type = M_IOCACK;
4366 iocp->ioc_error = 0;
4367 iocp->ioc_rval = 0;
4368 break;
4369
4370 case CONSGETABORTENABLE:
4371 /*CONSTANTCONDITION*/
4372 ASSERT(sizeof (boolean_t) <= sizeof (boolean_t *));
4373 /*
4374 * Store the return value right in the payload
4375 * we were passed. Crude.
4376 */
4377 mcopyout(mp, NULL, sizeof (boolean_t), NULL, NULL);
4378 *(boolean_t *)mp->b_cont->b_rptr =
4379 (asy->asy_flags & ASY_CONSOLE) != 0;
4380 break;
4381
4382 default:
4383 /*
4384 * If we don't understand it, it's an error. NAK it.
4385 */
4386 error = EINVAL;
4387 break;
4388 }
4389 }
4390 if (error != 0) {
4391 iocp->ioc_error = error;
4392 mp->b_datap->db_type = M_IOCNAK;
4393 }
4394 mutex_exit(&asy->asy_excl);
4395 qreply(wq, mp);
4396 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
4397 }
4398
4399 static int
asyrsrv(queue_t * q)4400 asyrsrv(queue_t *q)
4401 {
4402 mblk_t *bp;
4403 struct asyncline *async;
4404 struct asycom *asy;
4405
4406 async = (struct asyncline *)q->q_ptr;
4407 asy = (struct asycom *)async->async_common;
4408
4409 while (canputnext(q) && (bp = getq(q)))
4410 putnext(q, bp);
4411 mutex_enter(&asy->asy_excl_hi);
4412 asysetsoft(asy);
4413 mutex_exit(&asy->asy_excl_hi);
4414 async->async_polltid = 0;
4415 return (0);
4416 }
4417
4418 /*
4419 * The ASYWPUTDO_NOT_SUSP macro indicates to asywputdo() whether it should
4420 * handle messages as though the driver is operating normally or is
4421 * suspended. In the suspended case, some or all of the processing may have
4422 * to be delayed until the driver is resumed.
4423 */
4424 #define ASYWPUTDO_NOT_SUSP(async, wput) \
4425 !((wput) && ((async)->async_flags & ASYNC_DDI_SUSPENDED))
4426
4427 /*
4428 * Processing for write queue put procedure.
4429 * Respond to M_STOP, M_START, M_IOCTL, and M_FLUSH messages here;
4430 * set the flow control character for M_STOPI and M_STARTI messages;
4431 * queue up M_BREAK, M_DELAY, and M_DATA messages for processing
4432 * by the start routine, and then call the start routine; discard
4433 * everything else. Note that this driver does not incorporate any
4434 * mechanism to negotiate to handle the canonicalization process.
4435 * It expects that these functions are handled in upper module(s),
4436 * as we do in ldterm.
4437 */
4438 static int
asywputdo(queue_t * q,mblk_t * mp,boolean_t wput)4439 asywputdo(queue_t *q, mblk_t *mp, boolean_t wput)
4440 {
4441 struct asyncline *async;
4442 struct asycom *asy;
4443 int error;
4444
4445 async = (struct asyncline *)q->q_ptr;
4446 asy = async->async_common;
4447
4448 switch (mp->b_datap->db_type) {
4449
4450 case M_STOP:
4451 /*
4452 * Since we don't do real DMA, we can just let the
4453 * chip coast to a stop after applying the brakes.
4454 */
4455 mutex_enter(&asy->asy_excl);
4456 async->async_flags |= ASYNC_STOPPED;
4457 mutex_exit(&asy->asy_excl);
4458 freemsg(mp);
4459 break;
4460
4461 case M_START:
4462 mutex_enter(&asy->asy_excl);
4463 if (async->async_flags & ASYNC_STOPPED) {
4464 async->async_flags &= ~ASYNC_STOPPED;
4465 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4466 /*
4467 * If an output operation is in progress,
4468 * resume it. Otherwise, prod the start
4469 * routine.
4470 */
4471 if (async->async_ocnt > 0) {
4472 mutex_enter(&asy->asy_excl_hi);
4473 async_resume(async);
4474 mutex_exit(&asy->asy_excl_hi);
4475 } else {
4476 async_start(async);
4477 }
4478 }
4479 }
4480 mutex_exit(&asy->asy_excl);
4481 freemsg(mp);
4482 break;
4483
4484 case M_IOCTL:
4485 switch (((struct iocblk *)mp->b_rptr)->ioc_cmd) {
4486
4487 case TCSBRK:
4488 error = miocpullup(mp, sizeof (int));
4489 if (error != 0) {
4490 miocnak(q, mp, 0, error);
4491 return (0);
4492 }
4493
4494 if (*(int *)mp->b_cont->b_rptr != 0) {
4495 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4496 "flush request");
4497 (void) putq(q, mp);
4498
4499 mutex_enter(&asy->asy_excl);
4500 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4501 /*
4502 * If an TIOCSBRK is in progress,
4503 * clean it as TIOCCBRK does,
4504 * then kick off output.
4505 * If TIOCSBRK is not in progress,
4506 * just kick off output.
4507 */
4508 async_resume_utbrk(async);
4509 }
4510 mutex_exit(&asy->asy_excl);
4511 break;
4512 }
4513 /*FALLTHROUGH*/
4514 case TCSETSW:
4515 case TCSETSF:
4516 case TCSETAW:
4517 case TCSETAF:
4518 /*
4519 * The changes do not take effect until all
4520 * output queued before them is drained.
4521 * Put this message on the queue, so that
4522 * "async_start" will see it when it's done
4523 * with the output before it. Poke the
4524 * start routine, just in case.
4525 */
4526 (void) putq(q, mp);
4527
4528 mutex_enter(&asy->asy_excl);
4529 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4530 /*
4531 * If an TIOCSBRK is in progress,
4532 * clean it as TIOCCBRK does.
4533 * then kick off output.
4534 * If TIOCSBRK is not in progress,
4535 * just kick off output.
4536 */
4537 async_resume_utbrk(async);
4538 }
4539 mutex_exit(&asy->asy_excl);
4540 break;
4541
4542 default:
4543 /*
4544 * Do it now.
4545 */
4546 mutex_enter(&asy->asy_excl);
4547 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4548 mutex_exit(&asy->asy_excl);
4549 async_ioctl(async, q, mp);
4550 break;
4551 }
4552 async_put_suspq(asy, mp);
4553 mutex_exit(&asy->asy_excl);
4554 break;
4555 }
4556 break;
4557
4558 case M_FLUSH:
4559 if (*mp->b_rptr & FLUSHW) {
4560 mutex_enter(&asy->asy_excl);
4561
4562 /*
4563 * Abort any output in progress.
4564 */
4565 mutex_enter(&asy->asy_excl_hi);
4566 if (async->async_flags & ASYNC_BUSY) {
4567 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
4568 "Clearing async_ocnt, "
4569 "leaving ASYNC_BUSY set");
4570 async->async_ocnt = 0;
4571 async->async_flags &= ~ASYNC_BUSY;
4572 } /* if */
4573
4574 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4575 /* Flush FIFO buffers */
4576 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4577 asy_reset_fifo(asy, ASY_FCR_THR_FL);
4578 }
4579 }
4580 mutex_exit(&asy->asy_excl_hi);
4581
4582 /*
4583 * Flush our write queue.
4584 */
4585 flushq(q, FLUSHDATA); /* XXX doesn't flush M_DELAY */
4586 if (async->async_xmitblk != NULL) {
4587 freeb(async->async_xmitblk);
4588 async->async_xmitblk = NULL;
4589 }
4590 mutex_exit(&asy->asy_excl);
4591 *mp->b_rptr &= ~FLUSHW; /* it has been flushed */
4592 }
4593 if (*mp->b_rptr & FLUSHR) {
4594 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4595 mutex_enter(&asy->asy_excl);
4596 mutex_enter(&asy->asy_excl_hi);
4597 /* Flush FIFO buffers */
4598 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4599 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
4600 }
4601 mutex_exit(&asy->asy_excl_hi);
4602 mutex_exit(&asy->asy_excl);
4603 }
4604 flushq(RD(q), FLUSHDATA);
4605 qreply(q, mp); /* give the read queues a crack at it */
4606 } else {
4607 freemsg(mp);
4608 }
4609
4610 /*
4611 * We must make sure we process messages that survive the
4612 * write-side flush.
4613 */
4614 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4615 mutex_enter(&asy->asy_excl);
4616 async_start(async);
4617 mutex_exit(&asy->asy_excl);
4618 }
4619 break;
4620
4621 case M_BREAK:
4622 case M_DELAY:
4623 case M_DATA:
4624 /*
4625 * Queue the message up to be transmitted,
4626 * and poke the start routine.
4627 */
4628 (void) putq(q, mp);
4629 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4630 mutex_enter(&asy->asy_excl);
4631 async_start(async);
4632 mutex_exit(&asy->asy_excl);
4633 }
4634 break;
4635
4636 case M_STOPI:
4637 mutex_enter(&asy->asy_excl);
4638 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4639 mutex_enter(&asy->asy_excl_hi);
4640 if (!(async->async_inflow_source & IN_FLOW_USER)) {
4641 async_flowcontrol_hw_input(asy, FLOW_STOP,
4642 IN_FLOW_USER);
4643 (void) async_flowcontrol_sw_input(asy,
4644 FLOW_STOP, IN_FLOW_USER);
4645 }
4646 mutex_exit(&asy->asy_excl_hi);
4647 mutex_exit(&asy->asy_excl);
4648 freemsg(mp);
4649 break;
4650 }
4651 async_put_suspq(asy, mp);
4652 mutex_exit(&asy->asy_excl);
4653 break;
4654
4655 case M_STARTI:
4656 mutex_enter(&asy->asy_excl);
4657 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4658 mutex_enter(&asy->asy_excl_hi);
4659 if (async->async_inflow_source & IN_FLOW_USER) {
4660 async_flowcontrol_hw_input(asy, FLOW_START,
4661 IN_FLOW_USER);
4662 (void) async_flowcontrol_sw_input(asy,
4663 FLOW_START, IN_FLOW_USER);
4664 }
4665 mutex_exit(&asy->asy_excl_hi);
4666 mutex_exit(&asy->asy_excl);
4667 freemsg(mp);
4668 break;
4669 }
4670 async_put_suspq(asy, mp);
4671 mutex_exit(&asy->asy_excl);
4672 break;
4673
4674 case M_CTL:
4675 if (MBLKL(mp) >= sizeof (struct iocblk) &&
4676 ((struct iocblk *)mp->b_rptr)->ioc_cmd == MC_POSIXQUERY) {
4677 mutex_enter(&asy->asy_excl);
4678 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4679 ((struct iocblk *)mp->b_rptr)->ioc_cmd =
4680 MC_HAS_POSIX;
4681 mutex_exit(&asy->asy_excl);
4682 qreply(q, mp);
4683 break;
4684 } else {
4685 async_put_suspq(asy, mp);
4686 }
4687 } else {
4688 /*
4689 * These MC_SERVICE type messages are used by upper
4690 * modules to tell this driver to send input up
4691 * immediately, or that it can wait for normal
4692 * processing that may or may not be done. Sun
4693 * requires these for the mouse module.
4694 * (XXX - for x86?)
4695 */
4696 mutex_enter(&asy->asy_excl);
4697 switch (*mp->b_rptr) {
4698
4699 case MC_SERVICEIMM:
4700 async->async_flags |= ASYNC_SERVICEIMM;
4701 break;
4702
4703 case MC_SERVICEDEF:
4704 async->async_flags &= ~ASYNC_SERVICEIMM;
4705 break;
4706 }
4707 mutex_exit(&asy->asy_excl);
4708 freemsg(mp);
4709 }
4710 break;
4711
4712 case M_IOCDATA:
4713 mutex_enter(&asy->asy_excl);
4714 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4715 mutex_exit(&asy->asy_excl);
4716 async_iocdata(q, mp);
4717 break;
4718 }
4719 async_put_suspq(asy, mp);
4720 mutex_exit(&asy->asy_excl);
4721 break;
4722
4723 default:
4724 freemsg(mp);
4725 break;
4726 }
4727 return (0);
4728 }
4729
4730 static int
asywput(queue_t * q,mblk_t * mp)4731 asywput(queue_t *q, mblk_t *mp)
4732 {
4733 return (asywputdo(q, mp, B_TRUE));
4734 }
4735
4736 /*
4737 * Retry an "ioctl", now that "bufcall" claims we may be able to allocate
4738 * the buffer we need.
4739 */
4740 static void
async_reioctl(void * unit)4741 async_reioctl(void *unit)
4742 {
4743 int instance = (uintptr_t)unit;
4744 struct asyncline *async;
4745 struct asycom *asy;
4746 queue_t *q;
4747 mblk_t *mp;
4748
4749 asy = ddi_get_soft_state(asy_soft_state, instance);
4750 ASSERT(asy != NULL);
4751 async = asy->asy_priv;
4752
4753 /*
4754 * The bufcall is no longer pending.
4755 */
4756 mutex_enter(&asy->asy_excl);
4757 async->async_wbufcid = 0;
4758 if ((q = async->async_ttycommon.t_writeq) == NULL) {
4759 mutex_exit(&asy->asy_excl);
4760 return;
4761 }
4762 if ((mp = async->async_ttycommon.t_iocpending) != NULL) {
4763 /* not pending any more */
4764 async->async_ttycommon.t_iocpending = NULL;
4765 mutex_exit(&asy->asy_excl);
4766 async_ioctl(async, q, mp);
4767 } else
4768 mutex_exit(&asy->asy_excl);
4769 }
4770
4771 static void
async_iocdata(queue_t * q,mblk_t * mp)4772 async_iocdata(queue_t *q, mblk_t *mp)
4773 {
4774 struct asyncline *async = (struct asyncline *)q->q_ptr;
4775 struct asycom *asy;
4776 struct iocblk *ip;
4777 struct copyresp *csp;
4778
4779 asy = async->async_common;
4780 ip = (struct iocblk *)mp->b_rptr;
4781 csp = (struct copyresp *)mp->b_rptr;
4782
4783 if (csp->cp_rval != 0) {
4784 if (csp->cp_private)
4785 freemsg(csp->cp_private);
4786 freemsg(mp);
4787 return;
4788 }
4789
4790 mutex_enter(&asy->asy_excl);
4791 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "case %s",
4792 csp->cp_cmd == TIOCMGET ? "TIOCMGET" :
4793 csp->cp_cmd == TIOCMSET ? "TIOCMSET" :
4794 csp->cp_cmd == TIOCMBIS ? "TIOCMBIS" :
4795 "TIOCMBIC");
4796 switch (csp->cp_cmd) {
4797
4798 case TIOCMGET:
4799 if (mp->b_cont) {
4800 freemsg(mp->b_cont);
4801 mp->b_cont = NULL;
4802 }
4803 mp->b_datap->db_type = M_IOCACK;
4804 ip->ioc_error = 0;
4805 ip->ioc_count = 0;
4806 ip->ioc_rval = 0;
4807 mp->b_wptr = mp->b_rptr + sizeof (struct iocblk);
4808 break;
4809
4810 case TIOCMSET:
4811 case TIOCMBIS:
4812 case TIOCMBIC:
4813 mutex_enter(&asy->asy_excl_hi);
4814 (void) asymctl(asy, dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4815 csp->cp_cmd);
4816 mutex_exit(&asy->asy_excl_hi);
4817 mioc2ack(mp, NULL, 0, 0);
4818 break;
4819
4820 default:
4821 mp->b_datap->db_type = M_IOCNAK;
4822 ip->ioc_error = EINVAL;
4823 break;
4824 }
4825 qreply(q, mp);
4826 mutex_exit(&asy->asy_excl);
4827 }
4828
4829 /*
4830 * debugger/console support routines.
4831 */
4832
4833 /*
4834 * put a character out
4835 * Do not use interrupts. If char is LF, put out CR, LF.
4836 */
4837 static void
asyputchar(cons_polledio_arg_t arg,uchar_t c)4838 asyputchar(cons_polledio_arg_t arg, uchar_t c)
4839 {
4840 struct asycom *asy = (struct asycom *)arg;
4841
4842 if (c == '\n')
4843 asyputchar(arg, '\r');
4844
4845 while ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_THRE) == 0) {
4846 /*
4847 * Wait for the transmitter to drain. This is a polled path
4848 * that may run with hres_lock held, so spin rather than use a
4849 * clock-based delay such as drv_usecwait(), which could never
4850 * return in that case.
4851 */
4852 SMT_PAUSE();
4853 }
4854
4855 /* put the character out */
4856 asy_put_reg(asy, ASY_THR, c);
4857 }
4858
4859 /*
4860 * See if there's a character available. If no character is
4861 * available, return 0. Run in polled mode, no interrupts.
4862 */
4863 static boolean_t
asyischar(cons_polledio_arg_t arg)4864 asyischar(cons_polledio_arg_t arg)
4865 {
4866 struct asycom *asy = (struct asycom *)arg;
4867
4868 return ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_DR) != 0);
4869 }
4870
4871 /*
4872 * Get a character. Run in polled mode, no interrupts.
4873 */
4874 static int
asygetchar(cons_polledio_arg_t arg)4875 asygetchar(cons_polledio_arg_t arg)
4876 {
4877 struct asycom *asy = (struct asycom *)arg;
4878
4879 while (!asyischar(arg))
4880 SMT_PAUSE();
4881 return (asy_get_reg(asy, ASY_RHR));
4882 }
4883
4884 /*
4885 * Prepare the console for polled use by the debugger or by panic, and undo
4886 * that when the debugger releases the console. The debugger may be entered at
4887 * any point, including while the rest of the system is making no progress, so
4888 * these must not take any locks nor depend on any other kernel service, and
4889 * they may be interrupting driver code mid-operation. The line control
4890 * register is normalised first, in case a baud rate change (DLAB) or a timed
4891 * break (SETBRK) was in progress. While DLAB is set the IER offset addresses
4892 * the divisor latch instead, so it must be clear before the interrupt enables
4893 * are read and saved. Those are then cleared so that if any part of the system
4894 * is still running the interrupt handler cannot consume received data before
4895 * the polled consumer sees it. The modem control register is forced into a
4896 * usable state.
4897 */
4898 static void
asy_polledio_enter(cons_polledio_arg_t arg)4899 asy_polledio_enter(cons_polledio_arg_t arg)
4900 {
4901 struct asycom *asy = (struct asycom *)arg;
4902
4903 if (asy->asy_polled_depth++ != 0)
4904 return;
4905
4906 asy->asy_polled_lcr = asy_get_reg(asy, ASY_LCR);
4907 asy_put_reg(asy, ASY_LCR,
4908 asy->asy_polled_lcr & ~(ASY_LCR_DLAB | ASY_LCR_SETBRK));
4909
4910 asy->asy_polled_ier = asy_get_reg(asy, ASY_IER);
4911 asy_put_reg(asy, ASY_IER, 0);
4912
4913 asy->asy_polled_mcr = asy_get_reg(asy, ASY_MCR);
4914 asy_put_reg(asy, ASY_MCR, ASY_MCR_RTS | ASY_MCR_DTR | ASY_MCR_OUT2);
4915 }
4916
4917 static void
asy_polledio_exit(cons_polledio_arg_t arg)4918 asy_polledio_exit(cons_polledio_arg_t arg)
4919 {
4920 struct asycom *asy = (struct asycom *)arg;
4921
4922 if (asy->asy_polled_depth == 0 || --asy->asy_polled_depth != 0)
4923 return;
4924
4925 /*
4926 * Restore what was changed on entry. The ISR re-derives everything
4927 * else from LSR/MSR when the pending interrupt is serviced after
4928 * resume.
4929 *
4930 * IER is written first, while DLAB is still clear, so that the write
4931 * reaches the interrupt enables rather than the divisor latch.
4932 *
4933 * LCR is restored last and in full. The driver only sets DLAB for a
4934 * few bracketed instructions, but the debugger may have been entered
4935 * in the middle of them, and when that code resumes it writes the
4936 * divisor latch expecting DLAB to still be set. Were DLAB left clear,
4937 * those writes would land in THR and IER instead, silently disabling
4938 * the console's interrupts. A break in progress is persistent line
4939 * state that the driver still believes is asserted and will clear
4940 * itself in due course, from a timeout or an ioctl, so restoring it
4941 * lets an interrupted timed break complete as intended.
4942 */
4943 asy_put_reg(asy, ASY_IER, asy->asy_polled_ier);
4944 asy_put_reg(asy, ASY_MCR, asy->asy_polled_mcr);
4945 asy_put_reg(asy, ASY_LCR, asy->asy_polled_lcr);
4946 }
4947
4948 /*
4949 * Set or get the modem control status.
4950 */
4951 static int
asymctl(struct asycom * asy,int bits,int how)4952 asymctl(struct asycom *asy, int bits, int how)
4953 {
4954 int mcr_r, msr_r;
4955
4956 ASSERT(mutex_owned(&asy->asy_excl_hi));
4957 ASSERT(mutex_owned(&asy->asy_excl));
4958
4959 /* Read Modem Control Registers */
4960 mcr_r = asy_get(asy, ASY_MCR);
4961
4962 switch (how) {
4963
4964 case TIOCMSET:
4965 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMSET, bits = %x", bits);
4966 mcr_r = bits; /* Set bits */
4967 break;
4968
4969 case TIOCMBIS:
4970 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIS, bits = %x", bits);
4971 mcr_r |= bits; /* Mask in bits */
4972 break;
4973
4974 case TIOCMBIC:
4975 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIC, bits = %x", bits);
4976 mcr_r &= ~bits; /* Mask out bits */
4977 break;
4978
4979 case TIOCMGET:
4980 /* Read Modem Status Registers */
4981 /*
4982 * If modem interrupts are enabled, we return the
4983 * saved value of msr. We read MSR only in async_msint()
4984 */
4985 if (asy_get(asy, ASY_IER) & ASY_IER_MIEN) {
4986 msr_r = asy->asy_msr;
4987 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4988 "TIOCMGET, read msr_r = %x", msr_r);
4989 } else {
4990 msr_r = asy_get(asy, ASY_MSR);
4991 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4992 "TIOCMGET, read MSR = %x", msr_r);
4993 }
4994 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "modem_lines = %x",
4995 asytodm(mcr_r, msr_r));
4996 return (asytodm(mcr_r, msr_r));
4997 }
4998
4999 asy_put(asy, ASY_MCR, mcr_r);
5000
5001 return (mcr_r);
5002 }
5003
5004 static int
asytodm(int mcr_r,int msr_r)5005 asytodm(int mcr_r, int msr_r)
5006 {
5007 int b = 0;
5008
5009 /* MCR registers */
5010 if (mcr_r & ASY_MCR_RTS)
5011 b |= TIOCM_RTS;
5012
5013 if (mcr_r & ASY_MCR_DTR)
5014 b |= TIOCM_DTR;
5015
5016 /* MSR registers */
5017 if (msr_r & ASY_MSR_DCD)
5018 b |= TIOCM_CAR;
5019
5020 if (msr_r & ASY_MSR_CTS)
5021 b |= TIOCM_CTS;
5022
5023 if (msr_r & ASY_MSR_DSR)
5024 b |= TIOCM_DSR;
5025
5026 if (msr_r & ASY_MSR_RI)
5027 b |= TIOCM_RNG;
5028 return (b);
5029 }
5030
5031 static int
dmtoasy(struct asycom * asy,int bits)5032 dmtoasy(struct asycom *asy, int bits)
5033 {
5034 int b = 0;
5035
5036 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "bits = %x", bits);
5037 #ifdef CAN_NOT_SET /* only DTR and RTS can be set */
5038 if (bits & TIOCM_CAR)
5039 b |= ASY_MSR_DCD;
5040 if (bits & TIOCM_CTS)
5041 b |= ASY_MSR_CTS;
5042 if (bits & TIOCM_DSR)
5043 b |= ASY_MSR_DSR;
5044 if (bits & TIOCM_RNG)
5045 b |= ASY_MSR_RI;
5046 #endif
5047
5048 if (bits & TIOCM_RTS) {
5049 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & RTS");
5050 b |= ASY_MCR_RTS;
5051 }
5052 if (bits & TIOCM_DTR) {
5053 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & DTR");
5054 b |= ASY_MCR_DTR;
5055 }
5056
5057 return (b);
5058 }
5059
5060 static void
asyerror(const struct asycom * asy,int level,const char * fmt,...)5061 asyerror(const struct asycom *asy, int level, const char *fmt, ...)
5062 {
5063 va_list adx;
5064 static time_t last;
5065 static const char *lastfmt;
5066 time_t now;
5067
5068 /*
5069 * Don't print the same error message too often.
5070 * Print the message only if we have not printed the
5071 * message within the last second.
5072 * Note: that fmt cannot be a pointer to a string
5073 * stored on the stack. The fmt pointer
5074 * must be in the data segment otherwise lastfmt would point
5075 * to non-sense.
5076 */
5077 now = gethrestime_sec();
5078 if (last == now && lastfmt == fmt)
5079 return;
5080
5081 last = now;
5082 lastfmt = fmt;
5083
5084 va_start(adx, fmt);
5085 vdev_err(asy->asy_dip, level, fmt, adx);
5086 va_end(adx);
5087 }
5088
5089 /*
5090 * asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5091 * The value of this property is in the form of "9600,8,n,1,-"
5092 * 1) speed: 9600, 4800, ...
5093 * 2) data bits
5094 * 3) parity: n(none), e(even), o(odd)
5095 * 4) stop bits
5096 * 5) handshake: -(none), h(hardware: rts/cts), s(software: xon/off)
5097 *
5098 * This parsing came from a SPARCstation eeprom.
5099 */
5100 static void
asy_parse_mode(dev_info_t * devi,struct asycom * asy)5101 asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5102 {
5103 char name[40];
5104 char val[40];
5105 int len;
5106 int ret;
5107 char *p;
5108 char *p1;
5109
5110 ASSERT(asy->asy_com_port != 0);
5111
5112 /*
5113 * Parse the ttyx-mode property
5114 */
5115 (void) sprintf(name, "tty%c-mode", asy->asy_com_port + 'a' - 1);
5116 len = sizeof (val);
5117 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5118 if (ret != DDI_PROP_SUCCESS) {
5119 (void) sprintf(name, "com%c-mode", asy->asy_com_port + '0');
5120 len = sizeof (val);
5121 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5122 }
5123
5124 /* no property to parse */
5125 asy->asy_cflag = 0;
5126 if (ret != DDI_PROP_SUCCESS)
5127 return;
5128
5129 p = val;
5130 /* ---- baud rate ---- */
5131 asy->asy_cflag = CREAD|B9600; /* initial default */
5132 if (p && (p1 = strchr(p, ',')) != 0) {
5133 *p1++ = '\0';
5134 } else {
5135 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5136 return;
5137 }
5138
5139 if (strcmp(p, "110") == 0)
5140 asy->asy_bidx = B110;
5141 else if (strcmp(p, "150") == 0)
5142 asy->asy_bidx = B150;
5143 else if (strcmp(p, "300") == 0)
5144 asy->asy_bidx = B300;
5145 else if (strcmp(p, "600") == 0)
5146 asy->asy_bidx = B600;
5147 else if (strcmp(p, "1200") == 0)
5148 asy->asy_bidx = B1200;
5149 else if (strcmp(p, "2400") == 0)
5150 asy->asy_bidx = B2400;
5151 else if (strcmp(p, "4800") == 0)
5152 asy->asy_bidx = B4800;
5153 else if (strcmp(p, "9600") == 0)
5154 asy->asy_bidx = B9600;
5155 else if (strcmp(p, "19200") == 0)
5156 asy->asy_bidx = B19200;
5157 else if (strcmp(p, "38400") == 0)
5158 asy->asy_bidx = B38400;
5159 else if (strcmp(p, "57600") == 0)
5160 asy->asy_bidx = B57600;
5161 else if (strcmp(p, "115200") == 0)
5162 asy->asy_bidx = B115200;
5163 else
5164 asy->asy_bidx = B9600;
5165
5166 asy->asy_cflag &= ~CBAUD;
5167 if (asy->asy_bidx > CBAUD) { /* > 38400 uses the CBAUDEXT bit */
5168 asy->asy_cflag |= CBAUDEXT;
5169 asy->asy_cflag |= asy->asy_bidx - CBAUD - 1;
5170 } else {
5171 asy->asy_cflag |= asy->asy_bidx;
5172 }
5173
5174 ASSERT(asy->asy_bidx == BAUDINDEX(asy->asy_cflag));
5175
5176 /* ---- Next item is data bits ---- */
5177 p = p1;
5178 if (p && (p1 = strchr(p, ',')) != 0) {
5179 *p1++ = '\0';
5180 } else {
5181 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5182 return;
5183 }
5184 switch (*p) {
5185 default:
5186 case '8':
5187 asy->asy_cflag |= CS8;
5188 asy->asy_lcr = ASY_LCR_BITS8;
5189 break;
5190 case '7':
5191 asy->asy_cflag |= CS7;
5192 asy->asy_lcr = ASY_LCR_BITS7;
5193 break;
5194 case '6':
5195 asy->asy_cflag |= CS6;
5196 asy->asy_lcr = ASY_LCR_BITS6;
5197 break;
5198 case '5':
5199 /* LINTED: CS5 is currently zero (but might change) */
5200 asy->asy_cflag |= CS5;
5201 asy->asy_lcr = ASY_LCR_BITS5;
5202 break;
5203 }
5204
5205 /* ---- Parity info ---- */
5206 p = p1;
5207 if (p && (p1 = strchr(p, ',')) != 0) {
5208 *p1++ = '\0';
5209 } else {
5210 return;
5211 }
5212 switch (*p) {
5213 default:
5214 case 'n':
5215 break;
5216 case 'e':
5217 asy->asy_cflag |= PARENB;
5218 asy->asy_lcr |= ASY_LCR_PEN;
5219 break;
5220 case 'o':
5221 asy->asy_cflag |= PARENB|PARODD;
5222 asy->asy_lcr |= ASY_LCR_PEN | ASY_LCR_EPS;
5223 break;
5224 }
5225
5226 /* ---- Find stop bits ---- */
5227 p = p1;
5228 if (p && (p1 = strchr(p, ',')) != 0) {
5229 *p1++ = '\0';
5230 } else {
5231 return;
5232 }
5233 if (*p == '2') {
5234 asy->asy_cflag |= CSTOPB;
5235 asy->asy_lcr |= ASY_LCR_STB;
5236 }
5237
5238 /* ---- handshake is next ---- */
5239 p = p1;
5240 if (p) {
5241 if ((p1 = strchr(p, ',')) != 0)
5242 *p1++ = '\0';
5243
5244 if (*p == 'h')
5245 asy->asy_cflag |= CRTSCTS;
5246 else if (*p == 's')
5247 asy->asy_cflag |= CRTSXOFF;
5248 }
5249 }
5250
5251 /*
5252 * Check for abort character sequence
5253 */
5254 static boolean_t
abort_charseq_recognize(uchar_t ch)5255 abort_charseq_recognize(uchar_t ch)
5256 {
5257 static int state = 0;
5258 #define CNTRL(c) ((c)&037)
5259 static char sequence[] = { '\r', '~', CNTRL('b') };
5260
5261 if (ch == sequence[state]) {
5262 if (++state >= sizeof (sequence)) {
5263 state = 0;
5264 return (B_TRUE);
5265 }
5266 } else {
5267 state = (ch == sequence[0]) ? 1 : 0;
5268 }
5269 return (B_FALSE);
5270 }
5271
5272 /*
5273 * Flow control functions
5274 */
5275 /*
5276 * Software input flow control
5277 * This function can execute software input flow control sucessfully
5278 * at most of situations except that the line is in BREAK status
5279 * (timed and untimed break).
5280 * INPUT VALUE of onoff:
5281 * FLOW_START means to send out a XON char
5282 * and clear SW input flow control flag.
5283 * FLOW_STOP means to send out a XOFF char
5284 * and set SW input flow control flag.
5285 * FLOW_CHECK means to check whether there is pending XON/XOFF
5286 * if it is true, send it out.
5287 * INPUT VALUE of type:
5288 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5289 * IN_FLOW_STREAMS means flow control is due to STREAMS
5290 * IN_FLOW_USER means flow control is due to user's commands
5291 * RETURN VALUE: B_FALSE means no flow control char is sent
5292 * B_TRUE means one flow control char is sent
5293 */
5294 static boolean_t
async_flowcontrol_sw_input(struct asycom * asy,async_flowc_action onoff,int type)5295 async_flowcontrol_sw_input(struct asycom *asy, async_flowc_action onoff,
5296 int type)
5297 {
5298 struct asyncline *async = asy->asy_priv;
5299 int rval = B_FALSE;
5300
5301 ASSERT(mutex_owned(&asy->asy_excl_hi));
5302
5303 if (!(async->async_ttycommon.t_iflag & IXOFF))
5304 return (rval);
5305
5306 /*
5307 * If we get this far, then we know IXOFF is set.
5308 */
5309 switch (onoff) {
5310 case FLOW_STOP:
5311 async->async_inflow_source |= type;
5312
5313 /*
5314 * We'll send an XOFF character for each of up to
5315 * three different input flow control attempts to stop input.
5316 * If we already send out one XOFF, but FLOW_STOP comes again,
5317 * it seems that input flow control becomes more serious,
5318 * then send XOFF again.
5319 */
5320 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5321 IN_FLOW_STREAMS | IN_FLOW_USER))
5322 async->async_flags |= ASYNC_SW_IN_FLOW |
5323 ASYNC_SW_IN_NEEDED;
5324 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow stop, type = %x",
5325 async->async_inflow_source);
5326 break;
5327 case FLOW_START:
5328 async->async_inflow_source &= ~type;
5329 if (async->async_inflow_source == 0) {
5330 async->async_flags = (async->async_flags &
5331 ~ASYNC_SW_IN_FLOW) | ASYNC_SW_IN_NEEDED;
5332 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow start");
5333 }
5334 break;
5335 default:
5336 break;
5337 }
5338
5339 if (((async->async_flags & (ASYNC_SW_IN_NEEDED | ASYNC_BREAK |
5340 ASYNC_OUT_SUSPEND)) == ASYNC_SW_IN_NEEDED) &&
5341 (asy_get(asy, ASY_LSR) & ASY_LSR_THRE)) {
5342 /*
5343 * If we get this far, then we know we need to send out
5344 * XON or XOFF char.
5345 */
5346 async->async_flags = (async->async_flags &
5347 ~ASYNC_SW_IN_NEEDED) | ASYNC_BUSY;
5348 asy_put(asy, ASY_THR,
5349 async->async_flags & ASYNC_SW_IN_FLOW ?
5350 async->async_stopc : async->async_startc);
5351 rval = B_TRUE;
5352 }
5353 return (rval);
5354 }
5355
5356 /*
5357 * Software output flow control
5358 * This function can be executed sucessfully at any situation.
5359 * It does not handle HW, and just change the SW output flow control flag.
5360 * INPUT VALUE of onoff:
5361 * FLOW_START means to clear SW output flow control flag,
5362 * also combine with HW output flow control status to
5363 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5364 * FLOW_STOP means to set SW output flow control flag,
5365 * also clear ASYNC_OUT_FLW_RESUME.
5366 */
5367 static void
async_flowcontrol_sw_output(struct asycom * asy,async_flowc_action onoff)5368 async_flowcontrol_sw_output(struct asycom *asy, async_flowc_action onoff)
5369 {
5370 struct asyncline *async = asy->asy_priv;
5371
5372 ASSERT(mutex_owned(&asy->asy_excl_hi));
5373
5374 if (!(async->async_ttycommon.t_iflag & IXON))
5375 return;
5376
5377 switch (onoff) {
5378 case FLOW_STOP:
5379 async->async_flags |= ASYNC_SW_OUT_FLW;
5380 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5381 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow stop");
5382 break;
5383 case FLOW_START:
5384 async->async_flags &= ~ASYNC_SW_OUT_FLW;
5385 if (!(async->async_flags & ASYNC_HW_OUT_FLW))
5386 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5387 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow start");
5388 break;
5389 default:
5390 break;
5391 }
5392 }
5393
5394 /*
5395 * Hardware input flow control
5396 * This function can be executed sucessfully at any situation.
5397 * It directly changes RTS depending on input parameter onoff.
5398 * INPUT VALUE of onoff:
5399 * FLOW_START means to clear HW input flow control flag,
5400 * and pull up RTS if it is low.
5401 * FLOW_STOP means to set HW input flow control flag,
5402 * and low RTS if it is high.
5403 * INPUT VALUE of type:
5404 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5405 * IN_FLOW_STREAMS means flow control is due to STREAMS
5406 * IN_FLOW_USER means flow control is due to user's commands
5407 */
5408 static void
async_flowcontrol_hw_input(struct asycom * asy,async_flowc_action onoff,int type)5409 async_flowcontrol_hw_input(struct asycom *asy, async_flowc_action onoff,
5410 int type)
5411 {
5412 uchar_t mcr;
5413 uchar_t flag;
5414 struct asyncline *async = asy->asy_priv;
5415
5416 ASSERT(mutex_owned(&asy->asy_excl_hi));
5417
5418 if (!(async->async_ttycommon.t_cflag & CRTSXOFF))
5419 return;
5420
5421 switch (onoff) {
5422 case FLOW_STOP:
5423 async->async_inflow_source |= type;
5424 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5425 IN_FLOW_STREAMS | IN_FLOW_USER))
5426 async->async_flags |= ASYNC_HW_IN_FLOW;
5427 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow stop, type = %x",
5428 async->async_inflow_source);
5429 break;
5430 case FLOW_START:
5431 async->async_inflow_source &= ~type;
5432 if (async->async_inflow_source == 0) {
5433 async->async_flags &= ~ASYNC_HW_IN_FLOW;
5434 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow start");
5435 }
5436 break;
5437 default:
5438 break;
5439 }
5440 mcr = asy_get(asy, ASY_MCR);
5441 flag = (async->async_flags & ASYNC_HW_IN_FLOW) ? 0 : ASY_MCR_RTS;
5442
5443 if (((mcr ^ flag) & ASY_MCR_RTS) != 0) {
5444 asy_put(asy, ASY_MCR, (mcr ^ ASY_MCR_RTS));
5445 }
5446 }
5447
5448 /*
5449 * Hardware output flow control
5450 * This function can execute HW output flow control sucessfully
5451 * at any situation.
5452 * It doesn't really change RTS, and just change
5453 * HW output flow control flag depending on CTS status.
5454 * INPUT VALUE of onoff:
5455 * FLOW_START means to clear HW output flow control flag.
5456 * also combine with SW output flow control status to
5457 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5458 * FLOW_STOP means to set HW output flow control flag.
5459 * also clear ASYNC_OUT_FLW_RESUME.
5460 */
5461 static void
async_flowcontrol_hw_output(struct asycom * asy,async_flowc_action onoff)5462 async_flowcontrol_hw_output(struct asycom *asy, async_flowc_action onoff)
5463 {
5464 struct asyncline *async = asy->asy_priv;
5465
5466 ASSERT(mutex_owned(&asy->asy_excl_hi));
5467
5468 if (!(async->async_ttycommon.t_cflag & CRTSCTS))
5469 return;
5470
5471 switch (onoff) {
5472 case FLOW_STOP:
5473 async->async_flags |= ASYNC_HW_OUT_FLW;
5474 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5475 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow stop");
5476 break;
5477 case FLOW_START:
5478 async->async_flags &= ~ASYNC_HW_OUT_FLW;
5479 if (!(async->async_flags & ASYNC_SW_OUT_FLW))
5480 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5481 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow start");
5482 break;
5483 default:
5484 break;
5485 }
5486 }
5487
5488 /*
5489 * quiesce(9E) entry point.
5490 *
5491 * This function is called when the system is single-threaded at high
5492 * PIL with preemption disabled. Therefore, this function must not be
5493 * blocked.
5494 *
5495 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
5496 * DDI_FAILURE indicates an error condition and should almost never happen.
5497 */
5498 static int
asyquiesce(dev_info_t * devi)5499 asyquiesce(dev_info_t *devi)
5500 {
5501 int instance;
5502 struct asycom *asy;
5503
5504 instance = ddi_get_instance(devi); /* find out which unit */
5505
5506 asy = ddi_get_soft_state(asy_soft_state, instance);
5507 if (asy == NULL)
5508 return (DDI_FAILURE);
5509
5510 asy_disable_interrupts(asy, ASY_IER_ALL);
5511
5512 /* Flush the FIFOs, if required */
5513 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
5514 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
5515 }
5516
5517 return (DDI_SUCCESS);
5518 }
5519