xref: /linux/drivers/gpu/drm/tiny/bochs.c (revision 28f587adb69957125241a8df359b68b134f3c4a1)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 #include <linux/bug.h>
4 #include <linux/aperture.h>
5 #include <linux/module.h>
6 #include <linux/pci.h>
7 
8 #include <drm/clients/drm_client_setup.h>
9 #include <drm/drm_atomic.h>
10 #include <drm/drm_atomic_helper.h>
11 #include <drm/drm_damage_helper.h>
12 #include <drm/drm_drv.h>
13 #include <drm/drm_edid.h>
14 #include <drm/drm_fbdev_shmem.h>
15 #include <drm/drm_fourcc.h>
16 #include <drm/drm_framebuffer.h>
17 #include <drm/drm_gem_atomic_helper.h>
18 #include <drm/drm_gem_framebuffer_helper.h>
19 #include <drm/drm_gem_shmem_helper.h>
20 #include <drm/drm_managed.h>
21 #include <drm/drm_module.h>
22 #include <drm/drm_plane_helper.h>
23 #include <drm/drm_probe_helper.h>
24 
25 #include <video/vga.h>
26 
27 /* ---------------------------------------------------------------------- */
28 
29 #define VBE_DISPI_IOPORT_INDEX           0x01CE
30 #define VBE_DISPI_IOPORT_DATA            0x01CF
31 
32 #define VBE_DISPI_INDEX_ID               0x0
33 #define VBE_DISPI_INDEX_XRES             0x1
34 #define VBE_DISPI_INDEX_YRES             0x2
35 #define VBE_DISPI_INDEX_BPP              0x3
36 #define VBE_DISPI_INDEX_ENABLE           0x4
37 #define VBE_DISPI_INDEX_BANK             0x5
38 #define VBE_DISPI_INDEX_VIRT_WIDTH       0x6
39 #define VBE_DISPI_INDEX_VIRT_HEIGHT      0x7
40 #define VBE_DISPI_INDEX_X_OFFSET         0x8
41 #define VBE_DISPI_INDEX_Y_OFFSET         0x9
42 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
43 
44 #define VBE_DISPI_ID0                    0xB0C0
45 #define VBE_DISPI_ID1                    0xB0C1
46 #define VBE_DISPI_ID2                    0xB0C2
47 #define VBE_DISPI_ID3                    0xB0C3
48 #define VBE_DISPI_ID4                    0xB0C4
49 #define VBE_DISPI_ID5                    0xB0C5
50 
51 #define VBE_DISPI_DISABLED               0x00
52 #define VBE_DISPI_ENABLED                0x01
53 #define VBE_DISPI_GETCAPS                0x02
54 #define VBE_DISPI_8BIT_DAC               0x20
55 #define VBE_DISPI_LFB_ENABLED            0x40
56 #define VBE_DISPI_NOCLEARMEM             0x80
57 
58 static int bochs_modeset = -1;
59 static int defx = 1024;
60 static int defy = 768;
61 
62 module_param_named(modeset, bochs_modeset, int, 0444);
63 MODULE_PARM_DESC(modeset, "enable/disable kernel modesetting");
64 
65 module_param(defx, int, 0444);
66 module_param(defy, int, 0444);
67 MODULE_PARM_DESC(defx, "default x resolution");
68 MODULE_PARM_DESC(defy, "default y resolution");
69 
70 /* ---------------------------------------------------------------------- */
71 
72 enum bochs_types {
73 	BOCHS_QEMU_STDVGA,
74 	BOCHS_SIMICS,
75 	BOCHS_UNKNOWN,
76 };
77 
78 struct bochs_device {
79 	struct drm_device dev;
80 
81 	/* hw */
82 	void __iomem   *mmio;
83 	int            ioports;
84 	void __iomem   *fb_map;
85 	unsigned long  fb_base;
86 	unsigned long  fb_size;
87 	unsigned long  qext_size;
88 
89 	/* mode */
90 	u16 xres;
91 	u16 yres;
92 	u16 yres_virtual;
93 	u32 stride;
94 	u32 bpp;
95 
96 	/* drm */
97 	struct drm_plane primary_plane;
98 	struct drm_crtc crtc;
99 	struct drm_encoder encoder;
100 	struct drm_connector connector;
101 };
102 
to_bochs_device(const struct drm_device * dev)103 static struct bochs_device *to_bochs_device(const struct drm_device *dev)
104 {
105 	return container_of(dev, struct bochs_device, dev);
106 }
107 
108 /* ---------------------------------------------------------------------- */
109 
bochs_uses_mmio(struct bochs_device * bochs)110 static __always_inline bool bochs_uses_mmio(struct bochs_device *bochs)
111 {
112 	return !IS_ENABLED(CONFIG_HAS_IOPORT) || bochs->mmio;
113 }
114 
bochs_vga_writeb(struct bochs_device * bochs,u16 ioport,u8 val)115 static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val)
116 {
117 	if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
118 		return;
119 
120 	if (bochs_uses_mmio(bochs)) {
121 		int offset = ioport - 0x3c0 + 0x400;
122 
123 		writeb(val, bochs->mmio + offset);
124 	} else {
125 		outb(val, ioport);
126 	}
127 }
128 
bochs_vga_readb(struct bochs_device * bochs,u16 ioport)129 static u8 bochs_vga_readb(struct bochs_device *bochs, u16 ioport)
130 {
131 	if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
132 		return 0xff;
133 
134 	if (bochs_uses_mmio(bochs)) {
135 		int offset = ioport - 0x3c0 + 0x400;
136 
137 		return readb(bochs->mmio + offset);
138 	} else {
139 		return inb(ioport);
140 	}
141 }
142 
bochs_dispi_read(struct bochs_device * bochs,u16 reg)143 static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg)
144 {
145 	u16 ret = 0;
146 
147 	if (bochs_uses_mmio(bochs)) {
148 		int offset = 0x500 + (reg << 1);
149 
150 		ret = readw(bochs->mmio + offset);
151 	} else {
152 		outw(reg, VBE_DISPI_IOPORT_INDEX);
153 		ret = inw(VBE_DISPI_IOPORT_DATA);
154 	}
155 	return ret;
156 }
157 
bochs_dispi_write(struct bochs_device * bochs,u16 reg,u16 val)158 static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val)
159 {
160 	if (bochs_uses_mmio(bochs)) {
161 		int offset = 0x500 + (reg << 1);
162 
163 		writew(val, bochs->mmio + offset);
164 	} else {
165 		outw(reg, VBE_DISPI_IOPORT_INDEX);
166 		outw(val, VBE_DISPI_IOPORT_DATA);
167 	}
168 }
169 
bochs_hw_set_big_endian(struct bochs_device * bochs)170 static void bochs_hw_set_big_endian(struct bochs_device *bochs)
171 {
172 	if (bochs->qext_size < 8)
173 		return;
174 
175 	writel(0xbebebebe, bochs->mmio + 0x604);
176 }
177 
bochs_hw_set_little_endian(struct bochs_device * bochs)178 static void bochs_hw_set_little_endian(struct bochs_device *bochs)
179 {
180 	if (bochs->qext_size < 8)
181 		return;
182 
183 	writel(0x1e1e1e1e, bochs->mmio + 0x604);
184 }
185 
186 #ifdef __BIG_ENDIAN
187 #define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b)
188 #else
189 #define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b)
190 #endif
191 
bochs_get_edid_block(void * data,u8 * buf,unsigned int block,size_t len)192 static int bochs_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
193 {
194 	struct bochs_device *bochs = data;
195 	size_t i, start = block * EDID_LENGTH;
196 
197 	if (!bochs->mmio)
198 		return -1;
199 
200 	if (start + len > 0x400 /* vga register offset */)
201 		return -1;
202 
203 	for (i = 0; i < len; i++)
204 		buf[i] = readb(bochs->mmio + start + i);
205 
206 	return 0;
207 }
208 
bochs_hw_read_edid(struct drm_connector * connector)209 static const struct drm_edid *bochs_hw_read_edid(struct drm_connector *connector)
210 {
211 	struct drm_device *dev = connector->dev;
212 	struct bochs_device *bochs = to_bochs_device(dev);
213 	u8 header[8];
214 
215 	/* check header to detect whenever edid support is enabled in qemu */
216 	bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
217 	if (drm_edid_header_is_valid(header) != 8)
218 		return NULL;
219 
220 	drm_dbg(dev, "Found EDID data blob.\n");
221 
222 	return drm_edid_read_custom(connector, bochs_get_edid_block, bochs);
223 }
224 
bochs_hw_init(struct bochs_device * bochs)225 static int bochs_hw_init(struct bochs_device *bochs)
226 {
227 	struct drm_device *dev = &bochs->dev;
228 	struct pci_dev *pdev = to_pci_dev(dev->dev);
229 	unsigned long addr, size, mem, ioaddr, iosize;
230 	u16 id;
231 
232 	if (pdev->resource[2].flags & IORESOURCE_MEM) {
233 		ioaddr = pci_resource_start(pdev, 2);
234 		iosize = pci_resource_len(pdev, 2);
235 		/* mmio bar with vga and bochs registers present */
236 		if (!devm_request_mem_region(&pdev->dev, ioaddr, iosize, "bochs-drm")) {
237 			DRM_ERROR("Cannot request mmio region\n");
238 			return -EBUSY;
239 		}
240 		bochs->mmio = devm_ioremap(&pdev->dev, ioaddr, iosize);
241 		if (bochs->mmio == NULL) {
242 			DRM_ERROR("Cannot map mmio region\n");
243 			return -ENOMEM;
244 		}
245 	} else if (IS_ENABLED(CONFIG_HAS_IOPORT)) {
246 		ioaddr = VBE_DISPI_IOPORT_INDEX;
247 		iosize = 2;
248 		if (!devm_request_region(&pdev->dev, ioaddr, iosize, "bochs-drm")) {
249 			DRM_ERROR("Cannot request ioports\n");
250 			return -EBUSY;
251 		}
252 		bochs->ioports = 1;
253 	} else {
254 		dev_err(dev->dev, "I/O ports are not supported\n");
255 		return -EIO;
256 	}
257 
258 	id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID);
259 	mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K)
260 		* 64 * 1024;
261 	if ((id & 0xfff0) != VBE_DISPI_ID0) {
262 		DRM_ERROR("ID mismatch\n");
263 		return -ENODEV;
264 	}
265 
266 	if ((pdev->resource[0].flags & IORESOURCE_MEM) == 0)
267 		return -ENODEV;
268 	addr = pci_resource_start(pdev, 0);
269 	size = pci_resource_len(pdev, 0);
270 	if (addr == 0)
271 		return -ENODEV;
272 	if (size != mem) {
273 		DRM_ERROR("Size mismatch: pci=%ld, bochs=%ld\n",
274 			size, mem);
275 		size = min(size, mem);
276 	}
277 
278 	if (!devm_request_mem_region(&pdev->dev, addr, size, "bochs-drm"))
279 		DRM_WARN("Cannot request framebuffer, boot fb still active?\n");
280 
281 	bochs->fb_map = devm_ioremap_wc(&pdev->dev, addr, size);
282 	if (bochs->fb_map == NULL) {
283 		DRM_ERROR("Cannot map framebuffer\n");
284 		return -ENOMEM;
285 	}
286 	bochs->fb_base = addr;
287 	bochs->fb_size = size;
288 
289 	DRM_INFO("Found bochs VGA, ID 0x%x.\n", id);
290 	DRM_INFO("Framebuffer size %ld kB @ 0x%lx, %s @ 0x%lx.\n",
291 		 size / 1024, addr,
292 		 bochs->ioports ? "ioports" : "mmio",
293 		 ioaddr);
294 
295 	if (bochs->mmio && pdev->revision >= 2) {
296 		bochs->qext_size = readl(bochs->mmio + 0x600);
297 		if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
298 			bochs->qext_size = 0;
299 			goto noext;
300 		}
301 		DRM_DEBUG("Found qemu ext regs, size %ld\n",
302 			  bochs->qext_size);
303 		bochs_hw_set_native_endian(bochs);
304 	}
305 
306 noext:
307 	return 0;
308 }
309 
bochs_hw_blank(struct bochs_device * bochs,bool blank)310 static void bochs_hw_blank(struct bochs_device *bochs, bool blank)
311 {
312 	DRM_DEBUG_DRIVER("hw_blank %d\n", blank);
313 	/* enable color bit (so VGA_IS1_RC access works) */
314 	bochs_vga_writeb(bochs, VGA_MIS_W, VGA_MIS_COLOR);
315 	/* discard ar_flip_flop */
316 	(void)bochs_vga_readb(bochs, VGA_IS1_RC);
317 	/* blank or unblank; we need only update index and set 0x20 */
318 	bochs_vga_writeb(bochs, VGA_ATT_W, blank ? 0 : 0x20);
319 }
320 
bochs_hw_setmode(struct bochs_device * bochs,struct drm_display_mode * mode)321 static void bochs_hw_setmode(struct bochs_device *bochs, struct drm_display_mode *mode)
322 {
323 	int idx;
324 
325 	if (!drm_dev_enter(&bochs->dev, &idx))
326 		return;
327 
328 	bochs->xres = mode->hdisplay;
329 	bochs->yres = mode->vdisplay;
330 	bochs->bpp = 32;
331 	bochs->stride = mode->hdisplay * (bochs->bpp / 8);
332 	bochs->yres_virtual = bochs->fb_size / bochs->stride;
333 
334 	DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n",
335 			 bochs->xres, bochs->yres, bochs->bpp,
336 			 bochs->yres_virtual);
337 
338 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,      0);
339 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP,         bochs->bpp);
340 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES,        bochs->xres);
341 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES,        bochs->yres);
342 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK,        0);
343 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH,  bochs->xres);
344 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT,
345 			  bochs->yres_virtual);
346 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET,    0);
347 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET,    0);
348 
349 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
350 			  VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED);
351 
352 	drm_dev_exit(idx);
353 }
354 
bochs_hw_setformat(struct bochs_device * bochs,const struct drm_format_info * format)355 static void bochs_hw_setformat(struct bochs_device *bochs, const struct drm_format_info *format)
356 {
357 	int idx;
358 
359 	if (!drm_dev_enter(&bochs->dev, &idx))
360 		return;
361 
362 	DRM_DEBUG_DRIVER("format %c%c%c%c\n",
363 			 (format->format >>  0) & 0xff,
364 			 (format->format >>  8) & 0xff,
365 			 (format->format >> 16) & 0xff,
366 			 (format->format >> 24) & 0xff);
367 
368 	switch (format->format) {
369 	case DRM_FORMAT_XRGB8888:
370 		bochs_hw_set_little_endian(bochs);
371 		break;
372 	case DRM_FORMAT_BGRX8888:
373 		bochs_hw_set_big_endian(bochs);
374 		break;
375 	default:
376 		/* should not happen */
377 		DRM_ERROR("%s: Huh? Got framebuffer format 0x%x",
378 			  __func__, format->format);
379 		break;
380 	}
381 
382 	drm_dev_exit(idx);
383 }
384 
bochs_hw_setbase(struct bochs_device * bochs,int x,int y,int stride,u64 addr)385 static void bochs_hw_setbase(struct bochs_device *bochs, int x, int y, int stride, u64 addr)
386 {
387 	unsigned long offset;
388 	unsigned int vx, vy, vwidth, idx;
389 
390 	if (!drm_dev_enter(&bochs->dev, &idx))
391 		return;
392 
393 	bochs->stride = stride;
394 	offset = (unsigned long)addr +
395 		y * bochs->stride +
396 		x * (bochs->bpp / 8);
397 	vy = offset / bochs->stride;
398 	vx = (offset % bochs->stride) * 8 / bochs->bpp;
399 	vwidth = stride * 8 / bochs->bpp;
400 
401 	DRM_DEBUG_DRIVER("x %d, y %d, addr %llx -> offset %lx, vx %d, vy %d\n",
402 			 x, y, addr, offset, vx, vy);
403 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
404 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
405 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);
406 
407 	drm_dev_exit(idx);
408 }
409 
410 /* ---------------------------------------------------------------------- */
411 
412 static const uint32_t bochs_primary_plane_formats[] = {
413 	DRM_FORMAT_XRGB8888,
414 	DRM_FORMAT_BGRX8888,
415 };
416 
bochs_primary_plane_helper_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)417 static int bochs_primary_plane_helper_atomic_check(struct drm_plane *plane,
418 						   struct drm_atomic_state *state)
419 {
420 	struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
421 	struct drm_crtc *new_crtc = new_plane_state->crtc;
422 	struct drm_crtc_state *new_crtc_state = NULL;
423 	int ret;
424 
425 	if (new_crtc)
426 		new_crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);
427 
428 	ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
429 						  DRM_PLANE_NO_SCALING,
430 						  DRM_PLANE_NO_SCALING,
431 						  false, false);
432 	if (ret)
433 		return ret;
434 	else if (!new_plane_state->visible)
435 		return 0;
436 
437 	return 0;
438 }
439 
bochs_primary_plane_helper_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)440 static void bochs_primary_plane_helper_atomic_update(struct drm_plane *plane,
441 						     struct drm_atomic_state *state)
442 {
443 	struct drm_device *dev = plane->dev;
444 	struct bochs_device *bochs = to_bochs_device(dev);
445 	struct drm_plane_state *plane_state = plane->state;
446 	struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
447 	struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
448 	struct drm_framebuffer *fb = plane_state->fb;
449 	struct drm_atomic_helper_damage_iter iter;
450 	struct drm_rect damage;
451 
452 	if (!fb || !bochs->stride)
453 		return;
454 
455 	drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
456 	drm_atomic_for_each_plane_damage(&iter, &damage) {
457 		struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(bochs->fb_map);
458 
459 		iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, &damage));
460 		drm_fb_memcpy(&dst, fb->pitches, shadow_plane_state->data, fb, &damage);
461 	}
462 
463 	/* Always scanout image at VRAM offset 0 */
464 	bochs_hw_setbase(bochs,
465 			 plane_state->crtc_x,
466 			 plane_state->crtc_y,
467 			 fb->pitches[0],
468 			 0);
469 	bochs_hw_setformat(bochs, fb->format);
470 }
471 
472 static const struct drm_plane_helper_funcs bochs_primary_plane_helper_funcs = {
473 	DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
474 	.atomic_check = bochs_primary_plane_helper_atomic_check,
475 	.atomic_update = bochs_primary_plane_helper_atomic_update,
476 };
477 
478 static const struct drm_plane_funcs bochs_primary_plane_funcs = {
479 	.update_plane = drm_atomic_helper_update_plane,
480 	.disable_plane = drm_atomic_helper_disable_plane,
481 	.destroy = drm_plane_cleanup,
482 	DRM_GEM_SHADOW_PLANE_FUNCS
483 };
484 
bochs_crtc_helper_mode_set_nofb(struct drm_crtc * crtc)485 static void bochs_crtc_helper_mode_set_nofb(struct drm_crtc *crtc)
486 {
487 	struct bochs_device *bochs = to_bochs_device(crtc->dev);
488 	struct drm_crtc_state *crtc_state = crtc->state;
489 
490 	bochs_hw_setmode(bochs, &crtc_state->mode);
491 }
492 
bochs_crtc_helper_atomic_check(struct drm_crtc * crtc,struct drm_atomic_state * state)493 static int bochs_crtc_helper_atomic_check(struct drm_crtc *crtc,
494 					  struct drm_atomic_state *state)
495 {
496 	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
497 
498 	if (!crtc_state->enable)
499 		return 0;
500 
501 	return drm_atomic_helper_check_crtc_primary_plane(crtc_state);
502 }
503 
bochs_crtc_helper_atomic_enable(struct drm_crtc * crtc,struct drm_atomic_state * state)504 static void bochs_crtc_helper_atomic_enable(struct drm_crtc *crtc,
505 					    struct drm_atomic_state *state)
506 {
507 	struct bochs_device *bochs = to_bochs_device(crtc->dev);
508 
509 	bochs_hw_blank(bochs, false);
510 }
511 
bochs_crtc_helper_atomic_disable(struct drm_crtc * crtc,struct drm_atomic_state * crtc_state)512 static void bochs_crtc_helper_atomic_disable(struct drm_crtc *crtc,
513 					     struct drm_atomic_state *crtc_state)
514 {
515 	struct bochs_device *bochs = to_bochs_device(crtc->dev);
516 
517 	bochs_hw_blank(bochs, true);
518 }
519 
520 static const struct drm_crtc_helper_funcs bochs_crtc_helper_funcs = {
521 	.mode_set_nofb = bochs_crtc_helper_mode_set_nofb,
522 	.atomic_check = bochs_crtc_helper_atomic_check,
523 	.atomic_enable = bochs_crtc_helper_atomic_enable,
524 	.atomic_disable = bochs_crtc_helper_atomic_disable,
525 };
526 
527 static const struct drm_crtc_funcs bochs_crtc_funcs = {
528 	.reset = drm_atomic_helper_crtc_reset,
529 	.destroy = drm_crtc_cleanup,
530 	.set_config = drm_atomic_helper_set_config,
531 	.page_flip = drm_atomic_helper_page_flip,
532 	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
533 	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
534 };
535 
536 static const struct drm_encoder_funcs bochs_encoder_funcs = {
537 	.destroy = drm_encoder_cleanup,
538 };
539 
bochs_connector_helper_get_modes(struct drm_connector * connector)540 static int bochs_connector_helper_get_modes(struct drm_connector *connector)
541 {
542 	const struct drm_edid *edid;
543 	int count;
544 
545 	edid = bochs_hw_read_edid(connector);
546 
547 	if (edid) {
548 		drm_edid_connector_update(connector, edid);
549 		count = drm_edid_connector_add_modes(connector);
550 		drm_edid_free(edid);
551 	} else {
552 		drm_edid_connector_update(connector, NULL);
553 		count = drm_add_modes_noedid(connector, 8192, 8192);
554 		drm_set_preferred_mode(connector, defx, defy);
555 	}
556 
557 	return count;
558 }
559 
560 static const struct drm_connector_helper_funcs bochs_connector_helper_funcs = {
561 	.get_modes = bochs_connector_helper_get_modes,
562 };
563 
564 static const struct drm_connector_funcs bochs_connector_funcs = {
565 	.fill_modes = drm_helper_probe_single_connector_modes,
566 	.destroy = drm_connector_cleanup,
567 	.reset = drm_atomic_helper_connector_reset,
568 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
569 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
570 };
571 
bochs_mode_config_mode_valid(struct drm_device * dev,const struct drm_display_mode * mode)572 static enum drm_mode_status bochs_mode_config_mode_valid(struct drm_device *dev,
573 							 const struct drm_display_mode *mode)
574 {
575 	struct bochs_device *bochs = to_bochs_device(dev);
576 	const struct drm_format_info *format = drm_format_info(DRM_FORMAT_XRGB8888);
577 	u64 pitch;
578 
579 	if (drm_WARN_ON(dev, !format))
580 		return MODE_ERROR;
581 
582 	pitch = drm_format_info_min_pitch(format, 0, mode->hdisplay);
583 	if (!pitch)
584 		return MODE_BAD_WIDTH;
585 	if (mode->vdisplay > DIV_ROUND_DOWN_ULL(bochs->fb_size, pitch))
586 		return MODE_MEM;
587 
588 	return MODE_OK;
589 }
590 
591 static const struct drm_mode_config_funcs bochs_mode_config_funcs = {
592 	.fb_create = drm_gem_fb_create_with_dirty,
593 	.mode_valid = bochs_mode_config_mode_valid,
594 	.atomic_check = drm_atomic_helper_check,
595 	.atomic_commit = drm_atomic_helper_commit,
596 };
597 
bochs_kms_init(struct bochs_device * bochs)598 static int bochs_kms_init(struct bochs_device *bochs)
599 {
600 	struct drm_device *dev = &bochs->dev;
601 	struct drm_plane *primary_plane;
602 	struct drm_crtc *crtc;
603 	struct drm_connector *connector;
604 	struct drm_encoder *encoder;
605 	int ret;
606 
607 	ret = drmm_mode_config_init(dev);
608 	if (ret)
609 		return ret;
610 
611 	dev->mode_config.max_width = 8192;
612 	dev->mode_config.max_height = 8192;
613 
614 	dev->mode_config.preferred_depth = 24;
615 	dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
616 
617 	dev->mode_config.funcs = &bochs_mode_config_funcs;
618 
619 	primary_plane = &bochs->primary_plane;
620 	ret = drm_universal_plane_init(dev, primary_plane, 0,
621 				       &bochs_primary_plane_funcs,
622 				       bochs_primary_plane_formats,
623 				       ARRAY_SIZE(bochs_primary_plane_formats),
624 				       NULL,
625 				       DRM_PLANE_TYPE_PRIMARY, NULL);
626 	if (ret)
627 		return ret;
628 	drm_plane_helper_add(primary_plane, &bochs_primary_plane_helper_funcs);
629 	drm_plane_enable_fb_damage_clips(primary_plane);
630 
631 	crtc = &bochs->crtc;
632 	ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,
633 					&bochs_crtc_funcs, NULL);
634 	if (ret)
635 		return ret;
636 	drm_crtc_helper_add(crtc, &bochs_crtc_helper_funcs);
637 
638 	encoder = &bochs->encoder;
639 	ret = drm_encoder_init(dev, encoder, &bochs_encoder_funcs,
640 			       DRM_MODE_ENCODER_VIRTUAL, NULL);
641 	if (ret)
642 		return ret;
643 	encoder->possible_crtcs = drm_crtc_mask(crtc);
644 
645 	connector = &bochs->connector;
646 	ret = drm_connector_init(dev, connector, &bochs_connector_funcs,
647 				 DRM_MODE_CONNECTOR_VIRTUAL);
648 	if (ret)
649 		return ret;
650 	drm_connector_helper_add(connector, &bochs_connector_helper_funcs);
651 	drm_connector_attach_edid_property(connector);
652 	drm_connector_attach_encoder(connector, encoder);
653 
654 	drm_mode_config_reset(dev);
655 
656 	return 0;
657 }
658 
659 /* ---------------------------------------------------------------------- */
660 /* drm interface                                                          */
661 
bochs_load(struct bochs_device * bochs)662 static int bochs_load(struct bochs_device *bochs)
663 {
664 	int ret;
665 
666 	ret = bochs_hw_init(bochs);
667 	if (ret)
668 		return ret;
669 
670 	ret = bochs_kms_init(bochs);
671 	if (ret)
672 		return ret;
673 
674 	return 0;
675 }
676 
677 DEFINE_DRM_GEM_FOPS(bochs_fops);
678 
679 static const struct drm_driver bochs_driver = {
680 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
681 	.fops			= &bochs_fops,
682 	.name			= "bochs-drm",
683 	.desc			= "bochs dispi vga interface (qemu stdvga)",
684 	.major			= 1,
685 	.minor			= 0,
686 	DRM_GEM_SHMEM_DRIVER_OPS,
687 	DRM_FBDEV_SHMEM_DRIVER_OPS,
688 };
689 
690 /* ---------------------------------------------------------------------- */
691 /* pm interface                                                           */
692 
693 #ifdef CONFIG_PM_SLEEP
bochs_pm_suspend(struct device * dev)694 static int bochs_pm_suspend(struct device *dev)
695 {
696 	struct drm_device *drm_dev = dev_get_drvdata(dev);
697 
698 	return drm_mode_config_helper_suspend(drm_dev);
699 }
700 
bochs_pm_resume(struct device * dev)701 static int bochs_pm_resume(struct device *dev)
702 {
703 	struct drm_device *drm_dev = dev_get_drvdata(dev);
704 
705 	return drm_mode_config_helper_resume(drm_dev);
706 }
707 #endif
708 
709 static const struct dev_pm_ops bochs_pm_ops = {
710 	SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend,
711 				bochs_pm_resume)
712 };
713 
714 /* ---------------------------------------------------------------------- */
715 /* pci interface                                                          */
716 
bochs_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)717 static int bochs_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
718 {
719 	struct bochs_device *bochs;
720 	struct drm_device *dev;
721 	int ret;
722 
723 	ret = aperture_remove_conflicting_pci_devices(pdev, bochs_driver.name);
724 	if (ret)
725 		return ret;
726 
727 	bochs = devm_drm_dev_alloc(&pdev->dev, &bochs_driver, struct bochs_device, dev);
728 	if (IS_ERR(bochs))
729 		return PTR_ERR(bochs);
730 	dev = &bochs->dev;
731 
732 	ret = pcim_enable_device(pdev);
733 	if (ret)
734 		goto err_free_dev;
735 
736 	pci_set_drvdata(pdev, dev);
737 
738 	ret = bochs_load(bochs);
739 	if (ret)
740 		goto err_free_dev;
741 
742 	ret = drm_dev_register(dev, 0);
743 	if (ret)
744 		goto err_free_dev;
745 
746 	drm_client_setup(dev, NULL);
747 
748 	return ret;
749 
750 err_free_dev:
751 	drm_dev_put(dev);
752 	return ret;
753 }
754 
bochs_pci_remove(struct pci_dev * pdev)755 static void bochs_pci_remove(struct pci_dev *pdev)
756 {
757 	struct drm_device *dev = pci_get_drvdata(pdev);
758 
759 	drm_dev_unplug(dev);
760 	drm_atomic_helper_shutdown(dev);
761 }
762 
bochs_pci_shutdown(struct pci_dev * pdev)763 static void bochs_pci_shutdown(struct pci_dev *pdev)
764 {
765 	drm_atomic_helper_shutdown(pci_get_drvdata(pdev));
766 }
767 
768 static const struct pci_device_id bochs_pci_tbl[] = {
769 	{
770 		.vendor      = 0x1234,
771 		.device      = 0x1111,
772 		.subvendor   = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
773 		.subdevice   = PCI_SUBDEVICE_ID_QEMU,
774 		.driver_data = BOCHS_QEMU_STDVGA,
775 	},
776 	{
777 		.vendor      = 0x1234,
778 		.device      = 0x1111,
779 		.subvendor   = PCI_ANY_ID,
780 		.subdevice   = PCI_ANY_ID,
781 		.driver_data = BOCHS_UNKNOWN,
782 	},
783 	{
784 		.vendor      = 0x4321,
785 		.device      = 0x1111,
786 		.subvendor   = PCI_ANY_ID,
787 		.subdevice   = PCI_ANY_ID,
788 		.driver_data = BOCHS_SIMICS,
789 	},
790 	{ /* end of list */ }
791 };
792 
793 static struct pci_driver bochs_pci_driver = {
794 	.name =		"bochs-drm",
795 	.id_table =	bochs_pci_tbl,
796 	.probe =	bochs_pci_probe,
797 	.remove =	bochs_pci_remove,
798 	.shutdown =	bochs_pci_shutdown,
799 	.driver.pm =    &bochs_pm_ops,
800 };
801 
802 /* ---------------------------------------------------------------------- */
803 /* module init/exit                                                       */
804 
805 drm_module_pci_driver_if_modeset(bochs_pci_driver, bochs_modeset);
806 
807 MODULE_DEVICE_TABLE(pci, bochs_pci_tbl);
808 MODULE_AUTHOR("Gerd Hoffmann <kraxel@redhat.com>");
809 MODULE_DESCRIPTION("DRM Support for bochs dispi vga interface (qemu stdvga)");
810 MODULE_LICENSE("GPL");
811