1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1996, by Steve Passe
5 * All rights reserved.
6 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. The name of the developer may NOT be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include "opt_mptable_force_htt.h"
31 #include "opt_mptable_linux_bug_compat.h"
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/limits.h>
37 #include <sys/malloc.h>
38 #include <sys/smp.h>
39 #include <sys/rman.h>
40
41 #include <vm/vm.h>
42 #include <vm/vm_param.h>
43 #include <vm/pmap.h>
44
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcib_private.h>
47 #include <x86/apicreg.h>
48 #include <x86/legacyvar.h>
49 #include <x86/mptable.h>
50 #include <machine/frame.h>
51 #include <machine/intr_machdep.h>
52 #include <x86/apicvar.h>
53 #include <machine/md_var.h>
54 #include <machine/pc/bios.h>
55 #include <machine/resource.h>
56 #include <machine/specialreg.h>
57
58 /* string defined by the Intel MP Spec as identifying the MP table */
59 #define MP_SIG 0x5f504d5f /* _MP_ */
60
61 #ifdef __amd64__
62 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
63 #else
64 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
65 #endif
66
67 #define BIOS_BASE (0xf0000)
68 #define BIOS_SIZE (0x10000)
69 #define BIOS_COUNT (BIOS_SIZE/4)
70
71 typedef void mptable_entry_handler(u_char *entry, void *arg);
72 typedef void mptable_extended_entry_handler(ext_entry_ptr entry, void *arg);
73
74 /* descriptions of MP table entries */
75 typedef struct BASETABLE_ENTRY {
76 uint8_t type;
77 uint8_t length;
78 uint8_t name[16];
79 } basetable_entry;
80
81 static basetable_entry basetable_entry_types[] =
82 {
83 {0, 20, "Processor"},
84 {1, 8, "Bus"},
85 {2, 8, "I/O APIC"},
86 {3, 8, "I/O INT"},
87 {4, 8, "Local INT"}
88 };
89
90 typedef struct BUSDATA {
91 u_char bus_id;
92 enum busTypes bus_type;
93 } bus_datum;
94
95 typedef struct INTDATA {
96 u_char int_type;
97 u_short int_flags;
98 u_char src_bus_id;
99 u_char src_bus_irq;
100 u_char dst_apic_id;
101 u_char dst_apic_int;
102 u_char int_vector;
103 } io_int, local_int;
104
105 typedef struct BUSTYPENAME {
106 u_char type;
107 char name[7];
108 } bus_type_name;
109
110 /* From MP spec v1.4, table 4-8. */
111 static bus_type_name bus_type_table[] =
112 {
113 {UNKNOWN_BUSTYPE, "CBUS "},
114 {UNKNOWN_BUSTYPE, "CBUSII"},
115 {EISA, "EISA "},
116 {UNKNOWN_BUSTYPE, "FUTURE"},
117 {UNKNOWN_BUSTYPE, "INTERN"},
118 {ISA, "ISA "},
119 {UNKNOWN_BUSTYPE, "MBI "},
120 {UNKNOWN_BUSTYPE, "MBII "},
121 {MCA, "MCA "},
122 {UNKNOWN_BUSTYPE, "MPI "},
123 {UNKNOWN_BUSTYPE, "MPSA "},
124 {UNKNOWN_BUSTYPE, "NUBUS "},
125 {PCI, "PCI "},
126 {UNKNOWN_BUSTYPE, "PCMCIA"},
127 {UNKNOWN_BUSTYPE, "TC "},
128 {UNKNOWN_BUSTYPE, "VL "},
129 {UNKNOWN_BUSTYPE, "VME "},
130 {UNKNOWN_BUSTYPE, "XPRESS"}
131 };
132
133 /* From MP spec v1.4, table 5-1. */
134 static int default_data[7][5] =
135 {
136 /* nbus, id0, type0, id1, type1 */
137 {1, 0, ISA, 255, NOBUS},
138 {1, 0, EISA, 255, NOBUS},
139 {1, 0, EISA, 255, NOBUS},
140 {1, 0, MCA, 255, NOBUS},
141 {2, 0, ISA, 1, PCI},
142 {2, 0, EISA, 1, PCI},
143 {2, 0, MCA, 1, PCI}
144 };
145
146 struct pci_probe_table_args {
147 u_char bus;
148 u_char found;
149 };
150
151 struct pci_route_interrupt_args {
152 u_char bus; /* Source bus. */
153 u_char irq; /* Source slot:pin. */
154 int vector; /* Return value. */
155 };
156
157 static mpfps_t mpfps;
158 static mpcth_t mpct;
159 static ext_entry_ptr mpet;
160 static ioapic_drv_t ioapics[IOAPIC_MAX_ID + 1];
161 static bus_datum *busses;
162 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
163 static int pci0 = -1;
164
165 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
166
167 static enum intr_polarity conforming_polarity(u_char src_bus,
168 u_char src_bus_irq);
169 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
170 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
171 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
172 static int lookup_bus_type(char *name);
173 static void mptable_count_items(void);
174 static void mptable_count_items_handler(u_char *entry, void *arg);
175 #ifdef MPTABLE_FORCE_HTT
176 static void mptable_hyperthread_fixup(u_int id_mask);
177 #endif
178 static void mptable_parse_apics_and_busses(void);
179 static void mptable_parse_apics_and_busses_handler(u_char *entry,
180 void *arg);
181 static void mptable_parse_default_config_ints(void);
182 static void mptable_parse_ints(void);
183 static void mptable_parse_ints_handler(u_char *entry, void *arg);
184 static void mptable_parse_io_int(int_entry_ptr intr);
185 static void mptable_parse_local_int(int_entry_ptr intr);
186 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
187 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
188 static void mptable_pci_setup(void);
189 static int mptable_probe(void);
190 static int mptable_probe_cpus(void);
191 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
192 static void mptable_setup_cpus_handler(u_char *entry, void *arg __unused);
193 static void mptable_register(void *dummy);
194 static int mptable_setup_local(void);
195 static int mptable_setup_io(void);
196 static void mptable_walk_extended_table(
197 mptable_extended_entry_handler *handler, void *arg);
198 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
199 static int search_for_sig(u_int32_t target, int count);
200
201 static struct apic_enumerator mptable_enumerator = {
202 .apic_name = "MPTable",
203 .apic_probe = mptable_probe,
204 .apic_probe_cpus = mptable_probe_cpus,
205 .apic_setup_local = mptable_setup_local,
206 .apic_setup_io = mptable_setup_io
207 };
208
209 /*
210 * look for the MP spec signature
211 */
212
213 static int
search_for_sig(u_int32_t target,int count)214 search_for_sig(u_int32_t target, int count)
215 {
216 int x;
217 u_int32_t *addr;
218
219 addr = (u_int32_t *)BIOS_PADDRTOVADDR(target);
220 for (x = 0; x < count; x += 4)
221 if (addr[x] == MP_SIG)
222 /* make array index a byte index */
223 return (target + (x * sizeof(u_int32_t)));
224 return (-1);
225 }
226
227 static int
lookup_bus_type(char * name)228 lookup_bus_type(char *name)
229 {
230 int x;
231
232 for (x = 0; x < MAX_BUSTYPE; ++x)
233 if (strncmp(bus_type_table[x].name, name, 6) == 0)
234 return (bus_type_table[x].type);
235
236 return (UNKNOWN_BUSTYPE);
237 }
238
239 #ifdef MPTABLE_LINUX_BUG_COMPAT
240 /* Compute the correct entry_count value. */
241 static void
compute_entry_count(void)242 compute_entry_count(void)
243 {
244 u_char *end = (u_char *)(mpct) + mpct->base_table_length;
245 u_char *entry = (u_char *)(mpct + 1);
246 size_t nentries = 0;
247
248 while (entry < end) {
249 switch (*entry) {
250 case MPCT_ENTRY_PROCESSOR:
251 case MPCT_ENTRY_IOAPIC:
252 case MPCT_ENTRY_BUS:
253 case MPCT_ENTRY_INT:
254 case MPCT_ENTRY_LOCAL_INT:
255 break;
256 default:
257 panic("%s: Unknown MP Config Entry %d\n", __func__,
258 (int)*entry);
259 }
260 entry += basetable_entry_types[*entry].length;
261 nentries++;
262 }
263 mpct->entry_count = (uint16_t)(nentries);
264 }
265 #endif
266
267 /*
268 * Look for an Intel MP spec table (ie, SMP capable hardware).
269 */
270 static int
mptable_probe(void)271 mptable_probe(void)
272 {
273 int x;
274 u_long segment;
275 u_int32_t target;
276
277 /* see if EBDA exists */
278 if ((segment = *(u_short *)BIOS_PADDRTOVADDR(0x40e)) != 0) {
279 /* search first 1K of EBDA */
280 target = (u_int32_t) (segment << 4);
281 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
282 goto found;
283 } else {
284 /* last 1K of base memory, effective 'top of base' passed in */
285 target = (u_int32_t) ((basemem * 1024) - 0x400);
286 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
287 goto found;
288 }
289
290 /* search the BIOS */
291 target = (u_int32_t) BIOS_BASE;
292 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
293 goto found;
294
295 #ifdef MPTABLE_LINUX_BUG_COMPAT
296 /*
297 * Linux assumes that it always has 640 kB of base memory and
298 * searches for the MP table at 639k regardless of whether that
299 * address is present in the system memory map. Some VM systems
300 * rely on this buggy behaviour.
301 */
302 if ((x = search_for_sig(639 * 1024, 1024 / 4)) >= 0)
303 goto found;
304 #endif
305
306 /* nothing found */
307 return (ENXIO);
308
309 found:
310 mpfps = (mpfps_t)BIOS_PADDRTOVADDR(x);
311
312 /* Map in the configuration table if it exists. */
313 if (mpfps->config_type != 0) {
314 if (bootverbose)
315 printf(
316 "MP Table version 1.%d found using Default Configuration %d\n",
317 mpfps->spec_rev, mpfps->config_type);
318 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
319 printf(
320 "MP Table Default Configuration %d is unsupported\n",
321 mpfps->config_type);
322 return (ENXIO);
323 }
324 mpct = NULL;
325 } else {
326 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
327 printf("%s: Unable to map MP Configuration Table\n",
328 __func__);
329 return (ENXIO);
330 }
331 mpct = (mpcth_t)BIOS_PADDRTOVADDR((uintptr_t)mpfps->pap);
332 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
333 1024 * 1024) {
334 printf("%s: Unable to map end of MP Config Table\n",
335 __func__);
336 return (ENXIO);
337 }
338 if (mpct->extended_table_length != 0 &&
339 mpct->extended_table_length + mpct->base_table_length +
340 (uintptr_t)mpfps->pap < 1024 * 1024)
341 mpet = (ext_entry_ptr)((char *)mpct +
342 mpct->base_table_length);
343 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
344 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
345 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
346 __func__, mpct->signature[0], mpct->signature[1],
347 mpct->signature[2], mpct->signature[3]);
348 return (ENXIO);
349 }
350 if (bootverbose)
351 printf(
352 "MP Configuration Table version 1.%d found at %p\n",
353 mpct->spec_rev, mpct);
354 #ifdef MPTABLE_LINUX_BUG_COMPAT
355 /*
356 * Linux ignores entry_count and instead scans the MP table
357 * until it runs out of bytes of table (as specified by the
358 * base_table_length field). Some VM systems rely on this
359 * buggy behaviour and record an entry_count of zero.
360 */
361 if (mpct->entry_count == 0)
362 compute_entry_count();
363 #endif
364 }
365
366 return (-100);
367 }
368
369 /*
370 * Run through the MP table enumerating CPUs.
371 */
372 static int
mptable_probe_cpus(void)373 mptable_probe_cpus(void)
374 {
375 u_int cpu_mask;
376
377 /* Is this a pre-defined config? */
378 if (mpfps->config_type != 0) {
379 #ifdef SMP
380 mp_ncpus = 2;
381 mp_maxid = 1;
382 #endif
383 max_apic_id = 1;
384 } else {
385 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
386 }
387 return (0);
388 }
389
390 /*
391 * Initialize the local APIC on the BSP.
392 */
393 static int
mptable_setup_local(void)394 mptable_setup_local(void)
395 {
396 vm_paddr_t addr;
397 u_int cpu_mask;
398
399 /* Is this a pre-defined config? */
400 printf("MPTable: <");
401 if (mpfps->config_type != 0) {
402 lapic_create(0, 1);
403 lapic_create(1, 0);
404 addr = DEFAULT_APIC_BASE;
405 printf("Default Configuration %d", mpfps->config_type);
406
407 } else {
408 cpu_mask = 0;
409 mptable_walk_table(mptable_setup_cpus_handler, &cpu_mask);
410 #ifdef MPTABLE_FORCE_HTT
411 mptable_hyperthread_fixup(cpu_mask);
412 #endif
413 addr = mpct->apic_address;
414 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
415 (int)sizeof(mpct->product_id), mpct->product_id);
416 }
417 printf(">\n");
418 lapic_init(addr);
419 return (0);
420 }
421
422 /*
423 * Run through the MP table enumerating I/O APICs.
424 */
425 static int
mptable_setup_io(void)426 mptable_setup_io(void)
427 {
428 int i;
429 u_char byte;
430
431 /* First, we count individual items and allocate arrays. */
432 mptable_count_items();
433 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
434 M_WAITOK);
435 for (i = 0; i <= mptable_maxbusid; i++)
436 busses[i].bus_type = NOBUS;
437
438 /* Second, we run through adding I/O APIC's and buses. */
439 mptable_parse_apics_and_busses();
440
441 /* Third, we run through the table tweaking interrupt sources. */
442 mptable_parse_ints();
443
444 /* Fourth, we register all the I/O APIC's. */
445 for (i = 0; i <= IOAPIC_MAX_ID; i++)
446 if (ioapics[i] != NULL)
447 ioapic_register(ioapics[i]);
448
449 /* Fifth, we setup data structures to handle PCI interrupt routing. */
450 mptable_pci_setup();
451
452 /* Finally, we throw the switch to enable the I/O APIC's. */
453 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
454 outb(0x22, 0x70); /* select IMCR */
455 byte = inb(0x23); /* current contents */
456 byte |= 0x01; /* mask external INTR */
457 outb(0x23, byte); /* disconnect 8259s/NMI */
458 }
459
460 return (0);
461 }
462
463 static void
mptable_register(void * dummy __unused)464 mptable_register(void *dummy __unused)
465 {
466
467 apic_register_enumerator(&mptable_enumerator);
468 }
469 SYSINIT(mptable_register, SI_SUB_FIRST, SI_ORDER_FIRST, mptable_register, NULL);
470
471 /*
472 * Call the handler routine for each entry in the MP config base table.
473 */
474 static void
mptable_walk_table(mptable_entry_handler * handler,void * arg)475 mptable_walk_table(mptable_entry_handler *handler, void *arg)
476 {
477 u_int i;
478 u_char *entry;
479
480 entry = (u_char *)(mpct + 1);
481 for (i = 0; i < mpct->entry_count; i++) {
482 switch (*entry) {
483 case MPCT_ENTRY_PROCESSOR:
484 case MPCT_ENTRY_IOAPIC:
485 case MPCT_ENTRY_BUS:
486 case MPCT_ENTRY_INT:
487 case MPCT_ENTRY_LOCAL_INT:
488 break;
489 default:
490 panic("%s: Unknown MP Config Entry %d\n", __func__,
491 (int)*entry);
492 }
493 handler(entry, arg);
494 entry += basetable_entry_types[*entry].length;
495 }
496 }
497
498 /*
499 * Call the handler routine for each entry in the MP config extended
500 * table.
501 */
502 static void
mptable_walk_extended_table(mptable_extended_entry_handler * handler,void * arg)503 mptable_walk_extended_table(mptable_extended_entry_handler *handler, void *arg)
504 {
505 ext_entry_ptr end, entry;
506
507 if (mpet == NULL)
508 return;
509 entry = mpet;
510 end = (ext_entry_ptr)((char *)mpet + mpct->extended_table_length);
511 while (entry < end) {
512 handler(entry, arg);
513 entry = (ext_entry_ptr)((char *)entry + entry->length);
514 }
515 }
516
517 static void
mptable_probe_cpus_handler(u_char * entry,void * arg)518 mptable_probe_cpus_handler(u_char *entry, void *arg)
519 {
520 proc_entry_ptr proc;
521
522 switch (*entry) {
523 case MPCT_ENTRY_PROCESSOR:
524 proc = (proc_entry_ptr)entry;
525 if (proc->cpu_flags & PROCENTRY_FLAG_EN &&
526 proc->apic_id < MAX_LAPIC_ID && mp_ncpus < MAXCPU) {
527 #ifdef SMP
528 mp_ncpus++;
529 mp_maxid = mp_ncpus - 1;
530 #endif
531 max_apic_id = max(max_apic_id, proc->apic_id);
532 }
533 break;
534 }
535 }
536
537 static void
mptable_setup_cpus_handler(u_char * entry,void * arg)538 mptable_setup_cpus_handler(u_char *entry, void *arg)
539 {
540 proc_entry_ptr proc;
541 u_int *cpu_mask;
542
543 switch (*entry) {
544 case MPCT_ENTRY_PROCESSOR:
545 proc = (proc_entry_ptr)entry;
546 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
547 lapic_create(proc->apic_id, proc->cpu_flags &
548 PROCENTRY_FLAG_BP);
549 if (proc->apic_id < MAX_LAPIC_ID) {
550 cpu_mask = (u_int *)arg;
551 *cpu_mask |= (1ul << proc->apic_id);
552 }
553 }
554 break;
555 }
556 }
557
558 static void
mptable_count_items_handler(u_char * entry,void * arg __unused)559 mptable_count_items_handler(u_char *entry, void *arg __unused)
560 {
561 io_apic_entry_ptr apic;
562 bus_entry_ptr bus;
563
564 switch (*entry) {
565 case MPCT_ENTRY_BUS:
566 bus = (bus_entry_ptr)entry;
567 mptable_nbusses++;
568 if (bus->bus_id > mptable_maxbusid)
569 mptable_maxbusid = bus->bus_id;
570 break;
571 case MPCT_ENTRY_IOAPIC:
572 apic = (io_apic_entry_ptr)entry;
573 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
574 mptable_nioapics++;
575 break;
576 }
577 }
578
579 /*
580 * Count items in the table.
581 */
582 static void
mptable_count_items(void)583 mptable_count_items(void)
584 {
585
586 /* Is this a pre-defined config? */
587 if (mpfps->config_type != 0) {
588 mptable_nioapics = 1;
589 switch (mpfps->config_type) {
590 case 1:
591 case 2:
592 case 3:
593 case 4:
594 mptable_nbusses = 1;
595 break;
596 case 5:
597 case 6:
598 case 7:
599 mptable_nbusses = 2;
600 break;
601 default:
602 panic("Unknown pre-defined MP Table config type %d",
603 mpfps->config_type);
604 }
605 mptable_maxbusid = mptable_nbusses - 1;
606 } else
607 mptable_walk_table(mptable_count_items_handler, NULL);
608 }
609
610 /*
611 * Add a bus or I/O APIC from an entry in the table.
612 */
613 static void
mptable_parse_apics_and_busses_handler(u_char * entry,void * arg __unused)614 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
615 {
616 io_apic_entry_ptr apic;
617 bus_entry_ptr bus;
618 enum busTypes bus_type;
619 int i;
620
621 switch (*entry) {
622 case MPCT_ENTRY_BUS:
623 bus = (bus_entry_ptr)entry;
624 bus_type = lookup_bus_type(bus->bus_type);
625 if (bus_type == UNKNOWN_BUSTYPE) {
626 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
627 for (i = 0; i < 6; i++)
628 printf("%c", bus->bus_type[i]);
629 printf("\"\n");
630 }
631 busses[bus->bus_id].bus_id = bus->bus_id;
632 busses[bus->bus_id].bus_type = bus_type;
633 break;
634 case MPCT_ENTRY_IOAPIC:
635 apic = (io_apic_entry_ptr)entry;
636 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
637 break;
638 if (apic->apic_id > IOAPIC_MAX_ID)
639 panic("%s: I/O APIC ID %d too high", __func__,
640 apic->apic_id);
641 if (ioapics[apic->apic_id] != NULL)
642 panic("%s: Double APIC ID %d", __func__,
643 apic->apic_id);
644 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
645 apic->apic_id, -1);
646 break;
647 default:
648 break;
649 }
650 }
651
652 /*
653 * Enumerate I/O APIC's and buses.
654 */
655 static void
mptable_parse_apics_and_busses(void)656 mptable_parse_apics_and_busses(void)
657 {
658
659 /* Is this a pre-defined config? */
660 if (mpfps->config_type != 0) {
661 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
662 busses[0].bus_id = 0;
663 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
664 if (mptable_nbusses > 1) {
665 busses[1].bus_id = 1;
666 busses[1].bus_type =
667 default_data[mpfps->config_type - 1][4];
668 }
669 } else
670 mptable_walk_table(mptable_parse_apics_and_busses_handler,
671 NULL);
672 }
673
674 /*
675 * Determine conforming polarity for a given bus type.
676 */
677 static enum intr_polarity
conforming_polarity(u_char src_bus,u_char src_bus_irq)678 conforming_polarity(u_char src_bus, u_char src_bus_irq)
679 {
680
681 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
682 switch (busses[src_bus].bus_type) {
683 case ISA:
684 case EISA:
685 return (INTR_POLARITY_HIGH);
686 case PCI:
687 return (INTR_POLARITY_LOW);
688 default:
689 panic("%s: unknown bus type %d", __func__,
690 busses[src_bus].bus_type);
691 }
692 }
693
694 /*
695 * Determine conforming trigger for a given bus type.
696 */
697 static enum intr_trigger
conforming_trigger(u_char src_bus,u_char src_bus_irq)698 conforming_trigger(u_char src_bus, u_char src_bus_irq)
699 {
700
701 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
702 switch (busses[src_bus].bus_type) {
703 case ISA:
704 if (elcr_found)
705 return (elcr_read_trigger(src_bus_irq));
706 else
707 return (INTR_TRIGGER_EDGE);
708 case PCI:
709 return (INTR_TRIGGER_LEVEL);
710
711 case EISA:
712 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
713 KASSERT(elcr_found, ("Missing ELCR"));
714 return (elcr_read_trigger(src_bus_irq));
715
716 default:
717 panic("%s: unknown bus type %d", __func__,
718 busses[src_bus].bus_type);
719 }
720 }
721
722 static enum intr_polarity
intentry_polarity(int_entry_ptr intr)723 intentry_polarity(int_entry_ptr intr)
724 {
725
726 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
727 case INTENTRY_FLAGS_POLARITY_CONFORM:
728 return (conforming_polarity(intr->src_bus_id,
729 intr->src_bus_irq));
730 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
731 return (INTR_POLARITY_HIGH);
732 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
733 return (INTR_POLARITY_LOW);
734 default:
735 panic("Bogus interrupt flags");
736 }
737 }
738
739 static enum intr_trigger
intentry_trigger(int_entry_ptr intr)740 intentry_trigger(int_entry_ptr intr)
741 {
742
743 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
744 case INTENTRY_FLAGS_TRIGGER_CONFORM:
745 return (conforming_trigger(intr->src_bus_id,
746 intr->src_bus_irq));
747 case INTENTRY_FLAGS_TRIGGER_EDGE:
748 return (INTR_TRIGGER_EDGE);
749 case INTENTRY_FLAGS_TRIGGER_LEVEL:
750 return (INTR_TRIGGER_LEVEL);
751 default:
752 panic("Bogus interrupt flags");
753 }
754 }
755
756 /*
757 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
758 */
759 static void
mptable_parse_io_int(int_entry_ptr intr)760 mptable_parse_io_int(int_entry_ptr intr)
761 {
762 ioapic_drv_t ioapic;
763 u_int pin, apic_id;
764
765 apic_id = intr->dst_apic_id;
766 if (intr->dst_apic_id == 0xff) {
767 /*
768 * An APIC ID of 0xff means that the interrupt is connected
769 * to the specified pin on all I/O APICs in the system. If
770 * there is only one I/O APIC, then use that APIC to route
771 * the interrupts. If there is more than one I/O APIC, then
772 * punt.
773 */
774 if (mptable_nioapics == 1) {
775 apic_id = 0;
776 while (ioapics[apic_id] == NULL)
777 apic_id++;
778 } else {
779 printf(
780 "MPTable: Ignoring global interrupt entry for pin %d\n",
781 intr->dst_apic_int);
782 return;
783 }
784 }
785 if (apic_id > IOAPIC_MAX_ID) {
786 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
787 intr->dst_apic_id);
788 return;
789 }
790 ioapic = ioapics[apic_id];
791 if (ioapic == NULL) {
792 printf(
793 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
794 apic_id);
795 return;
796 }
797 pin = intr->dst_apic_int;
798 switch (intr->int_type) {
799 case INTENTRY_TYPE_INT:
800 switch (busses[intr->src_bus_id].bus_type) {
801 case NOBUS:
802 panic("interrupt from missing bus");
803 case ISA:
804 case EISA:
805 if (busses[intr->src_bus_id].bus_type == ISA)
806 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
807 else
808 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
809 if (intr->src_bus_irq == pin)
810 break;
811 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
812 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
813 intr->src_bus_irq)
814 ioapic_disable_pin(ioapic, intr->src_bus_irq);
815 break;
816 case PCI:
817 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
818 break;
819 default:
820 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
821 break;
822 }
823 break;
824 case INTENTRY_TYPE_NMI:
825 ioapic_set_nmi(ioapic, pin);
826 break;
827 case INTENTRY_TYPE_SMI:
828 ioapic_set_smi(ioapic, pin);
829 break;
830 case INTENTRY_TYPE_EXTINT:
831 ioapic_set_extint(ioapic, pin);
832 break;
833 default:
834 panic("%s: invalid interrupt entry type %d\n", __func__,
835 intr->int_type);
836 }
837 if (intr->int_type == INTENTRY_TYPE_INT ||
838 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
839 INTENTRY_FLAGS_TRIGGER_CONFORM)
840 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
841 if (intr->int_type == INTENTRY_TYPE_INT ||
842 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
843 INTENTRY_FLAGS_POLARITY_CONFORM)
844 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
845 }
846
847 /*
848 * Parse an interrupt entry for a local APIC LVT pin.
849 */
850 static void
mptable_parse_local_int(int_entry_ptr intr)851 mptable_parse_local_int(int_entry_ptr intr)
852 {
853 u_int apic_id, pin;
854
855 if (intr->dst_apic_id == 0xff)
856 apic_id = APIC_ID_ALL;
857 else
858 apic_id = intr->dst_apic_id;
859 if (intr->dst_apic_int == 0)
860 pin = APIC_LVT_LINT0;
861 else
862 pin = APIC_LVT_LINT1;
863 switch (intr->int_type) {
864 case INTENTRY_TYPE_INT:
865 #if 1
866 printf(
867 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
868 intr->dst_apic_int, intr->src_bus_irq);
869 return;
870 #else
871 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
872 break;
873 #endif
874 case INTENTRY_TYPE_NMI:
875 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
876 break;
877 case INTENTRY_TYPE_SMI:
878 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
879 break;
880 case INTENTRY_TYPE_EXTINT:
881 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
882 break;
883 default:
884 panic("%s: invalid interrupt entry type %d\n", __func__,
885 intr->int_type);
886 }
887 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
888 INTENTRY_FLAGS_TRIGGER_CONFORM)
889 lapic_set_lvt_triggermode(apic_id, pin,
890 intentry_trigger(intr));
891 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
892 INTENTRY_FLAGS_POLARITY_CONFORM)
893 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
894 }
895
896 /*
897 * Parse interrupt entries.
898 */
899 static void
mptable_parse_ints_handler(u_char * entry,void * arg __unused)900 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
901 {
902 int_entry_ptr intr;
903
904 intr = (int_entry_ptr)entry;
905 switch (*entry) {
906 case MPCT_ENTRY_INT:
907 mptable_parse_io_int(intr);
908 break;
909 case MPCT_ENTRY_LOCAL_INT:
910 mptable_parse_local_int(intr);
911 break;
912 }
913 }
914
915 /*
916 * Configure interrupt pins for a default configuration. For details see
917 * Table 5-2 in Section 5 of the MP Table specification.
918 */
919 static void
mptable_parse_default_config_ints(void)920 mptable_parse_default_config_ints(void)
921 {
922 struct INTENTRY entry;
923 int pin;
924
925 /*
926 * All default configs route IRQs from bus 0 to the first 16 pins
927 * of the first I/O APIC with an APIC ID of 2.
928 */
929 entry.type = MPCT_ENTRY_INT;
930 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
931 INTENTRY_FLAGS_TRIGGER_CONFORM;
932 entry.src_bus_id = 0;
933 entry.dst_apic_id = 2;
934
935 /* Run through all 16 pins. */
936 for (pin = 0; pin < 16; pin++) {
937 entry.dst_apic_int = pin;
938 switch (pin) {
939 case 0:
940 /* Pin 0 is an ExtINT pin. */
941 entry.int_type = INTENTRY_TYPE_EXTINT;
942 break;
943 case 2:
944 /* IRQ 0 is routed to pin 2. */
945 entry.int_type = INTENTRY_TYPE_INT;
946 entry.src_bus_irq = 0;
947 break;
948 default:
949 /* All other pins are identity mapped. */
950 entry.int_type = INTENTRY_TYPE_INT;
951 entry.src_bus_irq = pin;
952 break;
953 }
954 mptable_parse_io_int(&entry);
955 }
956
957 /* Certain configs disable certain pins. */
958 if (mpfps->config_type == 7)
959 ioapic_disable_pin(ioapics[2], 0);
960 if (mpfps->config_type == 2) {
961 ioapic_disable_pin(ioapics[2], 2);
962 ioapic_disable_pin(ioapics[2], 13);
963 }
964 }
965
966 /*
967 * Configure the interrupt pins
968 */
969 static void
mptable_parse_ints(void)970 mptable_parse_ints(void)
971 {
972
973 /* Is this a pre-defined config? */
974 if (mpfps->config_type != 0) {
975 /* Configure LINT pins. */
976 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT0,
977 APIC_LVT_DM_EXTINT);
978 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT1, APIC_LVT_DM_NMI);
979
980 /* Configure I/O APIC pins. */
981 mptable_parse_default_config_ints();
982 } else
983 mptable_walk_table(mptable_parse_ints_handler, NULL);
984 }
985
986 #ifdef MPTABLE_FORCE_HTT
987 /*
988 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
989 * that aren't already listed in the table.
990 *
991 * XXX: We assume that all of the physical CPUs in the
992 * system have the same number of logical CPUs.
993 *
994 * XXX: We assume that APIC ID's are allocated such that
995 * the APIC ID's for a physical processor are aligned
996 * with the number of logical CPU's in the processor.
997 */
998 static void
mptable_hyperthread_fixup(u_int id_mask)999 mptable_hyperthread_fixup(u_int id_mask)
1000 {
1001 u_int i, id, logical_cpus;
1002
1003 /* Nothing to do if there is no HTT support. */
1004 if ((cpu_feature & CPUID_HTT) == 0)
1005 return;
1006 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
1007 if (logical_cpus <= 1)
1008 return;
1009
1010 /*
1011 * For each APIC ID of a CPU that is set in the mask,
1012 * scan the other candidate APIC ID's for this
1013 * physical processor. If any of those ID's are
1014 * already in the table, then kill the fixup.
1015 */
1016 for (id = 0; id <= MAX_LAPIC_ID; id++) {
1017 if ((id_mask & 1 << id) == 0)
1018 continue;
1019 /* First, make sure we are on a logical_cpus boundary. */
1020 if (id % logical_cpus != 0)
1021 return;
1022 for (i = id + 1; i < id + logical_cpus; i++)
1023 if ((id_mask & 1 << i) != 0)
1024 return;
1025 }
1026
1027 /*
1028 * Ok, the ID's checked out, so perform the fixup by
1029 * adding the logical CPUs.
1030 */
1031 while ((id = ffs(id_mask)) != 0) {
1032 id--;
1033 for (i = id + 1; i < id + logical_cpus; i++) {
1034 if (bootverbose)
1035 printf(
1036 "MPTable: Adding logical CPU %d from main CPU %d\n",
1037 i, id);
1038 lapic_create(i, 0);
1039 }
1040 id_mask &= ~(1 << id);
1041 }
1042 }
1043 #endif /* MPTABLE_FORCE_HTT */
1044
1045 /*
1046 * Support code for routing PCI interrupts using the MP Table.
1047 */
1048 static void
mptable_pci_setup(void)1049 mptable_pci_setup(void)
1050 {
1051 int i;
1052
1053 /*
1054 * Find the first pci bus and call it 0. Panic if pci0 is not
1055 * bus zero and there are multiple PCI buses.
1056 */
1057 for (i = 0; i <= mptable_maxbusid; i++)
1058 if (busses[i].bus_type == PCI) {
1059 if (pci0 == -1)
1060 pci0 = i;
1061 else if (pci0 != 0)
1062 panic(
1063 "MPTable contains multiple PCI buses but no PCI bus 0");
1064 }
1065 }
1066
1067 static void
mptable_pci_probe_table_handler(u_char * entry,void * arg)1068 mptable_pci_probe_table_handler(u_char *entry, void *arg)
1069 {
1070 struct pci_probe_table_args *args;
1071 int_entry_ptr intr;
1072
1073 if (*entry != MPCT_ENTRY_INT)
1074 return;
1075 intr = (int_entry_ptr)entry;
1076 args = (struct pci_probe_table_args *)arg;
1077 KASSERT(args->bus <= mptable_maxbusid,
1078 ("bus %d is too big", args->bus));
1079 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
1080 if (intr->src_bus_id == args->bus)
1081 args->found = 1;
1082 }
1083
1084 int
mptable_pci_probe_table(int bus)1085 mptable_pci_probe_table(int bus)
1086 {
1087 struct pci_probe_table_args args;
1088
1089 if (bus < 0)
1090 return (EINVAL);
1091 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
1092 return (ENXIO);
1093 if (busses[pci0 + bus].bus_type != PCI)
1094 return (ENXIO);
1095 args.bus = pci0 + bus;
1096 args.found = 0;
1097 mptable_walk_table(mptable_pci_probe_table_handler, &args);
1098 if (args.found == 0)
1099 return (ENXIO);
1100 return (0);
1101 }
1102
1103 static void
mptable_pci_route_interrupt_handler(u_char * entry,void * arg)1104 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
1105 {
1106 struct pci_route_interrupt_args *args;
1107 int_entry_ptr intr;
1108 int vector;
1109
1110 if (*entry != MPCT_ENTRY_INT)
1111 return;
1112 intr = (int_entry_ptr)entry;
1113 args = (struct pci_route_interrupt_args *)arg;
1114 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1115 return;
1116
1117 /* Make sure the APIC maps to a known APIC. */
1118 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1119 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1120
1121 /*
1122 * Look up the vector for this APIC / pin combination. If we
1123 * have previously matched an entry for this PCI IRQ but it
1124 * has the same vector as this entry, just return. Otherwise,
1125 * we use the vector for this APIC / pin combination.
1126 */
1127 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1128 intr->dst_apic_int);
1129 if (args->vector == vector)
1130 return;
1131 KASSERT(args->vector == -1,
1132 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1133 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1134 vector));
1135 args->vector = vector;
1136 }
1137
1138 int
mptable_pci_route_interrupt(device_t pcib,device_t dev,int pin)1139 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1140 {
1141 struct pci_route_interrupt_args args;
1142 int slot;
1143
1144 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1145 pin--;
1146 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1147 args.bus = pci_get_bus(dev) + pci0;
1148 slot = pci_get_slot(dev);
1149
1150 /*
1151 * PCI interrupt entries in the MP Table encode both the slot and
1152 * pin into the IRQ with the pin being the two least significant
1153 * bits, the slot being the next five bits, and the most significant
1154 * bit being reserved.
1155 */
1156 args.irq = slot << 2 | pin;
1157 args.vector = -1;
1158 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1159 if (args.vector < 0) {
1160 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1161 'A' + pin);
1162 return (PCI_INVALID_IRQ);
1163 }
1164 if (bootverbose)
1165 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1166 'A' + pin, args.vector);
1167 return (args.vector);
1168 }
1169
1170 struct host_res_args {
1171 struct mptable_hostb_softc *sc;
1172 device_t dev;
1173 u_char bus;
1174 };
1175
1176 /*
1177 * Initialize a Host-PCI bridge so it can restrict resource allocation
1178 * requests to the resources it actually decodes according to MP
1179 * config table extended entries.
1180 */
1181 static void
mptable_host_res_handler(ext_entry_ptr entry,void * arg)1182 mptable_host_res_handler(ext_entry_ptr entry, void *arg)
1183 {
1184 struct host_res_args *args;
1185 cbasm_entry_ptr cbasm;
1186 sas_entry_ptr sas;
1187 const char *name;
1188 uint64_t start, end;
1189 int error, *flagp, flags, type;
1190
1191 args = arg;
1192 switch (entry->type) {
1193 case MPCT_EXTENTRY_SAS:
1194 sas = (sas_entry_ptr)entry;
1195 if (sas->bus_id != args->bus)
1196 break;
1197 switch (sas->address_type) {
1198 case SASENTRY_TYPE_IO:
1199 type = SYS_RES_IOPORT;
1200 flags = 0;
1201 break;
1202 case SASENTRY_TYPE_MEMORY:
1203 type = SYS_RES_MEMORY;
1204 flags = 0;
1205 break;
1206 case SASENTRY_TYPE_PREFETCH:
1207 type = SYS_RES_MEMORY;
1208 flags = RF_PREFETCHABLE;
1209 break;
1210 default:
1211 printf(
1212 "MPTable: Unknown systems address space type for bus %u: %d\n",
1213 sas->bus_id, sas->address_type);
1214 return;
1215 }
1216 start = sas->address_base;
1217 end = sas->address_base + sas->address_length - 1;
1218 #ifdef __i386__
1219 if (start > ULONG_MAX) {
1220 device_printf(args->dev,
1221 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
1222 type, (uintmax_t)start, (uintmax_t)end);
1223 break;
1224 }
1225 if (end > ULONG_MAX) {
1226 device_printf(args->dev,
1227 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
1228 type, (uintmax_t)start, (uintmax_t)end);
1229 end = ULONG_MAX;
1230 }
1231 #endif
1232 error = pcib_host_res_decodes(&args->sc->sc_host_res, type,
1233 start, end, flags);
1234 if (error)
1235 panic("Failed to manage %d range (%#jx-%#jx): %d",
1236 type, (uintmax_t)start, (uintmax_t)end, error);
1237 break;
1238 case MPCT_EXTENTRY_CBASM:
1239 cbasm = (cbasm_entry_ptr)entry;
1240 if (cbasm->bus_id != args->bus)
1241 break;
1242 switch (cbasm->predefined_range) {
1243 case CBASMENTRY_RANGE_ISA_IO:
1244 flagp = &args->sc->sc_decodes_isa_io;
1245 name = "ISA I/O";
1246 break;
1247 case CBASMENTRY_RANGE_VGA_IO:
1248 flagp = &args->sc->sc_decodes_vga_io;
1249 name = "VGA I/O";
1250 break;
1251 default:
1252 printf(
1253 "MPTable: Unknown compatibility address space range for bus %u: %d\n",
1254 cbasm->bus_id, cbasm->predefined_range);
1255 return;
1256 }
1257 if (*flagp != 0)
1258 printf(
1259 "MPTable: Duplicate compatibility %s range for bus %u\n",
1260 name, cbasm->bus_id);
1261 switch (cbasm->address_mod) {
1262 case CBASMENTRY_ADDRESS_MOD_ADD:
1263 *flagp = 1;
1264 if (bootverbose)
1265 device_printf(args->dev, "decoding %s ports\n",
1266 name);
1267 break;
1268 case CBASMENTRY_ADDRESS_MOD_SUBTRACT:
1269 *flagp = -1;
1270 if (bootverbose)
1271 device_printf(args->dev,
1272 "not decoding %s ports\n", name);
1273 break;
1274 default:
1275 printf(
1276 "MPTable: Unknown compatibility address space modifier: %u\n",
1277 cbasm->address_mod);
1278 break;
1279 }
1280 break;
1281 }
1282 }
1283
1284 void
mptable_pci_host_res_init(device_t pcib)1285 mptable_pci_host_res_init(device_t pcib)
1286 {
1287 struct host_res_args args;
1288
1289 KASSERT(pci0 != -1, ("do not know how to map PCI bus IDs"));
1290 args.bus = legacy_get_pcibus(pcib) + pci0;
1291 args.dev = pcib;
1292 args.sc = device_get_softc(pcib);
1293 if (pcib_host_res_init(pcib, &args.sc->sc_host_res) != 0)
1294 panic("failed to init hostb resources");
1295 mptable_walk_extended_table(mptable_host_res_handler, &args);
1296 }
1297