xref: /titanic_41/usr/src/uts/common/sys/dditypes.h (revision 96c4a178a18cd52ee5001195f1552d9cef0c38f0)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_DDITYPES_H
28 #define	_SYS_DDITYPES_H
29 
30 #include <sys/isa_defs.h>
31 #ifndef	_ASM
32 #include <sys/types.h>
33 #endif
34 
35 #ifdef	__cplusplus
36 extern "C" {
37 #endif
38 
39 #ifndef	_ASM
40 /*
41  * DMA types
42  *
43  * A DMA handle represent a "DMA object".  A DMA object is an abstraction
44  * that represents the potential source or destination of DMA transfers to
45  * or from a device.  The DMA object is the highest level description of
46  * the source or destination and is not suitable for the actual transfer.
47  *
48  * Note, that we avoid the specific references to "mapping". The fact that
49  * a transfer requires mapping is an artifact of the specific architectural
50  * implementation.
51  */
52 typedef	struct __ddi_dma_handle *ddi_dma_handle_t;
53 
54 /*
55  * A dma window type represents a "DMA window".  A DMA window is a portion
56  * of a dma object or might be the entire object. A DMA window has had system
57  * resources allocated to it and is prepared to be transferred into or
58  * out of. Examples of system resources are DVMA mapping resources and
59  * intermediate transfer buffer resources.
60  *
61  */
62 typedef	struct __ddi_dma_win *ddi_dma_win_t;
63 
64 
65 /*
66  * A dma segment type represents a "DMA segment".  A dma segment is a
67  * contiguous portion of a DMA window which is entirely addressable by the
68  * device for a transfer operation.  One example where DMA segments are
69  * required is where the system does not contain DVMA capability and
70  * the object or window may be non-contiguous.  In this example the
71  * object or window will be broken into smaller contiguous segments.
72  * Another example is where a device or some intermediary bus adapter has
73  * some upper limit on its transfer size (i.e. an 8-bit address register).
74  * In this example the object or window will be broken into smaller
75  * addressable segments.
76  */
77 typedef	struct __ddi_dma_seg *ddi_dma_seg_t;
78 
79 /*
80  * A DMA cookie contains DMA address information required to
81  * program a DMA engine
82  */
83 typedef struct {
84 	union {
85 		uint64_t	_dmac_ll;	/* 64 bit DMA address */
86 		uint32_t 	_dmac_la[2];    /* 2 x 32 bit address */
87 	} _dmu;
88 	size_t		dmac_size;	/* DMA cookie size */
89 	uint_t		dmac_type;	/* bus specific type bits */
90 } ddi_dma_cookie_t;
91 
92 #define	dmac_laddress	_dmu._dmac_ll
93 #ifdef _LONG_LONG_HTOL
94 #define	dmac_notused    _dmu._dmac_la[0]
95 #define	dmac_address    _dmu._dmac_la[1]
96 #else
97 #define	dmac_address	_dmu._dmac_la[0]
98 #define	dmac_notused	_dmu._dmac_la[1]
99 #endif
100 
101 /*
102  * Interrupt types
103  */
104 
105 /*
106  * Both ddi_iblock_cookie_t and ddi_idevice_cookie_t are
107  * obsolete data structures.
108  *
109  * lock initialization type
110  */
111 typedef struct __ddi_iblock_cookie *ddi_iblock_cookie_t;
112 typedef union {
113 	struct {
114 		ushort_t	_idev_vector;	/* vector - bus dependent */
115 		ushort_t	_idev_priority;	/* priority - bus dependent */
116 	} idu;
117 	uint_t	idev_softint;	/* Soft interrupt register bit(s) */
118 } ddi_idevice_cookie_t;
119 #define	idev_vector	idu._idev_vector
120 #define	idev_priority	idu._idev_priority
121 
122 /*
123  * register specification
124  */
125 typedef struct __ddi_regspec *ddi_regspec_t;
126 
127 /*
128  * interrupt specification
129  */
130 typedef struct __ddi_intrspec *ddi_intrspec_t;
131 
132 /*
133  * ddi_softintr_t is an obsolete data structure.
134  *
135  * soft interrupt id
136  */
137 typedef struct __ddi_softintr *ddi_softintr_t;
138 
139 /*
140  * opaque device info handle
141  */
142 typedef struct __dev_info *dev_info_t;
143 
144 /*
145  * Mapping cookie for devmap(9E)
146  */
147 typedef struct __ddi_devmap_data *ddi_devmap_data_t;
148 
149 /*
150  * Opaque Device id
151  */
152 typedef struct __ddi_devid *ddi_devid_t;
153 
154 /*
155  * Device id types
156  */
157 #define	DEVID_NONE		0
158 #define	DEVID_SCSI3_WWN		1
159 #define	DEVID_SCSI_SERIAL	2
160 #define	DEVID_FAB		3
161 #define	DEVID_ENCAP		4
162 #define	DEVID_ATA_SERIAL	5
163 #define	DEVID_SCSI3_VPD_T10	6
164 #define	DEVID_SCSI3_VPD_EUI	7
165 #define	DEVID_SCSI3_VPD_NAA	8
166 #define	DEVID_MAXTYPE		8
167 
168 /*
169  * Device id scsi encode versions (version of encode interface, not devid)
170  */
171 #define	DEVID_SCSI_ENCODE_VERSION1		0
172 #define	DEVID_SCSI_ENCODE_VERSION2		1
173 #define	DEVID_SCSI_ENCODE_VERSION_LATEST	DEVID_SCSI_ENCODE_VERSION2
174 
175 /*
176  * Device id smp encode versions (version of encode interface, not devid)
177  */
178 #define	DEVID_SMP_ENCODE_VERSION1		0
179 #define	DEVID_SMP_ENCODE_VERSION_LATEST		DEVID_SMP_ENCODE_VERSION1
180 
181 /* minor name values for devid lookup interfaces */
182 #define	DEVID_MINOR_NAME_ALL		((char *)0)
183 #define	DEVID_MINOR_NAME_ALL_CHR	((char *)1)
184 #define	DEVID_MINOR_NAME_ALL_BLK	((char *)2)
185 
186 /*
187  * Define ddi_devmap_cmd types. This should probably be elsewhere.
188  */
189 typedef enum {
190 	DDI_DEVMAP_VALIDATE = 0		/* Check mapping, but do nothing */
191 } ddi_devmap_cmd_t;
192 
193 /*
194  * Definitions for node state.
195  *
196  * NOTE: DS_ATTACHED and DS_READY should only be used by the devcfg.c state
197  * model code itself, other code should use i_ddi_devi_attached() to avoid
198  * logic errors associated with transient DS_READY->DS_ATTACHED->DS_READY
199  * state changes while the node is attached.
200  */
201 typedef enum {
202 	DS_INVAL = -1,
203 	DS_PROTO = 0,
204 	DS_LINKED,	/* in orphan list */
205 	DS_BOUND,	/* in per-driver list */
206 	DS_INITIALIZED, /* bus address assigned */
207 	DS_PROBED,	/* device known to exist */
208 	DS_ATTACHED,	/* don't use, see NOTE above: driver attached */
209 	DS_READY	/* don't use, see NOTE above: post attach complete */
210 } ddi_node_state_t;
211 
212 /*
213  * NDI Event Service
214  */
215 typedef enum {EPL_KERNEL, EPL_INTERRUPT, EPL_HIGHLEVEL} ddi_plevel_t;
216 typedef struct ddi_event_cookie *ddi_eventcookie_t;
217 typedef struct ddi_event_callbacks *ddi_callback_id_t;
218 
219 #endif	/* !_ASM */
220 
221 #ifdef	_KERNEL
222 #ifndef _ASM
223 
224 /*
225  * Device Access Attributes
226  */
227 
228 typedef struct ddi_device_acc_attr {
229 	ushort_t devacc_attr_version;
230 	uchar_t devacc_attr_endian_flags;
231 	uchar_t devacc_attr_dataorder;
232 	uchar_t devacc_attr_access;		/* access error protection */
233 } ddi_device_acc_attr_t;
234 
235 #define	DDI_DEVICE_ATTR_V0 	0x0001
236 #define	DDI_DEVICE_ATTR_V1 	0x0002
237 
238 /*
239  * endian-ness flags
240  */
241 #define	 DDI_NEVERSWAP_ACC	0x00
242 #define	 DDI_STRUCTURE_LE_ACC	0x01
243 #define	 DDI_STRUCTURE_BE_ACC	0x02
244 
245 /*
246  * Data ordering values
247  */
248 #define	DDI_STRICTORDER_ACC	0x00
249 #define	DDI_UNORDERED_OK_ACC    0x01
250 #define	DDI_MERGING_OK_ACC	0x02
251 #define	DDI_LOADCACHING_OK_ACC  0x03
252 #define	DDI_STORECACHING_OK_ACC 0x04
253 
254 /*
255  * Data size
256  */
257 #define	DDI_DATA_SZ01_ACC	1
258 #define	DDI_DATA_SZ02_ACC	2
259 #define	DDI_DATA_SZ04_ACC	4
260 #define	DDI_DATA_SZ08_ACC	8
261 
262 /*
263  * Data Access Handle
264  */
265 #define	VERS_ACCHDL 			0x0001
266 
267 typedef struct __ddi_acc_handle *ddi_acc_handle_t;
268 
269 typedef struct ddi_acc_hdl {
270 	int	ah_vers;		/* version number */
271 	void	*ah_bus_private;	/* bus private pointer */
272 	void 	*ah_platform_private; 	/* platform private pointer */
273 	dev_info_t *ah_dip;		/* requesting device */
274 
275 	uint_t	ah_rnumber;		/* register number */
276 	caddr_t	ah_addr;		/* address of mapping */
277 
278 	off_t	ah_offset;		/* offset of mapping */
279 	off_t	ah_len;			/* length of mapping */
280 	uint_t	ah_hat_flags;		/* hat flags used to map object */
281 	pfn_t	ah_pfn;			/* physical page frame number */
282 	uint_t	ah_pnum;		/* number of contiguous pages */
283 	ulong_t	ah_xfermodes;		/* data transfer modes, etc */
284 	ddi_device_acc_attr_t ah_acc;	/* device access attributes */
285 } ddi_acc_hdl_t;
286 
287 /*
288  * Used by DDI_CTLOPS_POKE and DDI_CTLOPS_PEEK for peek/poke and cautious acc
289  */
290 typedef struct {
291 	size_t			size;
292 	uintptr_t		dev_addr;
293 	uintptr_t		host_addr;
294 	ddi_acc_handle_t	handle;
295 	size_t			repcount;
296 	uint_t			flags;
297 } peekpoke_ctlops_t;
298 
299 /*
300  * Used by the high resolution timeout functions
301  */
302 typedef struct __ddi_periodic *ddi_periodic_t;
303 
304 #endif	/* !_ASM */
305 
306 /*
307  * devacc_attr_access error protection types
308  */
309 #define	DDI_DEFAULT_ACC		0x01	/* take default action */
310 #define	DDI_FLAGERR_ACC		0x02	/* protected against access faults */
311 #define	DDI_CAUTIOUS_ACC	0x03	/* high protection against faults */
312 
313 #endif	/* _KERNEL */
314 
315 #ifdef	__cplusplus
316 }
317 #endif
318 
319 #endif	/* _SYS_DDITYPES_H */
320