| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| H A D | dcn401_dccg.c | 40 #define TO_DCN_DCCG(dccg)\ argument
55 static void dcn401_set_dppclk_enable(struct dccg *dccg, in dcn401_set_dppclk_enable()
77 void dccg401_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg401_update_dpp_dto()
109 struct dccg *dccg) in dccg401_wait_for_dentist_change_done()
120 struct dccg *dccg, in dccg401_get_pixel_rate_div()
158 struct dccg *dccg, in dccg401_set_pixel_rate_div()
213 struct dccg *dccg, in dccg401_set_dtbclk_p_src()
268 struct dccg *dccg, in dccg401_set_physymclk()
351 static void dccg401_get_dccg_ref_freq(struct dccg *dccg, in dccg401_get_dccg_ref_freq()
363 static void dccg401_otg_add_pixel(struct dccg *dccg, in dccg401_otg_add_pixel()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
| H A D | dcn31_dccg.c | 31 #define TO_DCN_DCCG(dccg)\ argument
46 void dccg31_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg31_update_dpp_dto()
97 static void dccg31_enable_dpstreamclk(struct dccg *dccg, int otg_inst) in dccg31_enable_dpstreamclk()
129 static void dccg31_disable_dpstreamclk(struct dccg *dccg, int otg_inst) in dccg31_disable_dpstreamclk()
162 struct dccg *dccg, in dccg31_set_dpstreamclk()
174 struct dccg *dccg, in dccg31_enable_symclk32_se()
227 struct dccg *dccg, in dccg31_disable_symclk32_se()
277 struct dccg *dccg, in dccg31_enable_symclk32_le()
304 struct dccg *dccg, in dccg31_disable_symclk32_le()
328 struct dccg *dccg, in dccg31_set_symclk32_le_root_clock_gating()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
| H A D | dcn32_dccg.c | 30 #define TO_DCN_DCCG(dccg)\ argument
46 struct dccg *dccg) in dccg32_trigger_dio_fifo_resync()
59 struct dccg *dccg, in dccg32_get_pixel_rate_div()
101 struct dccg *dccg, in dccg32_set_pixel_rate_div()
149 struct dccg *dccg, in dccg32_set_dtbclk_p_src()
205 struct dccg *dccg, in dccg32_set_dtbclk_dto()
248 struct dccg *dccg, in dccg32_set_valid_pixel_rate()
263 static void dccg32_get_dccg_ref_freq(struct dccg *dccg, in dccg32_get_dccg_ref_freq()
276 struct dccg *dccg, in dccg32_set_dpstreamclk()
312 static void dccg32_otg_add_pixel(struct dccg *dccg, in dccg32_otg_add_pixel()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| H A D | dcn314_dccg.c | 33 #define TO_DCN_DCCG(dccg)\ argument
49 struct dccg *dccg) in dccg314_trigger_dio_fifo_resync()
59 struct dccg *dccg, in dccg314_get_pixel_rate_div()
101 struct dccg *dccg, in dccg314_set_pixel_rate_div()
149 struct dccg *dccg, in dccg314_set_dtbclk_p_src()
206 struct dccg *dccg, in dccg314_set_dtbclk_dto()
250 struct dccg *dccg, in dccg314_set_dpstreamclk()
288 static void dccg314_init(struct dccg *dccg) in dccg314_init()
315 struct dccg *dccg, in dccg314_set_valid_pixel_rate()
330 struct dccg *dccg, in dccg314_dpp_root_clock_control()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.c | 32 #define TO_DCN_DCCG(dccg)\ argument
47 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg2_update_dpp_dto()
77 void dccg2_get_dccg_ref_freq(struct dccg *dccg, in dccg2_get_dccg_ref_freq()
99 void dccg2_set_fifo_errdet_ovr_en(struct dccg *dccg, in dccg2_set_fifo_errdet_ovr_en()
108 void dccg2_otg_add_pixel(struct dccg *dccg, in dccg2_otg_add_pixel()
120 void dccg2_otg_drop_pixel(struct dccg *dccg, in dccg2_otg_drop_pixel()
132 void dccg2_init(struct dccg *dccg) in dccg2_init()
170 void dcn_dccg_destroy(struct dccg **dccg) in dcn_dccg_destroy()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | dccg.h | 74 struct dccg { struct
76 const struct dccg_funcs *funcs; argument
96 void (*update_dpp_dto)(struct dccg *dccg, argument
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| H A D | clk_mgr_internal.h | 348 struct dccg *dccg; member
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn201/ |
| H A D | dcn201_dccg.c | 31 #define TO_DCN_DCCG(dccg)\ argument
47 static void dccg201_update_dpp_dto(struct dccg *dccg, int dpp_inst, in dccg201_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn21/ |
| H A D | dcn21_dccg.c | 31 #define TO_DCN_DCCG(dccg)\ argument
46 static void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg21_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 155 struct dccg *dccg = clk_mgr->base.ctx->dc->res_pool->dccg; in dcn20_update_clocks_update_dentist() local
185 struct dccg *dccg = clk_mgr->base.ctx->dc->res_pool->dccg; in dcn20_update_clocks_update_dentist() local
532 struct dccg *dccg) in dcn20_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 270 struct dccg *dccg = clk_mgr->dccg; in dcn32_update_clocks_update_dtb_dto() local
374 struct dccg *dccg = clk_mgr->base.ctx->dc->res_pool->dccg; in dcn32_update_clocks_update_dentist() local
427 struct dccg *dccg = clk_mgr->base.ctx->dc->res_pool->dccg; in dcn32_update_clocks_update_dentist() local
1151 struct dccg *dccg) in dcn32_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn301/ |
| H A D | dcn301_dccg.c | 30 #define TO_DCN_DCCG(dccg)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn30/ |
| H A D | dcn30_dccg.c | 30 #define TO_DCN_DCCG(dccg)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 182 struct dccg *dccg) in dcn201_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 200 struct dccg *dccg = clk_mgr_internal->dccg; in dcn35_disable_otg_wa() local
249 struct dccg *dccg = clk_mgr->dccg; in dcn35_update_clocks_update_dtb_dto() local
1236 struct dccg *dccg) in dcn35_clk_mgr_construct()
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| H A D | dcn351_clk_mgr.c | 129 struct dccg *dccg) in dcn351_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| H A D | clk_mgr.c | 147 … clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg *dccg) in dc_clk_mgr_create()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 879 struct dccg *dccg = dc->res_pool->dccg; in dcn20_enable_stream_timing() local
1667 struct dccg *dccg = dc->res_pool->dccg; in dcn20_update_dchubp_dpp() local
2204 struct dccg *dccg = dc->res_pool->dccg; in dcn20_post_unlock_reset_opp() local
3012 struct dccg *dccg = dc->res_pool->dccg; in dcn20_enable_stream() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 606 struct dccg *dccg) in dcn315_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 665 struct dccg *dccg) in vg_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1151 struct dccg *dccg = dc->res_pool->dccg; in dce110_disable_stream() local
1833 struct dccg *dccg = dc->res_pool->dccg; in clean_up_dsc_blocks() local
2852 struct clk_mgr *dccg = dc->clk_mgr; in dce110_prepare_bandwidth() local
2866 struct clk_mgr *dccg = dc->clk_mgr; in dce110_optimize_bandwidth() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 517 struct dccg *dccg = clk_mgr->dccg; in dcn401_update_clocks_update_dtb_dto() local
1510 struct dccg *dccg) in dcn401_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 522 struct dccg *dccg) in dcn3_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 704 struct dccg *dccg) in rn_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 577 struct dccg *dccg) in dcn316_clk_mgr_construct()
|