1 /* $NetBSD: db_interface.c,v 1.33 2003/08/25 04:51:10 mrg Exp $ */
2
3 /*-
4 * Copyright (c) 1996 Scott K. Stevens
5 *
6 * Mach Operating System
7 * Copyright (c) 1991,1990 Carnegie Mellon University
8 * All Rights Reserved.
9 *
10 * Permission to use, copy, modify and distribute this software and its
11 * documentation is hereby granted, provided that both the copyright
12 * notice and this permission notice appear in all copies of the
13 * software, derivative works or modified versions, and any portions
14 * thereof, and that both notices appear in supporting documentation.
15 *
16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19 *
20 * Carnegie Mellon requests users of this software to return to
21 *
22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23 * School of Computer Science
24 * Carnegie Mellon University
25 * Pittsburgh PA 15213-3890
26 *
27 * any improvements or extensions that they make and grant Carnegie the
28 * rights to redistribute these changes.
29 *
30 * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
31 */
32
33 /*
34 * Interface to new debugger.
35 */
36
37 #include "opt_ddb.h"
38
39 #include <sys/param.h>
40 #include <sys/cons.h>
41 #include <sys/proc.h>
42 #include <sys/reboot.h>
43 #include <sys/exec.h>
44 #ifdef KDB
45 #include <sys/kdb.h>
46 #endif
47
48 #include <vm/vm.h>
49 #include <vm/pmap.h>
50 #include <vm/vm_map.h>
51 #include <vm/vm_extern.h>
52
53 #include <machine/db_machdep.h>
54 #include <machine/cpu.h>
55 #include <machine/machdep.h>
56 #include <machine/vmparam.h>
57
58 #include <ddb/ddb.h>
59 #include <ddb/db_access.h>
60 #include <ddb/db_command.h>
61 #include <ddb/db_output.h>
62 #include <ddb/db_variables.h>
63 #include <ddb/db_sym.h>
64
65 static int nil = 0;
66
67 int db_access_und_sp (struct db_variable *, db_expr_t *, int);
68 int db_access_abt_sp (struct db_variable *, db_expr_t *, int);
69 int db_access_irq_sp (struct db_variable *, db_expr_t *, int);
70
71 static db_varfcn_t db_frame;
72
73 #define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x)
74 struct db_variable db_regs[] = {
75 { "spsr", DB_OFFSET(tf_spsr), db_frame },
76 { "r0", DB_OFFSET(tf_r0), db_frame },
77 { "r1", DB_OFFSET(tf_r1), db_frame },
78 { "r2", DB_OFFSET(tf_r2), db_frame },
79 { "r3", DB_OFFSET(tf_r3), db_frame },
80 { "r4", DB_OFFSET(tf_r4), db_frame },
81 { "r5", DB_OFFSET(tf_r5), db_frame },
82 { "r6", DB_OFFSET(tf_r6), db_frame },
83 { "r7", DB_OFFSET(tf_r7), db_frame },
84 { "r8", DB_OFFSET(tf_r8), db_frame },
85 { "r9", DB_OFFSET(tf_r9), db_frame },
86 { "r10", DB_OFFSET(tf_r10), db_frame },
87 { "r11", DB_OFFSET(tf_r11), db_frame },
88 { "r12", DB_OFFSET(tf_r12), db_frame },
89 { "usr_sp", DB_OFFSET(tf_usr_sp), db_frame },
90 { "usr_lr", DB_OFFSET(tf_usr_lr), db_frame },
91 { "svc_sp", DB_OFFSET(tf_svc_sp), db_frame },
92 { "svc_lr", DB_OFFSET(tf_svc_lr), db_frame },
93 { "pc", DB_OFFSET(tf_pc), db_frame },
94 { "und_sp", &nil, db_access_und_sp, },
95 { "abt_sp", &nil, db_access_abt_sp, },
96 { "irq_sp", &nil, db_access_irq_sp, },
97 };
98
99 struct db_variable *db_eregs = db_regs + nitems(db_regs);
100
101 int
db_access_und_sp(struct db_variable * vp,db_expr_t * valp,int rw)102 db_access_und_sp(struct db_variable *vp, db_expr_t *valp, int rw)
103 {
104
105 if (rw == DB_VAR_GET) {
106 *valp = get_stackptr(PSR_UND32_MODE);
107 return (1);
108 }
109 return (0);
110 }
111
112 int
db_access_abt_sp(struct db_variable * vp,db_expr_t * valp,int rw)113 db_access_abt_sp(struct db_variable *vp, db_expr_t *valp, int rw)
114 {
115
116 if (rw == DB_VAR_GET) {
117 *valp = get_stackptr(PSR_ABT32_MODE);
118 return (1);
119 }
120 return (0);
121 }
122
123 int
db_access_irq_sp(struct db_variable * vp,db_expr_t * valp,int rw)124 db_access_irq_sp(struct db_variable *vp, db_expr_t *valp, int rw)
125 {
126
127 if (rw == DB_VAR_GET) {
128 *valp = get_stackptr(PSR_IRQ32_MODE);
129 return (1);
130 }
131 return (0);
132 }
133
db_frame(struct db_variable * vp,db_expr_t * valp,int rw)134 int db_frame(struct db_variable *vp, db_expr_t *valp, int rw)
135 {
136 int *reg;
137
138 if (kdb_frame == NULL)
139 return (0);
140
141 reg = (int *)((uintptr_t)kdb_frame + (db_expr_t)vp->valuep);
142 if (rw == DB_VAR_GET)
143 *valp = *reg;
144 else
145 *reg = *valp;
146 return (1);
147 }
148
149 void
db_show_mdpcpu(struct pcpu * pc)150 db_show_mdpcpu(struct pcpu *pc)
151 {
152
153 db_printf("curpmap = %p\n", pc->pc_curpmap);
154 }
155
156 int
db_validate_address(vm_offset_t addr)157 db_validate_address(vm_offset_t addr)
158 {
159 struct proc *p = curproc;
160 struct pmap *pmap;
161
162 if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
163 #ifndef ARM32_NEW_VM_LAYOUT
164 addr >= VM_MAXUSER_ADDRESS
165 #else
166 addr >= VM_MIN_KERNEL_ADDRESS
167 #endif
168 )
169 pmap = kernel_pmap;
170 else
171 pmap = p->p_vmspace->vm_map.pmap;
172
173 return (pmap_extract(pmap, addr) == 0);
174 }
175
176 /*
177 * Read bytes from kernel address space for debugger.
178 */
179 int
db_read_bytes(vm_offset_t addr,size_t size,char * data)180 db_read_bytes(vm_offset_t addr, size_t size, char *data)
181 {
182 char *src = (char *)addr;
183
184 if (db_validate_address((u_int)src)) {
185 db_printf("address %p is invalid\n", src);
186 return (-1);
187 }
188
189 if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0) {
190 *((int*)data) = *((int*)src);
191 return (0);
192 }
193
194 if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0) {
195 *((short*)data) = *((short*)src);
196 return (0);
197 }
198
199 while (size-- > 0) {
200 if (db_validate_address((u_int)src)) {
201 db_printf("address %p is invalid\n", src);
202 return (-1);
203 }
204 *data++ = *src++;
205 }
206 return (0);
207 }
208
209 /*
210 * Write bytes to kernel address space for debugger.
211 */
212 int
db_write_bytes(vm_offset_t addr,size_t size,char * data)213 db_write_bytes(vm_offset_t addr, size_t size, char *data)
214 {
215 char *dst;
216 size_t loop;
217
218 dst = (char *)addr;
219 if (db_validate_address((u_int)dst)) {
220 db_printf("address %p is invalid\n", dst);
221 return (0);
222 }
223
224 if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0)
225 *((int*)dst) = *((int*)data);
226 else
227 if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0)
228 *((short*)dst) = *((short*)data);
229 else {
230 loop = size;
231 while (loop-- > 0) {
232 if (db_validate_address((u_int)dst)) {
233 db_printf("address %p is invalid\n", dst);
234 return (-1);
235 }
236 *dst++ = *data++;
237 }
238 }
239
240 /* make sure the caches and memory are in sync */
241 icache_sync(addr, size);
242
243 /* In case the current page tables have been modified ... */
244 tlb_flush_all();
245 return (0);
246 }
247
248 static u_int
db_fetch_reg(int reg)249 db_fetch_reg(int reg)
250 {
251
252 switch (reg) {
253 case 0:
254 return (kdb_frame->tf_r0);
255 case 1:
256 return (kdb_frame->tf_r1);
257 case 2:
258 return (kdb_frame->tf_r2);
259 case 3:
260 return (kdb_frame->tf_r3);
261 case 4:
262 return (kdb_frame->tf_r4);
263 case 5:
264 return (kdb_frame->tf_r5);
265 case 6:
266 return (kdb_frame->tf_r6);
267 case 7:
268 return (kdb_frame->tf_r7);
269 case 8:
270 return (kdb_frame->tf_r8);
271 case 9:
272 return (kdb_frame->tf_r9);
273 case 10:
274 return (kdb_frame->tf_r10);
275 case 11:
276 return (kdb_frame->tf_r11);
277 case 12:
278 return (kdb_frame->tf_r12);
279 case 13:
280 return (kdb_frame->tf_svc_sp);
281 case 14:
282 return (kdb_frame->tf_svc_lr);
283 case 15:
284 return (kdb_frame->tf_pc);
285 default:
286 panic("db_fetch_reg: botch");
287 }
288 }
289
290 static u_int
db_branch_taken_read_int(void * cookie __unused,vm_offset_t offset,u_int * val)291 db_branch_taken_read_int(void *cookie __unused, vm_offset_t offset, u_int *val)
292 {
293 u_int ret;
294
295 db_read_bytes(offset, 4, (char *)&ret);
296 *val = ret;
297
298 return (0);
299 }
300
301 static u_int
db_branch_taken_fetch_reg(void * cookie __unused,int reg)302 db_branch_taken_fetch_reg(void *cookie __unused, int reg)
303 {
304
305 return (db_fetch_reg(reg));
306 }
307
308 u_int
branch_taken(u_int insn,db_addr_t pc)309 branch_taken(u_int insn, db_addr_t pc)
310 {
311 register_t new_pc;
312 int ret;
313
314 ret = arm_predict_branch(NULL, insn, (register_t)pc, &new_pc,
315 db_branch_taken_fetch_reg, db_branch_taken_read_int);
316
317 if (ret != 0)
318 kdb_reenter();
319
320 return (new_pc);
321 }
322