1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Sophgo CV1800B SoC pinctrl driver.
4 *
5 * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
6 *
7 * This file is generated from vendor pinout definition.
8 */
9
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/of.h>
13
14 #include <linux/pinctrl/pinctrl.h>
15 #include <linux/pinctrl/pinmux.h>
16
17 #include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
18
19 #include "pinctrl-cv18xx.h"
20
21 enum CV1800B_POWER_DOMAIN {
22 VDD18A_AUD = 0,
23 VDD18A_USB_PLL_ETH_CSI = 1,
24 VDD33A_ETH_USB_SD1 = 2,
25 VDDIO_RTC = 3,
26 VDDIO_SD0_SPI = 4
27 };
28
29 static const char *const cv1800b_power_domain_desc[] = {
30 [VDD18A_AUD] = "VDD18A_AUD",
31 [VDD18A_USB_PLL_ETH_CSI] = "VDD18A_USB_PLL_ETH_CSI",
32 [VDD33A_ETH_USB_SD1] = "VDD33A_ETH_USB_SD1",
33 [VDDIO_RTC] = "VDDIO_RTC",
34 [VDDIO_SD0_SPI] = "VDDIO_SD0_SPI",
35 };
36
cv1800b_get_pull_up(struct cv1800_pin * pin,const u32 * psmap)37 static int cv1800b_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
38 {
39 u32 pstate = psmap[pin->power_domain];
40 enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
41
42 if (type == IO_TYPE_1V8_ONLY)
43 return 79000;
44
45 if (type == IO_TYPE_1V8_OR_3V3) {
46 if (pstate == PIN_POWER_STATE_1V8)
47 return 60000;
48 if (pstate == PIN_POWER_STATE_3V3)
49 return 60000;
50
51 return -EINVAL;
52 }
53
54 return -ENOTSUPP;
55 }
56
cv1800b_get_pull_down(struct cv1800_pin * pin,const u32 * psmap)57 static int cv1800b_get_pull_down(struct cv1800_pin *pin, const u32 *psmap)
58 {
59 u32 pstate = psmap[pin->power_domain];
60 enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
61
62 if (type == IO_TYPE_1V8_ONLY)
63 return 87000;
64
65 if (type == IO_TYPE_1V8_OR_3V3) {
66 if (pstate == PIN_POWER_STATE_1V8)
67 return 61000;
68 if (pstate == PIN_POWER_STATE_3V3)
69 return 62000;
70
71 return -EINVAL;
72 }
73
74 return -ENOTSUPP;
75 }
76
77 static const u32 cv1800b_1v8_oc_map[] = {
78 12800,
79 25300,
80 37400,
81 49000
82 };
83
84 static const u32 cv1800b_18od33_1v8_oc_map[] = {
85 7800,
86 11700,
87 15500,
88 19200,
89 23000,
90 26600,
91 30200,
92 33700
93 };
94
95 static const u32 cv1800b_18od33_3v3_oc_map[] = {
96 5500,
97 8200,
98 10800,
99 13400,
100 16100,
101 18700,
102 21200,
103 23700
104 };
105
106 static const u32 cv1800b_eth_oc_map[] = {
107 15700,
108 17800
109 };
110
cv1800b_get_oc_map(struct cv1800_pin * pin,const u32 * psmap,const u32 ** map)111 static int cv1800b_get_oc_map(struct cv1800_pin *pin, const u32 *psmap,
112 const u32 **map)
113 {
114 enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
115 u32 pstate = psmap[pin->power_domain];
116
117 if (type == IO_TYPE_1V8_ONLY) {
118 *map = cv1800b_1v8_oc_map;
119 return ARRAY_SIZE(cv1800b_1v8_oc_map);
120 }
121
122 if (type == IO_TYPE_1V8_OR_3V3) {
123 if (pstate == PIN_POWER_STATE_1V8) {
124 *map = cv1800b_18od33_1v8_oc_map;
125 return ARRAY_SIZE(cv1800b_18od33_1v8_oc_map);
126 } else if (pstate == PIN_POWER_STATE_3V3) {
127 *map = cv1800b_18od33_3v3_oc_map;
128 return ARRAY_SIZE(cv1800b_18od33_3v3_oc_map);
129 }
130 }
131
132 if (type == IO_TYPE_ETH) {
133 *map = cv1800b_eth_oc_map;
134 return ARRAY_SIZE(cv1800b_eth_oc_map);
135 }
136
137 return -ENOTSUPP;
138 }
139
140 static const u32 cv1800b_1v8_schmitt_map[] = {
141 0,
142 970000,
143 1040000
144 };
145
146 static const u32 cv1800b_18od33_1v8_schmitt_map[] = {
147 0,
148 1070000
149 };
150
151 static const u32 cv1800b_18od33_3v3_schmitt_map[] = {
152 0,
153 1100000
154 };
155
cv1800b_get_schmitt_map(struct cv1800_pin * pin,const u32 * psmap,const u32 ** map)156 static int cv1800b_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
157 const u32 **map)
158 {
159 enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
160 u32 pstate = psmap[pin->power_domain];
161
162 if (type == IO_TYPE_1V8_ONLY) {
163 *map = cv1800b_1v8_schmitt_map;
164 return ARRAY_SIZE(cv1800b_1v8_schmitt_map);
165 }
166
167 if (type == IO_TYPE_1V8_OR_3V3) {
168 if (pstate == PIN_POWER_STATE_1V8) {
169 *map = cv1800b_18od33_1v8_schmitt_map;
170 return ARRAY_SIZE(cv1800b_18od33_1v8_schmitt_map);
171 } else if (pstate == PIN_POWER_STATE_3V3) {
172 *map = cv1800b_18od33_3v3_schmitt_map;
173 return ARRAY_SIZE(cv1800b_18od33_3v3_schmitt_map);
174 }
175 }
176
177 return -ENOTSUPP;
178 }
179
180 static const struct cv1800_vddio_cfg_ops cv1800b_vddio_cfg_ops = {
181 .get_pull_up = cv1800b_get_pull_up,
182 .get_pull_down = cv1800b_get_pull_down,
183 .get_oc_map = cv1800b_get_oc_map,
184 .get_schmitt_map = cv1800b_get_schmitt_map,
185 };
186
187 static const struct pinctrl_pin_desc cv1800b_pins[] = {
188 PINCTRL_PIN(PIN_AUD_AOUTR, "AUD_AOUTR"),
189 PINCTRL_PIN(PIN_SD0_CLK, "SD0_CLK"),
190 PINCTRL_PIN(PIN_SD0_CMD, "SD0_CMD"),
191 PINCTRL_PIN(PIN_SD0_D0, "SD0_D0"),
192 PINCTRL_PIN(PIN_SD0_D1, "SD0_D1"),
193 PINCTRL_PIN(PIN_SD0_D2, "SD0_D2"),
194 PINCTRL_PIN(PIN_SD0_D3, "SD0_D3"),
195 PINCTRL_PIN(PIN_SD0_CD, "SD0_CD"),
196 PINCTRL_PIN(PIN_SD0_PWR_EN, "SD0_PWR_EN"),
197 PINCTRL_PIN(PIN_SPK_EN, "SPK_EN"),
198 PINCTRL_PIN(PIN_UART0_TX, "UART0_TX"),
199 PINCTRL_PIN(PIN_UART0_RX, "UART0_RX"),
200 PINCTRL_PIN(PIN_SPINOR_HOLD_X, "SPINOR_HOLD_X"),
201 PINCTRL_PIN(PIN_SPINOR_SCK, "SPINOR_SCK"),
202 PINCTRL_PIN(PIN_SPINOR_MOSI, "SPINOR_MOSI"),
203 PINCTRL_PIN(PIN_SPINOR_WP_X, "SPINOR_WP_X"),
204 PINCTRL_PIN(PIN_SPINOR_MISO, "SPINOR_MISO"),
205 PINCTRL_PIN(PIN_SPINOR_CS_X, "SPINOR_CS_X"),
206 PINCTRL_PIN(PIN_IIC0_SCL, "IIC0_SCL"),
207 PINCTRL_PIN(PIN_IIC0_SDA, "IIC0_SDA"),
208 PINCTRL_PIN(PIN_AUX0, "AUX0"),
209 PINCTRL_PIN(PIN_PWR_VBAT_DET, "PWR_VBAT_DET"),
210 PINCTRL_PIN(PIN_PWR_SEQ2, "PWR_SEQ2"),
211 PINCTRL_PIN(PIN_XTAL_XIN, "XTAL_XIN"),
212 PINCTRL_PIN(PIN_SD1_GPIO0, "SD1_GPIO0"),
213 PINCTRL_PIN(PIN_SD1_GPIO1, "SD1_GPIO1"),
214 PINCTRL_PIN(PIN_SD1_D3, "SD1_D3"),
215 PINCTRL_PIN(PIN_SD1_D2, "SD1_D2"),
216 PINCTRL_PIN(PIN_SD1_D1, "SD1_D1"),
217 PINCTRL_PIN(PIN_SD1_D0, "SD1_D0"),
218 PINCTRL_PIN(PIN_SD1_CMD, "SD1_CMD"),
219 PINCTRL_PIN(PIN_SD1_CLK, "SD1_CLK"),
220 PINCTRL_PIN(PIN_ADC1, "ADC1"),
221 PINCTRL_PIN(PIN_USB_VBUS_DET, "USB_VBUS_DET"),
222 PINCTRL_PIN(PIN_ETH_TXP, "ETH_TXP"),
223 PINCTRL_PIN(PIN_ETH_TXM, "ETH_TXM"),
224 PINCTRL_PIN(PIN_ETH_RXP, "ETH_RXP"),
225 PINCTRL_PIN(PIN_ETH_RXM, "ETH_RXM"),
226 PINCTRL_PIN(PIN_MIPIRX4N, "MIPIRX4N"),
227 PINCTRL_PIN(PIN_MIPIRX4P, "MIPIRX4P"),
228 PINCTRL_PIN(PIN_MIPIRX3N, "MIPIRX3N"),
229 PINCTRL_PIN(PIN_MIPIRX3P, "MIPIRX3P"),
230 PINCTRL_PIN(PIN_MIPIRX2N, "MIPIRX2N"),
231 PINCTRL_PIN(PIN_MIPIRX2P, "MIPIRX2P"),
232 PINCTRL_PIN(PIN_MIPIRX1N, "MIPIRX1N"),
233 PINCTRL_PIN(PIN_MIPIRX1P, "MIPIRX1P"),
234 PINCTRL_PIN(PIN_MIPIRX0N, "MIPIRX0N"),
235 PINCTRL_PIN(PIN_MIPIRX0P, "MIPIRX0P"),
236 PINCTRL_PIN(PIN_AUD_AINL_MIC, "AUD_AINL_MIC"),
237 };
238
239 static const struct cv1800_pin cv1800b_pin_data[ARRAY_SIZE(cv1800b_pins)] = {
240 CV1800_FUNC_PIN(PIN_AUD_AOUTR, VDD18A_AUD,
241 IO_TYPE_AUDIO,
242 CV1800_PINCONF_AREA_SYS, 0x12c, 6),
243 CV1800_GENERAL_PIN(PIN_SD0_CLK, VDDIO_SD0_SPI,
244 IO_TYPE_1V8_OR_3V3,
245 CV1800_PINCONF_AREA_SYS, 0x000, 7,
246 CV1800_PINCONF_AREA_SYS, 0xa00),
247 CV1800_GENERAL_PIN(PIN_SD0_CMD, VDDIO_SD0_SPI,
248 IO_TYPE_1V8_OR_3V3,
249 CV1800_PINCONF_AREA_SYS, 0x004, 7,
250 CV1800_PINCONF_AREA_SYS, 0xa04),
251 CV1800_GENERAL_PIN(PIN_SD0_D0, VDDIO_SD0_SPI,
252 IO_TYPE_1V8_OR_3V3,
253 CV1800_PINCONF_AREA_SYS, 0x008, 7,
254 CV1800_PINCONF_AREA_SYS, 0xa08),
255 CV1800_GENERAL_PIN(PIN_SD0_D1, VDDIO_SD0_SPI,
256 IO_TYPE_1V8_OR_3V3,
257 CV1800_PINCONF_AREA_SYS, 0x00c, 7,
258 CV1800_PINCONF_AREA_SYS, 0xa0c),
259 CV1800_GENERAL_PIN(PIN_SD0_D2, VDDIO_SD0_SPI,
260 IO_TYPE_1V8_OR_3V3,
261 CV1800_PINCONF_AREA_SYS, 0x010, 7,
262 CV1800_PINCONF_AREA_SYS, 0xa10),
263 CV1800_GENERAL_PIN(PIN_SD0_D3, VDDIO_SD0_SPI,
264 IO_TYPE_1V8_OR_3V3,
265 CV1800_PINCONF_AREA_SYS, 0x014, 7,
266 CV1800_PINCONF_AREA_SYS, 0xa14),
267 CV1800_GENERAL_PIN(PIN_SD0_CD, VDDIO_SD0_SPI,
268 IO_TYPE_1V8_OR_3V3,
269 CV1800_PINCONF_AREA_SYS, 0x018, 3,
270 CV1800_PINCONF_AREA_SYS, 0x900),
271 CV1800_GENERAL_PIN(PIN_SD0_PWR_EN, VDDIO_SD0_SPI,
272 IO_TYPE_1V8_OR_3V3,
273 CV1800_PINCONF_AREA_SYS, 0x01c, 3,
274 CV1800_PINCONF_AREA_SYS, 0x904),
275 CV1800_GENERAL_PIN(PIN_SPK_EN, VDDIO_SD0_SPI,
276 IO_TYPE_1V8_OR_3V3,
277 CV1800_PINCONF_AREA_SYS, 0x020, 3,
278 CV1800_PINCONF_AREA_SYS, 0x908),
279 CV1800_GENERAL_PIN(PIN_UART0_TX, VDDIO_SD0_SPI,
280 IO_TYPE_1V8_OR_3V3,
281 CV1800_PINCONF_AREA_SYS, 0x024, 7,
282 CV1800_PINCONF_AREA_SYS, 0x90c),
283 CV1800_GENERAL_PIN(PIN_UART0_RX, VDDIO_SD0_SPI,
284 IO_TYPE_1V8_OR_3V3,
285 CV1800_PINCONF_AREA_SYS, 0x028, 7,
286 CV1800_PINCONF_AREA_SYS, 0x910),
287 CV1800_GENERAL_PIN(PIN_SPINOR_HOLD_X, VDDIO_SD0_SPI,
288 IO_TYPE_1V8_OR_3V3,
289 CV1800_PINCONF_AREA_SYS, 0x02c, 3,
290 CV1800_PINCONF_AREA_SYS, 0x914),
291 CV1800_GENERAL_PIN(PIN_SPINOR_SCK, VDDIO_SD0_SPI,
292 IO_TYPE_1V8_OR_3V3,
293 CV1800_PINCONF_AREA_SYS, 0x030, 3,
294 CV1800_PINCONF_AREA_SYS, 0x918),
295 CV1800_GENERAL_PIN(PIN_SPINOR_MOSI, VDDIO_SD0_SPI,
296 IO_TYPE_1V8_OR_3V3,
297 CV1800_PINCONF_AREA_SYS, 0x034, 3,
298 CV1800_PINCONF_AREA_SYS, 0x91c),
299 CV1800_GENERAL_PIN(PIN_SPINOR_WP_X, VDDIO_SD0_SPI,
300 IO_TYPE_1V8_OR_3V3,
301 CV1800_PINCONF_AREA_SYS, 0x038, 3,
302 CV1800_PINCONF_AREA_SYS, 0x920),
303 CV1800_GENERAL_PIN(PIN_SPINOR_MISO, VDDIO_SD0_SPI,
304 IO_TYPE_1V8_OR_3V3,
305 CV1800_PINCONF_AREA_SYS, 0x03c, 3,
306 CV1800_PINCONF_AREA_SYS, 0x924),
307 CV1800_GENERAL_PIN(PIN_SPINOR_CS_X, VDDIO_SD0_SPI,
308 IO_TYPE_1V8_OR_3V3,
309 CV1800_PINCONF_AREA_SYS, 0x040, 3,
310 CV1800_PINCONF_AREA_SYS, 0x928),
311 CV1800_GENERAL_PIN(PIN_IIC0_SCL, VDDIO_SD0_SPI,
312 IO_TYPE_1V8_OR_3V3,
313 CV1800_PINCONF_AREA_SYS, 0x04c, 7,
314 CV1800_PINCONF_AREA_SYS, 0x934),
315 CV1800_GENERAL_PIN(PIN_IIC0_SDA, VDDIO_SD0_SPI,
316 IO_TYPE_1V8_OR_3V3,
317 CV1800_PINCONF_AREA_SYS, 0x050, 7,
318 CV1800_PINCONF_AREA_SYS, 0x938),
319 CV1800_GENERAL_PIN(PIN_AUX0, VDDIO_SD0_SPI,
320 IO_TYPE_1V8_OR_3V3,
321 CV1800_PINCONF_AREA_SYS, 0x054, 7,
322 CV1800_PINCONF_AREA_SYS, 0x93c),
323 CV1800_GENERAL_PIN(PIN_PWR_VBAT_DET, VDDIO_RTC,
324 IO_TYPE_1V8_ONLY,
325 CV1800_PINCONF_AREA_SYS, 0x05c, 0,
326 CV1800_PINCONF_AREA_RTC, 0x004),
327 CV1800_GENERAL_PIN(PIN_PWR_SEQ2, VDDIO_RTC,
328 IO_TYPE_1V8_ONLY,
329 CV1800_PINCONF_AREA_SYS, 0x068, 3,
330 CV1800_PINCONF_AREA_RTC, 0x010),
331 CV1800_GENERAL_PIN(PIN_XTAL_XIN, VDDIO_RTC,
332 IO_TYPE_1V8_ONLY,
333 CV1800_PINCONF_AREA_SYS, 0x074, 0,
334 CV1800_PINCONF_AREA_RTC, 0x020),
335 CV1800_GENERAL_PIN(PIN_SD1_GPIO0, VDD33A_ETH_USB_SD1,
336 IO_TYPE_1V8_OR_3V3,
337 CV1800_PINCONF_AREA_SYS, 0x088, 7,
338 CV1800_PINCONF_AREA_RTC, 0x034),
339 CV1800_GENERAL_PIN(PIN_SD1_GPIO1, VDD33A_ETH_USB_SD1,
340 IO_TYPE_1V8_OR_3V3,
341 CV1800_PINCONF_AREA_SYS, 0x084, 7,
342 CV1800_PINCONF_AREA_RTC, 0x030),
343 CV1800_GENERAL_PIN(PIN_SD1_D3, VDD33A_ETH_USB_SD1,
344 IO_TYPE_1V8_OR_3V3,
345 CV1800_PINCONF_AREA_SYS, 0x08c, 7,
346 CV1800_PINCONF_AREA_RTC, 0x038),
347 CV1800_GENERAL_PIN(PIN_SD1_D2, VDD33A_ETH_USB_SD1,
348 IO_TYPE_1V8_OR_3V3,
349 CV1800_PINCONF_AREA_SYS, 0x090, 7,
350 CV1800_PINCONF_AREA_RTC, 0x03c),
351 CV1800_GENERAL_PIN(PIN_SD1_D1, VDD33A_ETH_USB_SD1,
352 IO_TYPE_1V8_OR_3V3,
353 CV1800_PINCONF_AREA_SYS, 0x094, 7,
354 CV1800_PINCONF_AREA_RTC, 0x040),
355 CV1800_GENERAL_PIN(PIN_SD1_D0, VDD33A_ETH_USB_SD1,
356 IO_TYPE_1V8_OR_3V3,
357 CV1800_PINCONF_AREA_SYS, 0x098, 7,
358 CV1800_PINCONF_AREA_RTC, 0x044),
359 CV1800_GENERAL_PIN(PIN_SD1_CMD, VDD33A_ETH_USB_SD1,
360 IO_TYPE_1V8_OR_3V3,
361 CV1800_PINCONF_AREA_SYS, 0x09c, 7,
362 CV1800_PINCONF_AREA_RTC, 0x048),
363 CV1800_GENERAL_PIN(PIN_SD1_CLK, VDD33A_ETH_USB_SD1,
364 IO_TYPE_1V8_OR_3V3,
365 CV1800_PINCONF_AREA_SYS, 0x0a0, 7,
366 CV1800_PINCONF_AREA_RTC, 0x04c),
367 CV1800_GENERAL_PIN(PIN_ADC1, VDD18A_USB_PLL_ETH_CSI,
368 IO_TYPE_1V8_ONLY,
369 CV1800_PINCONF_AREA_SYS, 0x0a8, 6,
370 CV1800_PINCONF_AREA_SYS, 0x804),
371 CV1800_GENERAL_PIN(PIN_USB_VBUS_DET, VDD18A_USB_PLL_ETH_CSI,
372 IO_TYPE_1V8_ONLY,
373 CV1800_PINCONF_AREA_SYS, 0x0ac, 6,
374 CV1800_PINCONF_AREA_SYS, 0x808),
375 CV1800_FUNC_PIN(PIN_ETH_TXP, VDD18A_USB_PLL_ETH_CSI,
376 IO_TYPE_ETH,
377 CV1800_PINCONF_AREA_SYS, 0x0c0, 7),
378 CV1800_FUNC_PIN(PIN_ETH_TXM, VDD18A_USB_PLL_ETH_CSI,
379 IO_TYPE_ETH,
380 CV1800_PINCONF_AREA_SYS, 0x0c4, 7),
381 CV1800_FUNC_PIN(PIN_ETH_RXP, VDD18A_USB_PLL_ETH_CSI,
382 IO_TYPE_ETH,
383 CV1800_PINCONF_AREA_SYS, 0x0c8, 7),
384 CV1800_FUNC_PIN(PIN_ETH_RXM, VDD18A_USB_PLL_ETH_CSI,
385 IO_TYPE_ETH,
386 CV1800_PINCONF_AREA_SYS, 0x0cc, 7),
387 CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX4N, VDD18A_USB_PLL_ETH_CSI,
388 IO_TYPE_1V8_ONLY,
389 CV1800_PINCONF_AREA_SYS, 0x0d4, 7,
390 CV1800_PINCONF_AREA_SYS, 0x0bc, 7,
391 CV1800_PINCONF_AREA_SYS, 0xc04),
392 CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX4P, VDD18A_USB_PLL_ETH_CSI,
393 IO_TYPE_1V8_ONLY,
394 CV1800_PINCONF_AREA_SYS, 0x0d8, 7,
395 CV1800_PINCONF_AREA_SYS, 0x0b8, 7,
396 CV1800_PINCONF_AREA_SYS, 0xc08),
397 CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX3N, VDD18A_USB_PLL_ETH_CSI,
398 IO_TYPE_1V8_ONLY,
399 CV1800_PINCONF_AREA_SYS, 0x0dc, 7,
400 CV1800_PINCONF_AREA_SYS, 0x0b0, 7,
401 CV1800_PINCONF_AREA_SYS, 0xc0c),
402 CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX3P, VDD18A_USB_PLL_ETH_CSI,
403 IO_TYPE_1V8_ONLY,
404 CV1800_PINCONF_AREA_SYS, 0x0e0, 7,
405 CV1800_PINCONF_AREA_SYS, 0x0b4, 7,
406 CV1800_PINCONF_AREA_SYS, 0xc10),
407 CV1800_GENERAL_PIN(PIN_MIPIRX2N, VDD18A_USB_PLL_ETH_CSI,
408 IO_TYPE_1V8_ONLY,
409 CV1800_PINCONF_AREA_SYS, 0x0e4, 7,
410 CV1800_PINCONF_AREA_SYS, 0xc14),
411 CV1800_GENERAL_PIN(PIN_MIPIRX2P, VDD18A_USB_PLL_ETH_CSI,
412 IO_TYPE_1V8_ONLY,
413 CV1800_PINCONF_AREA_SYS, 0x0e8, 7,
414 CV1800_PINCONF_AREA_SYS, 0xc18),
415 CV1800_GENERAL_PIN(PIN_MIPIRX1N, VDD18A_USB_PLL_ETH_CSI,
416 IO_TYPE_1V8_ONLY,
417 CV1800_PINCONF_AREA_SYS, 0x0ec, 7,
418 CV1800_PINCONF_AREA_SYS, 0xc1c),
419 CV1800_GENERAL_PIN(PIN_MIPIRX1P, VDD18A_USB_PLL_ETH_CSI,
420 IO_TYPE_1V8_ONLY,
421 CV1800_PINCONF_AREA_SYS, 0x0f0, 7,
422 CV1800_PINCONF_AREA_SYS, 0xc20),
423 CV1800_GENERAL_PIN(PIN_MIPIRX0N, VDD18A_USB_PLL_ETH_CSI,
424 IO_TYPE_1V8_ONLY,
425 CV1800_PINCONF_AREA_SYS, 0x0f4, 7,
426 CV1800_PINCONF_AREA_SYS, 0xc24),
427 CV1800_GENERAL_PIN(PIN_MIPIRX0P, VDD18A_USB_PLL_ETH_CSI,
428 IO_TYPE_1V8_ONLY,
429 CV1800_PINCONF_AREA_SYS, 0x0f8, 7,
430 CV1800_PINCONF_AREA_SYS, 0xc28),
431 CV1800_FUNC_PIN(PIN_AUD_AINL_MIC, VDD18A_AUD,
432 IO_TYPE_AUDIO,
433 CV1800_PINCONF_AREA_SYS, 0x120, 5),
434 };
435
436 static const struct cv1800_pinctrl_data cv1800b_pindata = {
437 .pins = cv1800b_pins,
438 .pindata = cv1800b_pin_data,
439 .pdnames = cv1800b_power_domain_desc,
440 .vddio_ops = &cv1800b_vddio_cfg_ops,
441 .npins = ARRAY_SIZE(cv1800b_pins),
442 .npd = ARRAY_SIZE(cv1800b_power_domain_desc),
443 };
444
445 static const struct of_device_id cv1800b_pinctrl_ids[] = {
446 { .compatible = "sophgo,cv1800b-pinctrl", .data = &cv1800b_pindata },
447 { }
448 };
449 MODULE_DEVICE_TABLE(of, cv1800b_pinctrl_ids);
450
451 static struct platform_driver cv1800b_pinctrl_driver = {
452 .probe = cv1800_pinctrl_probe,
453 .driver = {
454 .name = "cv1800b-pinctrl",
455 .suppress_bind_attrs = true,
456 .of_match_table = cv1800b_pinctrl_ids,
457 },
458 };
459 module_platform_driver(cv1800b_pinctrl_driver);
460
461 MODULE_DESCRIPTION("Pinctrl driver for the CV1800B series SoC");
462 MODULE_LICENSE("GPL");
463