1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/conf.h>
30 #include <sys/bus.h>
31 #include <sys/kernel.h>
32 #include <sys/module.h>
33 #include <sys/systm.h>
34 #include <sys/libkern.h>
35 #include <sys/types.h>
36 #include <sys/malloc.h>
37
38 #include <machine/bus.h>
39 #include <dev/fdt/simplebus.h>
40
41 #include <dev/clk/clk_mux.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
44
45 #include "clock_common.h"
46
47 #if 0
48 #define DPRINTF(dev, msg...) device_printf(dev, msg)
49 #else
50 #define DPRINTF(dev, msg...)
51 #endif
52
53 void
read_clock_cells(device_t dev,struct clock_cell_info * clk)54 read_clock_cells(device_t dev, struct clock_cell_info *clk) {
55 ssize_t numbytes_clocks;
56 phandle_t node, parent, *cells;
57 int index, ncells, rv;
58
59 node = ofw_bus_get_node(dev);
60
61 /* Get names of parent clocks */
62 numbytes_clocks = OF_getproplen(node, "clocks");
63 clk->num_clock_cells = numbytes_clocks / sizeof(cell_t);
64
65 /* Allocate space and get clock cells content */
66 /* clock_cells / clock_cells_ncells will be freed in
67 * find_parent_clock_names()
68 */
69 clk->clock_cells = malloc(numbytes_clocks, M_DEVBUF, M_WAITOK|M_ZERO);
70 clk->clock_cells_ncells = malloc(clk->num_clock_cells*sizeof(uint8_t),
71 M_DEVBUF, M_WAITOK|M_ZERO);
72 OF_getencprop(node, "clocks", clk->clock_cells, numbytes_clocks);
73
74 /* Count number of clocks */
75 clk->num_real_clocks = 0;
76 for (index = 0; index < clk->num_clock_cells; index++) {
77 rv = ofw_bus_parse_xref_list_alloc(node, "clocks", "#clock-cells",
78 clk->num_real_clocks, &parent, &ncells, &cells);
79 if (rv != 0)
80 continue;
81
82 if (cells != NULL)
83 OF_prop_free(cells);
84
85 clk->clock_cells_ncells[index] = ncells;
86 index += ncells;
87 clk->num_real_clocks++;
88 }
89 }
90
91 int
find_parent_clock_names(device_t dev,struct clock_cell_info * clk,struct clknode_init_def * def)92 find_parent_clock_names(device_t dev, struct clock_cell_info *clk, struct clknode_init_def *def) {
93 int index, clock_index, err;
94 bool found_all = true;
95 clk_t parent;
96
97 /* Figure out names */
98 for (index = 0, clock_index = 0; index < clk->num_clock_cells; index++) {
99 /* Get name of parent clock */
100 err = clk_get_by_ofw_index(dev, 0, clock_index, &parent);
101 if (err != 0) {
102 clock_index++;
103 found_all = false;
104 DPRINTF(dev, "Failed to find clock_cells[%d]=0x%x\n",
105 index, clk->clock_cells[index]);
106
107 index += clk->clock_cells_ncells[index];
108 continue;
109 }
110
111 def->parent_names[clock_index] = clk_get_name(parent);
112 clk_release(parent);
113
114 DPRINTF(dev, "Found parent clock[%d/%d]: %s\n",
115 clock_index, clk->num_real_clocks,
116 def->parent_names[clock_index]);
117
118 clock_index++;
119 index += clk->clock_cells_ncells[index];
120 }
121
122 if (!found_all) {
123 return 1;
124 }
125
126 free(clk->clock_cells, M_DEVBUF);
127 free(clk->clock_cells_ncells, M_DEVBUF);
128 return 0;
129 }
130
131 void
create_clkdef(device_t dev,struct clock_cell_info * clk,struct clknode_init_def * def)132 create_clkdef(device_t dev, struct clock_cell_info *clk, struct clknode_init_def *def) {
133 def->id = 1;
134
135 clk_parse_ofw_clk_name(dev, ofw_bus_get_node(dev), &def->name);
136
137 DPRINTF(dev, "node name: %s\n", def->name);
138
139 def->parent_cnt = clk->num_real_clocks;
140 def->parent_names = malloc(clk->num_real_clocks*sizeof(char *),
141 M_OFWPROP, M_WAITOK);
142 }
143 void
free_clkdef(struct clknode_init_def * def)144 free_clkdef(struct clknode_init_def *def) {
145 OF_prop_free(__DECONST(char *, def->name));
146 OF_prop_free(def->parent_names);
147 }
148