1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/PPCFixupKinds.h"
10 #include "MCTargetDesc/PPCMCAsmInfo.h"
11 #include "MCTargetDesc/PPCMCTargetDesc.h"
12 #include "llvm/BinaryFormat/ELF.h"
13 #include "llvm/BinaryFormat/MachO.h"
14 #include "llvm/MC/MCAsmBackend.h"
15 #include "llvm/MC/MCAssembler.h"
16 #include "llvm/MC/MCELFObjectWriter.h"
17 #include "llvm/MC/MCMachObjectWriter.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSubtargetInfo.h"
20 #include "llvm/MC/MCSymbolELF.h"
21 #include "llvm/MC/MCSymbolXCOFF.h"
22 #include "llvm/MC/MCValue.h"
23 #include "llvm/MC/TargetRegistry.h"
24 #include "llvm/Support/ErrorHandling.h"
25 using namespace llvm;
26
adjustFixupValue(unsigned Kind,uint64_t Value)27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
28 switch (Kind) {
29 default:
30 llvm_unreachable("Unknown fixup kind!");
31 case FK_Data_1:
32 case FK_Data_2:
33 case FK_Data_4:
34 case FK_Data_8:
35 case PPC::fixup_ppc_nofixup:
36 return Value;
37 case PPC::fixup_ppc_brcond14:
38 case PPC::fixup_ppc_brcond14abs:
39 return Value & 0xfffc;
40 case PPC::fixup_ppc_br24:
41 case PPC::fixup_ppc_br24abs:
42 case PPC::fixup_ppc_br24_notoc:
43 return Value & 0x3fffffc;
44 case PPC::fixup_ppc_half16:
45 return Value & 0xffff;
46 case PPC::fixup_ppc_half16ds:
47 case PPC::fixup_ppc_half16dq:
48 return Value & 0xfffc;
49 case PPC::fixup_ppc_pcrel34:
50 case PPC::fixup_ppc_imm34:
51 return Value & 0x3ffffffff;
52 }
53 }
54
getFixupKindNumBytes(unsigned Kind)55 static unsigned getFixupKindNumBytes(unsigned Kind) {
56 switch (Kind) {
57 default:
58 llvm_unreachable("Unknown fixup kind!");
59 case FK_Data_1:
60 return 1;
61 case FK_Data_2:
62 case PPC::fixup_ppc_half16:
63 case PPC::fixup_ppc_half16ds:
64 case PPC::fixup_ppc_half16dq:
65 return 2;
66 case FK_Data_4:
67 case PPC::fixup_ppc_brcond14:
68 case PPC::fixup_ppc_brcond14abs:
69 case PPC::fixup_ppc_br24:
70 case PPC::fixup_ppc_br24abs:
71 case PPC::fixup_ppc_br24_notoc:
72 return 4;
73 case PPC::fixup_ppc_pcrel34:
74 case PPC::fixup_ppc_imm34:
75 case FK_Data_8:
76 return 8;
77 case PPC::fixup_ppc_nofixup:
78 return 0;
79 }
80 }
81
82 namespace {
83
84 class PPCAsmBackend : public MCAsmBackend {
85 protected:
86 Triple TT;
87 public:
PPCAsmBackend(const Target & T,const Triple & TT)88 PPCAsmBackend(const Target &T, const Triple &TT)
89 : MCAsmBackend(TT.isLittleEndian() ? llvm::endianness::little
90 : llvm::endianness::big),
91 TT(TT) {}
92
93 MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
94
95 void applyFixup(const MCFragment &, const MCFixup &Fixup,
96 const MCValue &Target, MutableArrayRef<char> Data,
97 uint64_t Value, bool IsResolved) override;
98
shouldForceRelocation(const MCFixup & Fixup,const MCValue & Target)99 bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target) {
100 // If there is a @ specifier, unless it is optimized out (e.g. constant @l),
101 // force a relocation.
102 if (Target.getSpecifier())
103 return true;
104 MCFixupKind Kind = Fixup.getKind();
105 switch ((unsigned)Kind) {
106 default:
107 return false;
108 case PPC::fixup_ppc_br24:
109 case PPC::fixup_ppc_br24abs:
110 case PPC::fixup_ppc_br24_notoc:
111 // If the target symbol has a local entry point we must not attempt
112 // to resolve the fixup directly. Emit a relocation and leave
113 // resolution of the final target address to the linker.
114 if (const auto *A = Target.getAddSym()) {
115 if (const auto *S = dyn_cast<MCSymbolELF>(A)) {
116 // The "other" values are stored in the last 6 bits of the second
117 // byte. The traditional defines for STO values assume the full byte
118 // and thus the shift to pack it.
119 unsigned Other = S->getOther() << 2;
120 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0)
121 return true;
122 } else if (const auto *S = dyn_cast<MCSymbolXCOFF>(A)) {
123 return !Target.isAbsolute() && S->isExternal() &&
124 S->getStorageClass() == XCOFF::C_WEAKEXT;
125 }
126 }
127 return false;
128 }
129 }
130
writeNopData(raw_ostream & OS,uint64_t Count,const MCSubtargetInfo * STI) const131 bool writeNopData(raw_ostream &OS, uint64_t Count,
132 const MCSubtargetInfo *STI) const override {
133 uint64_t NumNops = Count / 4;
134 for (uint64_t i = 0; i != NumNops; ++i)
135 support::endian::write<uint32_t>(OS, 0x60000000, Endian);
136
137 OS.write_zeros(Count % 4);
138
139 return true;
140 }
141 };
142 } // end anonymous namespace
143
getFixupKindInfo(MCFixupKind Kind) const144 MCFixupKindInfo PPCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
145 // clang-format off
146 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
147 // name offset bits flags
148 {"fixup_ppc_br24", 6, 24, 0},
149 {"fixup_ppc_br24_notoc", 6, 24, 0},
150 {"fixup_ppc_brcond14", 16, 14, 0},
151 {"fixup_ppc_br24abs", 6, 24, 0},
152 {"fixup_ppc_brcond14abs", 16, 14, 0},
153 {"fixup_ppc_half16", 0, 16, 0},
154 {"fixup_ppc_half16ds", 0, 14, 0},
155 {"fixup_ppc_pcrel34", 0, 34, 0},
156 {"fixup_ppc_imm34", 0, 34, 0},
157 {"fixup_ppc_nofixup", 0, 0, 0}};
158 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
159 // name offset bits flags
160 {"fixup_ppc_br24", 2, 24, 0},
161 {"fixup_ppc_br24_notoc", 2, 24, 0},
162 {"fixup_ppc_brcond14", 2, 14, 0},
163 {"fixup_ppc_br24abs", 2, 24, 0},
164 {"fixup_ppc_brcond14abs", 2, 14, 0},
165 {"fixup_ppc_half16", 0, 16, 0},
166 {"fixup_ppc_half16ds", 2, 14, 0},
167 {"fixup_ppc_pcrel34", 0, 34, 0},
168 {"fixup_ppc_imm34", 0, 34, 0},
169 {"fixup_ppc_nofixup", 0, 0, 0}};
170 // clang-format on
171
172 // Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They
173 // do not require any extra processing.
174 if (mc::isRelocation(Kind))
175 return {};
176
177 if (Kind < FirstTargetFixupKind)
178 return MCAsmBackend::getFixupKindInfo(Kind);
179
180 assert(Kind - FirstTargetFixupKind < PPC::NumTargetFixupKinds &&
181 "Invalid kind!");
182 return (Endian == llvm::endianness::little
183 ? InfosLE
184 : InfosBE)[Kind - FirstTargetFixupKind];
185 }
186
applyFixup(const MCFragment & F,const MCFixup & Fixup,const MCValue & TargetVal,MutableArrayRef<char> Data,uint64_t Value,bool IsResolved)187 void PPCAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
188 const MCValue &TargetVal,
189 MutableArrayRef<char> Data, uint64_t Value,
190 bool IsResolved) {
191 // In PPC64 ELFv1, .quad .TOC.@tocbase in the .opd section is expected to
192 // reference the null symbol.
193 auto Target = TargetVal;
194 if (Target.getSpecifier() == PPC::S_TOCBASE)
195 Target.setAddSym(nullptr);
196 if (IsResolved && shouldForceRelocation(Fixup, Target))
197 IsResolved = false;
198 if (!IsResolved)
199 Asm->getWriter().recordRelocation(F, Fixup, Target, Value);
200
201 MCFixupKind Kind = Fixup.getKind();
202 if (mc::isRelocation(Kind))
203 return;
204 Value = adjustFixupValue(Kind, Value);
205 if (!Value)
206 return; // Doesn't change encoding.
207
208 unsigned Offset = Fixup.getOffset();
209 unsigned NumBytes = getFixupKindNumBytes(Kind);
210
211 // For each byte of the fragment that the fixup touches, mask in the bits
212 // from the fixup value. The Value has been "split up" into the appropriate
213 // bitfields above.
214 for (unsigned i = 0; i != NumBytes; ++i) {
215 unsigned Idx = Endian == llvm::endianness::little ? i : (NumBytes - 1 - i);
216 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
217 }
218 }
219
220 // FIXME: This should be in a separate file.
221 namespace {
222
223 class ELFPPCAsmBackend : public PPCAsmBackend {
224 public:
ELFPPCAsmBackend(const Target & T,const Triple & TT)225 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
226
227 std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const228 createObjectTargetWriter() const override {
229 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
230 bool Is64 = TT.isPPC64();
231 return createPPCELFObjectWriter(Is64, OSABI);
232 }
233
234 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
235 };
236
237 class XCOFFPPCAsmBackend : public PPCAsmBackend {
238 public:
XCOFFPPCAsmBackend(const Target & T,const Triple & TT)239 XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
240 : PPCAsmBackend(T, TT) {}
241
242 std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const243 createObjectTargetWriter() const override {
244 return createPPCXCOFFObjectWriter(TT.isArch64Bit());
245 }
246
247 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
248 };
249
250 } // end anonymous namespace
251
252 std::optional<MCFixupKind>
getFixupKind(StringRef Name) const253 ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
254 if (TT.isOSBinFormatELF()) {
255 unsigned Type;
256 if (TT.isPPC64()) {
257 Type = llvm::StringSwitch<unsigned>(Name)
258 #define ELF_RELOC(X, Y) .Case(#X, Y)
259 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
260 #undef ELF_RELOC
261 .Case("BFD_RELOC_NONE", ELF::R_PPC64_NONE)
262 .Case("BFD_RELOC_16", ELF::R_PPC64_ADDR16)
263 .Case("BFD_RELOC_32", ELF::R_PPC64_ADDR32)
264 .Case("BFD_RELOC_64", ELF::R_PPC64_ADDR64)
265 .Default(-1u);
266 } else {
267 Type = llvm::StringSwitch<unsigned>(Name)
268 #define ELF_RELOC(X, Y) .Case(#X, Y)
269 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
270 #undef ELF_RELOC
271 .Case("BFD_RELOC_NONE", ELF::R_PPC_NONE)
272 .Case("BFD_RELOC_16", ELF::R_PPC_ADDR16)
273 .Case("BFD_RELOC_32", ELF::R_PPC_ADDR32)
274 .Default(-1u);
275 }
276 if (Type != -1u)
277 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
278 }
279 return std::nullopt;
280 }
281
282 std::optional<MCFixupKind>
getFixupKind(StringRef Name) const283 XCOFFPPCAsmBackend::getFixupKind(StringRef Name) const {
284 return StringSwitch<std::optional<MCFixupKind>>(Name)
285 .Case("R_REF", PPC::fixup_ppc_nofixup)
286 .Default(std::nullopt);
287 }
288
createPPCAsmBackend(const Target & T,const MCSubtargetInfo & STI,const MCRegisterInfo & MRI,const MCTargetOptions & Options)289 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
290 const MCSubtargetInfo &STI,
291 const MCRegisterInfo &MRI,
292 const MCTargetOptions &Options) {
293 const Triple &TT = STI.getTargetTriple();
294 if (TT.isOSBinFormatXCOFF())
295 return new XCOFFPPCAsmBackend(T, TT);
296
297 return new ELFPPCAsmBackend(T, TT);
298 }
299