1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H
3 #define ARCH_X86_KVM_REVERSE_CPUID_H
4
5 #include <uapi/asm/kvm.h>
6 #include <asm/cpufeature.h>
7 #include <asm/cpufeatures.h>
8
9 /*
10 * Define a KVM-only feature flag.
11 *
12 * For features that are scattered by cpufeatures.h, __feature_translate() also
13 * needs to be updated to translate the kernel-defined feature into the
14 * KVM-defined feature.
15 *
16 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h,
17 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so
18 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is
19 * needed in this case.
20 */
21 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f))
22
23 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
24 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0)
25 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1)
26 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11)
27
28 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
29 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
30 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
31 #define X86_FEATURE_AMX_COMPLEX KVM_X86_FEATURE(CPUID_7_1_EDX, 8)
32 #define X86_FEATURE_AVX_VNNI_INT16 KVM_X86_FEATURE(CPUID_7_1_EDX, 10)
33 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
34 #define X86_FEATURE_AVX10 KVM_X86_FEATURE(CPUID_7_1_EDX, 19)
35
36 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */
37 #define X86_FEATURE_INTEL_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0)
38 #define X86_FEATURE_IPRED_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 1)
39 #define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2)
40 #define X86_FEATURE_DDPD_U KVM_X86_FEATURE(CPUID_7_2_EDX, 3)
41 #define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4)
42 #define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5)
43
44 /* Intel-defined sub-features, CPUID level 0x00000024:0 (EBX) */
45 #define X86_FEATURE_AVX10_128 KVM_X86_FEATURE(CPUID_24_0_EBX, 16)
46 #define X86_FEATURE_AVX10_256 KVM_X86_FEATURE(CPUID_24_0_EBX, 17)
47 #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18)
48
49 /* CPUID level 0x80000007 (EDX). */
50 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8)
51
52 /* CPUID level 0x80000022 (EAX) */
53 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
54
55 /* CPUID level 0x80000021 (ECX) */
56 #define KVM_X86_FEATURE_TSA_SQ_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
57 #define KVM_X86_FEATURE_TSA_L1_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
58
59 struct cpuid_reg {
60 u32 function;
61 u32 index;
62 int reg;
63 };
64
65 static const struct cpuid_reg reverse_cpuid[] = {
66 [CPUID_1_EDX] = { 1, 0, CPUID_EDX},
67 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
68 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
69 [CPUID_1_ECX] = { 1, 0, CPUID_ECX},
70 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
71 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
72 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX},
73 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX},
74 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
75 [CPUID_6_EAX] = { 6, 0, CPUID_EAX},
76 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
77 [CPUID_7_ECX] = { 7, 0, CPUID_ECX},
78 [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX},
79 [CPUID_7_EDX] = { 7, 0, CPUID_EDX},
80 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX},
81 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX},
82 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
83 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX},
84 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX},
85 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
86 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
87 [CPUID_7_2_EDX] = { 7, 2, CPUID_EDX},
88 [CPUID_24_0_EBX] = { 0x24, 0, CPUID_EBX},
89 [CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
90 };
91
92 /*
93 * Reverse CPUID and its derivatives can only be used for hardware-defined
94 * feature words, i.e. words whose bits directly correspond to a CPUID leaf.
95 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word
96 * is nonsensical as the bit number/mask is an arbitrary software-defined value
97 * and can't be used by KVM to query/control guest capabilities. And obviously
98 * the leaf being queried must have an entry in the lookup table.
99 */
reverse_cpuid_check(unsigned int x86_leaf)100 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
101 {
102 BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS);
103 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
104 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
105 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
106 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
107 BUILD_BUG_ON(x86_leaf == CPUID_LNX_5);
108 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
109 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
110 }
111
112 /*
113 * Translate feature bits that are scattered in the kernel's cpufeatures word
114 * into KVM feature words that align with hardware's definitions.
115 */
__feature_translate(int x86_feature)116 static __always_inline u32 __feature_translate(int x86_feature)
117 {
118 #define KVM_X86_TRANSLATE_FEATURE(f) \
119 case X86_FEATURE_##f: return KVM_X86_FEATURE_##f
120
121 switch (x86_feature) {
122 KVM_X86_TRANSLATE_FEATURE(SGX1);
123 KVM_X86_TRANSLATE_FEATURE(SGX2);
124 KVM_X86_TRANSLATE_FEATURE(SGX_EDECCSSA);
125 KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC);
126 KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
127 KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
128 KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
129 KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
130 KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
131 default:
132 return x86_feature;
133 }
134 }
135
__feature_leaf(int x86_feature)136 static __always_inline u32 __feature_leaf(int x86_feature)
137 {
138 u32 x86_leaf = __feature_translate(x86_feature) / 32;
139
140 reverse_cpuid_check(x86_leaf);
141 return x86_leaf;
142 }
143
144 /*
145 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain
146 * the hardware defined bit number (stored in bits 4:0) and a software defined
147 * "word" (stored in bits 31:5). The word is used to index into arrays of
148 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
149 */
__feature_bit(int x86_feature)150 static __always_inline u32 __feature_bit(int x86_feature)
151 {
152 x86_feature = __feature_translate(x86_feature);
153
154 reverse_cpuid_check(x86_feature / 32);
155 return 1 << (x86_feature & 31);
156 }
157
158 #define feature_bit(name) __feature_bit(X86_FEATURE_##name)
159
x86_feature_cpuid(unsigned int x86_feature)160 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
161 {
162 unsigned int x86_leaf = __feature_leaf(x86_feature);
163
164 return reverse_cpuid[x86_leaf];
165 }
166
__cpuid_entry_get_reg(struct kvm_cpuid_entry2 * entry,u32 reg)167 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
168 u32 reg)
169 {
170 switch (reg) {
171 case CPUID_EAX:
172 return &entry->eax;
173 case CPUID_EBX:
174 return &entry->ebx;
175 case CPUID_ECX:
176 return &entry->ecx;
177 case CPUID_EDX:
178 return &entry->edx;
179 default:
180 BUILD_BUG();
181 return NULL;
182 }
183 }
184
cpuid_entry_get_reg(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)185 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
186 unsigned int x86_feature)
187 {
188 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
189
190 return __cpuid_entry_get_reg(entry, cpuid.reg);
191 }
192
cpuid_entry_get(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)193 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
194 unsigned int x86_feature)
195 {
196 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
197
198 return *reg & __feature_bit(x86_feature);
199 }
200
cpuid_entry_has(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)201 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
202 unsigned int x86_feature)
203 {
204 return cpuid_entry_get(entry, x86_feature);
205 }
206
cpuid_entry_clear(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)207 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
208 unsigned int x86_feature)
209 {
210 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
211
212 *reg &= ~__feature_bit(x86_feature);
213 }
214
cpuid_entry_set(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)215 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
216 unsigned int x86_feature)
217 {
218 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
219
220 *reg |= __feature_bit(x86_feature);
221 }
222
cpuid_entry_change(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature,bool set)223 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
224 unsigned int x86_feature,
225 bool set)
226 {
227 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
228
229 /*
230 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the
231 * compiler into using CMOV instead of Jcc when possible.
232 */
233 if (set)
234 *reg |= __feature_bit(x86_feature);
235 else
236 *reg &= ~__feature_bit(x86_feature);
237 }
238
239 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */
240