1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2010-2013 Alexander Motin <mav@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 /*
31 * Common routines to manage event timers hardware.
32 */
33
34 #include "opt_device_polling.h"
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/epoch.h>
40 #include <sys/limits.h>
41 #include <sys/lock.h>
42 #include <sys/kdb.h>
43 #include <sys/ktr.h>
44 #include <sys/mutex.h>
45 #include <sys/proc.h>
46 #include <sys/kernel.h>
47 #include <sys/sched.h>
48 #include <sys/smp.h>
49 #include <sys/sysctl.h>
50 #include <sys/timeet.h>
51 #include <sys/timetc.h>
52
53 #include <machine/atomic.h>
54 #include <machine/clock.h>
55 #include <machine/cpu.h>
56 #include <machine/smp.h>
57
58 int cpu_disable_c2_sleep = 0; /* Timer dies in C2. */
59 int cpu_disable_c3_sleep = 0; /* Timer dies in C3. */
60
61 static void setuptimer(void);
62 static void loadtimer(sbintime_t now, int first);
63 static int doconfigtimer(void);
64 static void configtimer(int start);
65 static int round_freq(struct eventtimer *et, int freq);
66
67 struct pcpu_state;
68 static sbintime_t getnextcpuevent(struct pcpu_state *state, int idle);
69 static sbintime_t getnextevent(struct pcpu_state *state);
70 static int handleevents(sbintime_t now, int fake);
71
72 static struct mtx et_hw_mtx;
73
74 #define ET_HW_LOCK(state) \
75 { \
76 if (timer->et_flags & ET_FLAGS_PERCPU) \
77 mtx_lock_spin(&(state)->et_hw_mtx); \
78 else \
79 mtx_lock_spin(&et_hw_mtx); \
80 }
81
82 #define ET_HW_UNLOCK(state) \
83 { \
84 if (timer->et_flags & ET_FLAGS_PERCPU) \
85 mtx_unlock_spin(&(state)->et_hw_mtx); \
86 else \
87 mtx_unlock_spin(&et_hw_mtx); \
88 }
89
90 static struct eventtimer *timer = NULL;
91 static sbintime_t timerperiod; /* Timer period for periodic mode. */
92 static sbintime_t statperiod; /* statclock() events period. */
93 static sbintime_t profperiod; /* profclock() events period. */
94 static sbintime_t nexttick; /* Next global timer tick time. */
95 static u_int busy = 1; /* Reconfiguration is in progress. */
96 static int profiling; /* Profiling events enabled. */
97
98 static char timername[32]; /* Wanted timer. */
99 TUNABLE_STR("kern.eventtimer.timer", timername, sizeof(timername));
100
101 static int singlemul; /* Multiplier for periodic mode. */
102 SYSCTL_INT(_kern_eventtimer, OID_AUTO, singlemul, CTLFLAG_RWTUN, &singlemul,
103 0, "Multiplier for periodic mode");
104
105 static u_int idletick; /* Run periodic events when idle. */
106 SYSCTL_UINT(_kern_eventtimer, OID_AUTO, idletick, CTLFLAG_RWTUN, &idletick,
107 0, "Run periodic events when idle");
108
109 static int periodic; /* Periodic or one-shot mode. */
110 static int want_periodic; /* What mode to prefer. */
111 TUNABLE_INT("kern.eventtimer.periodic", &want_periodic);
112
113 struct pcpu_state {
114 struct mtx et_hw_mtx; /* Per-CPU timer mutex. */
115 u_int action; /* Reconfiguration requests. */
116 u_int handle; /* Immediate handle resuests. */
117 sbintime_t now; /* Last tick time. */
118 sbintime_t nextevent; /* Next scheduled event on this CPU. */
119 sbintime_t nexttick; /* Next timer tick time. */
120 sbintime_t nexthard; /* Next hardclock() event. */
121 sbintime_t nextstat; /* Next statclock() event. */
122 sbintime_t nextprof; /* Next profclock() event. */
123 sbintime_t nextcall; /* Next callout event. */
124 sbintime_t nextcallopt; /* Next optional callout event. */
125 int ipi; /* This CPU needs IPI. */
126 int idle; /* This CPU is in idle mode. */
127 };
128
129 DPCPU_DEFINE_STATIC(struct pcpu_state, timerstate);
130 DPCPU_DEFINE(sbintime_t, hardclocktime);
131
132 /*
133 * Timer broadcast IPI handler.
134 */
135 int
hardclockintr(void)136 hardclockintr(void)
137 {
138 sbintime_t now;
139 struct pcpu_state *state;
140 int done;
141
142 if (doconfigtimer() || busy)
143 return (FILTER_HANDLED);
144 state = DPCPU_PTR(timerstate);
145 now = state->now;
146 CTR2(KTR_SPARE2, "ipi: now %d.%08x",
147 (int)(now >> 32), (u_int)(now & 0xffffffff));
148 done = handleevents(now, 0);
149 return (done ? FILTER_HANDLED : FILTER_STRAY);
150 }
151
152 /*
153 * Handle all events for specified time on this CPU
154 */
155 static int
handleevents(sbintime_t now,int fake)156 handleevents(sbintime_t now, int fake)
157 {
158 sbintime_t t, *hct;
159 struct trapframe *frame;
160 struct pcpu_state *state;
161 int usermode;
162 int done, runs;
163
164 CTR2(KTR_SPARE2, "handle: now %d.%08x",
165 (int)(now >> 32), (u_int)(now & 0xffffffff));
166 done = 0;
167 if (fake) {
168 frame = NULL;
169 usermode = 0;
170 } else {
171 frame = curthread->td_intr_frame;
172 usermode = TRAPF_USERMODE(frame);
173 }
174
175 state = DPCPU_PTR(timerstate);
176
177 runs = 0;
178 while (now >= state->nexthard) {
179 state->nexthard += tick_sbt;
180 runs++;
181 }
182 if (runs) {
183 hct = DPCPU_PTR(hardclocktime);
184 *hct = state->nexthard - tick_sbt;
185 if (fake < 2) {
186 hardclock(runs, usermode);
187 done = 1;
188 }
189 }
190 runs = 0;
191 while (now >= state->nextstat) {
192 state->nextstat += statperiod;
193 runs++;
194 }
195 if (runs && fake < 2) {
196 statclock(runs, usermode);
197 done = 1;
198 }
199 if (profiling) {
200 runs = 0;
201 while (now >= state->nextprof) {
202 state->nextprof += profperiod;
203 runs++;
204 }
205 if (runs && !fake) {
206 profclock(runs, usermode, TRAPF_PC(frame));
207 done = 1;
208 }
209 } else
210 state->nextprof = state->nextstat;
211 if (now >= state->nextcallopt || now >= state->nextcall) {
212 state->nextcall = state->nextcallopt = SBT_MAX;
213 callout_process(now);
214 }
215
216 ET_HW_LOCK(state);
217 t = getnextcpuevent(state, 0);
218 if (!busy) {
219 state->idle = 0;
220 state->nextevent = t;
221 loadtimer(now, (fake == 2) &&
222 (timer->et_flags & ET_FLAGS_PERCPU));
223 }
224 ET_HW_UNLOCK(state);
225 return (done);
226 }
227
228 /*
229 * Schedule binuptime of the next event on current CPU.
230 */
231 static sbintime_t
getnextcpuevent(struct pcpu_state * state,int idle)232 getnextcpuevent(struct pcpu_state *state, int idle)
233 {
234 sbintime_t event;
235 u_int hardfreq;
236
237 /* Handle hardclock() events, skipping some if CPU is idle. */
238 event = state->nexthard;
239 if (idle && DPCPU_GET(epoch_cb_count) == 0) {
240 if (tc_min_ticktock_freq > 1
241 #ifdef SMP
242 && curcpu == CPU_FIRST()
243 #endif
244 )
245 hardfreq = hz / tc_min_ticktock_freq;
246 else
247 hardfreq = hz;
248 if (hardfreq > 1)
249 event += tick_sbt * (hardfreq - 1);
250 }
251 /* Handle callout events. */
252 if (event > state->nextcall)
253 event = state->nextcall;
254 if (!idle) { /* If CPU is active - handle other types of events. */
255 if (event > state->nextstat)
256 event = state->nextstat;
257 if (profiling && event > state->nextprof)
258 event = state->nextprof;
259 }
260 return (event);
261 }
262
263 /*
264 * Schedule binuptime of the next event on all CPUs.
265 */
266 static sbintime_t
getnextevent(struct pcpu_state * state)267 getnextevent(struct pcpu_state *state)
268 {
269 sbintime_t event;
270 #ifdef SMP
271 int cpu;
272 #endif
273 #ifdef KTR
274 int c;
275
276 c = -1;
277 #endif
278 event = state->nextevent;
279 #ifdef SMP
280 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) {
281 CPU_FOREACH(cpu) {
282 state = DPCPU_ID_PTR(cpu, timerstate);
283 if (event > state->nextevent) {
284 event = state->nextevent;
285 #ifdef KTR
286 c = cpu;
287 #endif
288 }
289 }
290 }
291 #endif
292 CTR3(KTR_SPARE2, "next: next %d.%08x by %d",
293 (int)(event >> 32), (u_int)(event & 0xffffffff), c);
294 return (event);
295 }
296
297 /* Hardware timer callback function. */
298 static void
timercb(struct eventtimer * et,void * arg)299 timercb(struct eventtimer *et, void *arg)
300 {
301 sbintime_t now;
302 sbintime_t *next;
303 struct pcpu_state *state;
304 #ifdef SMP
305 int cpu, bcast;
306 #endif
307
308 /* Do not touch anything if somebody reconfiguring timers. */
309 if (busy)
310 return;
311 /* Update present and next tick times. */
312 state = DPCPU_PTR(timerstate);
313 if (et->et_flags & ET_FLAGS_PERCPU) {
314 next = &state->nexttick;
315 } else
316 next = &nexttick;
317 now = sbinuptime();
318 if (periodic)
319 *next = now + timerperiod;
320 else
321 *next = -1; /* Next tick is not scheduled yet. */
322 state->now = now;
323 CTR2(KTR_SPARE2, "intr: now %d.%08x",
324 (int)(now >> 32), (u_int)(now & 0xffffffff));
325
326 #ifdef SMP
327 #ifdef EARLY_AP_STARTUP
328 MPASS(mp_ncpus == 1 || smp_started);
329 #endif
330 /* Prepare broadcasting to other CPUs for non-per-CPU timers. */
331 bcast = 0;
332 #ifdef EARLY_AP_STARTUP
333 if ((et->et_flags & ET_FLAGS_PERCPU) == 0) {
334 #else
335 if ((et->et_flags & ET_FLAGS_PERCPU) == 0 && smp_started) {
336 #endif
337 CPU_FOREACH(cpu) {
338 state = DPCPU_ID_PTR(cpu, timerstate);
339 ET_HW_LOCK(state);
340 state->now = now;
341 if (now >= state->nextevent) {
342 state->nextevent += SBT_1S;
343 if (curcpu != cpu) {
344 state->ipi = 1;
345 bcast = 1;
346 }
347 }
348 ET_HW_UNLOCK(state);
349 }
350 }
351 #endif
352
353 /* Handle events for this time on this CPU. */
354 handleevents(now, 0);
355
356 #ifdef SMP
357 /* Broadcast interrupt to other CPUs for non-per-CPU timers. */
358 if (bcast) {
359 CPU_FOREACH(cpu) {
360 if (curcpu == cpu)
361 continue;
362 state = DPCPU_ID_PTR(cpu, timerstate);
363 if (state->ipi) {
364 state->ipi = 0;
365 ipi_cpu(cpu, IPI_HARDCLOCK);
366 }
367 }
368 }
369 #endif
370 }
371
372 /*
373 * Load new value into hardware timer.
374 */
375 static void
376 loadtimer(sbintime_t now, int start)
377 {
378 struct pcpu_state *state;
379 sbintime_t new;
380 sbintime_t *next;
381 uint64_t tmp;
382 int eq;
383
384 state = DPCPU_PTR(timerstate);
385 if (timer->et_flags & ET_FLAGS_PERCPU)
386 next = &state->nexttick;
387 else
388 next = &nexttick;
389 if (periodic) {
390 if (start) {
391 /*
392 * Try to start all periodic timers aligned
393 * to period to make events synchronous.
394 */
395 tmp = now % timerperiod;
396 new = timerperiod - tmp;
397 if (new < tmp) /* Left less then passed. */
398 new += timerperiod;
399 CTR4(KTR_SPARE2, "load p: now %d.%08x first in %d.%08x",
400 (int)(now >> 32), (u_int)(now & 0xffffffff),
401 (int)(new >> 32), (u_int)(new & 0xffffffff));
402 *next = new + now;
403 et_start(timer, new, timerperiod);
404 }
405 } else {
406 new = getnextevent(state);
407 eq = (new == *next);
408 CTR3(KTR_SPARE2, "load: next %d.%08x eq %d",
409 (int)(new >> 32), (u_int)(new & 0xffffffff), eq);
410 if (!eq) {
411 *next = new;
412 et_start(timer, new - now, 0);
413 }
414 }
415 }
416
417 /*
418 * Prepare event timer parameters after configuration changes.
419 */
420 static void
421 setuptimer(void)
422 {
423 int freq;
424
425 if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0)
426 periodic = 0;
427 else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0)
428 periodic = 1;
429 singlemul = MIN(MAX(singlemul, 1), 20);
430 freq = hz * singlemul;
431 while (freq < (profiling ? profhz : stathz))
432 freq += hz;
433 freq = round_freq(timer, freq);
434 timerperiod = SBT_1S / freq;
435 }
436
437 /*
438 * Reconfigure specified per-CPU timer on other CPU. Called from IPI handler.
439 */
440 static int
441 doconfigtimer(void)
442 {
443 sbintime_t now;
444 struct pcpu_state *state;
445
446 state = DPCPU_PTR(timerstate);
447 switch (atomic_load_acq_int(&state->action)) {
448 case 1:
449 now = sbinuptime();
450 ET_HW_LOCK(state);
451 loadtimer(now, 1);
452 ET_HW_UNLOCK(state);
453 state->handle = 0;
454 atomic_store_rel_int(&state->action, 0);
455 return (1);
456 case 2:
457 ET_HW_LOCK(state);
458 et_stop(timer);
459 ET_HW_UNLOCK(state);
460 state->handle = 0;
461 atomic_store_rel_int(&state->action, 0);
462 return (1);
463 }
464 if (atomic_readandclear_int(&state->handle) && !busy) {
465 now = sbinuptime();
466 handleevents(now, 0);
467 return (1);
468 }
469 return (0);
470 }
471
472 /*
473 * Reconfigure specified timer.
474 * For per-CPU timers use IPI to make other CPUs to reconfigure.
475 */
476 static void
477 configtimer(int start)
478 {
479 sbintime_t now, next;
480 struct pcpu_state *state;
481 int cpu;
482
483 if (start) {
484 setuptimer();
485 now = sbinuptime();
486 } else
487 now = 0;
488 critical_enter();
489 ET_HW_LOCK(DPCPU_PTR(timerstate));
490 if (start) {
491 /* Initialize time machine parameters. */
492 next = now + timerperiod;
493 if (periodic)
494 nexttick = next;
495 else
496 nexttick = -1;
497 #ifdef EARLY_AP_STARTUP
498 MPASS(mp_ncpus == 1 || smp_started);
499 #endif
500 CPU_FOREACH(cpu) {
501 state = DPCPU_ID_PTR(cpu, timerstate);
502 state->now = now;
503 #ifndef EARLY_AP_STARTUP
504 if (!smp_started && cpu != CPU_FIRST())
505 state->nextevent = SBT_MAX;
506 else
507 #endif
508 state->nextevent = next;
509 if (periodic)
510 state->nexttick = next;
511 else
512 state->nexttick = -1;
513 state->nexthard = next;
514 state->nextstat = next;
515 state->nextprof = next;
516 state->nextcall = next;
517 state->nextcallopt = next;
518 hardclock_sync(cpu);
519 }
520 busy = 0;
521 /* Start global timer or per-CPU timer of this CPU. */
522 loadtimer(now, 1);
523 } else {
524 busy = 1;
525 /* Stop global timer or per-CPU timer of this CPU. */
526 et_stop(timer);
527 }
528 ET_HW_UNLOCK(DPCPU_PTR(timerstate));
529 #ifdef SMP
530 #ifdef EARLY_AP_STARTUP
531 /* If timer is global we are done. */
532 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) {
533 #else
534 /* If timer is global or there is no other CPUs yet - we are done. */
535 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || !smp_started) {
536 #endif
537 critical_exit();
538 return;
539 }
540 /* Set reconfigure flags for other CPUs. */
541 CPU_FOREACH(cpu) {
542 state = DPCPU_ID_PTR(cpu, timerstate);
543 atomic_store_rel_int(&state->action,
544 (cpu == curcpu) ? 0 : ( start ? 1 : 2));
545 }
546 /* Broadcast reconfigure IPI. */
547 ipi_all_but_self(IPI_HARDCLOCK);
548 /* Wait for reconfiguration completed. */
549 restart:
550 cpu_spinwait();
551 CPU_FOREACH(cpu) {
552 if (cpu == curcpu)
553 continue;
554 state = DPCPU_ID_PTR(cpu, timerstate);
555 if (atomic_load_acq_int(&state->action))
556 goto restart;
557 }
558 #endif
559 critical_exit();
560 }
561
562 /*
563 * Calculate nearest frequency supported by hardware timer.
564 */
565 static int
566 round_freq(struct eventtimer *et, int freq)
567 {
568 uint64_t div;
569
570 if (et->et_frequency != 0) {
571 div = lmax((et->et_frequency + freq / 2) / freq, 1);
572 if (et->et_flags & ET_FLAGS_POW2DIV)
573 div = 1 << (flsl(div + div / 2) - 1);
574 freq = (et->et_frequency + div / 2) / div;
575 }
576 if (et->et_min_period > SBT_1S)
577 panic("Event timer \"%s\" doesn't support sub-second periods!",
578 et->et_name);
579 else if (et->et_min_period != 0)
580 freq = min(freq, SBT2FREQ(et->et_min_period));
581 if (et->et_max_period < SBT_1S && et->et_max_period != 0)
582 freq = max(freq, SBT2FREQ(et->et_max_period));
583 return (freq);
584 }
585
586 /*
587 * Configure and start event timers (BSP part).
588 */
589 void
590 cpu_initclocks_bsp(void)
591 {
592 struct pcpu_state *state;
593 int base, div, cpu;
594
595 mtx_init(&et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN);
596 CPU_FOREACH(cpu) {
597 state = DPCPU_ID_PTR(cpu, timerstate);
598 mtx_init(&state->et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN);
599 state->nextcall = SBT_MAX;
600 state->nextcallopt = SBT_MAX;
601 }
602 periodic = want_periodic;
603 /* Grab requested timer or the best of present. */
604 if (timername[0])
605 timer = et_find(timername, 0, 0);
606 if (timer == NULL && periodic) {
607 timer = et_find(NULL,
608 ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC);
609 }
610 if (timer == NULL) {
611 timer = et_find(NULL,
612 ET_FLAGS_ONESHOT, ET_FLAGS_ONESHOT);
613 }
614 if (timer == NULL && !periodic) {
615 timer = et_find(NULL,
616 ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC);
617 }
618 if (timer == NULL)
619 panic("No usable event timer found!");
620 et_init(timer, timercb, NULL, NULL);
621
622 /* Adapt to timer capabilities. */
623 if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0)
624 periodic = 0;
625 else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0)
626 periodic = 1;
627 if (timer->et_flags & ET_FLAGS_C3STOP)
628 cpu_disable_c3_sleep++;
629
630 /*
631 * We honor the requested 'hz' value.
632 * We want to run stathz in the neighborhood of 128hz.
633 * We would like profhz to run as often as possible.
634 */
635 if (singlemul <= 0 || singlemul > 20) {
636 if (hz >= 1500 || (hz % 128) == 0)
637 singlemul = 1;
638 else if (hz >= 750)
639 singlemul = 2;
640 else
641 singlemul = 4;
642 }
643 if (periodic) {
644 base = round_freq(timer, hz * singlemul);
645 singlemul = max((base + hz / 2) / hz, 1);
646 hz = (base + singlemul / 2) / singlemul;
647 if (base <= 128)
648 stathz = base;
649 else {
650 div = base / 128;
651 if (div >= singlemul && (div % singlemul) == 0)
652 div++;
653 stathz = base / div;
654 }
655 profhz = stathz;
656 while ((profhz + stathz) <= 128 * 64)
657 profhz += stathz;
658 profhz = round_freq(timer, profhz);
659 } else {
660 hz = round_freq(timer, hz);
661 stathz = round_freq(timer, 127);
662 profhz = round_freq(timer, stathz * 64);
663 }
664 tick = 1000000 / hz;
665 tick_sbt = SBT_1S / hz;
666 tick_bt = sbttobt(tick_sbt);
667 statperiod = SBT_1S / stathz;
668 profperiod = SBT_1S / profhz;
669 ET_LOCK();
670 configtimer(1);
671 ET_UNLOCK();
672 }
673
674 /*
675 * Start per-CPU event timers on APs.
676 */
677 void
678 cpu_initclocks_ap(void)
679 {
680 struct pcpu_state *state;
681 struct thread *td;
682
683 state = DPCPU_PTR(timerstate);
684 ET_HW_LOCK(state);
685 state->now = sbinuptime();
686 hardclock_sync(curcpu);
687 spinlock_enter();
688 ET_HW_UNLOCK(state);
689 td = curthread;
690 td->td_intr_nesting_level++;
691 handleevents(state->now, 2);
692 td->td_intr_nesting_level--;
693 spinlock_exit();
694 }
695
696 void
697 suspendclock(void)
698 {
699 ET_LOCK();
700 configtimer(0);
701 ET_UNLOCK();
702 }
703
704 void
705 resumeclock(void)
706 {
707 ET_LOCK();
708 configtimer(1);
709 ET_UNLOCK();
710 }
711
712 /*
713 * Switch to profiling clock rates.
714 */
715 void
716 cpu_startprofclock(void)
717 {
718
719 ET_LOCK();
720 if (profiling == 0) {
721 if (periodic) {
722 configtimer(0);
723 profiling = 1;
724 configtimer(1);
725 } else
726 profiling = 1;
727 } else
728 profiling++;
729 ET_UNLOCK();
730 }
731
732 /*
733 * Switch to regular clock rates.
734 */
735 void
736 cpu_stopprofclock(void)
737 {
738
739 ET_LOCK();
740 if (profiling == 1) {
741 if (periodic) {
742 configtimer(0);
743 profiling = 0;
744 configtimer(1);
745 } else
746 profiling = 0;
747 } else
748 profiling--;
749 ET_UNLOCK();
750 }
751
752 /*
753 * Switch to idle mode (all ticks handled).
754 */
755 sbintime_t
756 cpu_idleclock(void)
757 {
758 sbintime_t now, t;
759 struct pcpu_state *state;
760
761 if (idletick || busy ||
762 (periodic && (timer->et_flags & ET_FLAGS_PERCPU))
763 #ifdef DEVICE_POLLING
764 || curcpu == CPU_FIRST()
765 #endif
766 )
767 return (-1);
768 state = DPCPU_PTR(timerstate);
769 ET_HW_LOCK(state);
770 if (periodic)
771 now = state->now;
772 else
773 now = sbinuptime();
774 CTR2(KTR_SPARE2, "idle: now %d.%08x",
775 (int)(now >> 32), (u_int)(now & 0xffffffff));
776 t = getnextcpuevent(state, 1);
777 state->idle = 1;
778 state->nextevent = t;
779 if (!periodic)
780 loadtimer(now, 0);
781 ET_HW_UNLOCK(state);
782 return (MAX(t - now, 0));
783 }
784
785 /*
786 * Switch to active mode (skip empty ticks).
787 */
788 void
789 cpu_activeclock(void)
790 {
791 sbintime_t now;
792 struct pcpu_state *state;
793 struct thread *td;
794
795 state = DPCPU_PTR(timerstate);
796 if (atomic_load_int(&state->idle) == 0 || busy)
797 return;
798 spinlock_enter();
799 if (periodic)
800 now = state->now;
801 else
802 now = sbinuptime();
803 CTR2(KTR_SPARE2, "active: now %d.%08x",
804 (int)(now >> 32), (u_int)(now & 0xffffffff));
805 td = curthread;
806 td->td_intr_nesting_level++;
807 handleevents(now, 1);
808 td->td_intr_nesting_level--;
809 spinlock_exit();
810 }
811
812 /*
813 * Change the frequency of the given timer. This changes et->et_frequency and
814 * if et is the active timer it reconfigures the timer on all CPUs. This is
815 * intended to be a private interface for the use of et_change_frequency() only.
816 */
817 void
818 cpu_et_frequency(struct eventtimer *et, uint64_t newfreq)
819 {
820
821 ET_LOCK();
822 if (et == timer) {
823 configtimer(0);
824 et->et_frequency = newfreq;
825 configtimer(1);
826 } else
827 et->et_frequency = newfreq;
828 ET_UNLOCK();
829 }
830
831 void
832 cpu_new_callout(int cpu, sbintime_t bt, sbintime_t bt_opt)
833 {
834 struct pcpu_state *state;
835
836 /* Do not touch anything if somebody reconfiguring timers. */
837 if (busy)
838 return;
839
840 CTR5(KTR_SPARE2, "new co: on %d at %d.%08x - %d.%08x",
841 cpu, (int)(bt_opt >> 32), (u_int)(bt_opt & 0xffffffff),
842 (int)(bt >> 32), (u_int)(bt & 0xffffffff));
843
844 KASSERT(!CPU_ABSENT(cpu), ("Absent CPU %d", cpu));
845 state = DPCPU_ID_PTR(cpu, timerstate);
846 ET_HW_LOCK(state);
847
848 /*
849 * If there is callout time already set earlier -- do nothing.
850 * This check may appear redundant because we check already in
851 * callout_process() but this double check guarantees we're safe
852 * with respect to race conditions between interrupts execution
853 * and scheduling.
854 */
855 state->nextcallopt = bt_opt;
856 if (bt >= state->nextcall)
857 goto done;
858 state->nextcall = bt;
859 /* If there is some other event set earlier -- do nothing. */
860 if (bt >= state->nextevent)
861 goto done;
862 state->nextevent = bt;
863 /* If timer is periodic -- there is nothing to reprogram. */
864 if (periodic)
865 goto done;
866 /* If timer is global or of the current CPU -- reprogram it. */
867 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || cpu == curcpu) {
868 loadtimer(sbinuptime(), 0);
869 done:
870 ET_HW_UNLOCK(state);
871 return;
872 }
873 /* Otherwise make other CPU to reprogram it. */
874 state->handle = 1;
875 ET_HW_UNLOCK(state);
876 #ifdef SMP
877 ipi_cpu(cpu, IPI_HARDCLOCK);
878 #endif
879 }
880
881 /*
882 * Report or change the active event timers hardware.
883 */
884 static int
885 sysctl_kern_eventtimer_timer(SYSCTL_HANDLER_ARGS)
886 {
887 char buf[32];
888 struct eventtimer *et;
889 int error;
890
891 ET_LOCK();
892 et = timer;
893 snprintf(buf, sizeof(buf), "%s", et->et_name);
894 ET_UNLOCK();
895 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
896 ET_LOCK();
897 et = timer;
898 if (error != 0 || req->newptr == NULL ||
899 strcasecmp(buf, et->et_name) == 0) {
900 ET_UNLOCK();
901 return (error);
902 }
903 et = et_find(buf, 0, 0);
904 if (et == NULL) {
905 ET_UNLOCK();
906 return (ENOENT);
907 }
908 configtimer(0);
909 et_free(timer);
910 if (et->et_flags & ET_FLAGS_C3STOP)
911 cpu_disable_c3_sleep++;
912 if (timer->et_flags & ET_FLAGS_C3STOP)
913 cpu_disable_c3_sleep--;
914 periodic = want_periodic;
915 timer = et;
916 et_init(timer, timercb, NULL, NULL);
917 configtimer(1);
918 ET_UNLOCK();
919 return (error);
920 }
921 SYSCTL_PROC(_kern_eventtimer, OID_AUTO, timer,
922 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE,
923 0, 0, sysctl_kern_eventtimer_timer, "A", "Chosen event timer");
924
925 /*
926 * Report or change the active event timer periodicity.
927 */
928 static int
929 sysctl_kern_eventtimer_periodic(SYSCTL_HANDLER_ARGS)
930 {
931 int error, val;
932
933 val = periodic;
934 error = sysctl_handle_int(oidp, &val, 0, req);
935 if (error != 0 || req->newptr == NULL)
936 return (error);
937 ET_LOCK();
938 configtimer(0);
939 periodic = want_periodic = val;
940 configtimer(1);
941 ET_UNLOCK();
942 return (error);
943 }
944 SYSCTL_PROC(_kern_eventtimer, OID_AUTO, periodic,
945 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
946 0, 0, sysctl_kern_eventtimer_periodic, "I", "Enable event timer periodic mode");
947
948 #include "opt_ddb.h"
949
950 #ifdef DDB
951 #include <ddb/ddb.h>
952
953 DB_SHOW_COMMAND(clocksource, db_show_clocksource)
954 {
955 struct pcpu_state *st;
956 int c;
957
958 CPU_FOREACH(c) {
959 st = DPCPU_ID_PTR(c, timerstate);
960 db_printf(
961 "CPU %2d: action %d handle %d ipi %d idle %d\n"
962 " now %#jx nevent %#jx (%jd)\n"
963 " ntick %#jx (%jd) nhard %#jx (%jd)\n"
964 " nstat %#jx (%jd) nprof %#jx (%jd)\n"
965 " ncall %#jx (%jd) ncallopt %#jx (%jd)\n",
966 c, st->action, st->handle, st->ipi, st->idle,
967 (uintmax_t)st->now,
968 (uintmax_t)st->nextevent,
969 (uintmax_t)(st->nextevent - st->now) / tick_sbt,
970 (uintmax_t)st->nexttick,
971 (uintmax_t)(st->nexttick - st->now) / tick_sbt,
972 (uintmax_t)st->nexthard,
973 (uintmax_t)(st->nexthard - st->now) / tick_sbt,
974 (uintmax_t)st->nextstat,
975 (uintmax_t)(st->nextstat - st->now) / tick_sbt,
976 (uintmax_t)st->nextprof,
977 (uintmax_t)(st->nextprof - st->now) / tick_sbt,
978 (uintmax_t)st->nextcall,
979 (uintmax_t)(st->nextcall - st->now) / tick_sbt,
980 (uintmax_t)st->nextcallopt,
981 (uintmax_t)(st->nextcallopt - st->now) / tick_sbt);
982 }
983 }
984
985 #endif
986