1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Renesas R-Car Gen4 gPTP device driver 3 * 4 * Copyright (C) 2022 Renesas Electronics Corporation 5 */ 6 7 #ifndef __RCAR_GEN4_PTP_H__ 8 #define __RCAR_GEN4_PTP_H__ 9 10 #include <linux/ptp_clock_kernel.h> 11 12 #define RCAR_GEN4_GPTP_OFFSET_S4 0x00018000 13 14 enum rcar_gen4_ptp_reg_layout { 15 RCAR_GEN4_PTP_REG_LAYOUT 16 }; 17 18 /* driver's definitions */ 19 #define RCAR_GEN4_RXTSTAMP_ENABLED BIT(0) 20 #define RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT BIT(1) 21 #define RCAR_GEN4_RXTSTAMP_TYPE_ALL (RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT | BIT(2)) 22 #define RCAR_GEN4_RXTSTAMP_TYPE RCAR_GEN4_RXTSTAMP_TYPE_ALL 23 24 #define RCAR_GEN4_TXTSTAMP_ENABLED BIT(0) 25 26 #define PTPRO 0 27 28 enum rcar_gen4_ptp_reg { 29 PTPTMEC = PTPRO + 0x0010, 30 PTPTMDC = PTPRO + 0x0014, 31 PTPTIVC0 = PTPRO + 0x0020, 32 PTPTOVC00 = PTPRO + 0x0030, 33 PTPTOVC10 = PTPRO + 0x0034, 34 PTPTOVC20 = PTPRO + 0x0038, 35 PTPGPTPTM00 = PTPRO + 0x0050, 36 PTPGPTPTM10 = PTPRO + 0x0054, 37 PTPGPTPTM20 = PTPRO + 0x0058, 38 }; 39 40 struct rcar_gen4_ptp_reg_offset { 41 u16 enable; 42 u16 disable; 43 u16 increment; 44 u16 config_t0; 45 u16 config_t1; 46 u16 config_t2; 47 u16 monitor_t0; 48 u16 monitor_t1; 49 u16 monitor_t2; 50 }; 51 52 struct rcar_gen4_ptp_private { 53 void __iomem *addr; 54 struct ptp_clock *clock; 55 struct ptp_clock_info info; 56 const struct rcar_gen4_ptp_reg_offset *offs; 57 spinlock_t lock; /* For multiple registers access */ 58 u32 tstamp_tx_ctrl; 59 u32 tstamp_rx_ctrl; 60 s64 default_addend; 61 bool initialized; 62 }; 63 64 int rcar_gen4_ptp_register(struct rcar_gen4_ptp_private *ptp_priv, 65 enum rcar_gen4_ptp_reg_layout layout, u32 rate); 66 int rcar_gen4_ptp_unregister(struct rcar_gen4_ptp_private *ptp_priv); 67 struct rcar_gen4_ptp_private *rcar_gen4_ptp_alloc(struct platform_device *pdev); 68 69 #endif /* #ifndef __RCAR_GEN4_PTP_H__ */ 70