1# SPDX-License-Identifier: GPL-2.0 2# 3# Makefile for the drm device driver. This driver provides support for the 4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. 5 6# Enable W=1 warnings not enabled in drm subsystem Makefile 7subdir-ccflags-y += $(call cc-option, -Wformat-truncation) 8 9# Enable -Werror in CI and development 10subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror 11 12# Support compiling the display code separately for both i915 and xe 13# drivers. Define I915 when building i915. 14subdir-ccflags-y += -DI915 15 16subdir-ccflags-y += -I$(src) 17 18# Please keep these build lists sorted! 19 20# core driver code 21i915-y += \ 22 i915_config.o \ 23 i915_driver.o \ 24 i915_drm_client.o \ 25 i915_getparam.o \ 26 i915_ioctl.o \ 27 i915_irq.o \ 28 i915_mitigations.o \ 29 i915_module.o \ 30 i915_params.o \ 31 i915_pci.o \ 32 i915_scatterlist.o \ 33 i915_switcheroo.o \ 34 i915_sysfs.o \ 35 i915_utils.o \ 36 intel_clock_gating.o \ 37 intel_cpu_info.o \ 38 intel_device_info.o \ 39 intel_memory_region.o \ 40 intel_pcode.o \ 41 intel_region_ttm.o \ 42 intel_runtime_pm.o \ 43 intel_sbi.o \ 44 intel_step.o \ 45 intel_uncore.o \ 46 intel_uncore_trace.o \ 47 intel_wakeref.o \ 48 vlv_sideband.o \ 49 vlv_suspend.o 50 51# core peripheral code 52i915-y += \ 53 soc/intel_dram.o \ 54 soc/intel_gmch.o \ 55 soc/intel_pch.o \ 56 soc/intel_rom.o 57 58# core library code 59i915-y += \ 60 i915_memcpy.o \ 61 i915_mm.o \ 62 i915_sw_fence.o \ 63 i915_sw_fence_work.o \ 64 i915_syncmap.o \ 65 i915_user_extensions.o 66 67i915-$(CONFIG_COMPAT) += \ 68 i915_ioc32.o 69i915-$(CONFIG_DEBUG_FS) += \ 70 i915_debugfs.o \ 71 i915_debugfs_params.o 72i915-$(CONFIG_PERF_EVENTS) += \ 73 i915_pmu.o 74 75# "Graphics Technology" (aka we talk to the gpu) 76gt-y += \ 77 gt/gen2_engine_cs.o \ 78 gt/gen6_engine_cs.o \ 79 gt/gen6_ppgtt.o \ 80 gt/gen7_renderclear.o \ 81 gt/gen8_engine_cs.o \ 82 gt/gen8_ppgtt.o \ 83 gt/intel_breadcrumbs.o \ 84 gt/intel_context.o \ 85 gt/intel_context_sseu.o \ 86 gt/intel_engine_cs.o \ 87 gt/intel_engine_heartbeat.o \ 88 gt/intel_engine_pm.o \ 89 gt/intel_engine_user.o \ 90 gt/intel_execlists_submission.o \ 91 gt/intel_ggtt.o \ 92 gt/intel_ggtt_fencing.o \ 93 gt/intel_gt.o \ 94 gt/intel_gt_buffer_pool.o \ 95 gt/intel_gt_ccs_mode.o \ 96 gt/intel_gt_clock_utils.o \ 97 gt/intel_gt_debugfs.o \ 98 gt/intel_gt_engines_debugfs.o \ 99 gt/intel_gt_irq.o \ 100 gt/intel_gt_mcr.o \ 101 gt/intel_gt_pm.o \ 102 gt/intel_gt_pm_debugfs.o \ 103 gt/intel_gt_pm_irq.o \ 104 gt/intel_gt_requests.o \ 105 gt/intel_gt_sysfs.o \ 106 gt/intel_gt_sysfs_pm.o \ 107 gt/intel_gtt.o \ 108 gt/intel_llc.o \ 109 gt/intel_lrc.o \ 110 gt/intel_migrate.o \ 111 gt/intel_mocs.o \ 112 gt/intel_ppgtt.o \ 113 gt/intel_rc6.o \ 114 gt/intel_region_lmem.o \ 115 gt/intel_renderstate.o \ 116 gt/intel_reset.o \ 117 gt/intel_ring.o \ 118 gt/intel_ring_submission.o \ 119 gt/intel_rps.o \ 120 gt/intel_sa_media.o \ 121 gt/intel_sseu.o \ 122 gt/intel_sseu_debugfs.o \ 123 gt/intel_timeline.o \ 124 gt/intel_tlb.o \ 125 gt/intel_wopcm.o \ 126 gt/intel_workarounds.o \ 127 gt/shmem_utils.o \ 128 gt/sysfs_engines.o 129 130# x86 intel-gtt module support 131gt-$(CONFIG_X86) += \ 132 gt/intel_ggtt_gmch.o 133# autogenerated null render state 134gt-y += \ 135 gt/gen6_renderstate.o \ 136 gt/gen7_renderstate.o \ 137 gt/gen8_renderstate.o \ 138 gt/gen9_renderstate.o 139i915-y += $(gt-y) 140 141# GEM (Graphics Execution Management) code 142gem-y += \ 143 gem/i915_gem_busy.o \ 144 gem/i915_gem_clflush.o \ 145 gem/i915_gem_context.o \ 146 gem/i915_gem_create.o \ 147 gem/i915_gem_dmabuf.o \ 148 gem/i915_gem_domain.o \ 149 gem/i915_gem_execbuffer.o \ 150 gem/i915_gem_internal.o \ 151 gem/i915_gem_lmem.o \ 152 gem/i915_gem_mman.o \ 153 gem/i915_gem_object.o \ 154 gem/i915_gem_pages.o \ 155 gem/i915_gem_phys.o \ 156 gem/i915_gem_pm.o \ 157 gem/i915_gem_region.o \ 158 gem/i915_gem_shmem.o \ 159 gem/i915_gem_shrinker.o \ 160 gem/i915_gem_stolen.o \ 161 gem/i915_gem_throttle.o \ 162 gem/i915_gem_tiling.o \ 163 gem/i915_gem_ttm.o \ 164 gem/i915_gem_ttm_move.o \ 165 gem/i915_gem_ttm_pm.o \ 166 gem/i915_gem_userptr.o \ 167 gem/i915_gem_wait.o \ 168 gem/i915_gemfs.o 169i915-y += \ 170 $(gem-y) \ 171 i915_active.o \ 172 i915_cmd_parser.o \ 173 i915_deps.o \ 174 i915_gem.o \ 175 i915_gem_evict.o \ 176 i915_gem_gtt.o \ 177 i915_gem_ww.o \ 178 i915_query.o \ 179 i915_request.o \ 180 i915_scheduler.o \ 181 i915_trace_points.o \ 182 i915_ttm_buddy_manager.o \ 183 i915_vma.o \ 184 i915_vma_resource.o 185 186# general-purpose microcontroller (GuC) support 187i915-y += \ 188 gt/uc/intel_gsc_fw.o \ 189 gt/uc/intel_gsc_proxy.o \ 190 gt/uc/intel_gsc_uc.o \ 191 gt/uc/intel_gsc_uc_debugfs.o \ 192 gt/uc/intel_gsc_uc_heci_cmd_submit.o\ 193 gt/uc/intel_guc.o \ 194 gt/uc/intel_guc_ads.o \ 195 gt/uc/intel_guc_capture.o \ 196 gt/uc/intel_guc_ct.o \ 197 gt/uc/intel_guc_debugfs.o \ 198 gt/uc/intel_guc_fw.o \ 199 gt/uc/intel_guc_hwconfig.o \ 200 gt/uc/intel_guc_log.o \ 201 gt/uc/intel_guc_log_debugfs.o \ 202 gt/uc/intel_guc_rc.o \ 203 gt/uc/intel_guc_slpc.o \ 204 gt/uc/intel_guc_submission.o \ 205 gt/uc/intel_huc.o \ 206 gt/uc/intel_huc_debugfs.o \ 207 gt/uc/intel_huc_fw.o \ 208 gt/uc/intel_uc.o \ 209 gt/uc/intel_uc_debugfs.o \ 210 gt/uc/intel_uc_fw.o 211 212# graphics system controller (GSC) support 213i915-y += \ 214 gt/intel_gsc.o 215 216# graphics hardware monitoring (HWMON) support 217i915-$(CONFIG_HWMON) += \ 218 i915_hwmon.o 219 220# modesetting core code 221i915-y += \ 222 display/hsw_ips.o \ 223 display/i9xx_plane.o \ 224 display/i9xx_display_sr.o \ 225 display/i9xx_wm.o \ 226 display/intel_alpm.o \ 227 display/intel_atomic.o \ 228 display/intel_atomic_plane.o \ 229 display/intel_audio.o \ 230 display/intel_bios.o \ 231 display/intel_bo.o \ 232 display/intel_bw.o \ 233 display/intel_cdclk.o \ 234 display/intel_color.o \ 235 display/intel_combo_phy.o \ 236 display/intel_connector.o \ 237 display/intel_crtc.o \ 238 display/intel_crtc_state_dump.o \ 239 display/intel_cursor.o \ 240 display/intel_display.o \ 241 display/intel_display_conversion.o \ 242 display/intel_display_driver.o \ 243 display/intel_display_irq.o \ 244 display/intel_display_params.o \ 245 display/intel_display_power.o \ 246 display/intel_display_power_map.o \ 247 display/intel_display_power_well.o \ 248 display/intel_display_reset.o \ 249 display/intel_display_rps.o \ 250 display/intel_display_snapshot.o \ 251 display/intel_display_wa.o \ 252 display/intel_dmc.o \ 253 display/intel_dmc_wl.o \ 254 display/intel_dpio_phy.o \ 255 display/intel_dpll.o \ 256 display/intel_dpll_mgr.o \ 257 display/intel_dpt.o \ 258 display/intel_dpt_common.o \ 259 display/intel_drrs.o \ 260 display/intel_dsb.o \ 261 display/intel_dsb_buffer.o \ 262 display/intel_fb.o \ 263 display/intel_fb_bo.o \ 264 display/intel_fb_pin.o \ 265 display/intel_fbc.o \ 266 display/intel_fdi.o \ 267 display/intel_fifo_underrun.o \ 268 display/intel_frontbuffer.o \ 269 display/intel_global_state.o \ 270 display/intel_hdcp.o \ 271 display/intel_hdcp_gsc.o \ 272 display/intel_hdcp_gsc_message.o \ 273 display/intel_hotplug.o \ 274 display/intel_hotplug_irq.o \ 275 display/intel_hti.o \ 276 display/intel_link_bw.o \ 277 display/intel_load_detect.o \ 278 display/intel_lpe_audio.o \ 279 display/intel_modeset_lock.o \ 280 display/intel_modeset_setup.o \ 281 display/intel_modeset_verify.o \ 282 display/intel_overlay.o \ 283 display/intel_pch_display.o \ 284 display/intel_pch_refclk.o \ 285 display/intel_plane_initial.o \ 286 display/intel_pmdemand.o \ 287 display/intel_psr.o \ 288 display/intel_quirks.o \ 289 display/intel_sprite.o \ 290 display/intel_sprite_uapi.o \ 291 display/intel_tc.o \ 292 display/intel_vblank.o \ 293 display/intel_vga.o \ 294 display/intel_wm.o \ 295 display/skl_scaler.o \ 296 display/skl_universal_plane.o \ 297 display/skl_watermark.o 298i915-$(CONFIG_ACPI) += \ 299 display/intel_acpi.o \ 300 display/intel_opregion.o 301i915-$(CONFIG_DRM_FBDEV_EMULATION) += \ 302 display/intel_fbdev.o \ 303 display/intel_fbdev_fb.o 304i915-$(CONFIG_DEBUG_FS) += \ 305 display/intel_display_debugfs.o \ 306 display/intel_display_debugfs_params.o \ 307 display/intel_pipe_crc.o 308 309# modesetting output/encoder code 310i915-y += \ 311 display/dvo_ch7017.o \ 312 display/dvo_ch7xxx.o \ 313 display/dvo_ivch.o \ 314 display/dvo_ns2501.o \ 315 display/dvo_sil164.o \ 316 display/dvo_tfp410.o \ 317 display/g4x_dp.o \ 318 display/g4x_hdmi.o \ 319 display/icl_dsi.o \ 320 display/intel_backlight.o \ 321 display/intel_crt.o \ 322 display/intel_cx0_phy.o \ 323 display/intel_ddi.o \ 324 display/intel_ddi_buf_trans.o \ 325 display/intel_display_device.o \ 326 display/intel_display_trace.o \ 327 display/intel_dkl_phy.o \ 328 display/intel_dp.o \ 329 display/intel_dp_aux.o \ 330 display/intel_dp_aux_backlight.o \ 331 display/intel_dp_hdcp.o \ 332 display/intel_dp_link_training.o \ 333 display/intel_dp_mst.o \ 334 display/intel_dp_test.o \ 335 display/intel_dsi.o \ 336 display/intel_dsi_dcs_backlight.o \ 337 display/intel_dsi_vbt.o \ 338 display/intel_dvo.o \ 339 display/intel_encoder.o \ 340 display/intel_gmbus.o \ 341 display/intel_hdmi.o \ 342 display/intel_lspcon.o \ 343 display/intel_lvds.o \ 344 display/intel_panel.o \ 345 display/intel_pfit.o \ 346 display/intel_pps.o \ 347 display/intel_qp_tables.o \ 348 display/intel_sdvo.o \ 349 display/intel_snps_phy.o \ 350 display/intel_tv.o \ 351 display/intel_vdsc.o \ 352 display/intel_vrr.o \ 353 display/vlv_dsi.o \ 354 display/vlv_dsi_pll.o 355 356i915-$(CONFIG_DRM_I915_DP_TUNNEL) += \ 357 display/intel_dp_tunnel.o 358 359i915-y += \ 360 i915_perf.o 361 362# Protected execution platform (PXP) support. Base support is required for HuC 363i915-y += \ 364 pxp/intel_pxp.o \ 365 pxp/intel_pxp_huc.o \ 366 pxp/intel_pxp_tee.o 367 368i915-$(CONFIG_DRM_I915_PXP) += \ 369 pxp/intel_pxp_cmd.o \ 370 pxp/intel_pxp_debugfs.o \ 371 pxp/intel_pxp_gsccs.o \ 372 pxp/intel_pxp_irq.o \ 373 pxp/intel_pxp_pm.o \ 374 pxp/intel_pxp_session.o 375 376# Post-mortem debug and GPU hang state capture 377i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += \ 378 i915_gpu_error.o 379i915-$(CONFIG_DRM_I915_SELFTEST) += \ 380 gem/selftests/i915_gem_client_blt.o \ 381 gem/selftests/igt_gem_utils.o \ 382 selftests/i915_random.o \ 383 selftests/i915_selftest.o \ 384 selftests/igt_atomic.o \ 385 selftests/igt_flush_test.o \ 386 selftests/igt_live_test.o \ 387 selftests/igt_mmap.o \ 388 selftests/igt_reset.o \ 389 selftests/igt_spinner.o \ 390 selftests/intel_scheduler_helpers.o \ 391 selftests/librapl.o 392 393# virtual gpu code 394i915-y += \ 395 i915_vgpu.o 396 397i915-$(CONFIG_DRM_I915_GVT) += \ 398 intel_gvt.o \ 399 intel_gvt_mmio_table.o 400include $(src)/gvt/Makefile 401 402obj-$(CONFIG_DRM_I915) += i915.o 403obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o 404 405# kernel-doc test 406# 407# Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build 408ifdef CONFIG_DRM_I915_WERROR 409 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none -Werror $< 410endif 411 412# header test 413 414# exclude some broken headers from the test coverage 415no-header-test := \ 416 display/intel_vbt_defs.h 417 418always-$(CONFIG_DRM_I915_WERROR) += \ 419 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \ 420 $(shell cd $(src) && find * -name '*.h'))) 421 422quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@) 423 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \ 424 $(srctree)/scripts/kernel-doc -none -Werror $<; touch $@ 425 426$(obj)/%.hdrtest: $(src)/%.h FORCE 427 $(call if_changed_dep,hdrtest) 428