1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include <linux/fs.h>
5 #include "mt7915.h"
6 #include "mcu.h"
7 #include "mac.h"
8 #include "eeprom.h"
9
10 #define fw_name(_dev, name, ...) ({ \
11 char *_fw; \
12 switch (mt76_chip(&(_dev)->mt76)) { \
13 case 0x7915: \
14 _fw = MT7915_##name; \
15 break; \
16 case 0x7981: \
17 _fw = MT7981_##name; \
18 break; \
19 case 0x7986: \
20 _fw = MT7986_##name##__VA_ARGS__; \
21 break; \
22 default: \
23 _fw = MT7916_##name; \
24 break; \
25 } \
26 _fw; \
27 })
28
29 #define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \
30 fw_name(_dev, name) : \
31 fw_name(_dev, name, _MT7975))
32
33 #define MCU_PATCH_ADDRESS 0x200000
34
35 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
36 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
37
38 static bool sr_scene_detect = true;
39 module_param(sr_scene_detect, bool, 0644);
40 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
41
42 static u8
mt7915_mcu_get_sta_nss(u16 mcs_map)43 mt7915_mcu_get_sta_nss(u16 mcs_map)
44 {
45 u8 nss;
46
47 for (nss = 8; nss > 0; nss--) {
48 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
49
50 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
51 break;
52 }
53
54 return nss - 1;
55 }
56
57 static void
mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)58 mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
59 u16 mcs_map)
60 {
61 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
62 struct mt7915_dev *dev = msta->vif->phy->dev;
63 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
64 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
65 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
66
67 for (nss = 0; nss < max_nss; nss++) {
68 int mcs;
69
70 switch ((mcs_map >> (2 * nss)) & 0x3) {
71 case IEEE80211_HE_MCS_SUPPORT_0_11:
72 mcs = GENMASK(11, 0);
73 break;
74 case IEEE80211_HE_MCS_SUPPORT_0_9:
75 mcs = GENMASK(9, 0);
76 break;
77 case IEEE80211_HE_MCS_SUPPORT_0_7:
78 mcs = GENMASK(7, 0);
79 break;
80 default:
81 mcs = 0;
82 }
83
84 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
85
86 switch (mcs) {
87 case 0 ... 7:
88 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
89 break;
90 case 8 ... 9:
91 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
92 break;
93 case 10 ... 11:
94 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
95 break;
96 default:
97 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
98 break;
99 }
100 mcs_map &= ~(0x3 << (nss * 2));
101 mcs_map |= mcs << (nss * 2);
102
103 /* only support 2ss on 160MHz for mt7915 */
104 if (is_mt7915(&dev->mt76) && nss > 1 &&
105 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
106 break;
107 }
108
109 *he_mcs = cpu_to_le16(mcs_map);
110 }
111
112 static void
mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)113 mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
114 const u16 *mask)
115 {
116 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
117 struct mt7915_dev *dev = msta->vif->phy->dev;
118 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
119 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
120 u16 mcs;
121
122 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
123 switch (mcs_map & 0x3) {
124 case IEEE80211_VHT_MCS_SUPPORT_0_9:
125 mcs = GENMASK(9, 0);
126 break;
127 case IEEE80211_VHT_MCS_SUPPORT_0_8:
128 mcs = GENMASK(8, 0);
129 break;
130 case IEEE80211_VHT_MCS_SUPPORT_0_7:
131 mcs = GENMASK(7, 0);
132 break;
133 default:
134 mcs = 0;
135 }
136
137 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
138
139 /* only support 2ss on 160MHz for mt7915 */
140 if (is_mt7915(&dev->mt76) && nss > 1 &&
141 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
142 break;
143 }
144 }
145
146 static void
mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)147 mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
148 const u8 *mask)
149 {
150 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
151
152 for (nss = 0; nss < max_nss; nss++)
153 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
154 }
155
156 static int
mt7915_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)157 mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd,
158 struct sk_buff *skb, int seq)
159 {
160 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
161 struct mt76_connac2_mcu_rxd *rxd;
162 int ret = 0;
163
164 if (!skb) {
165 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
166 cmd, seq);
167
168 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) {
169 dev->recovery.restart = true;
170 wake_up(&dev->mt76.mcu.wait);
171 queue_work(dev->mt76.wq, &dev->reset_work);
172 wake_up(&dev->reset_wait);
173 }
174
175 return -ETIMEDOUT;
176 }
177
178 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
179 if (seq != rxd->seq &&
180 !(rxd->eid == MCU_CMD_EXT_CID &&
181 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
182 return -EAGAIN;
183
184 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
185 skb_pull(skb, sizeof(*rxd) - 4);
186 ret = *skb->data;
187 } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) {
188 skb_pull(skb, sizeof(*rxd) + 4);
189 ret = le32_to_cpu(*(__le32 *)skb->data);
190 } else {
191 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
192 }
193
194 return ret;
195 }
196
197 static void
mt7915_mcu_set_timeout(struct mt76_dev * mdev,int cmd)198 mt7915_mcu_set_timeout(struct mt76_dev *mdev, int cmd)
199 {
200 if ((cmd & __MCU_CMD_FIELD_ID) != MCU_CMD_EXT_CID)
201 return;
202
203 switch (FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd)) {
204 case MCU_EXT_CMD_THERMAL_CTRL:
205 case MCU_EXT_CMD_GET_MIB_INFO:
206 case MCU_EXT_CMD_PHY_STAT_INFO:
207 case MCU_EXT_CMD_STA_REC_UPDATE:
208 case MCU_EXT_CMD_BSS_INFO_UPDATE:
209 mdev->mcu.timeout = 2 * HZ;
210 return;
211 default:
212 break;
213 }
214 }
215
216 static int
mt7915_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)217 mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
218 int cmd, int *wait_seq)
219 {
220 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
221 enum mt76_mcuq_id qid;
222
223 if (cmd == MCU_CMD(FW_SCATTER))
224 qid = MT_MCUQ_FWDL;
225 else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
226 qid = MT_MCUQ_WA;
227 else
228 qid = MT_MCUQ_WM;
229
230 mt7915_mcu_set_timeout(mdev, cmd);
231
232 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
233 }
234
mt7915_mcu_wa_cmd(struct mt7915_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)235 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
236 {
237 struct {
238 __le32 args[3];
239 } req = {
240 .args = {
241 cpu_to_le32(a1),
242 cpu_to_le32(a2),
243 cpu_to_le32(a3),
244 },
245 };
246
247 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
248 }
249
250 static void
mt7915_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)251 mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
252 {
253 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)
254 return;
255
256 ieee80211_csa_finish(vif, 0);
257 }
258
259 static void
mt7915_mcu_rx_csa_notify(struct mt7915_dev * dev,struct sk_buff * skb)260 mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb)
261 {
262 struct mt76_phy *mphy = &dev->mt76.phy;
263 struct mt7915_mcu_csa_notify *c;
264
265 c = (struct mt7915_mcu_csa_notify *)skb->data;
266
267 if (c->band_idx > MT_BAND1)
268 return;
269
270 if ((c->band_idx && !dev->phy.mt76->band_idx) &&
271 dev->mt76.phys[MT_BAND1])
272 mphy = dev->mt76.phys[MT_BAND1];
273
274 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
275 IEEE80211_IFACE_ITER_RESUME_ALL,
276 mt7915_mcu_csa_finish, mphy->hw);
277 }
278
279 static void
mt7915_mcu_rx_thermal_notify(struct mt7915_dev * dev,struct sk_buff * skb)280 mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb)
281 {
282 struct mt76_phy *mphy = &dev->mt76.phy;
283 struct mt7915_mcu_thermal_notify *t;
284 struct mt7915_phy *phy;
285
286 t = (struct mt7915_mcu_thermal_notify *)skb->data;
287 if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE)
288 return;
289
290 if (t->ctrl.band_idx > MT_BAND1)
291 return;
292
293 if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) &&
294 dev->mt76.phys[MT_BAND1])
295 mphy = dev->mt76.phys[MT_BAND1];
296
297 phy = mphy->priv;
298 phy->throttle_state = t->ctrl.duty.duty_cycle;
299 }
300
301 static void
mt7915_mcu_rx_radar_detected(struct mt7915_dev * dev,struct sk_buff * skb)302 mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb)
303 {
304 struct mt76_phy *mphy = &dev->mt76.phy;
305 struct mt7915_mcu_rdd_report *r;
306
307 r = (struct mt7915_mcu_rdd_report *)skb->data;
308
309 if (r->band_idx > MT_RX_SEL2)
310 return;
311
312 if ((r->band_idx && !dev->phy.mt76->band_idx) &&
313 dev->mt76.phys[MT_BAND1])
314 mphy = dev->mt76.phys[MT_BAND1];
315
316 if (r->band_idx == MT_RX_SEL2)
317 cfg80211_background_radar_event(mphy->hw->wiphy,
318 &dev->rdd2_chandef,
319 GFP_ATOMIC);
320 else
321 ieee80211_radar_detected(mphy->hw, NULL);
322 dev->hw_pattern++;
323 }
324
325 static void
mt7915_mcu_rx_log_message(struct mt7915_dev * dev,struct sk_buff * skb)326 mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb)
327 {
328 struct mt76_connac2_mcu_rxd *rxd;
329 int len = skb->len - sizeof(*rxd);
330 const char *data, *type;
331
332 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
333 data = (char *)&rxd[1];
334
335 switch (rxd->s2d_index) {
336 case 0:
337 if (mt7915_debugfs_rx_log(dev, data, len))
338 return;
339
340 type = "WM";
341 break;
342 case 2:
343 type = "WA";
344 break;
345 default:
346 type = "unknown";
347 break;
348 }
349
350 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
351 }
352
353 static void
mt7915_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)354 mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
355 {
356 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)
357 return;
358
359 ieee80211_color_change_finish(vif, 0);
360 }
361
362 static void
mt7915_mcu_rx_bcc_notify(struct mt7915_dev * dev,struct sk_buff * skb)363 mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb)
364 {
365 struct mt76_phy *mphy = &dev->mt76.phy;
366 struct mt7915_mcu_bcc_notify *b;
367
368 b = (struct mt7915_mcu_bcc_notify *)skb->data;
369
370 if (b->band_idx > MT_BAND1)
371 return;
372
373 if ((b->band_idx && !dev->phy.mt76->band_idx) &&
374 dev->mt76.phys[MT_BAND1])
375 mphy = dev->mt76.phys[MT_BAND1];
376
377 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
378 IEEE80211_IFACE_ITER_RESUME_ALL,
379 mt7915_mcu_cca_finish, mphy->hw);
380 }
381
382 static void
mt7915_mcu_rx_ext_event(struct mt7915_dev * dev,struct sk_buff * skb)383 mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)
384 {
385 struct mt76_connac2_mcu_rxd *rxd;
386
387 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
388 switch (rxd->ext_eid) {
389 case MCU_EXT_EVENT_THERMAL_PROTECT:
390 mt7915_mcu_rx_thermal_notify(dev, skb);
391 break;
392 case MCU_EXT_EVENT_RDD_REPORT:
393 mt7915_mcu_rx_radar_detected(dev, skb);
394 break;
395 case MCU_EXT_EVENT_CSA_NOTIFY:
396 mt7915_mcu_rx_csa_notify(dev, skb);
397 break;
398 case MCU_EXT_EVENT_FW_LOG_2_HOST:
399 mt7915_mcu_rx_log_message(dev, skb);
400 break;
401 case MCU_EXT_EVENT_BCC_NOTIFY:
402 mt7915_mcu_rx_bcc_notify(dev, skb);
403 break;
404 default:
405 break;
406 }
407 }
408
409 static void
mt7915_mcu_rx_unsolicited_event(struct mt7915_dev * dev,struct sk_buff * skb)410 mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb)
411 {
412 struct mt76_connac2_mcu_rxd *rxd;
413
414 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
415 switch (rxd->eid) {
416 case MCU_EVENT_EXT:
417 mt7915_mcu_rx_ext_event(dev, skb);
418 break;
419 default:
420 break;
421 }
422 dev_kfree_skb(skb);
423 }
424
mt7915_mcu_rx_event(struct mt7915_dev * dev,struct sk_buff * skb)425 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb)
426 {
427 struct mt76_connac2_mcu_rxd *rxd;
428
429 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
430 if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT ||
431 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
432 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP ||
433 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC ||
434 rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY ||
435 !rxd->seq) &&
436 !(rxd->eid == MCU_CMD_EXT_CID &&
437 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
438 mt7915_mcu_rx_unsolicited_event(dev, skb);
439 else
440 mt76_mcu_rx_event(&dev->mt76, skb);
441 }
442
443 static struct tlv *
mt7915_mcu_add_nested_subtlv(struct sk_buff * skb,int sub_tag,int sub_len,__le16 * sub_ntlv,__le16 * len)444 mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len,
445 __le16 *sub_ntlv, __le16 *len)
446 {
447 struct tlv *ptlv, tlv = {
448 .tag = cpu_to_le16(sub_tag),
449 .len = cpu_to_le16(sub_len),
450 };
451
452 ptlv = skb_put_zero(skb, sub_len);
453 memcpy(ptlv, &tlv, sizeof(tlv));
454
455 le16_add_cpu(sub_ntlv, 1);
456 le16_add_cpu(len, sub_len);
457
458 return ptlv;
459 }
460
461 /** bss info **/
462 struct mt7915_he_obss_narrow_bw_ru_data {
463 bool tolerated;
464 };
465
mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy * wiphy,struct cfg80211_bss * bss,void * _data)466 static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy,
467 struct cfg80211_bss *bss,
468 void *_data)
469 {
470 struct mt7915_he_obss_narrow_bw_ru_data *data = _data;
471 const struct element *elem;
472
473 rcu_read_lock();
474 elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY);
475
476 if (!elem || elem->datalen <= 10 ||
477 !(elem->data[10] &
478 WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT))
479 data->tolerated = false;
480
481 rcu_read_unlock();
482 }
483
mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw * hw,struct ieee80211_vif * vif)484 static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw,
485 struct ieee80211_vif *vif)
486 {
487 struct mt7915_he_obss_narrow_bw_ru_data iter_data = {
488 .tolerated = true,
489 };
490
491 if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR))
492 return false;
493
494 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper,
495 mt7915_check_he_obss_narrow_bw_ru_iter,
496 &iter_data);
497
498 /*
499 * If there is at least one AP on radar channel that cannot
500 * tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU.
501 */
502 return !iter_data.tolerated;
503 }
504
505 static void
mt7915_mcu_bss_rfch_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)506 mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
507 struct mt7915_phy *phy)
508 {
509 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
510 struct bss_info_rf_ch *ch;
511 struct tlv *tlv;
512 int freq1 = chandef->center_freq1;
513
514 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch));
515
516 ch = (struct bss_info_rf_ch *)tlv;
517 ch->pri_ch = chandef->chan->hw_value;
518 ch->center_ch0 = ieee80211_frequency_to_channel(freq1);
519 ch->bw = mt76_connac_chan_bw(chandef);
520
521 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
522 int freq2 = chandef->center_freq2;
523
524 ch->center_ch1 = ieee80211_frequency_to_channel(freq2);
525 }
526
527 if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) {
528 struct mt76_phy *mphy = phy->mt76;
529
530 ch->he_ru26_block =
531 mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif);
532 ch->he_all_disable = false;
533 } else {
534 ch->he_all_disable = true;
535 }
536 }
537
538 static void
mt7915_mcu_bss_ra_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)539 mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
540 struct mt7915_phy *phy)
541 {
542 int max_nss = hweight8(phy->mt76->antenna_mask);
543 struct bss_info_ra *ra;
544 struct tlv *tlv;
545
546 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra));
547
548 ra = (struct bss_info_ra *)tlv;
549 ra->op_mode = vif->type == NL80211_IFTYPE_AP;
550 ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC;
551 ra->short_preamble = true;
552 ra->tx_streams = max_nss;
553 ra->rx_streams = max_nss;
554 ra->algo = 4;
555 ra->train_up_rule = 2;
556 ra->train_up_high_thres = 110;
557 ra->train_up_rule_rssi = -70;
558 ra->low_traffic_thres = 2;
559 ra->phy_cap = cpu_to_le32(0xfdf);
560 ra->interval = cpu_to_le32(500);
561 ra->fast_interval = cpu_to_le32(100);
562 }
563
564 static void
mt7915_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)565 mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
566 struct mt7915_phy *phy)
567 {
568 #define DEFAULT_HE_PE_DURATION 4
569 #define DEFAULT_HE_DURATION_RTS_THRES 1023
570 const struct ieee80211_sta_he_cap *cap;
571 struct bss_info_he *he;
572 struct tlv *tlv;
573
574 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
575
576 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he));
577
578 he = (struct bss_info_he *)tlv;
579 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
580 if (!he->he_pe_duration)
581 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
582
583 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
584 if (!he->he_rts_thres)
585 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
586
587 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
588 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
589 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
590 }
591
592 static void
mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff * skb)593 mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb)
594 {
595 #define TXD_CMP_MAP1 GENMASK(15, 0)
596 #define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23))
597 struct bss_info_hw_amsdu *amsdu;
598 struct tlv *tlv;
599
600 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu));
601
602 amsdu = (struct bss_info_hw_amsdu *)tlv;
603 amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1);
604 amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2);
605 amsdu->trig_thres = cpu_to_le16(2);
606 amsdu->enable = true;
607 }
608
609 static void
mt7915_mcu_bss_bmc_tlv(struct sk_buff * skb,struct mt7915_phy * phy)610 mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy)
611 {
612 struct bss_info_bmc_rate *bmc;
613 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
614 enum nl80211_band band = chandef->chan->band;
615 struct tlv *tlv;
616
617 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc));
618
619 bmc = (struct bss_info_bmc_rate *)tlv;
620 if (band == NL80211_BAND_2GHZ) {
621 bmc->short_preamble = true;
622 } else {
623 bmc->bc_trans = cpu_to_le16(0x2000);
624 bmc->mc_trans = cpu_to_le16(0x2080);
625 }
626 }
627
628 static int
mt7915_mcu_muar_config(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool bssid,bool enable)629 mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif,
630 bool bssid, bool enable)
631 {
632 struct mt7915_dev *dev = phy->dev;
633 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
634 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
635 u32 mask = phy->omac_mask >> 32 & ~BIT(idx);
636 const u8 *addr = vif->addr;
637 struct {
638 u8 mode;
639 u8 force_clear;
640 u8 clear_bitmap[8];
641 u8 entry_count;
642 u8 write;
643 u8 band;
644
645 u8 index;
646 u8 bssid;
647 u8 addr[ETH_ALEN];
648 } __packed req = {
649 .mode = !!mask || enable,
650 .entry_count = 1,
651 .write = 1,
652 .band = phy->mt76->band_idx,
653 .index = idx * 2 + bssid,
654 };
655
656 if (bssid)
657 addr = vif->bss_conf.bssid;
658
659 if (enable)
660 ether_addr_copy(req.addr, addr);
661
662 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req,
663 sizeof(req), true);
664 }
665
mt7915_mcu_add_bss_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,int enable)666 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
667 struct ieee80211_vif *vif, int enable)
668 {
669 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
670 struct mt7915_dev *dev = phy->dev;
671 struct sk_buff *skb;
672
673 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
674 mt7915_mcu_muar_config(phy, vif, false, enable);
675 mt7915_mcu_muar_config(phy, vif, true, enable);
676 }
677
678 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
679 MT7915_BSS_UPDATE_MAX_SIZE);
680 if (IS_ERR(skb))
681 return PTR_ERR(skb);
682
683 /* bss_omac must be first */
684 if (enable)
685 mt76_connac_mcu_bss_omac_tlv(skb, vif);
686
687 mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
688 mvif->sta.wcid.idx, enable);
689
690 if (vif->type == NL80211_IFTYPE_MONITOR)
691 goto out;
692
693 if (enable) {
694 mt7915_mcu_bss_rfch_tlv(skb, vif, phy);
695 mt7915_mcu_bss_bmc_tlv(skb, phy);
696 mt7915_mcu_bss_ra_tlv(skb, vif, phy);
697 mt7915_mcu_bss_hw_amsdu_tlv(skb);
698
699 if (vif->bss_conf.he_support)
700 mt7915_mcu_bss_he_tlv(skb, vif, phy);
701
702 if (mvif->mt76.omac_idx >= EXT_BSSID_START &&
703 mvif->mt76.omac_idx < REPEATER_BSSID_START)
704 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76);
705 }
706 out:
707 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
708 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
709 }
710
711 /** starec & wtbl **/
mt7915_mcu_add_tx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)712 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
713 struct ieee80211_ampdu_params *params,
714 bool enable)
715 {
716 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
717 struct mt7915_vif *mvif = msta->vif;
718 int ret;
719
720 mt76_worker_disable(&dev->mt76.tx_worker);
721 if (enable && !params->amsdu)
722 msta->wcid.amsdu = false;
723 ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
724 MCU_EXT_CMD(STA_REC_UPDATE),
725 enable, true);
726 mt76_worker_enable(&dev->mt76.tx_worker);
727
728 return ret;
729 }
730
mt7915_mcu_add_rx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)731 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
732 struct ieee80211_ampdu_params *params,
733 bool enable)
734 {
735 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
736 struct mt7915_vif *mvif = msta->vif;
737
738 return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
739 MCU_EXT_CMD(STA_REC_UPDATE),
740 enable, false);
741 }
742
743 static void
mt7915_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)744 mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
745 struct ieee80211_vif *vif)
746 {
747 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
748 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
749 struct ieee80211_he_mcs_nss_supp mcs_map;
750 struct sta_rec_he *he;
751 struct tlv *tlv;
752 u32 cap = 0;
753
754 if (!sta->deflink.he_cap.has_he)
755 return;
756
757 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
758
759 he = (struct sta_rec_he *)tlv;
760
761 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
762 cap |= STA_REC_HE_CAP_HTC;
763
764 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
765 cap |= STA_REC_HE_CAP_BSR;
766
767 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
768 cap |= STA_REC_HE_CAP_OM;
769
770 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
771 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
772
773 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
774 cap |= STA_REC_HE_CAP_BQR;
775
776 if (elem->phy_cap_info[0] &
777 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
778 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
779 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
780
781 if (mvif->cap.he_ldpc &&
782 (elem->phy_cap_info[1] &
783 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD))
784 cap |= STA_REC_HE_CAP_LDPC;
785
786 if (elem->phy_cap_info[1] &
787 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
788 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
789
790 if (elem->phy_cap_info[2] &
791 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
792 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
793
794 if (elem->phy_cap_info[2] &
795 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
796 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
797
798 if (elem->phy_cap_info[2] &
799 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
800 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
801
802 if (elem->phy_cap_info[6] &
803 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB)
804 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
805
806 if (elem->phy_cap_info[6] &
807 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
808 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
809
810 if (elem->phy_cap_info[7] &
811 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
812 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
813
814 if (elem->phy_cap_info[7] &
815 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
816 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
817
818 if (elem->phy_cap_info[7] &
819 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
820 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
821
822 if (elem->phy_cap_info[8] &
823 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
824 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
825
826 if (elem->phy_cap_info[8] &
827 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
828 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
829
830 if (elem->phy_cap_info[9] &
831 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
832 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
833
834 if (elem->phy_cap_info[9] &
835 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
836 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
837
838 he->he_cap = cpu_to_le32(cap);
839
840 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
841 switch (sta->deflink.bandwidth) {
842 case IEEE80211_STA_RX_BW_160:
843 if (elem->phy_cap_info[0] &
844 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
845 mt7915_mcu_set_sta_he_mcs(sta,
846 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
847 le16_to_cpu(mcs_map.rx_mcs_80p80));
848
849 mt7915_mcu_set_sta_he_mcs(sta,
850 &he->max_nss_mcs[CMD_HE_MCS_BW160],
851 le16_to_cpu(mcs_map.rx_mcs_160));
852 fallthrough;
853 default:
854 mt7915_mcu_set_sta_he_mcs(sta,
855 &he->max_nss_mcs[CMD_HE_MCS_BW80],
856 le16_to_cpu(mcs_map.rx_mcs_80));
857 break;
858 }
859
860 he->t_frame_dur =
861 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
862 he->max_ampdu_exp =
863 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
864
865 he->bw_set =
866 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
867 he->device_class =
868 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
869 he->punc_pream_rx =
870 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
871
872 he->dcm_tx_mode =
873 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
874 he->dcm_tx_max_nss =
875 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
876 he->dcm_rx_mode =
877 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
878 he->dcm_rx_max_nss =
879 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
880 he->dcm_rx_max_nss =
881 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
882
883 he->pkt_ext = 2;
884 }
885
886 static void
mt7915_mcu_sta_muru_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)887 mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
888 struct ieee80211_sta *sta, struct ieee80211_vif *vif)
889 {
890 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
891 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
892 struct sta_rec_muru *muru;
893 struct tlv *tlv;
894
895 if (vif->type != NL80211_IFTYPE_STATION &&
896 vif->type != NL80211_IFTYPE_AP)
897 return;
898
899 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
900
901 muru = (struct sta_rec_muru *)tlv;
902
903 muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
904 mvif->cap.vht_mu_ebfer ||
905 mvif->cap.vht_mu_ebfee;
906 if (!is_mt7915(&dev->mt76))
907 muru->cfg.mimo_ul_en = true;
908 muru->cfg.ofdma_dl_en = true;
909
910 if (sta->deflink.vht_cap.vht_supported)
911 muru->mimo_dl.vht_mu_bfee =
912 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
913
914 if (!sta->deflink.he_cap.has_he)
915 return;
916
917 muru->mimo_dl.partial_bw_dl_mimo =
918 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
919
920 muru->mimo_ul.full_ul_mimo =
921 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
922 muru->mimo_ul.partial_ul_mimo =
923 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
924
925 muru->ofdma_dl.punc_pream_rx =
926 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
927 muru->ofdma_dl.he_20m_in_40m_2g =
928 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
929 muru->ofdma_dl.he_20m_in_160m =
930 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
931 muru->ofdma_dl.he_80m_in_160m =
932 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
933
934 muru->ofdma_ul.t_frame_dur =
935 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
936 muru->ofdma_ul.mu_cascading =
937 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
938 muru->ofdma_ul.uo_ra =
939 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
940 muru->ofdma_ul.rx_ctrl_frame_to_mbss =
941 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);
942 }
943
944 static void
mt7915_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)945 mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
946 {
947 struct sta_rec_ht *ht;
948 struct tlv *tlv;
949
950 if (!sta->deflink.ht_cap.ht_supported)
951 return;
952
953 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
954
955 ht = (struct sta_rec_ht *)tlv;
956 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
957 }
958
959 static void
mt7915_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)960 mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
961 {
962 struct sta_rec_vht *vht;
963 struct tlv *tlv;
964
965 if (!sta->deflink.vht_cap.vht_supported)
966 return;
967
968 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
969
970 vht = (struct sta_rec_vht *)tlv;
971 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
972 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
973 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
974 }
975
976 static void
mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)977 mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
978 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
979 {
980 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
981 struct sta_rec_amsdu *amsdu;
982 struct tlv *tlv;
983
984 if (vif->type != NL80211_IFTYPE_STATION &&
985 vif->type != NL80211_IFTYPE_AP)
986 return;
987
988 if (!sta->deflink.agg.max_amsdu_len)
989 return;
990
991 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
992 amsdu = (struct sta_rec_amsdu *)tlv;
993 amsdu->max_amsdu_num = 8;
994 amsdu->amsdu_en = true;
995 msta->wcid.amsdu = true;
996
997 switch (sta->deflink.agg.max_amsdu_len) {
998 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
999 if (!is_mt7915(&dev->mt76)) {
1000 amsdu->max_mpdu_size =
1001 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1002 return;
1003 }
1004 fallthrough;
1005 case IEEE80211_MAX_MPDU_LEN_HT_7935:
1006 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1007 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1008 return;
1009 default:
1010 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1011 return;
1012 }
1013 }
1014
1015 static int
mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1016 mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1017 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1018 {
1019 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1020 struct mt7915_sta *msta;
1021 struct wtbl_req_hdr *wtbl_hdr;
1022 struct mt76_wcid *wcid;
1023 struct tlv *tlv;
1024
1025 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1026 wcid = sta ? &msta->wcid : NULL;
1027
1028 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv));
1029 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1030 WTBL_RESET_AND_SET, tlv,
1031 &skb);
1032 if (IS_ERR(wtbl_hdr))
1033 return PTR_ERR(wtbl_hdr);
1034
1035 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv,
1036 wtbl_hdr);
1037 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr);
1038 if (sta)
1039 mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv,
1040 wtbl_hdr, mvif->cap.ht_ldpc,
1041 mvif->cap.vht_ldpc);
1042
1043 return 0;
1044 }
1045
1046 static inline bool
mt7915_is_ebf_supported(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1047 mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif,
1048 struct ieee80211_sta *sta, bool bfee)
1049 {
1050 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1051 int sts = hweight16(phy->mt76->chainmask);
1052
1053 if (vif->type != NL80211_IFTYPE_STATION &&
1054 vif->type != NL80211_IFTYPE_AP)
1055 return false;
1056
1057 if (!bfee && sts < 2)
1058 return false;
1059
1060 if (sta->deflink.he_cap.has_he) {
1061 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1062
1063 if (bfee)
1064 return mvif->cap.he_su_ebfee &&
1065 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1066 else
1067 return mvif->cap.he_su_ebfer &&
1068 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1069 }
1070
1071 if (sta->deflink.vht_cap.vht_supported) {
1072 u32 cap = sta->deflink.vht_cap.cap;
1073
1074 if (bfee)
1075 return mvif->cap.vht_su_ebfee &&
1076 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1077 else
1078 return mvif->cap.vht_su_ebfer &&
1079 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1080 }
1081
1082 return false;
1083 }
1084
1085 static void
mt7915_mcu_sta_sounding_rate(struct sta_rec_bf * bf)1086 mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1087 {
1088 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1089 bf->ndp_rate = 0; /* mcs0 */
1090 bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1091 bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1092 }
1093
1094 static void
mt7915_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf)1095 mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1096 struct sta_rec_bf *bf)
1097 {
1098 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1099 u8 n = 0;
1100
1101 bf->tx_mode = MT_PHY_TYPE_HT;
1102
1103 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1104 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1105 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1106 mcs->tx_params);
1107 else if (mcs->rx_mask[3])
1108 n = 3;
1109 else if (mcs->rx_mask[2])
1110 n = 2;
1111 else if (mcs->rx_mask[1])
1112 n = 1;
1113
1114 bf->nrow = hweight8(phy->mt76->chainmask) - 1;
1115 bf->ncol = min_t(u8, bf->nrow, n);
1116 bf->ibf_ncol = n;
1117 }
1118
1119 static void
mt7915_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf,bool explicit)1120 mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1121 struct sta_rec_bf *bf, bool explicit)
1122 {
1123 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1124 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1125 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1126 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1127 u8 tx_ant = hweight8(phy->mt76->chainmask) - 1;
1128
1129 bf->tx_mode = MT_PHY_TYPE_VHT;
1130
1131 if (explicit) {
1132 u8 sts, snd_dim;
1133
1134 mt7915_mcu_sta_sounding_rate(bf);
1135
1136 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1137 pc->cap);
1138 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1139 vc->cap);
1140 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1141 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1142 bf->ibf_ncol = bf->ncol;
1143
1144 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1145 bf->nrow = 1;
1146 } else {
1147 bf->nrow = tx_ant;
1148 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1149 bf->ibf_ncol = nss_mcs;
1150
1151 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1152 bf->ibf_nrow = 1;
1153 }
1154 }
1155
1156 static void
mt7915_mcu_sta_bfer_he(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7915_phy * phy,struct sta_rec_bf * bf)1157 mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1158 struct mt7915_phy *phy, struct sta_rec_bf *bf)
1159 {
1160 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1161 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1162 const struct ieee80211_sta_he_cap *vc =
1163 mt76_connac_get_he_phy_cap(phy->mt76, vif);
1164 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1165 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1166 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1167 u8 snd_dim, sts;
1168
1169 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1170
1171 mt7915_mcu_sta_sounding_rate(bf);
1172
1173 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1174 pe->phy_cap_info[6]);
1175 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1176 pe->phy_cap_info[6]);
1177 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1178 ve->phy_cap_info[5]);
1179 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1180 pe->phy_cap_info[4]);
1181 bf->nrow = min_t(u8, snd_dim, sts);
1182 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1183 bf->ibf_ncol = bf->ncol;
1184
1185 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1186 return;
1187
1188 /* go over for 160MHz and 80p80 */
1189 if (pe->phy_cap_info[0] &
1190 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1191 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1192 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1193
1194 bf->ncol_gt_bw80 = nss_mcs;
1195 }
1196
1197 if (pe->phy_cap_info[0] &
1198 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1199 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1200 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1201
1202 if (bf->ncol_gt_bw80)
1203 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1204 else
1205 bf->ncol_gt_bw80 = nss_mcs;
1206 }
1207
1208 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1209 ve->phy_cap_info[5]);
1210 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1211 pe->phy_cap_info[4]);
1212
1213 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1214 }
1215
1216 static void
mt7915_mcu_sta_bfer_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1217 mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1218 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1219 {
1220 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1221 struct mt7915_phy *phy = mvif->phy;
1222 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1223 struct sta_rec_bf *bf;
1224 struct tlv *tlv;
1225 static const u8 matrix[4][4] = {
1226 {0, 0, 0, 0},
1227 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1228 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1229 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1230 };
1231 bool ebf;
1232
1233 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1234 return;
1235
1236 ebf = mt7915_is_ebf_supported(phy, vif, sta, false);
1237 if (!ebf && !dev->ibf)
1238 return;
1239
1240 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1241 bf = (struct sta_rec_bf *)tlv;
1242
1243 /* he: eBF only, in accordance with spec
1244 * vht: support eBF and iBF
1245 * ht: iBF only, since mac80211 lacks of eBF support
1246 */
1247 if (sta->deflink.he_cap.has_he && ebf)
1248 mt7915_mcu_sta_bfer_he(sta, vif, phy, bf);
1249 else if (sta->deflink.vht_cap.vht_supported)
1250 mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1251 else if (sta->deflink.ht_cap.ht_supported)
1252 mt7915_mcu_sta_bfer_ht(sta, phy, bf);
1253 else
1254 return;
1255
1256 bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1257 bf->bw = sta->deflink.bandwidth;
1258 bf->ibf_dbw = sta->deflink.bandwidth;
1259 bf->ibf_nrow = tx_ant;
1260
1261 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1262 bf->ibf_timeout = 0x48;
1263 else
1264 bf->ibf_timeout = 0x18;
1265
1266 if (ebf && bf->nrow != tx_ant)
1267 bf->mem_20m = matrix[tx_ant][bf->ncol];
1268 else
1269 bf->mem_20m = matrix[bf->nrow][bf->ncol];
1270
1271 switch (sta->deflink.bandwidth) {
1272 case IEEE80211_STA_RX_BW_160:
1273 case IEEE80211_STA_RX_BW_80:
1274 bf->mem_total = bf->mem_20m * 2;
1275 break;
1276 case IEEE80211_STA_RX_BW_40:
1277 bf->mem_total = bf->mem_20m;
1278 break;
1279 case IEEE80211_STA_RX_BW_20:
1280 default:
1281 break;
1282 }
1283 }
1284
1285 static void
mt7915_mcu_sta_bfee_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1286 mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1287 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1288 {
1289 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1290 struct mt7915_phy *phy = mvif->phy;
1291 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1292 struct sta_rec_bfee *bfee;
1293 struct tlv *tlv;
1294 u8 nrow = 0;
1295
1296 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1297 return;
1298
1299 if (!mt7915_is_ebf_supported(phy, vif, sta, true))
1300 return;
1301
1302 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1303 bfee = (struct sta_rec_bfee *)tlv;
1304
1305 if (sta->deflink.he_cap.has_he) {
1306 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1307
1308 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1309 pe->phy_cap_info[5]);
1310 } else if (sta->deflink.vht_cap.vht_supported) {
1311 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1312
1313 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1314 pc->cap);
1315 }
1316
1317 /* reply with identity matrix to avoid 2x2 BF negative gain */
1318 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1319 }
1320
1321 static enum mcu_mmps_mode
mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1322 mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1323 {
1324 switch (smps) {
1325 case IEEE80211_SMPS_OFF:
1326 return MCU_MMPS_DISABLE;
1327 case IEEE80211_SMPS_STATIC:
1328 return MCU_MMPS_STATIC;
1329 case IEEE80211_SMPS_DYNAMIC:
1330 return MCU_MMPS_DYNAMIC;
1331 default:
1332 return MCU_MMPS_DISABLE;
1333 }
1334 }
1335
mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * data,u32 field)1336 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
1337 struct ieee80211_vif *vif,
1338 struct ieee80211_sta *sta,
1339 void *data, u32 field)
1340 {
1341 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1342 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1343 struct sta_phy *phy = data;
1344 struct sta_rec_ra_fixed *ra;
1345 struct sk_buff *skb;
1346 struct tlv *tlv;
1347
1348 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1349 &msta->wcid);
1350 if (IS_ERR(skb))
1351 return PTR_ERR(skb);
1352
1353 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));
1354 ra = (struct sta_rec_ra_fixed *)tlv;
1355
1356 switch (field) {
1357 case RATE_PARAM_AUTO:
1358 break;
1359 case RATE_PARAM_FIXED:
1360 case RATE_PARAM_FIXED_MCS:
1361 case RATE_PARAM_FIXED_GI:
1362 case RATE_PARAM_FIXED_HE_LTF:
1363 if (phy)
1364 ra->phy = *phy;
1365 break;
1366 case RATE_PARAM_MMPS_UPDATE:
1367 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1368 break;
1369 case RATE_PARAM_SPE_UPDATE:
1370 ra->spe_idx = *(u8 *)data;
1371 break;
1372 default:
1373 break;
1374 }
1375 ra->field = cpu_to_le32(field);
1376
1377 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1378 MCU_EXT_CMD(STA_REC_UPDATE), true);
1379 }
1380
mt7915_mcu_add_smps(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1381 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1382 struct ieee80211_sta *sta)
1383 {
1384 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1385 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1386 struct wtbl_req_hdr *wtbl_hdr;
1387 struct tlv *sta_wtbl;
1388 struct sk_buff *skb;
1389 int ret;
1390
1391 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1392 &msta->wcid);
1393 if (IS_ERR(skb))
1394 return PTR_ERR(skb);
1395
1396 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1397 sizeof(struct tlv));
1398 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1399 WTBL_SET, sta_wtbl, &skb);
1400 if (IS_ERR(wtbl_hdr))
1401 return PTR_ERR(wtbl_hdr);
1402
1403 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr);
1404
1405 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1406 MCU_EXT_CMD(STA_REC_UPDATE), true);
1407 if (ret)
1408 return ret;
1409
1410 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL,
1411 RATE_PARAM_MMPS_UPDATE);
1412 }
1413
1414 static int
mt7915_mcu_set_spe_idx(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1415 mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1416 struct ieee80211_sta *sta)
1417 {
1418 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1419 struct mt76_phy *mphy = mvif->phy->mt76;
1420 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);
1421
1422 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx,
1423 RATE_PARAM_SPE_UPDATE);
1424 }
1425
1426 static int
mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1427 mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev,
1428 struct ieee80211_vif *vif,
1429 struct ieee80211_sta *sta)
1430 {
1431 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1432 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1433 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1434 enum nl80211_band band = chandef->chan->band;
1435 struct sta_phy phy = {};
1436 int ret, nrates = 0;
1437
1438 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \
1439 do { \
1440 u8 i, gi = mask->control[band]._gi; \
1441 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \
1442 for (i = 0; i <= sta->deflink.bandwidth; i++) { \
1443 phy.sgi |= gi << (i << (_he)); \
1444 phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\
1445 } \
1446 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
1447 if (!mask->control[band]._mcs[i]) \
1448 continue; \
1449 nrates += hweight16(mask->control[band]._mcs[i]); \
1450 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \
1451 if (_ht) \
1452 phy.mcs += 8 * i; \
1453 } \
1454 } while (0)
1455
1456 if (sta->deflink.he_cap.has_he) {
1457 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);
1458 } else if (sta->deflink.vht_cap.vht_supported) {
1459 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);
1460 } else if (sta->deflink.ht_cap.ht_supported) {
1461 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);
1462 } else {
1463 nrates = hweight32(mask->control[band].legacy);
1464 phy.mcs = ffs(mask->control[band].legacy) - 1;
1465 }
1466 #undef __sta_phy_bitrate_mask_check
1467
1468 /* fall back to auto rate control */
1469 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&
1470 mask->control[band].he_gi == GENMASK(7, 0) &&
1471 mask->control[band].he_ltf == GENMASK(7, 0) &&
1472 nrates != 1)
1473 return 0;
1474
1475 /* fixed single rate */
1476 if (nrates == 1) {
1477 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1478 RATE_PARAM_FIXED_MCS);
1479 if (ret)
1480 return ret;
1481 }
1482
1483 /* fixed GI */
1484 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||
1485 mask->control[band].he_gi != GENMASK(7, 0)) {
1486 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1487 u32 addr;
1488
1489 /* firmware updates only TXCMD but doesn't take WTBL into
1490 * account, so driver should update here to reflect the
1491 * actual txrate hardware sends out.
1492 */
1493 addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);
1494 if (sta->deflink.he_cap.has_he)
1495 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);
1496 else
1497 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);
1498
1499 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1500 RATE_PARAM_FIXED_GI);
1501 if (ret)
1502 return ret;
1503 }
1504
1505 /* fixed HE_LTF */
1506 if (mask->control[band].he_ltf != GENMASK(7, 0)) {
1507 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1508 RATE_PARAM_FIXED_HE_LTF);
1509 if (ret)
1510 return ret;
1511 }
1512
1513 return mt7915_mcu_set_spe_idx(dev, vif, sta);
1514 }
1515
1516 static void
mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1517 mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev,
1518 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1519 {
1520 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1521 struct mt76_phy *mphy = mvif->phy->mt76;
1522 struct cfg80211_chan_def *chandef = &mphy->chandef;
1523 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1524 enum nl80211_band band = chandef->chan->band;
1525 struct sta_rec_ra *ra;
1526 struct tlv *tlv;
1527 u32 supp_rate = sta->deflink.supp_rates[band];
1528 u32 cap = sta->wme ? STA_CAP_WMM : 0;
1529
1530 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
1531 ra = (struct sta_rec_ra *)tlv;
1532
1533 ra->valid = true;
1534 ra->auto_rate = true;
1535 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink);
1536 ra->channel = chandef->chan->hw_value;
1537 ra->bw = sta->deflink.bandwidth;
1538 ra->phy.bw = sta->deflink.bandwidth;
1539 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1540
1541 if (supp_rate) {
1542 supp_rate &= mask->control[band].legacy;
1543 ra->rate_len = hweight32(supp_rate);
1544
1545 if (band == NL80211_BAND_2GHZ) {
1546 ra->supp_mode = MODE_CCK;
1547 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
1548
1549 if (ra->rate_len > 4) {
1550 ra->supp_mode |= MODE_OFDM;
1551 ra->supp_ofdm_rate = supp_rate >> 4;
1552 }
1553 } else {
1554 ra->supp_mode = MODE_OFDM;
1555 ra->supp_ofdm_rate = supp_rate;
1556 }
1557 }
1558
1559 if (sta->deflink.ht_cap.ht_supported) {
1560 ra->supp_mode |= MODE_HT;
1561 ra->af = sta->deflink.ht_cap.ampdu_factor;
1562 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
1563
1564 cap |= STA_CAP_HT;
1565 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1566 cap |= STA_CAP_SGI_20;
1567 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1568 cap |= STA_CAP_SGI_40;
1569 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
1570 cap |= STA_CAP_TX_STBC;
1571 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1572 cap |= STA_CAP_RX_STBC;
1573 if (mvif->cap.ht_ldpc &&
1574 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
1575 cap |= STA_CAP_LDPC;
1576
1577 mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
1578 mask->control[band].ht_mcs);
1579 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
1580 }
1581
1582 if (sta->deflink.vht_cap.vht_supported) {
1583 u8 af;
1584
1585 ra->supp_mode |= MODE_VHT;
1586 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1587 sta->deflink.vht_cap.cap);
1588 ra->af = max_t(u8, ra->af, af);
1589
1590 cap |= STA_CAP_VHT;
1591 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1592 cap |= STA_CAP_VHT_SGI_80;
1593 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1594 cap |= STA_CAP_VHT_SGI_160;
1595 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
1596 cap |= STA_CAP_VHT_TX_STBC;
1597 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
1598 cap |= STA_CAP_VHT_RX_STBC;
1599 if (mvif->cap.vht_ldpc &&
1600 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
1601 cap |= STA_CAP_VHT_LDPC;
1602
1603 mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
1604 mask->control[band].vht_mcs);
1605 }
1606
1607 if (sta->deflink.he_cap.has_he) {
1608 ra->supp_mode |= MODE_HE;
1609 cap |= STA_CAP_HE;
1610
1611 if (sta->deflink.he_6ghz_capa.capa)
1612 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1613 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1614 }
1615
1616 ra->sta_cap = cpu_to_le32(cap);
1617 }
1618
mt7915_mcu_add_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)1619 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1620 struct ieee80211_sta *sta, bool changed)
1621 {
1622 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1623 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1624 struct sk_buff *skb;
1625 int ret;
1626
1627 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1628 &msta->wcid);
1629 if (IS_ERR(skb))
1630 return PTR_ERR(skb);
1631
1632 /* firmware rc algorithm refers to sta_rec_he for HE control.
1633 * once dev->rc_work changes the settings driver should also
1634 * update sta_rec_he here.
1635 */
1636 if (changed)
1637 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1638
1639 /* sta_rec_ra accommodates BW, NSS and only MCS range format
1640 * i.e 0-{7,8,9} for VHT.
1641 */
1642 mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
1643
1644 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1645 MCU_EXT_CMD(STA_REC_UPDATE), true);
1646 if (ret)
1647 return ret;
1648
1649 /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE,
1650 * and updates as peer fixed rate parameters, which overrides
1651 * sta_rec_ra and firmware rate control algorithm.
1652 */
1653 return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta);
1654 }
1655
1656 static int
mt7915_mcu_add_group(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1657 mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1658 struct ieee80211_sta *sta)
1659 {
1660 #define MT_STA_BSS_GROUP 1
1661 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1662 struct mt7915_sta *msta;
1663 struct {
1664 __le32 action;
1665 u8 wlan_idx_lo;
1666 u8 status;
1667 u8 wlan_idx_hi;
1668 u8 rsv0[5];
1669 __le32 val;
1670 u8 rsv1[8];
1671 } __packed req = {
1672 .action = cpu_to_le32(MT_STA_BSS_GROUP),
1673 .val = cpu_to_le32(mvif->mt76.idx % 16),
1674 };
1675
1676 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1677 req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx);
1678 req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx);
1679
1680 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req,
1681 sizeof(req), true);
1682 }
1683
mt7915_mcu_add_sta(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,int conn_state,bool newly)1684 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1685 struct ieee80211_sta *sta, int conn_state, bool newly)
1686 {
1687 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1688 struct ieee80211_link_sta *link_sta;
1689 struct mt7915_sta *msta;
1690 struct sk_buff *skb;
1691 int ret;
1692
1693 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1694 link_sta = sta ? &sta->deflink : NULL;
1695
1696 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1697 &msta->wcid);
1698 if (IS_ERR(skb))
1699 return PTR_ERR(skb);
1700
1701 /* starec basic */
1702 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta,
1703 conn_state, newly);
1704 /* tag order is in accordance with firmware dependency. */
1705 if (sta && conn_state != CONN_STATE_DISCONNECT) {
1706 /* starec bfer */
1707 mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta);
1708 /* starec ht */
1709 mt7915_mcu_sta_ht_tlv(skb, sta);
1710 /* starec vht */
1711 mt7915_mcu_sta_vht_tlv(skb, sta);
1712 /* starec uapsd */
1713 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
1714 }
1715
1716 if (newly || conn_state != CONN_STATE_DISCONNECT) {
1717 ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta);
1718 if (ret) {
1719 dev_kfree_skb(skb);
1720 return ret;
1721 }
1722 }
1723
1724 if (conn_state == CONN_STATE_DISCONNECT)
1725 goto out;
1726
1727 if (sta) {
1728 /* starec amsdu */
1729 mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
1730 /* starec he */
1731 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1732 /* starec muru */
1733 mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif);
1734 /* starec bfee */
1735 mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta);
1736 }
1737
1738 ret = mt7915_mcu_add_group(dev, vif, sta);
1739 if (ret) {
1740 dev_kfree_skb(skb);
1741 return ret;
1742 }
1743 out:
1744 ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb);
1745 if (ret)
1746 return ret;
1747
1748 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1749 MCU_EXT_CMD(STA_REC_UPDATE), true);
1750 }
1751
mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev * dev)1752 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev)
1753 {
1754 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
1755 struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
1756 struct {
1757 __le32 args[2];
1758 } req = {
1759 .args[0] = cpu_to_le32(1),
1760 .args[1] = cpu_to_le32(6),
1761 };
1762
1763 return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL,
1764 &req, sizeof(req));
1765 #else
1766 return 0;
1767 #endif
1768 }
1769
mt7915_mcu_add_dev_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool enable)1770 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
1771 struct ieee80211_vif *vif, bool enable)
1772 {
1773 struct mt7915_dev *dev = phy->dev;
1774 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1775 struct {
1776 struct req_hdr {
1777 u8 omac_idx;
1778 u8 band_idx;
1779 __le16 tlv_num;
1780 u8 is_tlv_append;
1781 u8 rsv[3];
1782 } __packed hdr;
1783 struct req_tlv {
1784 __le16 tag;
1785 __le16 len;
1786 u8 active;
1787 u8 band_idx;
1788 u8 omac_addr[ETH_ALEN];
1789 } __packed tlv;
1790 } data = {
1791 .hdr = {
1792 .omac_idx = mvif->mt76.omac_idx,
1793 .band_idx = mvif->mt76.band_idx,
1794 .tlv_num = cpu_to_le16(1),
1795 .is_tlv_append = 1,
1796 },
1797 .tlv = {
1798 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1799 .len = cpu_to_le16(sizeof(struct req_tlv)),
1800 .active = enable,
1801 .band_idx = mvif->mt76.band_idx,
1802 },
1803 };
1804
1805 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
1806 return mt7915_mcu_muar_config(phy, vif, false, enable);
1807
1808 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
1809 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE),
1810 &data, sizeof(data), true);
1811 }
1812
1813 static void
mt7915_mcu_beacon_cntdwn(struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1814 mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
1815 struct sk_buff *skb, struct bss_info_bcn *bcn,
1816 struct ieee80211_mutable_offsets *offs)
1817 {
1818 struct bss_info_bcn_cntdwn *info;
1819 struct tlv *tlv;
1820 int sub_tag;
1821
1822 if (!offs->cntdwn_counter_offs[0])
1823 return;
1824
1825 sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC;
1826 tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info),
1827 &bcn->sub_ntlv, &bcn->len);
1828 info = (struct bss_info_bcn_cntdwn *)tlv;
1829 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
1830 }
1831
1832 static void
mt7915_mcu_beacon_mbss(struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_vif * vif,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1833 mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,
1834 struct ieee80211_vif *vif, struct bss_info_bcn *bcn,
1835 struct ieee80211_mutable_offsets *offs)
1836 {
1837 struct bss_info_bcn_mbss *mbss;
1838 const struct element *elem;
1839 struct tlv *tlv;
1840
1841 if (!vif->bss_conf.bssid_indicator)
1842 return;
1843
1844 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID,
1845 sizeof(*mbss), &bcn->sub_ntlv,
1846 &bcn->len);
1847
1848 mbss = (struct bss_info_bcn_mbss *)tlv;
1849 mbss->offset[0] = cpu_to_le16(offs->tim_offset);
1850 mbss->bitmap = cpu_to_le32(1);
1851
1852 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,
1853 &skb->data[offs->mbssid_off],
1854 skb->len - offs->mbssid_off) {
1855 const struct element *sub_elem;
1856
1857 if (elem->datalen < 2)
1858 continue;
1859
1860 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {
1861 const struct ieee80211_bssid_index *idx;
1862 const u8 *idx_ie;
1863
1864 if (sub_elem->id || sub_elem->datalen < 4)
1865 continue; /* not a valid BSS profile */
1866
1867 /* Find WLAN_EID_MULTI_BSSID_IDX
1868 * in the merged nontransmitted profile
1869 */
1870 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,
1871 sub_elem->data,
1872 sub_elem->datalen);
1873 if (!idx_ie || idx_ie[1] < sizeof(*idx))
1874 continue;
1875
1876 idx = (void *)(idx_ie + 2);
1877 if (!idx->bssid_index || idx->bssid_index > 31)
1878 continue;
1879
1880 mbss->offset[idx->bssid_index] =
1881 cpu_to_le16(idx_ie - skb->data);
1882 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));
1883 }
1884 }
1885 }
1886
1887 static void
mt7915_mcu_beacon_cont(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1888 mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1889 struct sk_buff *rskb, struct sk_buff *skb,
1890 struct bss_info_bcn *bcn,
1891 struct ieee80211_mutable_offsets *offs)
1892 {
1893 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1894 struct bss_info_bcn_cont *cont;
1895 struct tlv *tlv;
1896 u8 *buf;
1897 int len = sizeof(*cont) + MT_TXD_SIZE + skb->len;
1898
1899 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
1900 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT,
1901 len, &bcn->sub_ntlv, &bcn->len);
1902
1903 cont = (struct bss_info_bcn_cont *)tlv;
1904 cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1905 cont->tim_ofs = cpu_to_le16(offs->tim_offset);
1906
1907 if (offs->cntdwn_counter_offs[0]) {
1908 u16 offset = offs->cntdwn_counter_offs[0];
1909
1910 if (vif->bss_conf.csa_active)
1911 cont->csa_ofs = cpu_to_le16(offset - 4);
1912 if (vif->bss_conf.color_change_active)
1913 cont->bcc_ofs = cpu_to_le16(offset - 3);
1914 }
1915
1916 buf = (u8 *)tlv + sizeof(*cont);
1917 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
1918 0, BSS_CHANGED_BEACON);
1919 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
1920 }
1921
1922 int
mt7915_mcu_add_inband_discov(struct mt7915_dev * dev,struct ieee80211_vif * vif,u32 changed)1923 mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1924 u32 changed)
1925 {
1926 #define OFFLOAD_TX_MODE_SU BIT(0)
1927 #define OFFLOAD_TX_MODE_MU BIT(1)
1928 struct ieee80211_hw *hw = mt76_hw(dev);
1929 struct mt7915_phy *phy = mt7915_hw_phy(hw);
1930 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1931 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1932 enum nl80211_band band = chandef->chan->band;
1933 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1934 struct bss_info_bcn *bcn;
1935 struct bss_info_inband_discovery *discov;
1936 struct ieee80211_tx_info *info;
1937 struct sk_buff *rskb, *skb = NULL;
1938 struct tlv *tlv, *sub_tlv;
1939 bool ext_phy = phy != &dev->phy;
1940 u8 *buf, interval;
1941 int len;
1942
1943 if (vif->bss_conf.nontransmitted)
1944 return 0;
1945
1946 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
1947 MT7915_MAX_BSS_OFFLOAD_SIZE);
1948 if (IS_ERR(rskb))
1949 return PTR_ERR(rskb);
1950
1951 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
1952 bcn = (struct bss_info_bcn *)tlv;
1953 bcn->enable = true;
1954
1955 if (changed & BSS_CHANGED_FILS_DISCOVERY) {
1956 interval = vif->bss_conf.fils_discovery.max_interval;
1957 skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
1958 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
1959 vif->bss_conf.unsol_bcast_probe_resp_interval) {
1960 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
1961 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
1962 }
1963
1964 if (!skb) {
1965 dev_kfree_skb(rskb);
1966 return -EINVAL;
1967 }
1968
1969 info = IEEE80211_SKB_CB(skb);
1970 info->control.vif = vif;
1971 info->band = band;
1972 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
1973
1974 len = sizeof(*discov) + MT_TXD_SIZE + skb->len;
1975 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
1976
1977 if (skb->len > MT7915_MAX_BEACON_SIZE) {
1978 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
1979 dev_kfree_skb(rskb);
1980 dev_kfree_skb(skb);
1981 return -EINVAL;
1982 }
1983
1984 sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV,
1985 len, &bcn->sub_ntlv, &bcn->len);
1986 discov = (struct bss_info_inband_discovery *)sub_tlv;
1987 discov->tx_mode = OFFLOAD_TX_MODE_SU;
1988 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
1989 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
1990 discov->tx_interval = interval;
1991 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1992 discov->enable = !!interval;
1993
1994 buf = (u8 *)sub_tlv + sizeof(*discov);
1995
1996 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
1997 0, changed);
1998 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
1999
2000 dev_kfree_skb(skb);
2001
2002 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2003 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2004 }
2005
mt7915_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,int en,u32 changed)2006 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2007 int en, u32 changed)
2008 {
2009 struct mt7915_dev *dev = mt7915_hw_dev(hw);
2010 struct mt7915_phy *phy = mt7915_hw_phy(hw);
2011 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2012 struct ieee80211_mutable_offsets offs;
2013 struct ieee80211_tx_info *info;
2014 struct sk_buff *skb, *rskb;
2015 struct tlv *tlv;
2016 struct bss_info_bcn *bcn;
2017 int len = MT7915_MAX_BSS_OFFLOAD_SIZE;
2018 bool ext_phy = phy != &dev->phy;
2019
2020 if (vif->bss_conf.nontransmitted)
2021 return 0;
2022
2023 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
2024 NULL, len);
2025 if (IS_ERR(rskb))
2026 return PTR_ERR(rskb);
2027
2028 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
2029 bcn = (struct bss_info_bcn *)tlv;
2030 bcn->enable = en;
2031
2032 if (!en)
2033 goto out;
2034
2035 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2036 if (!skb) {
2037 dev_kfree_skb(rskb);
2038 return -EINVAL;
2039 }
2040
2041 if (skb->len > MT7915_MAX_BEACON_SIZE) {
2042 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2043 dev_kfree_skb(rskb);
2044 dev_kfree_skb(skb);
2045 return -EINVAL;
2046 }
2047
2048 info = IEEE80211_SKB_CB(skb);
2049 info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
2050
2051 mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs);
2052 mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs);
2053 mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2054 dev_kfree_skb(skb);
2055
2056 out:
2057 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2058 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2059 }
2060
mt7915_driver_own(struct mt7915_dev * dev,u8 band)2061 static int mt7915_driver_own(struct mt7915_dev *dev, u8 band)
2062 {
2063 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2064 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2065 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2066 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2067 return -EIO;
2068 }
2069
2070 /* clear irq when the driver own success */
2071 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2072 MT_TOP_LPCR_HOST_BAND_STAT);
2073
2074 return 0;
2075 }
2076
2077 static int
mt7915_firmware_state(struct mt7915_dev * dev,bool wa)2078 mt7915_firmware_state(struct mt7915_dev *dev, bool wa)
2079 {
2080 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2081 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2082
2083 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2084 state, 1000)) {
2085 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2086 return -EIO;
2087 }
2088 return 0;
2089 }
2090
mt7915_load_firmware(struct mt7915_dev * dev)2091 static int mt7915_load_firmware(struct mt7915_dev *dev)
2092 {
2093 int ret;
2094
2095 /* make sure fw is download state */
2096 if (mt7915_firmware_state(dev, false)) {
2097 /* restart firmware once */
2098 mt76_connac_mcu_restart(&dev->mt76);
2099 ret = mt7915_firmware_state(dev, false);
2100 if (ret) {
2101 dev_err(dev->mt76.dev,
2102 "Firmware is not ready for download\n");
2103 return ret;
2104 }
2105 }
2106
2107 ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH));
2108 if (ret)
2109 return ret;
2110
2111 ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM),
2112 fw_name(dev, FIRMWARE_WA));
2113 if (ret)
2114 return ret;
2115
2116 ret = mt7915_firmware_state(dev, true);
2117 if (ret)
2118 return ret;
2119
2120 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2121
2122 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2123
2124 return 0;
2125 }
2126
mt7915_mcu_fw_log_2_host(struct mt7915_dev * dev,u8 type,u8 ctrl)2127 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl)
2128 {
2129 struct {
2130 u8 ctrl_val;
2131 u8 pad[3];
2132 } data = {
2133 .ctrl_val = ctrl
2134 };
2135
2136 if (type == MCU_FW_LOG_WA)
2137 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST),
2138 &data, sizeof(data), true);
2139
2140 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data,
2141 sizeof(data), true);
2142 }
2143
mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev * dev,u32 module,u8 level)2144 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level)
2145 {
2146 struct {
2147 u8 ver;
2148 u8 pad;
2149 __le16 len;
2150 u8 level;
2151 u8 rsv[3];
2152 __le32 module_idx;
2153 } data = {
2154 .module_idx = cpu_to_le32(module),
2155 .level = level,
2156 };
2157
2158 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data,
2159 sizeof(data), false);
2160 }
2161
mt7915_mcu_muru_debug_set(struct mt7915_dev * dev,bool enabled)2162 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled)
2163 {
2164 struct {
2165 __le32 cmd;
2166 u8 enable;
2167 } data = {
2168 .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN),
2169 .enable = enabled,
2170 };
2171
2172 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data,
2173 sizeof(data), false);
2174 }
2175
mt7915_mcu_muru_debug_get(struct mt7915_phy * phy)2176 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy)
2177 {
2178 struct mt7915_dev *dev = phy->dev;
2179 struct sk_buff *skb;
2180 struct mt7915_mcu_muru_stats *mu_stats;
2181 int ret;
2182
2183 struct {
2184 __le32 cmd;
2185 u8 band_idx;
2186 } req = {
2187 .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS),
2188 .band_idx = phy->mt76->band_idx,
2189 };
2190
2191 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL),
2192 &req, sizeof(req), true, &skb);
2193 if (ret)
2194 return ret;
2195
2196 mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data);
2197
2198 /* accumulate stats, these are clear-on-read */
2199 #define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s)
2200 #define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s)
2201 __dl_u32(cck_cnt);
2202 __dl_u32(ofdm_cnt);
2203 __dl_u32(htmix_cnt);
2204 __dl_u32(htgf_cnt);
2205 __dl_u32(vht_su_cnt);
2206 __dl_u32(vht_2mu_cnt);
2207 __dl_u32(vht_3mu_cnt);
2208 __dl_u32(vht_4mu_cnt);
2209 __dl_u32(he_su_cnt);
2210 __dl_u32(he_2ru_cnt);
2211 __dl_u32(he_2mu_cnt);
2212 __dl_u32(he_3ru_cnt);
2213 __dl_u32(he_3mu_cnt);
2214 __dl_u32(he_4ru_cnt);
2215 __dl_u32(he_4mu_cnt);
2216 __dl_u32(he_5to8ru_cnt);
2217 __dl_u32(he_9to16ru_cnt);
2218 __dl_u32(he_gtr16ru_cnt);
2219
2220 __ul_u32(hetrig_su_cnt);
2221 __ul_u32(hetrig_2ru_cnt);
2222 __ul_u32(hetrig_3ru_cnt);
2223 __ul_u32(hetrig_4ru_cnt);
2224 __ul_u32(hetrig_5to8ru_cnt);
2225 __ul_u32(hetrig_9to16ru_cnt);
2226 __ul_u32(hetrig_gtr16ru_cnt);
2227 __ul_u32(hetrig_2mu_cnt);
2228 __ul_u32(hetrig_3mu_cnt);
2229 __ul_u32(hetrig_4mu_cnt);
2230 #undef __dl_u32
2231 #undef __ul_u32
2232
2233 dev_kfree_skb(skb);
2234
2235 return 0;
2236 }
2237
mt7915_mcu_set_mwds(struct mt7915_dev * dev,bool enabled)2238 static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled)
2239 {
2240 struct {
2241 u8 enable;
2242 u8 _rsv[3];
2243 } __packed req = {
2244 .enable = enabled
2245 };
2246
2247 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2248 sizeof(req), false);
2249 }
2250
mt7915_mcu_set_muru_ctrl(struct mt7915_dev * dev,u32 cmd,u32 val)2251 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val)
2252 {
2253 struct {
2254 __le32 cmd;
2255 u8 val[4];
2256 } __packed req = {
2257 .cmd = cpu_to_le32(cmd),
2258 };
2259
2260 put_unaligned_le32(val, req.val);
2261
2262 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req,
2263 sizeof(req), false);
2264 }
2265
2266 static int
mt7915_mcu_init_rx_airtime(struct mt7915_dev * dev)2267 mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)
2268 {
2269 #define RX_AIRTIME_FEATURE_CTRL 1
2270 #define RX_AIRTIME_BITWISE_CTRL 2
2271 #define RX_AIRTIME_CLEAR_EN 1
2272 struct {
2273 __le16 field;
2274 __le16 sub_field;
2275 __le32 set_status;
2276 __le32 get_status;
2277 u8 _rsv[12];
2278
2279 bool airtime_en;
2280 bool mibtime_en;
2281 bool earlyend_en;
2282 u8 _rsv1[9];
2283
2284 bool airtime_clear;
2285 bool mibtime_clear;
2286 u8 _rsv2[98];
2287 } __packed req = {
2288 .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL),
2289 .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN),
2290 .airtime_clear = true,
2291 };
2292 int ret;
2293
2294 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2295 sizeof(req), true);
2296 if (ret)
2297 return ret;
2298
2299 req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL);
2300 req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN);
2301 req.airtime_en = true;
2302
2303 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2304 sizeof(req), true);
2305 }
2306
mt7915_red_set_watermark(struct mt7915_dev * dev)2307 static int mt7915_red_set_watermark(struct mt7915_dev *dev)
2308 {
2309 #define RED_GLOBAL_TOKEN_WATERMARK 2
2310 struct {
2311 __le32 args[3];
2312 u8 cmd;
2313 u8 version;
2314 u8 __rsv1[4];
2315 __le16 len;
2316 __le16 high_mark;
2317 __le16 low_mark;
2318 u8 __rsv2[12];
2319 } __packed req = {
2320 .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),
2321 .cmd = RED_GLOBAL_TOKEN_WATERMARK,
2322 .len = cpu_to_le16(sizeof(req) - sizeof(req.args)),
2323 .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256),
2324 .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536),
2325 };
2326
2327 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,
2328 sizeof(req), false);
2329 }
2330
mt7915_mcu_set_red(struct mt7915_dev * dev,bool enabled)2331 static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
2332 {
2333 #define RED_DISABLE 0
2334 #define RED_BY_WA_ENABLE 2
2335 int ret;
2336 u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE;
2337 __le32 req = cpu_to_le32(red_type);
2338
2339 if (enabled) {
2340 ret = mt7915_red_set_watermark(dev);
2341 if (ret < 0)
2342 return ret;
2343 }
2344
2345 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,
2346 sizeof(req), false);
2347 if (ret < 0)
2348 return ret;
2349
2350 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
2351 MCU_WA_PARAM_RED, enabled, 0);
2352 }
2353
mt7915_mcu_init_firmware(struct mt7915_dev * dev)2354 int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
2355 {
2356 int ret;
2357
2358 /* force firmware operation mode into normal state,
2359 * which should be set before firmware download stage.
2360 */
2361 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
2362
2363 ret = mt7915_driver_own(dev, 0);
2364 if (ret)
2365 return ret;
2366 /* set driver own for band1 when two hif exist */
2367 if (dev->hif2) {
2368 ret = mt7915_driver_own(dev, 1);
2369 if (ret)
2370 return ret;
2371 }
2372
2373 ret = mt7915_load_firmware(dev);
2374 if (ret)
2375 return ret;
2376
2377 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
2378 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
2379 if (ret)
2380 return ret;
2381
2382 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
2383 if (ret)
2384 return ret;
2385
2386 mt76_connac_mcu_del_wtbl_all(&dev->mt76);
2387
2388 if ((mtk_wed_device_active(&dev->mt76.mmio.wed) &&
2389 is_mt7915(&dev->mt76)) ||
2390 !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
2391 mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
2392
2393 ret = mt7915_mcu_set_mwds(dev, 1);
2394 if (ret)
2395 return ret;
2396
2397 ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE,
2398 MURU_PLATFORM_TYPE_PERF_LEVEL_2);
2399 if (ret)
2400 return ret;
2401
2402 ret = mt7915_mcu_init_rx_airtime(dev);
2403 if (ret)
2404 return ret;
2405
2406 return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed));
2407 }
2408
mt7915_mcu_init(struct mt7915_dev * dev)2409 int mt7915_mcu_init(struct mt7915_dev *dev)
2410 {
2411 static const struct mt76_mcu_ops mt7915_mcu_ops = {
2412 .max_retry = 1,
2413 .headroom = sizeof(struct mt76_connac2_mcu_txd),
2414 .mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message,
2415 .mcu_skb_send_msg = mt7915_mcu_send_message,
2416 .mcu_parse_response = mt7915_mcu_parse_response,
2417 };
2418
2419 dev->mt76.mcu_ops = &mt7915_mcu_ops;
2420
2421 return mt7915_mcu_init_firmware(dev);
2422 }
2423
mt7915_mcu_exit(struct mt7915_dev * dev)2424 void mt7915_mcu_exit(struct mt7915_dev *dev)
2425 {
2426 mt76_connac_mcu_restart(&dev->mt76);
2427 if (mt7915_firmware_state(dev, false)) {
2428 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
2429 goto out;
2430 }
2431
2432 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
2433 if (dev->hif2)
2434 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
2435 MT_TOP_LPCR_HOST_FW_OWN);
2436 out:
2437 skb_queue_purge(&dev->mt76.mcu.res_q);
2438 }
2439
2440 static int
mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev * dev,int band)2441 mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band)
2442 {
2443 struct {
2444 u8 operation;
2445 u8 count;
2446 u8 _rsv[2];
2447 u8 index;
2448 u8 enable;
2449 __le16 etype;
2450 } req = {
2451 .operation = 1,
2452 .count = 1,
2453 .enable = 1,
2454 .etype = cpu_to_le16(ETH_P_PAE),
2455 };
2456
2457 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2458 &req, sizeof(req), false);
2459 }
2460
mt7915_mcu_set_mac(struct mt7915_dev * dev,int band,bool enable,bool hdr_trans)2461 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band,
2462 bool enable, bool hdr_trans)
2463 {
2464 struct {
2465 u8 operation;
2466 u8 enable;
2467 u8 check_bssid;
2468 u8 insert_vlan;
2469 u8 remove_vlan;
2470 u8 tid;
2471 u8 mode;
2472 u8 rsv;
2473 } __packed req_trans = {
2474 .enable = hdr_trans,
2475 };
2476 struct {
2477 u8 enable;
2478 u8 band;
2479 u8 rsv[2];
2480 } __packed req_mac = {
2481 .enable = enable,
2482 .band = band,
2483 };
2484 int ret;
2485
2486 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2487 &req_trans, sizeof(req_trans), false);
2488 if (ret)
2489 return ret;
2490
2491 if (hdr_trans)
2492 mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band);
2493
2494 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL),
2495 &req_mac, sizeof(req_mac), true);
2496 }
2497
mt7915_mcu_update_edca(struct mt7915_dev * dev,void * param)2498 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param)
2499 {
2500 struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param;
2501 u8 num = req->total;
2502 size_t len = sizeof(*req) -
2503 (IEEE80211_NUM_ACS - num) * sizeof(struct edca);
2504
2505 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req,
2506 len, true);
2507 }
2508
mt7915_mcu_set_tx(struct mt7915_dev * dev,struct ieee80211_vif * vif)2509 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif)
2510 {
2511 #define TX_CMD_MODE 1
2512 struct mt7915_mcu_tx req = {
2513 .valid = true,
2514 .mode = TX_CMD_MODE,
2515 .total = IEEE80211_NUM_ACS,
2516 };
2517 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2518 int ac;
2519
2520 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
2521 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
2522 struct edca *e = &req.edca[ac];
2523
2524 e->set = WMM_PARAM_SET;
2525 e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;
2526 e->aifs = q->aifs;
2527 e->txop = cpu_to_le16(q->txop);
2528
2529 if (q->cw_min)
2530 e->cw_min = fls(q->cw_min);
2531 else
2532 e->cw_min = 5;
2533
2534 if (q->cw_max)
2535 e->cw_max = cpu_to_le16(fls(q->cw_max));
2536 else
2537 e->cw_max = cpu_to_le16(10);
2538 }
2539
2540 return mt7915_mcu_update_edca(dev, &req);
2541 }
2542
mt7915_mcu_set_fcc5_lpn(struct mt7915_dev * dev,int val)2543 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val)
2544 {
2545 struct {
2546 __le32 tag;
2547 __le16 min_lpn;
2548 u8 rsv[2];
2549 } __packed req = {
2550 .tag = cpu_to_le32(0x1),
2551 .min_lpn = cpu_to_le16(val),
2552 };
2553
2554 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2555 sizeof(req), true);
2556 }
2557
mt7915_mcu_set_pulse_th(struct mt7915_dev * dev,const struct mt7915_dfs_pulse * pulse)2558 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
2559 const struct mt7915_dfs_pulse *pulse)
2560 {
2561 struct {
2562 __le32 tag;
2563
2564 __le32 max_width; /* us */
2565 __le32 max_pwr; /* dbm */
2566 __le32 min_pwr; /* dbm */
2567 __le32 min_stgr_pri; /* us */
2568 __le32 max_stgr_pri; /* us */
2569 __le32 min_cr_pri; /* us */
2570 __le32 max_cr_pri; /* us */
2571 } __packed req = {
2572 .tag = cpu_to_le32(0x3),
2573
2574 #define __req_field(field) .field = cpu_to_le32(pulse->field)
2575 __req_field(max_width),
2576 __req_field(max_pwr),
2577 __req_field(min_pwr),
2578 __req_field(min_stgr_pri),
2579 __req_field(max_stgr_pri),
2580 __req_field(min_cr_pri),
2581 __req_field(max_cr_pri),
2582 #undef __req_field
2583 };
2584
2585 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2586 sizeof(req), true);
2587 }
2588
mt7915_mcu_set_radar_th(struct mt7915_dev * dev,int index,const struct mt7915_dfs_pattern * pattern)2589 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
2590 const struct mt7915_dfs_pattern *pattern)
2591 {
2592 struct {
2593 __le32 tag;
2594 __le16 radar_type;
2595
2596 u8 enb;
2597 u8 stgr;
2598 u8 min_crpn;
2599 u8 max_crpn;
2600 u8 min_crpr;
2601 u8 min_pw;
2602 __le32 min_pri;
2603 __le32 max_pri;
2604 u8 max_pw;
2605 u8 min_crbn;
2606 u8 max_crbn;
2607 u8 min_stgpn;
2608 u8 max_stgpn;
2609 u8 min_stgpr;
2610 u8 rsv[2];
2611 __le32 min_stgpr_diff;
2612 } __packed req = {
2613 .tag = cpu_to_le32(0x2),
2614 .radar_type = cpu_to_le16(index),
2615
2616 #define __req_field_u8(field) .field = pattern->field
2617 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
2618 __req_field_u8(enb),
2619 __req_field_u8(stgr),
2620 __req_field_u8(min_crpn),
2621 __req_field_u8(max_crpn),
2622 __req_field_u8(min_crpr),
2623 __req_field_u8(min_pw),
2624 __req_field_u32(min_pri),
2625 __req_field_u32(max_pri),
2626 __req_field_u8(max_pw),
2627 __req_field_u8(min_crbn),
2628 __req_field_u8(max_crbn),
2629 __req_field_u8(min_stgpn),
2630 __req_field_u8(max_stgpn),
2631 __req_field_u8(min_stgpr),
2632 __req_field_u32(min_stgpr_diff),
2633 #undef __req_field_u8
2634 #undef __req_field_u32
2635 };
2636
2637 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2638 sizeof(req), true);
2639 }
2640
2641 static int
mt7915_mcu_background_chain_ctrl(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef,int cmd)2642 mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy,
2643 struct cfg80211_chan_def *chandef,
2644 int cmd)
2645 {
2646 struct mt7915_dev *dev = phy->dev;
2647 struct mt76_phy *mphy = phy->mt76;
2648 struct ieee80211_channel *chan = mphy->chandef.chan;
2649 int freq = mphy->chandef.center_freq1;
2650 struct mt7915_mcu_background_chain_ctrl req = {
2651 .monitor_scan_type = 2, /* simple rx */
2652 };
2653
2654 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
2655 return -EINVAL;
2656
2657 if (!cfg80211_chandef_valid(&mphy->chandef))
2658 return -EINVAL;
2659
2660 switch (cmd) {
2661 case CH_SWITCH_BACKGROUND_SCAN_START: {
2662 req.chan = chan->hw_value;
2663 req.central_chan = ieee80211_frequency_to_channel(freq);
2664 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2665 req.monitor_chan = chandef->chan->hw_value;
2666 req.monitor_central_chan =
2667 ieee80211_frequency_to_channel(chandef->center_freq1);
2668 req.monitor_bw = mt76_connac_chan_bw(chandef);
2669 req.band_idx = phy->mt76->band_idx;
2670 req.scan_mode = 1;
2671 break;
2672 }
2673 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
2674 req.monitor_chan = chandef->chan->hw_value;
2675 req.monitor_central_chan =
2676 ieee80211_frequency_to_channel(chandef->center_freq1);
2677 req.band_idx = phy->mt76->band_idx;
2678 req.scan_mode = 2;
2679 break;
2680 case CH_SWITCH_BACKGROUND_SCAN_STOP:
2681 req.chan = chan->hw_value;
2682 req.central_chan = ieee80211_frequency_to_channel(freq);
2683 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2684 req.tx_stream = hweight8(mphy->antenna_mask);
2685 req.rx_stream = mphy->antenna_mask;
2686 break;
2687 default:
2688 return -EINVAL;
2689 }
2690 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
2691
2692 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL),
2693 &req, sizeof(req), false);
2694 }
2695
mt7915_mcu_rdd_background_enable(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef)2696 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
2697 struct cfg80211_chan_def *chandef)
2698 {
2699 struct mt7915_dev *dev = phy->dev;
2700 int err, region;
2701
2702 if (!chandef) { /* disable offchain */
2703 err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, MT_RX_SEL2,
2704 0, 0);
2705 if (err)
2706 return err;
2707
2708 return mt7915_mcu_background_chain_ctrl(phy, NULL,
2709 CH_SWITCH_BACKGROUND_SCAN_STOP);
2710 }
2711
2712 err = mt7915_mcu_background_chain_ctrl(phy, chandef,
2713 CH_SWITCH_BACKGROUND_SCAN_START);
2714 if (err)
2715 return err;
2716
2717 switch (dev->mt76.region) {
2718 case NL80211_DFS_ETSI:
2719 region = 0;
2720 break;
2721 case NL80211_DFS_JP:
2722 region = 2;
2723 break;
2724 case NL80211_DFS_FCC:
2725 default:
2726 region = 1;
2727 break;
2728 }
2729
2730 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, MT_RX_SEL2,
2731 0, region);
2732 }
2733
mt7915_mcu_set_chan_info(struct mt7915_phy * phy,int cmd)2734 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd)
2735 {
2736 static const u8 ch_band[] = {
2737 [NL80211_BAND_2GHZ] = 0,
2738 [NL80211_BAND_5GHZ] = 1,
2739 [NL80211_BAND_6GHZ] = 2,
2740 };
2741 struct mt7915_dev *dev = phy->dev;
2742 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2743 int freq1 = chandef->center_freq1;
2744 u8 band = phy->mt76->band_idx;
2745 struct {
2746 u8 control_ch;
2747 u8 center_ch;
2748 u8 bw;
2749 u8 tx_path_num;
2750 u8 rx_path; /* mask or num */
2751 u8 switch_reason;
2752 u8 band_idx;
2753 u8 center_ch2; /* for 80+80 only */
2754 __le16 cac_case;
2755 u8 channel_band;
2756 u8 rsv0;
2757 __le32 outband_freq;
2758 u8 txpower_drop;
2759 u8 ap_bw;
2760 u8 ap_center_ch;
2761 u8 rsv1[57];
2762 } __packed req = {
2763 .control_ch = chandef->chan->hw_value,
2764 .center_ch = ieee80211_frequency_to_channel(freq1),
2765 .bw = mt76_connac_chan_bw(chandef),
2766 .tx_path_num = hweight16(phy->mt76->chainmask),
2767 .rx_path = phy->mt76->chainmask >> (dev->chainshift * band),
2768 .band_idx = band,
2769 .channel_band = ch_band[chandef->chan->band],
2770 };
2771
2772 #ifdef CONFIG_NL80211_TESTMODE
2773 if (phy->mt76->test.tx_antenna_mask &&
2774 mt76_testmode_enabled(phy->mt76)) {
2775 req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask);
2776 req.rx_path = phy->mt76->test.tx_antenna_mask;
2777 }
2778 #endif
2779
2780 if (mt76_connac_spe_idx(phy->mt76->antenna_mask))
2781 req.tx_path_num = fls(phy->mt76->antenna_mask);
2782
2783 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
2784 req.switch_reason = CH_SWITCH_NORMAL;
2785 else if (phy->mt76->offchannel ||
2786 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
2787 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2788 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2789 NL80211_IFTYPE_AP))
2790 req.switch_reason = CH_SWITCH_DFS;
2791 else
2792 req.switch_reason = CH_SWITCH_NORMAL;
2793
2794 if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH))
2795 req.rx_path = hweight8(req.rx_path);
2796
2797 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
2798 int freq2 = chandef->center_freq2;
2799
2800 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
2801 }
2802
2803 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);
2804 }
2805
mt7915_mcu_set_eeprom_flash(struct mt7915_dev * dev)2806 static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev)
2807 {
2808 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
2809 #define PAGE_IDX_MASK GENMASK(4, 2)
2810 #define PER_PAGE_SIZE 0x400
2811 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER };
2812 u16 eeprom_size = mt7915_eeprom_size(dev);
2813 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
2814 u8 *eep = (u8 *)dev->mt76.eeprom.data;
2815 int eep_len;
2816 int i;
2817
2818 for (i = 0; i < total; i++, eep += eep_len) {
2819 struct sk_buff *skb;
2820 int ret;
2821
2822 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
2823 eep_len = eeprom_size % PER_PAGE_SIZE;
2824 else
2825 eep_len = PER_PAGE_SIZE;
2826
2827 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
2828 sizeof(req) + eep_len);
2829 if (!skb)
2830 return -ENOMEM;
2831
2832 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
2833 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
2834 req.len = cpu_to_le16(eep_len);
2835
2836 skb_put_data(skb, &req, sizeof(req));
2837 skb_put_data(skb, eep, eep_len);
2838
2839 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
2840 MCU_EXT_CMD(EFUSE_BUFFER_MODE), true);
2841 if (ret)
2842 return ret;
2843 }
2844
2845 return 0;
2846 }
2847
mt7915_mcu_set_eeprom(struct mt7915_dev * dev)2848 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev)
2849 {
2850 struct mt7915_mcu_eeprom req = {
2851 .buffer_mode = EE_MODE_EFUSE,
2852 .format = EE_FORMAT_WHOLE,
2853 };
2854
2855 if (dev->flash_mode)
2856 return mt7915_mcu_set_eeprom_flash(dev);
2857
2858 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE),
2859 &req, sizeof(req), true);
2860 }
2861
mt7915_mcu_get_eeprom(struct mt7915_dev * dev,u32 offset)2862 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset)
2863 {
2864 struct mt7915_mcu_eeprom_info req = {
2865 .addr = cpu_to_le32(round_down(offset,
2866 MT7915_EEPROM_BLOCK_SIZE)),
2867 };
2868 struct mt7915_mcu_eeprom_info *res;
2869 struct sk_buff *skb;
2870 int ret;
2871 u8 *buf;
2872
2873 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2874 MCU_EXT_QUERY(EFUSE_ACCESS),
2875 &req, sizeof(req), true, &skb);
2876 if (ret)
2877 return ret;
2878
2879 res = (struct mt7915_mcu_eeprom_info *)skb->data;
2880 buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr);
2881 memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);
2882 dev_kfree_skb(skb);
2883
2884 return 0;
2885 }
2886
mt7915_mcu_get_eeprom_free_block(struct mt7915_dev * dev,u8 * block_num)2887 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num)
2888 {
2889 struct {
2890 u8 _rsv;
2891 u8 version;
2892 u8 die_idx;
2893 u8 _rsv2;
2894 } __packed req = {
2895 .version = 1,
2896 };
2897 struct sk_buff *skb;
2898 int ret;
2899
2900 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2901 MCU_EXT_QUERY(EFUSE_FREE_BLOCK),
2902 &req, sizeof(req), true, &skb);
2903 if (ret)
2904 return ret;
2905
2906 *block_num = *(u8 *)skb->data;
2907 dev_kfree_skb(skb);
2908
2909 return 0;
2910 }
2911
mt7915_mcu_set_pre_cal(struct mt7915_dev * dev,u8 idx,u8 * data,u32 len,int cmd)2912 static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx,
2913 u8 *data, u32 len, int cmd)
2914 {
2915 struct {
2916 u8 dir;
2917 u8 valid;
2918 __le16 bitmap;
2919 s8 precal;
2920 u8 action;
2921 u8 band;
2922 u8 idx;
2923 u8 rsv[4];
2924 __le32 len;
2925 } req = {};
2926 struct sk_buff *skb;
2927
2928 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len);
2929 if (!skb)
2930 return -ENOMEM;
2931
2932 req.idx = idx;
2933 req.len = cpu_to_le32(len);
2934 skb_put_data(skb, &req, sizeof(req));
2935 skb_put_data(skb, data, len);
2936
2937 return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false);
2938 }
2939
mt7915_mcu_apply_group_cal(struct mt7915_dev * dev)2940 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev)
2941 {
2942 u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data;
2943 u32 total = mt7915_get_cal_group_size(dev);
2944 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
2945
2946 if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP))
2947 return 0;
2948
2949 /*
2950 * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG
2951 * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC
2952 */
2953 while (total > 0) {
2954 int ret, len;
2955
2956 len = min_t(u32, total, MT_EE_CAL_UNIT);
2957
2958 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len,
2959 MCU_EXT_CMD(GROUP_PRE_CAL_INFO));
2960 if (ret)
2961 return ret;
2962
2963 total -= len;
2964 cal += len;
2965 idx++;
2966 }
2967
2968 return 0;
2969 }
2970
mt7915_find_freq_idx(const u16 * freqs,int n_freqs,u16 cur)2971 static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur)
2972 {
2973 int i;
2974
2975 for (i = 0; i < n_freqs; i++)
2976 if (cur == freqs[i])
2977 return i;
2978
2979 return -1;
2980 }
2981
mt7915_dpd_freq_idx(struct mt7915_dev * dev,u16 freq,u8 bw)2982 static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw)
2983 {
2984 static const u16 freq_list_v1[] = {
2985 5180, 5200, 5220, 5240,
2986 5260, 5280, 5300, 5320,
2987 5500, 5520, 5540, 5560,
2988 5580, 5600, 5620, 5640,
2989 5660, 5680, 5700, 5745,
2990 5765, 5785, 5805, 5825
2991 };
2992 static const u16 freq_list_v2[] = {
2993 /* 6G BW20*/
2994 5955, 5975, 5995, 6015,
2995 6035, 6055, 6075, 6095,
2996 6115, 6135, 6155, 6175,
2997 6195, 6215, 6235, 6255,
2998 6275, 6295, 6315, 6335,
2999 6355, 6375, 6395, 6415,
3000 6435, 6455, 6475, 6495,
3001 6515, 6535, 6555, 6575,
3002 6595, 6615, 6635, 6655,
3003 6675, 6695, 6715, 6735,
3004 6755, 6775, 6795, 6815,
3005 6835, 6855, 6875, 6895,
3006 6915, 6935, 6955, 6975,
3007 6995, 7015, 7035, 7055,
3008 7075, 7095, 7115,
3009 /* 6G BW160 */
3010 6025, 6185, 6345, 6505,
3011 6665, 6825, 6985,
3012 /* 5G BW20 */
3013 5180, 5200, 5220, 5240,
3014 5260, 5280, 5300, 5320,
3015 5500, 5520, 5540, 5560,
3016 5580, 5600, 5620, 5640,
3017 5660, 5680, 5700, 5720,
3018 5745, 5765, 5785, 5805,
3019 5825, 5845, 5865, 5885,
3020 /* 5G BW160 */
3021 5250, 5570, 5815
3022 };
3023 static const u16 freq_list_v2_7981[] = {
3024 /* 5G BW20 */
3025 5180, 5200, 5220, 5240,
3026 5260, 5280, 5300, 5320,
3027 5500, 5520, 5540, 5560,
3028 5580, 5600, 5620, 5640,
3029 5660, 5680, 5700, 5720,
3030 5745, 5765, 5785, 5805,
3031 5825, 5845, 5865, 5885,
3032 /* 5G BW160 */
3033 5250, 5570, 5815
3034 };
3035 const u16 *freq_list = freq_list_v1;
3036 int n_freqs = ARRAY_SIZE(freq_list_v1);
3037 int idx;
3038
3039 if (!is_mt7915(&dev->mt76)) {
3040 if (is_mt7981(&dev->mt76)) {
3041 freq_list = freq_list_v2_7981;
3042 n_freqs = ARRAY_SIZE(freq_list_v2_7981);
3043 } else {
3044 freq_list = freq_list_v2;
3045 n_freqs = ARRAY_SIZE(freq_list_v2);
3046 }
3047 }
3048
3049 if (freq < 4000) {
3050 if (freq < 2432)
3051 return n_freqs;
3052 if (freq < 2457)
3053 return n_freqs + 1;
3054
3055 return n_freqs + 2;
3056 }
3057
3058 if (bw == NL80211_CHAN_WIDTH_80P80)
3059 return -1;
3060
3061 if (bw != NL80211_CHAN_WIDTH_20) {
3062 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10);
3063 if (idx >= 0)
3064 return idx;
3065
3066 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10);
3067 if (idx >= 0)
3068 return idx;
3069 }
3070
3071 return mt7915_find_freq_idx(freq_list, n_freqs, freq);
3072 }
3073
mt7915_mcu_apply_tx_dpd(struct mt7915_phy * phy)3074 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy)
3075 {
3076 struct mt7915_dev *dev = phy->dev;
3077 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3078 enum nl80211_band band = chandef->chan->band;
3079 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
3080 u16 center_freq = chandef->center_freq1;
3081 u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data;
3082 u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3;
3083 int idx;
3084
3085 switch (band) {
3086 case NL80211_BAND_2GHZ:
3087 dpd_mask = MT_EE_WIFI_CAL_DPD_2G;
3088 break;
3089 case NL80211_BAND_5GHZ:
3090 dpd_mask = MT_EE_WIFI_CAL_DPD_5G;
3091 break;
3092 case NL80211_BAND_6GHZ:
3093 dpd_mask = MT_EE_WIFI_CAL_DPD_6G;
3094 break;
3095 default:
3096 dpd_mask = 0;
3097 break;
3098 }
3099
3100 if (!(eep[offs] & dpd_mask))
3101 return 0;
3102
3103 idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width);
3104 if (idx < 0)
3105 return -EINVAL;
3106
3107 /* Items: Tx DPD, Tx Flatness */
3108 idx = idx * cal_num;
3109 cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT);
3110
3111 while (cal_num--) {
3112 int ret;
3113
3114 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT,
3115 MCU_EXT_CMD(DPD_PRE_CAL_INFO));
3116 if (ret)
3117 return ret;
3118
3119 idx++;
3120 cal += MT_EE_CAL_UNIT;
3121 }
3122
3123 return 0;
3124 }
3125
mt7915_mcu_get_chan_mib_info(struct mt7915_phy * phy,bool chan_switch)3126 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch)
3127 {
3128 struct mt76_channel_state *state = phy->mt76->chan_state;
3129 struct mt76_channel_state *state_ts = &phy->state_ts;
3130 struct mt7915_dev *dev = phy->dev;
3131 struct mt7915_mcu_mib *res, req[5];
3132 struct sk_buff *skb;
3133 static const u32 *offs;
3134 int i, ret, len, offs_cc;
3135 u64 cc_tx;
3136
3137 /* strict order */
3138 if (is_mt7915(&dev->mt76)) {
3139 static const u32 chip_offs[] = {
3140 MIB_NON_WIFI_TIME,
3141 MIB_TX_TIME,
3142 MIB_RX_TIME,
3143 MIB_OBSS_AIRTIME,
3144 MIB_TXOP_INIT_COUNT,
3145 };
3146 len = ARRAY_SIZE(chip_offs);
3147 offs = chip_offs;
3148 offs_cc = 20;
3149 } else {
3150 static const u32 chip_offs[] = {
3151 MIB_NON_WIFI_TIME_V2,
3152 MIB_TX_TIME_V2,
3153 MIB_RX_TIME_V2,
3154 MIB_OBSS_AIRTIME_V2
3155 };
3156 len = ARRAY_SIZE(chip_offs);
3157 offs = chip_offs;
3158 offs_cc = 0;
3159 }
3160
3161 for (i = 0; i < len; i++) {
3162 req[i].band = cpu_to_le32(phy->mt76->band_idx);
3163 req[i].offs = cpu_to_le32(offs[i]);
3164 }
3165
3166 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO),
3167 req, len * sizeof(req[0]), true, &skb);
3168 if (ret)
3169 return ret;
3170
3171 res = (struct mt7915_mcu_mib *)(skb->data + offs_cc);
3172
3173 #define __res_u64(s) le64_to_cpu(res[s].data)
3174 /* subtract Tx backoff time from Tx duration for MT7915 */
3175 if (is_mt7915(&dev->mt76)) {
3176 u64 backoff = (__res_u64(4) & 0xffff) * 79; /* 16us + 9us * 7 */
3177 cc_tx = __res_u64(1) - backoff;
3178 } else {
3179 cc_tx = __res_u64(1);
3180 }
3181
3182 if (chan_switch)
3183 goto out;
3184
3185 state->cc_tx += cc_tx - state_ts->cc_tx;
3186 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3187 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3188 state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) -
3189 state_ts->cc_busy;
3190
3191 out:
3192 state_ts->cc_tx = cc_tx;
3193 state_ts->cc_bss_rx = __res_u64(2);
3194 state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3195 state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3);
3196 #undef __res_u64
3197
3198 dev_kfree_skb(skb);
3199
3200 return 0;
3201 }
3202
mt7915_mcu_get_temperature(struct mt7915_phy * phy)3203 int mt7915_mcu_get_temperature(struct mt7915_phy *phy)
3204 {
3205 struct mt7915_dev *dev = phy->dev;
3206 struct {
3207 u8 ctrl_id;
3208 u8 action;
3209 u8 band_idx;
3210 u8 rsv[5];
3211 } req = {
3212 .ctrl_id = THERMAL_SENSOR_TEMP_QUERY,
3213 .band_idx = phy->mt76->band_idx,
3214 };
3215
3216 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req,
3217 sizeof(req), true);
3218 }
3219
mt7915_mcu_set_thermal_throttling(struct mt7915_phy * phy,u8 state)3220 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state)
3221 {
3222 struct mt7915_dev *dev = phy->dev;
3223 struct mt7915_mcu_thermal_ctrl req = {
3224 .band_idx = phy->mt76->band_idx,
3225 .ctrl_id = THERMAL_PROTECT_DUTY_CONFIG,
3226 };
3227 int level, ret;
3228
3229 /* set duty cycle and level */
3230 for (level = 0; level < 4; level++) {
3231 req.duty.duty_level = level;
3232 req.duty.duty_cycle = state;
3233 state /= 2;
3234
3235 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3236 &req, sizeof(req), false);
3237 if (ret)
3238 return ret;
3239 }
3240 return 0;
3241 }
3242
mt7915_mcu_set_thermal_protect(struct mt7915_phy * phy)3243 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy)
3244 {
3245 struct mt7915_dev *dev = phy->dev;
3246 struct {
3247 struct mt7915_mcu_thermal_ctrl ctrl;
3248
3249 __le32 trigger_temp;
3250 __le32 restore_temp;
3251 __le16 sustain_time;
3252 u8 rsv[2];
3253 } __packed req = {
3254 .ctrl = {
3255 .band_idx = phy->mt76->band_idx,
3256 .type.protect_type = 1,
3257 .type.trigger_type = 1,
3258 },
3259 };
3260 int ret;
3261
3262 req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE;
3263 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3264 &req, sizeof(req.ctrl), false);
3265
3266 if (ret)
3267 return ret;
3268
3269 /* set high-temperature trigger threshold */
3270 req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE;
3271 /* add a safety margin ~10 */
3272 req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10);
3273 req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);
3274 req.sustain_time = cpu_to_le16(10);
3275
3276 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3277 &req, sizeof(req), false);
3278 }
3279
mt7915_mcu_set_txpower_frame_min(struct mt7915_phy * phy,s8 txpower)3280 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower)
3281 {
3282 struct mt7915_dev *dev = phy->dev;
3283 struct {
3284 u8 format_id;
3285 u8 rsv;
3286 u8 band_idx;
3287 s8 txpower_min;
3288 } __packed req = {
3289 .format_id = TX_POWER_LIMIT_FRAME_MIN,
3290 .band_idx = phy->mt76->band_idx,
3291 .txpower_min = txpower * 2, /* 0.5db */
3292 };
3293
3294 return mt76_mcu_send_msg(&dev->mt76,
3295 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3296 sizeof(req), true);
3297 }
3298
mt7915_mcu_set_txpower_frame(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,s8 txpower)3299 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
3300 struct ieee80211_vif *vif,
3301 struct ieee80211_sta *sta, s8 txpower)
3302 {
3303 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3304 struct mt7915_dev *dev = phy->dev;
3305 struct mt76_phy *mphy = phy->mt76;
3306 struct {
3307 u8 format_id;
3308 u8 rsv[3];
3309 u8 band_idx;
3310 s8 txpower_max;
3311 __le16 wcid;
3312 s8 txpower_offs[48];
3313 } __packed req = {
3314 .format_id = TX_POWER_LIMIT_FRAME,
3315 .band_idx = phy->mt76->band_idx,
3316 .txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2),
3317 .wcid = cpu_to_le16(msta->wcid.idx),
3318 };
3319 int ret;
3320 s8 txpower_sku[MT7915_SKU_RATE_NUM];
3321
3322 ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku));
3323 if (ret)
3324 return ret;
3325
3326 txpower = mt76_get_power_bound(mphy, txpower);
3327 if (txpower > mphy->txpower_cur || txpower < 0)
3328 return -EINVAL;
3329
3330 if (txpower) {
3331 u32 offs, len, i;
3332
3333 if (sta->deflink.ht_cap.ht_supported) {
3334 const u8 *sku_len = mt7915_sku_group_len;
3335
3336 offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM];
3337 len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40];
3338
3339 if (sta->deflink.vht_cap.vht_supported) {
3340 offs += len;
3341 len = sku_len[SKU_VHT_BW20] * 4;
3342
3343 if (sta->deflink.he_cap.has_he) {
3344 offs += len + sku_len[SKU_HE_RU26] * 3;
3345 len = sku_len[SKU_HE_RU242] * 4;
3346 }
3347 }
3348 } else {
3349 return -EINVAL;
3350 }
3351
3352 for (i = 0; i < len; i++, offs++)
3353 req.txpower_offs[i] =
3354 DIV_ROUND_UP(txpower - txpower_sku[offs], 2);
3355 }
3356
3357 return mt76_mcu_send_msg(&dev->mt76,
3358 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3359 sizeof(req), true);
3360 }
3361
mt7915_mcu_set_txpower_sku(struct mt7915_phy * phy)3362 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy)
3363 {
3364 struct mt7915_dev *dev = phy->dev;
3365 struct mt76_phy *mphy = phy->mt76;
3366 struct ieee80211_hw *hw = mphy->hw;
3367 struct mt7915_mcu_txpower_sku req = {
3368 .format_id = TX_POWER_LIMIT_TABLE,
3369 .band_idx = phy->mt76->band_idx,
3370 };
3371 struct mt76_power_limits limits_array;
3372 s8 *la = (s8 *)&limits_array;
3373 int i, idx;
3374 int tx_power;
3375
3376 tx_power = mt76_get_power_bound(mphy, hw->conf.power_level);
3377 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
3378 &limits_array, tx_power);
3379 mphy->txpower_cur = tx_power;
3380
3381 for (i = 0, idx = 0; i < ARRAY_SIZE(mt7915_sku_group_len); i++) {
3382 u8 mcs_num, len = mt7915_sku_group_len[i];
3383 int j;
3384
3385 if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) {
3386 mcs_num = 10;
3387
3388 if (i == SKU_HT_BW20 || i == SKU_VHT_BW20)
3389 la = (s8 *)&limits_array + 12;
3390 } else {
3391 mcs_num = len;
3392 }
3393
3394 for (j = 0; j < min_t(u8, mcs_num, len); j++)
3395 req.txpower_sku[idx + j] = la[j];
3396
3397 la += mcs_num;
3398 idx += len;
3399 }
3400
3401 return mt76_mcu_send_msg(&dev->mt76,
3402 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3403 sizeof(req), true);
3404 }
3405
mt7915_mcu_get_txpower_sku(struct mt7915_phy * phy,s8 * txpower,int len)3406 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len)
3407 {
3408 #define RATE_POWER_INFO 2
3409 struct mt7915_dev *dev = phy->dev;
3410 struct {
3411 u8 format_id;
3412 u8 category;
3413 u8 band_idx;
3414 u8 _rsv;
3415 } __packed req = {
3416 .format_id = TX_POWER_LIMIT_INFO,
3417 .category = RATE_POWER_INFO,
3418 .band_idx = phy->mt76->band_idx,
3419 };
3420 s8 txpower_sku[MT7915_SKU_RATE_NUM][2];
3421 struct sk_buff *skb;
3422 int ret, i;
3423
3424 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3425 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
3426 &req, sizeof(req), true, &skb);
3427 if (ret)
3428 return ret;
3429
3430 memcpy(txpower_sku, skb->data + 4, sizeof(txpower_sku));
3431 for (i = 0; i < len; i++)
3432 txpower[i] = txpower_sku[i][req.band_idx];
3433
3434 dev_kfree_skb(skb);
3435
3436 return 0;
3437 }
3438
mt7915_mcu_set_test_param(struct mt7915_dev * dev,u8 param,bool test_mode,u8 en)3439 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
3440 u8 en)
3441 {
3442 struct {
3443 u8 test_mode_en;
3444 u8 param_idx;
3445 u8 _rsv[2];
3446
3447 u8 enable;
3448 u8 _rsv2[3];
3449
3450 u8 pad[8];
3451 } __packed req = {
3452 .test_mode_en = test_mode,
3453 .param_idx = param,
3454 .enable = en,
3455 };
3456
3457 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
3458 sizeof(req), false);
3459 }
3460
mt7915_mcu_set_sku_en(struct mt7915_phy * phy,bool enable)3461 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable)
3462 {
3463 struct mt7915_dev *dev = phy->dev;
3464 struct mt7915_sku {
3465 u8 format_id;
3466 u8 sku_enable;
3467 u8 band_idx;
3468 u8 rsv;
3469 } __packed req = {
3470 .format_id = TX_POWER_LIMIT_ENABLE,
3471 .band_idx = phy->mt76->band_idx,
3472 .sku_enable = enable,
3473 };
3474
3475 return mt76_mcu_send_msg(&dev->mt76,
3476 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3477 sizeof(req), true);
3478 }
3479
mt7915_mcu_set_ser(struct mt7915_dev * dev,u8 action,u8 set,u8 band)3480 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band)
3481 {
3482 struct {
3483 u8 action;
3484 u8 set;
3485 u8 band;
3486 u8 rsv;
3487 } req = {
3488 .action = action,
3489 .set = set,
3490 .band = band,
3491 };
3492
3493 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER),
3494 &req, sizeof(req), false);
3495 }
3496
mt7915_mcu_set_txbf(struct mt7915_dev * dev,u8 action)3497 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)
3498 {
3499 struct {
3500 u8 action;
3501 union {
3502 struct {
3503 u8 snd_mode;
3504 u8 sta_num;
3505 u8 rsv;
3506 u8 wlan_idx[4];
3507 __le32 snd_period; /* ms */
3508 } __packed snd;
3509 struct {
3510 bool ebf;
3511 bool ibf;
3512 u8 rsv;
3513 } __packed type;
3514 struct {
3515 u8 bf_num;
3516 u8 bf_bitmap;
3517 u8 bf_sel[8];
3518 u8 rsv[5];
3519 } __packed mod;
3520 };
3521 } __packed req = {
3522 .action = action,
3523 };
3524
3525 #define MT_BF_PROCESSING 4
3526 switch (action) {
3527 case MT_BF_SOUNDING_ON:
3528 req.snd.snd_mode = MT_BF_PROCESSING;
3529 break;
3530 case MT_BF_TYPE_UPDATE:
3531 req.type.ebf = true;
3532 req.type.ibf = dev->ibf;
3533 break;
3534 case MT_BF_MODULE_UPDATE:
3535 req.mod.bf_num = 2;
3536 req.mod.bf_bitmap = GENMASK(1, 0);
3537 break;
3538 default:
3539 return -EINVAL;
3540 }
3541
3542 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
3543 sizeof(req), true);
3544 }
3545
3546 static int
mt7915_mcu_enable_obss_spr(struct mt7915_phy * phy,u8 action,u8 val)3547 mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val)
3548 {
3549 struct mt7915_dev *dev = phy->dev;
3550 struct mt7915_mcu_sr_ctrl req = {
3551 .action = action,
3552 .argnum = 1,
3553 .band_idx = phy->mt76->band_idx,
3554 .val = cpu_to_le32(val),
3555 };
3556
3557 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3558 sizeof(req), true);
3559 }
3560
3561 static int
mt7915_mcu_set_obss_spr_pd(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3562 mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy,
3563 struct ieee80211_he_obss_pd *he_obss_pd)
3564 {
3565 struct mt7915_dev *dev = phy->dev;
3566 struct {
3567 struct mt7915_mcu_sr_ctrl ctrl;
3568 struct {
3569 u8 pd_th_non_srg;
3570 u8 pd_th_srg;
3571 u8 period_offs;
3572 u8 rcpi_src;
3573 __le16 obss_pd_min;
3574 __le16 obss_pd_min_srg;
3575 u8 resp_txpwr_mode;
3576 u8 txpwr_restrict_mode;
3577 u8 txpwr_ref;
3578 u8 rsv[3];
3579 } __packed param;
3580 } __packed req = {
3581 .ctrl = {
3582 .action = SPR_SET_PARAM,
3583 .argnum = 9,
3584 .band_idx = phy->mt76->band_idx,
3585 },
3586 };
3587 int ret;
3588 u8 max_th = 82, non_srg_max_th = 62;
3589
3590 /* disable firmware dynamical PD asjustment */
3591 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false);
3592 if (ret)
3593 return ret;
3594
3595 if (he_obss_pd->sr_ctrl &
3596 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3597 req.param.pd_th_non_srg = max_th;
3598 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
3599 req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
3600 else
3601 req.param.pd_th_non_srg = non_srg_max_th;
3602
3603 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
3604 req.param.pd_th_srg = max_th - he_obss_pd->max_offset;
3605
3606 req.param.obss_pd_min = cpu_to_le16(82);
3607 req.param.obss_pd_min_srg = cpu_to_le16(82);
3608 req.param.txpwr_restrict_mode = 2;
3609 req.param.txpwr_ref = 21;
3610
3611 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3612 sizeof(req), true);
3613 }
3614
3615 static int
mt7915_mcu_set_obss_spr_siga(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3616 mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3617 struct ieee80211_he_obss_pd *he_obss_pd)
3618 {
3619 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3620 struct mt7915_dev *dev = phy->dev;
3621 u8 omac = mvif->mt76.omac_idx;
3622 struct {
3623 struct mt7915_mcu_sr_ctrl ctrl;
3624 struct {
3625 u8 omac;
3626 u8 rsv[3];
3627 u8 flag[20];
3628 } __packed siga;
3629 } __packed req = {
3630 .ctrl = {
3631 .action = SPR_SET_SIGA,
3632 .argnum = 1,
3633 .band_idx = phy->mt76->band_idx,
3634 },
3635 .siga = {
3636 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
3637 },
3638 };
3639 int ret;
3640
3641 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
3642 req.siga.flag[req.siga.omac] = 0xf;
3643 else
3644 return 0;
3645
3646 /* switch to normal AP mode */
3647 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0);
3648 if (ret)
3649 return ret;
3650
3651 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3652 sizeof(req), true);
3653 }
3654
3655 static int
mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3656 mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy,
3657 struct ieee80211_he_obss_pd *he_obss_pd)
3658 {
3659 struct mt7915_dev *dev = phy->dev;
3660 struct {
3661 struct mt7915_mcu_sr_ctrl ctrl;
3662 struct {
3663 __le32 color_l[2];
3664 __le32 color_h[2];
3665 __le32 bssid_l[2];
3666 __le32 bssid_h[2];
3667 } __packed bitmap;
3668 } __packed req = {
3669 .ctrl = {
3670 .action = SPR_SET_SRG_BITMAP,
3671 .argnum = 4,
3672 .band_idx = phy->mt76->band_idx,
3673 },
3674 };
3675 u32 bitmap;
3676
3677 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
3678 req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3679
3680 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
3681 req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3682
3683 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
3684 req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3685
3686 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
3687 req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3688
3689 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3690 sizeof(req), true);
3691 }
3692
mt7915_mcu_add_obss_spr(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3693 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3694 struct ieee80211_he_obss_pd *he_obss_pd)
3695 {
3696 int ret;
3697
3698 /* enable firmware scene detection algorithms */
3699 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect);
3700 if (ret)
3701 return ret;
3702
3703 /* firmware dynamically adjusts PD threshold so skip manual control */
3704 if (sr_scene_detect && !he_obss_pd->enable)
3705 return 0;
3706
3707 /* enable spatial reuse */
3708 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable);
3709 if (ret)
3710 return ret;
3711
3712 if (sr_scene_detect || !he_obss_pd->enable)
3713 return 0;
3714
3715 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true);
3716 if (ret)
3717 return ret;
3718
3719 /* set SRG/non-SRG OBSS PD threshold */
3720 ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd);
3721 if (ret)
3722 return ret;
3723
3724 /* Set SR prohibit */
3725 ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
3726 if (ret)
3727 return ret;
3728
3729 /* set SRG BSS color/BSSID bitmap */
3730 return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
3731 }
3732
mt7915_mcu_get_rx_rate(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct rate_info * rate)3733 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3734 struct ieee80211_sta *sta, struct rate_info *rate)
3735 {
3736 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3737 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3738 struct mt7915_dev *dev = phy->dev;
3739 struct mt76_phy *mphy = phy->mt76;
3740 struct {
3741 u8 category;
3742 u8 band;
3743 __le16 wcid;
3744 } __packed req = {
3745 .category = MCU_PHY_STATE_CONTENTION_RX_RATE,
3746 .band = mvif->mt76.band_idx,
3747 .wcid = cpu_to_le16(msta->wcid.idx),
3748 };
3749 struct ieee80211_supported_band *sband;
3750 struct mt7915_mcu_phy_rx_info *res;
3751 struct sk_buff *skb;
3752 int ret;
3753 bool cck = false;
3754
3755 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO),
3756 &req, sizeof(req), true, &skb);
3757 if (ret)
3758 return ret;
3759
3760 res = (struct mt7915_mcu_phy_rx_info *)skb->data;
3761
3762 rate->mcs = res->rate;
3763 rate->nss = res->nsts + 1;
3764
3765 switch (res->mode) {
3766 case MT_PHY_TYPE_CCK:
3767 cck = true;
3768 fallthrough;
3769 case MT_PHY_TYPE_OFDM:
3770 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
3771 sband = &mphy->sband_5g.sband;
3772 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
3773 sband = &mphy->sband_6g.sband;
3774 else
3775 sband = &mphy->sband_2g.sband;
3776
3777 rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck);
3778 rate->legacy = sband->bitrates[rate->mcs].bitrate;
3779 break;
3780 case MT_PHY_TYPE_HT:
3781 case MT_PHY_TYPE_HT_GF:
3782 if (rate->mcs > 31) {
3783 ret = -EINVAL;
3784 goto out;
3785 }
3786
3787 rate->flags = RATE_INFO_FLAGS_MCS;
3788 if (res->gi)
3789 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3790 break;
3791 case MT_PHY_TYPE_VHT:
3792 if (rate->mcs > 9) {
3793 ret = -EINVAL;
3794 goto out;
3795 }
3796
3797 rate->flags = RATE_INFO_FLAGS_VHT_MCS;
3798 if (res->gi)
3799 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3800 break;
3801 case MT_PHY_TYPE_HE_SU:
3802 case MT_PHY_TYPE_HE_EXT_SU:
3803 case MT_PHY_TYPE_HE_TB:
3804 case MT_PHY_TYPE_HE_MU:
3805 if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) {
3806 ret = -EINVAL;
3807 goto out;
3808 }
3809 rate->he_gi = res->gi;
3810 rate->flags = RATE_INFO_FLAGS_HE_MCS;
3811 break;
3812 default:
3813 ret = -EINVAL;
3814 goto out;
3815 }
3816
3817 switch (res->bw) {
3818 case IEEE80211_STA_RX_BW_160:
3819 rate->bw = RATE_INFO_BW_160;
3820 break;
3821 case IEEE80211_STA_RX_BW_80:
3822 rate->bw = RATE_INFO_BW_80;
3823 break;
3824 case IEEE80211_STA_RX_BW_40:
3825 rate->bw = RATE_INFO_BW_40;
3826 break;
3827 default:
3828 rate->bw = RATE_INFO_BW_20;
3829 break;
3830 }
3831
3832 out:
3833 dev_kfree_skb(skb);
3834
3835 return ret;
3836 }
3837
mt7915_mcu_update_bss_color(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct cfg80211_he_bss_color * he_bss_color)3838 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
3839 struct cfg80211_he_bss_color *he_bss_color)
3840 {
3841 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color);
3842 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3843 struct bss_info_color *bss_color;
3844 struct sk_buff *skb;
3845 struct tlv *tlv;
3846
3847 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
3848 NULL, len);
3849 if (IS_ERR(skb))
3850 return PTR_ERR(skb);
3851
3852 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR,
3853 sizeof(*bss_color));
3854 bss_color = (struct bss_info_color *)tlv;
3855 bss_color->disable = !he_bss_color->enabled;
3856 bss_color->color = he_bss_color->color;
3857
3858 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3859 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
3860 }
3861
3862 #define TWT_AGRT_TRIGGER BIT(0)
3863 #define TWT_AGRT_ANNOUNCE BIT(1)
3864 #define TWT_AGRT_PROTECT BIT(2)
3865
mt7915_mcu_twt_agrt_update(struct mt7915_dev * dev,struct mt7915_vif * mvif,struct mt7915_twt_flow * flow,int cmd)3866 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
3867 struct mt7915_vif *mvif,
3868 struct mt7915_twt_flow *flow,
3869 int cmd)
3870 {
3871 struct {
3872 u8 tbl_idx;
3873 u8 cmd;
3874 u8 own_mac_idx;
3875 u8 flowid; /* 0xff for group id */
3876 __le16 peer_id; /* specify the peer_id (msb=0)
3877 * or group_id (msb=1)
3878 */
3879 u8 duration; /* 256 us */
3880 u8 bss_idx;
3881 __le64 start_tsf;
3882 __le16 mantissa;
3883 u8 exponent;
3884 u8 is_ap;
3885 u8 agrt_params;
3886 u8 rsv[23];
3887 } __packed req = {
3888 .tbl_idx = flow->table_id,
3889 .cmd = cmd,
3890 .own_mac_idx = mvif->mt76.omac_idx,
3891 .flowid = flow->id,
3892 .peer_id = cpu_to_le16(flow->wcid),
3893 .duration = flow->duration,
3894 .bss_idx = mvif->mt76.idx,
3895 .start_tsf = cpu_to_le64(flow->tsf),
3896 .mantissa = flow->mantissa,
3897 .exponent = flow->exp,
3898 .is_ap = true,
3899 };
3900
3901 if (flow->protection)
3902 req.agrt_params |= TWT_AGRT_PROTECT;
3903 if (!flow->flowtype)
3904 req.agrt_params |= TWT_AGRT_ANNOUNCE;
3905 if (flow->trigger)
3906 req.agrt_params |= TWT_AGRT_TRIGGER;
3907
3908 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
3909 &req, sizeof(req), true);
3910 }
3911
mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev * dev,u16 wlan_idx)3912 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx)
3913 {
3914 struct {
3915 __le32 cmd;
3916 __le32 arg0;
3917 __le32 arg1;
3918 __le16 arg2;
3919 } __packed req = {
3920 .cmd = cpu_to_le32(0x15),
3921 };
3922 struct mt7915_mcu_wa_tx_stat {
3923 __le16 wcid;
3924 u8 __rsv2[2];
3925
3926 /* tx_bytes is deprecated since WA byte counter uses u32,
3927 * which easily leads to overflow.
3928 */
3929 __le32 tx_bytes;
3930 __le32 tx_packets;
3931 } __packed *res;
3932 struct mt76_wcid *wcid;
3933 struct sk_buff *skb;
3934 int ret, len;
3935 u16 ret_wcid;
3936
3937 if (is_mt7915(&dev->mt76)) {
3938 req.arg0 = cpu_to_le32(wlan_idx);
3939 len = sizeof(req) - sizeof(req.arg2);
3940 } else {
3941 req.arg0 = cpu_to_le32(1);
3942 req.arg2 = cpu_to_le16(wlan_idx);
3943 len = sizeof(req);
3944 }
3945
3946 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY),
3947 &req, len, true, &skb);
3948 if (ret)
3949 return ret;
3950
3951 if (!is_mt7915(&dev->mt76))
3952 skb_pull(skb, 4);
3953
3954 res = (struct mt7915_mcu_wa_tx_stat *)skb->data;
3955
3956 ret_wcid = le16_to_cpu(res->wcid);
3957 if (is_mt7915(&dev->mt76))
3958 ret_wcid &= 0xff;
3959
3960 if (ret_wcid != wlan_idx) {
3961 ret = -EINVAL;
3962 goto out;
3963 }
3964
3965 rcu_read_lock();
3966
3967 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
3968 if (wcid)
3969 wcid->stats.tx_packets += le32_to_cpu(res->tx_packets);
3970 else
3971 ret = -EINVAL;
3972
3973 rcu_read_unlock();
3974 out:
3975 dev_kfree_skb(skb);
3976
3977 return ret;
3978 }
3979
mt7915_mcu_rf_regval(struct mt7915_dev * dev,u32 regidx,u32 * val,bool set)3980 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
3981 {
3982 struct {
3983 __le32 idx;
3984 __le32 ofs;
3985 __le32 data;
3986 } __packed req = {
3987 .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))),
3988 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
3989 .data = set ? cpu_to_le32(*val) : 0,
3990 };
3991 struct sk_buff *skb;
3992 int ret;
3993
3994 if (set)
3995 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
3996 &req, sizeof(req), false);
3997
3998 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
3999 &req, sizeof(req), true, &skb);
4000 if (ret)
4001 return ret;
4002
4003 *val = le32_to_cpu(*(__le32 *)(skb->data + 8));
4004 dev_kfree_skb(skb);
4005
4006 return 0;
4007 }
4008