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Searched defs:ch (Results 1 – 25 of 668) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dpio_phy_regs.h13 #define _VLV_PLL(ch, dw) (0x8000 + (ch) * 0x20 + (dw) * 4) /* dw 0-7,16-23 */ argument
14 #define _CHV_PLL(ch, dw) (0x8000 + (ch) * 0x180 + (dw) * 4) argument
16 #define _VLV_PCS(ch, spline, dw) (0x200 + (ch) * 0x2400 + (spline) * 0x200 + (dw) * 4) argument
17 #define _VLV_PCS_GRP(ch, dw) (0x8200 + (ch) * 0x200 + (dw) * 4) argument
19 #define _VLV_TX(ch, lane, dw) (0x80 + (ch) * 0x2400 + (lane) * 0x200 + (dw) * 4) argument
20 #define _VLV_TX_GRP(ch, dw) (0x8280 + (ch) * 0x200 + (dw) * 4) argument
26 #define VLV_PLL_DW3(ch) _VLV_PLL((ch), 3) argument
47 #define VLV_PLL_DW5(ch) _VLV_PLL((ch), 5) argument
55 #define VLV_PLL_DW7(ch) _VLV_PLL((ch), 7) argument
57 #define VLV_PLL_DW16(ch) _VLV_PLL((ch), 16) argument
[all …]
H A Dbxt_dpio_phy_regs.h23 #define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
26 #define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
30 #define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \ argument
51 #define BXT_PORT_PLL_EBB_0(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
60 #define BXT_PORT_PLL_EBB_4(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
95 #define _PORT_PLL_BASE(phy, ch) _BXT_PHY_CH(phy, ch, \ argument
98 #define BXT_PORT_PLL(phy, ch, idx) _MMIO(_PORT_PLL_BASE(phy, ch) + \ argument
171 #define BXT_PORT_PCS_DW10_LN01(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
174 #define BXT_PORT_PCS_DW10_GRP(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
192 #define BXT_PORT_PCS_DW12_LN01(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
[all …]
/linux/drivers/mfd/
H A Drz-mtu3.c63 u16 rz_mtu3_shared_reg_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_shared_reg_read()
75 u8 rz_mtu3_8bit_ch_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_8bit_ch_read()
87 u16 rz_mtu3_16bit_ch_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_16bit_ch_read()
103 u32 rz_mtu3_32bit_ch_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_32bit_ch_read()
118 void rz_mtu3_8bit_ch_write(struct rz_mtu3_channel *ch, u16 offset, u8 val) in rz_mtu3_8bit_ch_write()
129 void rz_mtu3_16bit_ch_write(struct rz_mtu3_channel *ch, u16 offset, u16 val) in rz_mtu3_16bit_ch_write()
144 void rz_mtu3_32bit_ch_write(struct rz_mtu3_channel *ch, u16 offset, u32 val) in rz_mtu3_32bit_ch_write()
158 void rz_mtu3_shared_reg_write(struct rz_mtu3_channel *ch, u16 offset, u16 value) in rz_mtu3_shared_reg_write()
170 void rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel *ch, u16 offset, in rz_mtu3_shared_reg_update_bit()
185 static u16 rz_mtu3_get_tstr_offset(struct rz_mtu3_channel *ch) in rz_mtu3_get_tstr_offset()
[all …]
/linux/drivers/misc/sgi-xp/
H A Dxpc_channel.c27 xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags) in xpc_process_connect()
80 xpc_process_disconnect(struct xpc_channel *ch, unsigned long *irq_flags) in xpc_process_disconnect()
189 struct xpc_channel *ch = &part->channels[ch_number]; in xpc_process_openclose_chctl_flags() local
465 xpc_connect_channel(struct xpc_channel *ch) in xpc_connect_channel()
550 struct xpc_channel *ch; in xpc_process_sent_chctl_flags() local
621 struct xpc_channel *ch; in xpc_partition_going_down() local
677 xpc_connected_callout(struct xpc_channel *ch) in xpc_connected_callout()
712 struct xpc_channel *ch; in xpc_initiate_disconnect() local
753 xpc_disconnect_channel(const int line, struct xpc_channel *ch, in xpc_disconnect_channel()
801 xpc_disconnect_callout(struct xpc_channel *ch, enum xp_retval reason) in xpc_disconnect_callout()
[all …]
/linux/sound/soc/codecs/
H A Drk3308_codec.h24 #define RK3308_ADC_DIG_OFFSET(ch) (((ch) & 0x3) * 0xc0 + 0x0) argument
26 #define RK3308_ADC_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x04) argument
27 #define RK3308_ADC_DIG_CON02(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x08) argument
28 #define RK3308_ADC_DIG_CON03(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x0c) argument
29 #define RK3308_ADC_DIG_CON04(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x10) argument
30 #define RK3308_ADC_DIG_CON05(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x14) // ver.C only argument
31 #define RK3308_ADC_DIG_CON06(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x18) // ver.C only argument
32 #define RK3308_ADC_DIG_CON07(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x1c) argument
34 #define RK3308_ALC_L_DIG_CON00(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x40) argument
35 #define RK3308_ALC_L_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x44) argument
[all …]
H A Didt821034.c38 } ch[IDT821034_NB_CHANNEL]; global() member
44 } ch[IDT821034_NB_CHANNEL]; global() member
119 idt821034_set_channel_power(struct idt821034 * idt821034,u8 ch,u8 power) idt821034_set_channel_power() argument
153 idt821034_get_channel_power(struct idt821034 * idt821034,u8 ch) idt821034_get_channel_power() argument
208 idt821034_set_channel_ts(struct idt821034 * idt821034,u8 ch,u8 ch_dir,u8 ts_num) idt821034_set_channel_ts() argument
245 idt821034_set_slic_conf(struct idt821034 * idt821034,u8 ch,u8 slic_dir) idt821034_set_slic_conf() argument
262 idt821034_get_slic_conf(struct idt821034 * idt821034,u8 ch) idt821034_get_slic_conf() argument
267 idt821034_write_slic_raw(struct idt821034 * idt821034,u8 ch,u8 slic_raw) idt821034_write_slic_raw() argument
292 idt821034_get_written_slic_raw(struct idt821034 * idt821034,u8 ch) idt821034_get_written_slic_raw() argument
297 idt821034_read_slic_raw(struct idt821034 * idt821034,u8 ch,u8 * slic_raw) idt821034_read_slic_raw() argument
332 idt821034_set_gain_channel(struct idt821034 * idt821034,u8 ch,u8 gain_type,u16 gain_val) idt821034_set_gain_channel() argument
412 u8 ch; idt821034_kctrl_gain_get() local
446 u8 ch; idt821034_kctrl_gain_put() local
494 u8 ch; idt821034_kctrl_mute_get() local
519 u8 ch; idt821034_kctrl_mute_put() local
627 u8 ch; idt821034_power_event() local
704 u8 ch; idt821034_dai_set_tdm_slot() local
963 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_gpio_set() local
989 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_gpio_get() local
1014 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_get_direction() local
1028 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_direction_input() local
1054 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_direction_output() local
[all...]
/linux/drivers/media/platform/ti/davinci/
H A Dvpif_display.c74 struct channel_obj *ch = vb2_get_drv_priv(vb->vb2_queue); in vpif_buffer_prepare() local
115 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_buffer_queue_setup() local
148 struct channel_obj *ch = vb2_get_drv_priv(vb->vb2_queue); in vpif_buffer_queue() local
169 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_start_streaming() local
254 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_stop_streaming() local
363 struct channel_obj *ch; in vpif_channel_isr() local
428 static int vpif_update_std_info(struct channel_obj *ch) in vpif_update_std_info()
456 static int vpif_update_resolution(struct channel_obj *ch) in vpif_update_resolution()
499 static void vpif_calculate_offsets(struct channel_obj *ch) in vpif_calculate_offsets()
560 static void vpif_config_addr(struct channel_obj *ch, int muxmode) in vpif_config_addr()
[all …]
/linux/drivers/s390/net/
H A Dctcm_fsms.c190 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg) in ctcm_ccw_check_rc()
247 struct channel *ch = arg; in chx_txdone() local
335 struct channel *ch = arg; in ctcm_chx_txidle() local
356 struct channel *ch = arg; in chx_rx() local
433 struct channel *ch = arg; in chx_firstio() local
510 struct channel *ch = arg; in chx_rxidle() local
550 struct channel *ch = arg; in ctcm_chx_setmode() local
588 struct channel *ch = arg; in ctcm_chx_start() local
652 struct channel *ch = arg; in ctcm_chx_haltio() local
690 struct channel *ch) in ctcm_chx_cleanup()
[all …]
/linux/drivers/gpu/drm/tidss/
H A Dtidss_irq.h34 #define DSS_IRQ_VP_BIT_N(ch, bit) (4 + 4 * (ch) + (bit)) argument
38 #define DSS_IRQ_VP_BIT(ch, bit) BIT(DSS_IRQ_VP_BIT_N((ch), (bit))) argument
42 static inline dispc_irq_t DSS_IRQ_VP_MASK(u32 ch) in DSS_IRQ_VP_MASK()
53 #define DSS_IRQ_VP_FRAME_DONE(ch) DSS_IRQ_VP_BIT((ch), 0) argument
54 #define DSS_IRQ_VP_VSYNC_EVEN(ch) DSS_IRQ_VP_BIT((ch), 1) argument
55 #define DSS_IRQ_VP_VSYNC_ODD(ch) DSS_IRQ_VP_BIT((ch), 2) argument
56 #define DSS_IRQ_VP_SYNC_LOST(ch) DSS_IRQ_VP_BIT((ch), 3) argument
/linux/drivers/phy/renesas/
H A Dphy-rcar-gen3-usb2.c126 struct rcar_gen3_chan *ch; member
171 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, in rcar_gen3_phy_usb2_work() local
183 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) in rcar_gen3_set_host_mode()
196 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) in rcar_gen3_set_linectrl()
210 static void rcar_gen3_phy_usb2_set_vbus(struct rcar_gen3_chan *ch, in rcar_gen3_phy_usb2_set_vbus()
229 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) in rcar_gen3_enable_vbus_ctrl()
249 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) in rcar_gen3_control_otg_irq()
261 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) in rcar_gen3_init_for_host()
271 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) in rcar_gen3_init_for_peri()
281 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) in rcar_gen3_init_for_b_host()
[all …]
/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-dpr.c118 struct dcss_dpr_ch ch[3]; member
121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write()
130 struct dcss_dpr_ch *ch; in dcss_dpr_ch_init_all() local
179 struct dcss_dpr_ch *ch = &dpr->ch[ch_no]; in dcss_dpr_exit() local
185 static u32 dcss_dpr_x_pix_wide_adjust(struct dcss_dpr_ch *ch, u32 pix_wide, in dcss_dpr_x_pix_wide_adjust()
205 static u32 dcss_dpr_y_pix_high_adjust(struct dcss_dpr_ch *ch, u32 pix_high, in dcss_dpr_y_pix_high_adjust()
219 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_set_res() local
247 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_addr_set() local
257 static void dcss_dpr_argb_comp_sel(struct dcss_dpr_ch *ch, int a_sel, int r_sel, in dcss_dpr_argb_comp_sel()
272 static void dcss_dpr_pix_size_set(struct dcss_dpr_ch *ch, in dcss_dpr_pix_size_set()
[all …]
H A Ddcss-scaler.c90 struct dcss_scaler_ch ch[3]; member
290 static void dcss_scaler_write(struct dcss_scaler_ch *ch, u32 val, u32 ofs) in dcss_scaler_write()
300 struct dcss_scaler_ch *ch; in dcss_scaler_ch_init_all() local
344 struct dcss_scaler_ch *ch = &scl->ch[ch_no]; in dcss_scaler_exit() local
352 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_ch_enable() local
366 static void dcss_scaler_yuv_enable(struct dcss_scaler_ch *ch, bool en) in dcss_scaler_yuv_enable()
372 static void dcss_scaler_rtr_8lines_enable(struct dcss_scaler_ch *ch, bool en) in dcss_scaler_rtr_8lines_enable()
378 static void dcss_scaler_bit_depth_set(struct dcss_scaler_ch *ch, int depth) in dcss_scaler_bit_depth_set()
405 static void dcss_scaler_format_set(struct dcss_scaler_ch *ch, in dcss_scaler_format_set()
413 static void dcss_scaler_res_set(struct dcss_scaler_ch *ch, in dcss_scaler_res_set()
[all …]
/linux/drivers/pwm/
H A Dpwm-rzg2l-gpt.c37 #define RZG2L_GET_CH_OFFS(ch) (0x100 * (ch)) argument
39 #define RZG2L_GTCR(ch) (0x2c + RZG2L_GET_CH_OFFS(ch)) argument
40 #define RZG2L_GTUDDTYC(ch) (0x30 + RZG2L_GET_CH_OFFS(ch)) argument
41 #define RZG2L_GTIOR(ch) (0x34 + RZG2L_GET_CH_OFFS(ch)) argument
42 #define RZG2L_GTBER(ch) (0x40 + RZG2L_GET_CH_OFFS(ch)) argument
43 #define RZG2L_GTCNT(ch) (0x48 + RZG2L_GET_CH_OFFS(ch)) argument
44 #define RZG2L_GTCCR(ch, sub_ch) (0x4c + RZG2L_GET_CH_OFFS(ch) + 4 * (sub_ch)) argument
45 #define RZG2L_GTPR(ch) (0x64 + RZG2L_GET_CH_OFFS(ch)) argument
138 u32 ch = RZG2L_GET_CH(pwm->hwpwm); in rzg2l_gpt_request() local
149 u32 ch = RZG2L_GET_CH(pwm->hwpwm); in rzg2l_gpt_free() local
[all …]
H A Dpwm-sunplus.c31 #define SP7021_PWM_MODE0_PWMEN(ch) BIT(ch) argument
32 #define SP7021_PWM_MODE0_BYPASS(ch) BIT(8 + (ch)) argument
34 #define SP7021_PWM_MODE1_CNT_EN(ch) BIT(ch) argument
35 #define SP7021_PWM_FREQ(ch) (0x008 + 4 * (ch)) argument
37 #define SP7021_PWM_DUTY(ch) (0x018 + 4 * (ch)) argument
38 #define SP7021_PWM_DUTY_DD_SEL(ch) FIELD_PREP(GENMASK(9, 8), ch) argument
/linux/drivers/scsi/
H A Dch.c87 #define ch_printk(prefix, ch, fmt, a...) \ argument
187 ch_do_scsi(scsi_changer *ch, unsigned char *cmd, int cmd_len, in ch_do_scsi()
228 ch_elem_to_typecode(scsi_changer *ch, u_int elem) in ch_elem_to_typecode()
242 ch_read_element_status(scsi_changer *ch, u_int elem, char *data) in ch_read_element_status()
284 ch_init_elem(scsi_changer *ch) in ch_init_elem()
299 ch_readconfig(scsi_changer *ch) in ch_readconfig()
427 ch_position(scsi_changer *ch, u_int trans, u_int elem, int rotate) in ch_position()
446 ch_move(scsi_changer *ch, u_int trans, u_int src, u_int dest, int rotate) in ch_move()
467 ch_exchange(scsi_changer *ch, u_int trans, u_int src, in ch_exchange()
509 ch_set_voltag(scsi_changer *ch, u_int elem, in ch_set_voltag()
[all …]
/linux/arch/nios2/boot/compressed/
H A Dconsole.c26 static void jtag_putc(int ch) in jtag_putc()
33 static void jtag_putc(int ch) in jtag_putc()
42 static int putchar(int ch) in putchar()
64 static void uart_putc(int ch) in uart_putc()
76 static int putchar(int ch) in putchar()
96 static int putchar(int ch) in putchar()
/linux/drivers/counter/
H A Drz-mtu3-cnt.c78 struct rz_mtu3_channel *ch; member
124 struct rz_mtu3_channel *const ch, in rz_mtu3_lock_if_counter_is_valid()
143 static int rz_mtu3_lock_if_count_is_enabled(struct rz_mtu3_channel *const ch, in rz_mtu3_lock_if_count_is_enabled()
160 struct rz_mtu3_channel *const ch = rz_mtu3_get_ch(counter, count->id); in rz_mtu3_count_read() local
182 struct rz_mtu3_channel *const ch = rz_mtu3_get_ch(counter, count->id); in rz_mtu3_count_write() local
201 static int rz_mtu3_count_function_read_helper(struct rz_mtu3_channel *const ch, in rz_mtu3_count_function_read_helper()
235 struct rz_mtu3_channel *const ch = rz_mtu3_get_ch(counter, count->id); in rz_mtu3_count_function_read() local
253 struct rz_mtu3_channel *const ch = rz_mtu3_get_ch(counter, count->id); in rz_mtu3_count_function_write() local
294 struct rz_mtu3_channel *const ch = rz_mtu3_get_ch(counter, count->id); in rz_mtu3_count_direction_read() local
318 struct rz_mtu3_channel *const ch = rz_mtu3_get_ch(counter, count->id); in rz_mtu3_count_ceiling_read() local
[all …]
/linux/drivers/dma/
H A Dmoxart-dma.c180 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_terminate_all() local
208 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_slave_config() local
266 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_prep_slave_sg() local
328 struct moxart_chan *ch; in moxart_of_xlate() local
342 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_alloc_chan_resources() local
353 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_free_chan_resources() local
362 static void moxart_dma_set_params(struct moxart_chan *ch, dma_addr_t src_addr, in moxart_dma_set_params()
369 static void moxart_set_transfer_params(struct moxart_chan *ch, unsigned int len) in moxart_set_transfer_params()
386 static void moxart_start_dma(struct moxart_chan *ch) in moxart_start_dma()
395 static void moxart_dma_start_sg(struct moxart_chan *ch, unsigned int idx) in moxart_dma_start_sg()
[all …]
/linux/drivers/dpll/zl3073x/
H A Dchan.c252 int zl3073x_chan_tod_ready_wait(struct zl3073x_dev *zldev, u8 ch) in zl3073x_chan_tod_ready_wait()
295 static int zl3073x_chan_tod_ctrl(struct zl3073x_dev *zldev, u8 ch, u8 cmd) in zl3073x_chan_tod_ctrl()
312 int zl3073x_chan_tod_read(struct zl3073x_dev *zldev, u8 ch, in zl3073x_chan_tod_read()
365 int zl3073x_chan_tod_write(struct zl3073x_dev *zldev, u8 ch, in zl3073x_chan_tod_write()
402 int zl3073x_chan_tod_adjust(struct zl3073x_dev *zldev, u8 ch, in zl3073x_chan_tod_adjust()
452 int zl3073x_chan_df_offset_set(struct zl3073x_dev *zldev, u8 ch, s64 offset) in zl3073x_chan_df_offset_set()
474 int zl3073x_chan_tie_write(struct zl3073x_dev *zldev, u8 ch, s64 delta_ns) in zl3073x_chan_tie_write()
516 int zl3073x_chan_phase_step(struct zl3073x_dev *zldev, u8 ch, in zl3073x_chan_phase_step()
/linux/drivers/rapidio/
H A Drio_cm.c244 static int riocm_cmp(struct rio_channel *ch, enum rio_cm_state cmp) in riocm_cmp()
254 static int riocm_cmp_exch(struct rio_channel *ch, in riocm_cmp_exch()
267 static enum rio_cm_state riocm_exch(struct rio_channel *ch, in riocm_exch()
281 struct rio_channel *ch; in riocm_get_channel() local
291 static void riocm_put_channel(struct rio_channel *ch) in riocm_put_channel()
374 struct rio_channel *ch; in riocm_req_handler() local
421 struct rio_channel *ch; in riocm_resp_handler() local
453 struct rio_channel *ch; in riocm_close_handler() local
525 struct rio_channel *ch; in rio_rx_data_handler() local
779 struct rio_channel *ch; in riocm_ch_send() local
[all …]
/linux/drivers/reset/
H A Dreset-uniphier.c157 #define UNIPHIER_MIO_RESET_SD(id, ch) \ argument
160 #define UNIPHIER_MIO_RESET_SD_BRIDGE(id, ch) \ argument
163 #define UNIPHIER_MIO_RESET_EMMC_HW_RESET(id, ch) \ argument
166 #define UNIPHIER_MIO_RESET_USB2(id, ch) \ argument
169 #define UNIPHIER_MIO_RESET_USB2_BRIDGE(id, ch) \ argument
201 #define UNIPHIER_PERI_RESET_UART(id, ch) \ argument
204 #define UNIPHIER_PERI_RESET_I2C(id, ch) \ argument
207 #define UNIPHIER_PERI_RESET_FI2C(id, ch) \ argument
210 #define UNIPHIER_PERI_RESET_SCSSI(id, ch) \ argument
/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpaa2-xsk.c13 struct dpaa2_eth_channel *ch, in dpaa2_eth_setup_consume_func()
33 struct dpaa2_eth_channel *ch, in dpaa2_xsk_run_xdp()
104 struct dpaa2_eth_channel *ch, in dpaa2_xsk_rx()
178 struct dpaa2_eth_channel *ch; in dpaa2_xsk_disable_pool() local
226 struct dpaa2_eth_channel *ch; in dpaa2_xsk_enable_pool() local
312 struct dpaa2_eth_channel *ch = priv->channel[qid]; in dpaa2_xsk_wakeup() local
333 struct dpaa2_eth_channel *ch, in dpaa2_xsk_tx_build_fd()
391 struct dpaa2_eth_channel *ch) in dpaa2_xsk_tx()
/linux/drivers/mailbox/
H A Dmtk-gpueb-mailbox.c38 struct mtk_gpueb_mbox_chan *ch; member
94 struct mtk_gpueb_mbox_chan *ch = data; in mtk_gpueb_mbox_isr() local
109 struct mtk_gpueb_mbox_chan *ch = data; in mtk_gpueb_mbox_thread() local
129 struct mtk_gpueb_mbox_chan *ch = chan->con_priv; in mtk_gpueb_mbox_send_data() local
152 struct mtk_gpueb_mbox_chan *ch = chan->con_priv; in mtk_gpueb_mbox_startup() local
187 struct mtk_gpueb_mbox_chan *ch = chan->con_priv; in mtk_gpueb_mbox_shutdown() local
198 struct mtk_gpueb_mbox_chan *ch = chan->con_priv; in mtk_gpueb_mbox_last_tx_done() local
212 struct mtk_gpueb_mbox_chan *ch; in mtk_gpueb_mbox_probe() local
/linux/drivers/clk/uniphier/
H A Dclk-uniphier-peri.c9 #define UNIPHIER_PERI_CLK_UART(idx, ch) \ argument
15 #define UNIPHIER_PERI_CLK_I2C(idx, ch) \ argument
18 #define UNIPHIER_PERI_CLK_FI2C(idx, ch) \ argument
21 #define UNIPHIER_PERI_CLK_SCSSI(idx, ch) \ argument
/linux/drivers/net/wireless/broadcom/brcm80211/brcmutil/
H A Dd11.c41 static void brcmu_d11n_encchspec(struct brcmu_chan *ch) in brcmu_d11n_encchspec()
77 static void brcmu_d11ac_encchspec(struct brcmu_chan *ch) in brcmu_d11ac_encchspec()
96 static void brcmu_d11n_decchspec(struct brcmu_chan *ch) in brcmu_d11n_decchspec()
137 static void brcmu_d11ac_decchspec(struct brcmu_chan *ch) in brcmu_d11ac_decchspec()

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