xref: /linux/sound/pci/nm256/nm256.c (revision 2c8d2a510c15c003749e43ac2b8e1bc79a7a00d6)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Driver for NeoMagic 256AV and 256ZX chipsets.
4  * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
5  *
6  * Based on nm256_audio.c OSS driver in linux kernel.
7  * The original author of OSS nm256 driver wishes to remain anonymous,
8  * so I just put my acknoledgment to him/her here.
9  * The original author's web page is found at
10  *	http://www.uglx.org/sony.html
11  */
12 
13 #include <linux/io.h>
14 #include <linux/delay.h>
15 #include <linux/interrupt.h>
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/module.h>
20 #include <linux/mutex.h>
21 
22 #include <sound/core.h>
23 #include <sound/info.h>
24 #include <sound/control.h>
25 #include <sound/pcm.h>
26 #include <sound/ac97_codec.h>
27 #include <sound/initval.h>
28 
29 #define CARD_NAME "NeoMagic 256AV/ZX"
30 #define DRIVER_NAME "NM256"
31 
32 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
33 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
34 MODULE_LICENSE("GPL");
35 
36 /*
37  * some compile conditions.
38  */
39 
40 static int index = SNDRV_DEFAULT_IDX1;	/* Index */
41 static char *id = SNDRV_DEFAULT_STR1;	/* ID for this card */
42 static int playback_bufsize = 16;
43 static int capture_bufsize = 16;
44 static bool force_ac97;			/* disabled as default */
45 static int buffer_top;			/* not specified */
46 static bool use_cache;			/* disabled */
47 static bool vaio_hack;			/* disabled */
48 static bool reset_workaround;
49 static bool reset_workaround_2;
50 
51 module_param(index, int, 0444);
52 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
53 module_param(id, charp, 0444);
54 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
55 module_param(playback_bufsize, int, 0444);
56 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
57 module_param(capture_bufsize, int, 0444);
58 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
59 module_param(force_ac97, bool, 0444);
60 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
61 module_param(buffer_top, int, 0444);
62 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
63 module_param(use_cache, bool, 0444);
64 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
65 module_param(vaio_hack, bool, 0444);
66 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
67 module_param(reset_workaround, bool, 0444);
68 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
69 module_param(reset_workaround_2, bool, 0444);
70 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
71 
72 /* just for backward compatibility */
73 static bool enable;
74 module_param(enable, bool, 0444);
75 
76 
77 
78 /*
79  * hw definitions
80  */
81 
82 /* The BIOS signature. */
83 #define NM_SIGNATURE 0x4e4d0000
84 /* Signature mask. */
85 #define NM_SIG_MASK 0xffff0000
86 
87 /* Size of the second memory area. */
88 #define NM_PORT2_SIZE 4096
89 
90 /* The base offset of the mixer in the second memory area. */
91 #define NM_MIXER_OFFSET 0x600
92 
93 /* The maximum size of a coefficient entry. */
94 #define NM_MAX_PLAYBACK_COEF_SIZE	0x5000
95 #define NM_MAX_RECORD_COEF_SIZE		0x1260
96 
97 /* The interrupt register. */
98 #define NM_INT_REG 0xa04
99 /* And its bits. */
100 #define NM_PLAYBACK_INT 0x40
101 #define NM_RECORD_INT 0x100
102 #define NM_MISC_INT_1 0x4000
103 #define NM_MISC_INT_2 0x1
104 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
105 
106 /* The AV's "mixer ready" status bit and location. */
107 #define NM_MIXER_STATUS_OFFSET 0xa04
108 #define NM_MIXER_READY_MASK 0x0800
109 #define NM_MIXER_PRESENCE 0xa06
110 #define NM_PRESENCE_MASK 0x0050
111 #define NM_PRESENCE_VALUE 0x0040
112 
113 /*
114  * For the ZX.  It uses the same interrupt register, but it holds 32
115  * bits instead of 16.
116  */
117 #define NM2_PLAYBACK_INT 0x10000
118 #define NM2_RECORD_INT 0x80000
119 #define NM2_MISC_INT_1 0x8
120 #define NM2_MISC_INT_2 0x2
121 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
122 
123 /* The ZX's "mixer ready" status bit and location. */
124 #define NM2_MIXER_STATUS_OFFSET 0xa06
125 #define NM2_MIXER_READY_MASK 0x0800
126 
127 /* The playback registers start from here. */
128 #define NM_PLAYBACK_REG_OFFSET 0x0
129 /* The record registers start from here. */
130 #define NM_RECORD_REG_OFFSET 0x200
131 
132 /* The rate register is located 2 bytes from the start of the register area. */
133 #define NM_RATE_REG_OFFSET 2
134 
135 /* Mono/stereo flag, number of bits on playback, and rate mask. */
136 #define NM_RATE_STEREO 1
137 #define NM_RATE_BITS_16 2
138 #define NM_RATE_MASK 0xf0
139 
140 /* Playback enable register. */
141 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
142 #define NM_PLAYBACK_ENABLE_FLAG 1
143 #define NM_PLAYBACK_ONESHOT 2
144 #define NM_PLAYBACK_FREERUN 4
145 
146 /* Mutes the audio output. */
147 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
148 #define NM_AUDIO_MUTE_LEFT 0x8000
149 #define NM_AUDIO_MUTE_RIGHT 0x0080
150 
151 /* Recording enable register. */
152 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
153 #define NM_RECORD_ENABLE_FLAG 1
154 #define NM_RECORD_FREERUN 2
155 
156 /* coefficient buffer pointer */
157 #define NM_COEFF_START_OFFSET	0x1c
158 #define NM_COEFF_END_OFFSET	0x20
159 
160 /* DMA buffer offsets */
161 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
162 #define NM_RBUFFER_END   (NM_RECORD_REG_OFFSET + 0x10)
163 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
164 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
165 
166 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
167 #define NM_PBUFFER_END   (NM_PLAYBACK_REG_OFFSET + 0x14)
168 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
169 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
170 
171 struct nm256_stream {
172 
173 	struct nm256 *chip;
174 	struct snd_pcm_substream *substream;
175 	int running;
176 	int suspended;
177 
178 	u32 buf;	/* offset from chip->buffer */
179 	int bufsize;	/* buffer size in bytes */
180 	void __iomem *bufptr;		/* mapped pointer */
181 	unsigned long bufptr_addr;	/* physical address of the mapped pointer */
182 
183 	int dma_size;		/* buffer size of the substream in bytes */
184 	int period_size;	/* period size in bytes */
185 	int periods;		/* # of periods */
186 	int shift;		/* bit shifts */
187 	int cur_period;		/* current period # */
188 
189 };
190 
191 struct nm256 {
192 
193 	struct snd_card *card;
194 
195 	void __iomem *cport;		/* control port */
196 	unsigned long cport_addr;	/* physical address */
197 
198 	void __iomem *buffer;		/* buffer */
199 	unsigned long buffer_addr;	/* buffer phyiscal address */
200 
201 	u32 buffer_start;		/* start offset from pci resource 0 */
202 	u32 buffer_end;			/* end offset */
203 	u32 buffer_size;		/* total buffer size */
204 
205 	u32 all_coeff_buf;		/* coefficient buffer */
206 	u32 coeff_buf[2];		/* coefficient buffer for each stream */
207 
208 	unsigned int coeffs_current: 1;	/* coeff. table is loaded? */
209 	unsigned int use_cache: 1;	/* use one big coef. table */
210 	unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
211 	unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
212 	unsigned int in_resume: 1;
213 
214 	int mixer_base;			/* register offset of ac97 mixer */
215 	int mixer_status_offset;	/* offset of mixer status reg. */
216 	int mixer_status_mask;		/* bit mask to test the mixer status */
217 
218 	int irq;
219 	int irq_acks;
220 	irq_handler_t interrupt;
221 	int badintrcount;		/* counter to check bogus interrupts */
222 	struct mutex irq_mutex;
223 
224 	struct nm256_stream streams[2];
225 
226 	struct snd_ac97 *ac97;
227 	unsigned short *ac97_regs; /* register caches, only for valid regs */
228 
229 	struct snd_pcm *pcm;
230 
231 	struct pci_dev *pci;
232 
233 	spinlock_t reg_lock;
234 
235 };
236 
237 
238 /*
239  * include coefficient table
240  */
241 #include "nm256_coef.c"
242 
243 
244 /*
245  * PCI ids
246  */
247 static const struct pci_device_id snd_nm256_ids[] = {
248 	{PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},
249 	{PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},
250 	{PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},
251 	{0,},
252 };
253 
254 MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
255 
256 
257 /*
258  * lowlvel stuffs
259  */
260 
261 static inline u8
262 snd_nm256_readb(struct nm256 *chip, int offset)
263 {
264 	return readb(chip->cport + offset);
265 }
266 
267 static inline u16
268 snd_nm256_readw(struct nm256 *chip, int offset)
269 {
270 	return readw(chip->cport + offset);
271 }
272 
273 static inline u32
274 snd_nm256_readl(struct nm256 *chip, int offset)
275 {
276 	return readl(chip->cport + offset);
277 }
278 
279 static inline void
280 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
281 {
282 	writeb(val, chip->cport + offset);
283 }
284 
285 static inline void
286 snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
287 {
288 	writew(val, chip->cport + offset);
289 }
290 
291 static inline void
292 snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
293 {
294 	writel(val, chip->cport + offset);
295 }
296 
297 static inline void
298 snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size)
299 {
300 	offset -= chip->buffer_start;
301 #ifdef CONFIG_SND_DEBUG
302 	if (offset < 0 || offset >= chip->buffer_size) {
303 		dev_err(chip->card->dev,
304 			"write_buffer invalid offset = %d size = %d\n",
305 			   offset, size);
306 		return;
307 	}
308 #endif
309 	memcpy_toio(chip->buffer + offset, src, size);
310 }
311 
312 /*
313  * coefficient handlers -- what a magic!
314  */
315 
316 static u16
317 snd_nm256_get_start_offset(int which)
318 {
319 	u16 offset = 0;
320 	while (which-- > 0)
321 		offset += coefficient_sizes[which];
322 	return offset;
323 }
324 
325 static void
326 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
327 {
328 	u32 coeff_buf = chip->coeff_buf[stream];
329 	u16 offset = snd_nm256_get_start_offset(which);
330 	u16 size = coefficient_sizes[which];
331 
332 	snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
333 	snd_nm256_writel(chip, port, coeff_buf);
334 	/* ???  Record seems to behave differently than playback.  */
335 	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
336 		size--;
337 	snd_nm256_writel(chip, port + 4, coeff_buf + size);
338 }
339 
340 static void
341 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
342 {
343 	/* The enable register for the specified engine.  */
344 	u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
345 		       NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
346 	u32 addr = NM_COEFF_START_OFFSET;
347 
348 	addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
349 		 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
350 
351 	if (snd_nm256_readb(chip, poffset) & 1) {
352 		dev_dbg(chip->card->dev,
353 			"NM256: Engine was enabled while loading coefficients!\n");
354 		return;
355 	}
356 
357 	/* The recording engine uses coefficient values 8-15.  */
358 	number &= 7;
359 	if (stream == SNDRV_PCM_STREAM_CAPTURE)
360 		number += 8;
361 
362 	if (! chip->use_cache) {
363 		snd_nm256_load_one_coefficient(chip, stream, addr, number);
364 		return;
365 	}
366 	if (! chip->coeffs_current) {
367 		snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
368 				       NM_TOTAL_COEFF_COUNT * 4);
369 		chip->coeffs_current = 1;
370 	} else {
371 		u32 base = chip->all_coeff_buf;
372 		u32 offset = snd_nm256_get_start_offset(number);
373 		u32 end_offset = offset + coefficient_sizes[number];
374 		snd_nm256_writel(chip, addr, base + offset);
375 		if (stream == SNDRV_PCM_STREAM_PLAYBACK)
376 			end_offset--;
377 		snd_nm256_writel(chip, addr + 4, base + end_offset);
378 	}
379 }
380 
381 
382 /* The actual rates supported by the card. */
383 static const unsigned int samplerates[8] = {
384 	8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
385 };
386 static const struct snd_pcm_hw_constraint_list constraints_rates = {
387 	.count = ARRAY_SIZE(samplerates),
388 	.list = samplerates,
389 	.mask = 0,
390 };
391 
392 /*
393  * return the index of the target rate
394  */
395 static int
396 snd_nm256_fixed_rate(unsigned int rate)
397 {
398 	unsigned int i;
399 	for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
400 		if (rate == samplerates[i])
401 			return i;
402 	}
403 	snd_BUG();
404 	return 0;
405 }
406 
407 /*
408  * set sample rate and format
409  */
410 static void
411 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
412 		     struct snd_pcm_substream *substream)
413 {
414 	struct snd_pcm_runtime *runtime = substream->runtime;
415 	int rate_index = snd_nm256_fixed_rate(runtime->rate);
416 	unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
417 
418 	s->shift = 0;
419 	if (snd_pcm_format_width(runtime->format) == 16) {
420 		ratebits |= NM_RATE_BITS_16;
421 		s->shift++;
422 	}
423 	if (runtime->channels > 1) {
424 		ratebits |= NM_RATE_STEREO;
425 		s->shift++;
426 	}
427 
428 	runtime->rate = samplerates[rate_index];
429 
430 	switch (substream->stream) {
431 	case SNDRV_PCM_STREAM_PLAYBACK:
432 		snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
433 		snd_nm256_writeb(chip,
434 				 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
435 				 ratebits);
436 		break;
437 	case SNDRV_PCM_STREAM_CAPTURE:
438 		snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
439 		snd_nm256_writeb(chip,
440 				 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
441 				 ratebits);
442 		break;
443 	}
444 }
445 
446 /* acquire interrupt */
447 static int snd_nm256_acquire_irq(struct nm256 *chip)
448 {
449 	mutex_lock(&chip->irq_mutex);
450 	if (chip->irq < 0) {
451 		if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
452 				KBUILD_MODNAME, chip)) {
453 			dev_err(chip->card->dev,
454 				"unable to grab IRQ %d\n", chip->pci->irq);
455 			mutex_unlock(&chip->irq_mutex);
456 			return -EBUSY;
457 		}
458 		chip->irq = chip->pci->irq;
459 		chip->card->sync_irq = chip->irq;
460 	}
461 	chip->irq_acks++;
462 	mutex_unlock(&chip->irq_mutex);
463 	return 0;
464 }
465 
466 /* release interrupt */
467 static void snd_nm256_release_irq(struct nm256 *chip)
468 {
469 	mutex_lock(&chip->irq_mutex);
470 	if (chip->irq_acks > 0)
471 		chip->irq_acks--;
472 	if (chip->irq_acks == 0 && chip->irq >= 0) {
473 		free_irq(chip->irq, chip);
474 		chip->irq = -1;
475 		chip->card->sync_irq = -1;
476 	}
477 	mutex_unlock(&chip->irq_mutex);
478 }
479 
480 /*
481  * start / stop
482  */
483 
484 /* update the watermark (current period) */
485 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
486 {
487 	s->cur_period++;
488 	s->cur_period %= s->periods;
489 	snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
490 }
491 
492 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
493 #define snd_nm256_capture_mark(chip, s)  snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
494 
495 static void
496 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
497 			 struct snd_pcm_substream *substream)
498 {
499 	/* program buffer pointers */
500 	snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
501 	snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
502 	snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
503 	snd_nm256_playback_mark(chip, s);
504 
505 	/* Enable playback engine and interrupts. */
506 	snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
507 			 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
508 	/* Enable both channels. */
509 	snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
510 }
511 
512 static void
513 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
514 			struct snd_pcm_substream *substream)
515 {
516 	/* program buffer pointers */
517 	snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
518 	snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
519 	snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
520 	snd_nm256_capture_mark(chip, s);
521 
522 	/* Enable playback engine and interrupts. */
523 	snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
524 			 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
525 }
526 
527 /* Stop the play engine. */
528 static void
529 snd_nm256_playback_stop(struct nm256 *chip)
530 {
531 	/* Shut off sound from both channels. */
532 	snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
533 			 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
534 	/* Disable play engine. */
535 	snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
536 }
537 
538 static void
539 snd_nm256_capture_stop(struct nm256 *chip)
540 {
541 	/* Disable recording engine. */
542 	snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
543 }
544 
545 static int
546 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
547 {
548 	struct nm256 *chip = snd_pcm_substream_chip(substream);
549 	struct nm256_stream *s = substream->runtime->private_data;
550 	int err = 0;
551 
552 	if (snd_BUG_ON(!s))
553 		return -ENXIO;
554 
555 	spin_lock(&chip->reg_lock);
556 	switch (cmd) {
557 	case SNDRV_PCM_TRIGGER_RESUME:
558 		s->suspended = 0;
559 		fallthrough;
560 	case SNDRV_PCM_TRIGGER_START:
561 		if (! s->running) {
562 			snd_nm256_playback_start(chip, s, substream);
563 			s->running = 1;
564 		}
565 		break;
566 	case SNDRV_PCM_TRIGGER_SUSPEND:
567 		s->suspended = 1;
568 		fallthrough;
569 	case SNDRV_PCM_TRIGGER_STOP:
570 		if (s->running) {
571 			snd_nm256_playback_stop(chip);
572 			s->running = 0;
573 		}
574 		break;
575 	default:
576 		err = -EINVAL;
577 		break;
578 	}
579 	spin_unlock(&chip->reg_lock);
580 	return err;
581 }
582 
583 static int
584 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
585 {
586 	struct nm256 *chip = snd_pcm_substream_chip(substream);
587 	struct nm256_stream *s = substream->runtime->private_data;
588 	int err = 0;
589 
590 	if (snd_BUG_ON(!s))
591 		return -ENXIO;
592 
593 	spin_lock(&chip->reg_lock);
594 	switch (cmd) {
595 	case SNDRV_PCM_TRIGGER_START:
596 	case SNDRV_PCM_TRIGGER_RESUME:
597 		if (! s->running) {
598 			snd_nm256_capture_start(chip, s, substream);
599 			s->running = 1;
600 		}
601 		break;
602 	case SNDRV_PCM_TRIGGER_STOP:
603 	case SNDRV_PCM_TRIGGER_SUSPEND:
604 		if (s->running) {
605 			snd_nm256_capture_stop(chip);
606 			s->running = 0;
607 		}
608 		break;
609 	default:
610 		err = -EINVAL;
611 		break;
612 	}
613 	spin_unlock(&chip->reg_lock);
614 	return err;
615 }
616 
617 
618 /*
619  * prepare playback/capture channel
620  */
621 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
622 {
623 	struct nm256 *chip = snd_pcm_substream_chip(substream);
624 	struct snd_pcm_runtime *runtime = substream->runtime;
625 	struct nm256_stream *s = runtime->private_data;
626 
627 	if (snd_BUG_ON(!s))
628 		return -ENXIO;
629 	s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
630 	s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
631 	s->periods = substream->runtime->periods;
632 	s->cur_period = 0;
633 
634 	spin_lock_irq(&chip->reg_lock);
635 	s->running = 0;
636 	snd_nm256_set_format(chip, s, substream);
637 	spin_unlock_irq(&chip->reg_lock);
638 
639 	return 0;
640 }
641 
642 
643 /*
644  * get the current pointer
645  */
646 static snd_pcm_uframes_t
647 snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
648 {
649 	struct nm256 *chip = snd_pcm_substream_chip(substream);
650 	struct nm256_stream *s = substream->runtime->private_data;
651 	unsigned long curp;
652 
653 	if (snd_BUG_ON(!s))
654 		return 0;
655 	curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
656 	curp %= s->dma_size;
657 	return bytes_to_frames(substream->runtime, curp);
658 }
659 
660 static snd_pcm_uframes_t
661 snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
662 {
663 	struct nm256 *chip = snd_pcm_substream_chip(substream);
664 	struct nm256_stream *s = substream->runtime->private_data;
665 	unsigned long curp;
666 
667 	if (snd_BUG_ON(!s))
668 		return 0;
669 	curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
670 	curp %= s->dma_size;
671 	return bytes_to_frames(substream->runtime, curp);
672 }
673 
674 /* Remapped I/O space can be accessible as pointer on i386 */
675 /* This might be changed in the future */
676 #ifndef __i386__
677 /*
678  * silence / copy for playback
679  */
680 static int
681 snd_nm256_playback_silence(struct snd_pcm_substream *substream,
682 			   int channel, unsigned long pos, unsigned long count)
683 {
684 	struct snd_pcm_runtime *runtime = substream->runtime;
685 	struct nm256_stream *s = runtime->private_data;
686 
687 	memset_io(s->bufptr + pos, 0, count);
688 	return 0;
689 }
690 
691 static int
692 snd_nm256_playback_copy(struct snd_pcm_substream *substream,
693 			int channel, unsigned long pos,
694 			struct iov_iter *src, unsigned long count)
695 {
696 	struct snd_pcm_runtime *runtime = substream->runtime;
697 	struct nm256_stream *s = runtime->private_data;
698 
699 	if (copy_from_iter_toio(s->bufptr + pos, count, src) != count)
700 		return -EFAULT;
701 	return 0;
702 }
703 
704 /*
705  * copy to user
706  */
707 static int
708 snd_nm256_capture_copy(struct snd_pcm_substream *substream,
709 		       int channel, unsigned long pos,
710 		       struct iov_iter *dst, unsigned long count)
711 {
712 	struct snd_pcm_runtime *runtime = substream->runtime;
713 	struct nm256_stream *s = runtime->private_data;
714 
715 	if (copy_to_iter_fromio(s->bufptr + pos, count, dst) != count)
716 		return -EFAULT;
717 	return 0;
718 }
719 
720 #endif /* !__i386__ */
721 
722 
723 /*
724  * update playback/capture watermarks
725  */
726 
727 /* spinlock held! */
728 static void
729 snd_nm256_playback_update(struct nm256 *chip)
730 {
731 	struct nm256_stream *s;
732 
733 	s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
734 	if (s->running && s->substream) {
735 		spin_unlock(&chip->reg_lock);
736 		snd_pcm_period_elapsed(s->substream);
737 		spin_lock(&chip->reg_lock);
738 		snd_nm256_playback_mark(chip, s);
739 	}
740 }
741 
742 /* spinlock held! */
743 static void
744 snd_nm256_capture_update(struct nm256 *chip)
745 {
746 	struct nm256_stream *s;
747 
748 	s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
749 	if (s->running && s->substream) {
750 		spin_unlock(&chip->reg_lock);
751 		snd_pcm_period_elapsed(s->substream);
752 		spin_lock(&chip->reg_lock);
753 		snd_nm256_capture_mark(chip, s);
754 	}
755 }
756 
757 /*
758  * hardware info
759  */
760 static const struct snd_pcm_hardware snd_nm256_playback =
761 {
762 	.info =			SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
763 				SNDRV_PCM_INFO_INTERLEAVED |
764 				/*SNDRV_PCM_INFO_PAUSE |*/
765 				SNDRV_PCM_INFO_RESUME,
766 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
767 	.rates =		SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
768 	.rate_min =		8000,
769 	.rate_max =		48000,
770 	.channels_min =		1,
771 	.channels_max =		2,
772 	.periods_min =		2,
773 	.periods_max =		1024,
774 	.buffer_bytes_max =	128 * 1024,
775 	.period_bytes_min =	256,
776 	.period_bytes_max =	128 * 1024,
777 };
778 
779 static const struct snd_pcm_hardware snd_nm256_capture =
780 {
781 	.info =			SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
782 				SNDRV_PCM_INFO_INTERLEAVED |
783 				/*SNDRV_PCM_INFO_PAUSE |*/
784 				SNDRV_PCM_INFO_RESUME,
785 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
786 	.rates =		SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
787 	.rate_min =		8000,
788 	.rate_max =		48000,
789 	.channels_min =		1,
790 	.channels_max =		2,
791 	.periods_min =		2,
792 	.periods_max =		1024,
793 	.buffer_bytes_max =	128 * 1024,
794 	.period_bytes_min =	256,
795 	.period_bytes_max =	128 * 1024,
796 };
797 
798 
799 /* set dma transfer size */
800 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
801 				   struct snd_pcm_hw_params *hw_params)
802 {
803 	/* area and addr are already set and unchanged */
804 	substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
805 	return 0;
806 }
807 
808 /*
809  * open
810  */
811 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
812 				   struct snd_pcm_substream *substream,
813 				   const struct snd_pcm_hardware *hw_ptr)
814 {
815 	struct snd_pcm_runtime *runtime = substream->runtime;
816 
817 	s->running = 0;
818 	runtime->hw = *hw_ptr;
819 	runtime->hw.buffer_bytes_max = s->bufsize;
820 	runtime->hw.period_bytes_max = s->bufsize / 2;
821 	runtime->dma_area = (void __force *) s->bufptr;
822 	runtime->dma_addr = s->bufptr_addr;
823 	runtime->dma_bytes = s->bufsize;
824 	runtime->private_data = s;
825 	s->substream = substream;
826 
827 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
828 				   &constraints_rates);
829 }
830 
831 static int
832 snd_nm256_playback_open(struct snd_pcm_substream *substream)
833 {
834 	struct nm256 *chip = snd_pcm_substream_chip(substream);
835 
836 	if (snd_nm256_acquire_irq(chip) < 0)
837 		return -EBUSY;
838 	snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
839 			       substream, &snd_nm256_playback);
840 	return 0;
841 }
842 
843 static int
844 snd_nm256_capture_open(struct snd_pcm_substream *substream)
845 {
846 	struct nm256 *chip = snd_pcm_substream_chip(substream);
847 
848 	if (snd_nm256_acquire_irq(chip) < 0)
849 		return -EBUSY;
850 	snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
851 			       substream, &snd_nm256_capture);
852 	return 0;
853 }
854 
855 /*
856  * close - we don't have to do special..
857  */
858 static int
859 snd_nm256_playback_close(struct snd_pcm_substream *substream)
860 {
861 	struct nm256 *chip = snd_pcm_substream_chip(substream);
862 
863 	snd_nm256_release_irq(chip);
864 	return 0;
865 }
866 
867 
868 static int
869 snd_nm256_capture_close(struct snd_pcm_substream *substream)
870 {
871 	struct nm256 *chip = snd_pcm_substream_chip(substream);
872 
873 	snd_nm256_release_irq(chip);
874 	return 0;
875 }
876 
877 /*
878  * create a pcm instance
879  */
880 static const struct snd_pcm_ops snd_nm256_playback_ops = {
881 	.open =		snd_nm256_playback_open,
882 	.close =	snd_nm256_playback_close,
883 	.hw_params =	snd_nm256_pcm_hw_params,
884 	.prepare =	snd_nm256_pcm_prepare,
885 	.trigger =	snd_nm256_playback_trigger,
886 	.pointer =	snd_nm256_playback_pointer,
887 #ifndef __i386__
888 	.copy =		snd_nm256_playback_copy,
889 	.fill_silence =	snd_nm256_playback_silence,
890 #endif
891 	.mmap =		snd_pcm_lib_mmap_iomem,
892 };
893 
894 static const struct snd_pcm_ops snd_nm256_capture_ops = {
895 	.open =		snd_nm256_capture_open,
896 	.close =	snd_nm256_capture_close,
897 	.hw_params =	snd_nm256_pcm_hw_params,
898 	.prepare =	snd_nm256_pcm_prepare,
899 	.trigger =	snd_nm256_capture_trigger,
900 	.pointer =	snd_nm256_capture_pointer,
901 #ifndef __i386__
902 	.copy =		snd_nm256_capture_copy,
903 #endif
904 	.mmap =		snd_pcm_lib_mmap_iomem,
905 };
906 
907 static int
908 snd_nm256_pcm(struct nm256 *chip, int device)
909 {
910 	struct snd_pcm *pcm;
911 	int i, err;
912 
913 	for (i = 0; i < 2; i++) {
914 		struct nm256_stream *s = &chip->streams[i];
915 		s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
916 		s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
917 	}
918 
919 	err = snd_pcm_new(chip->card, chip->card->driver, device,
920 			  1, 1, &pcm);
921 	if (err < 0)
922 		return err;
923 
924 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
925 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
926 
927 	pcm->private_data = chip;
928 	pcm->info_flags = 0;
929 	chip->pcm = pcm;
930 
931 	return 0;
932 }
933 
934 
935 /*
936  * Initialize the hardware.
937  */
938 static void
939 snd_nm256_init_chip(struct nm256 *chip)
940 {
941 	/* Reset everything. */
942 	snd_nm256_writeb(chip, 0x0, 0x11);
943 	snd_nm256_writew(chip, 0x214, 0);
944 	/* stop sounds.. */
945 	//snd_nm256_playback_stop(chip);
946 	//snd_nm256_capture_stop(chip);
947 }
948 
949 
950 static irqreturn_t
951 snd_nm256_intr_check(struct nm256 *chip)
952 {
953 	if (chip->badintrcount++ > 1000) {
954 		/*
955 		 * I'm not sure if the best thing is to stop the card from
956 		 * playing or just release the interrupt (after all, we're in
957 		 * a bad situation, so doing fancy stuff may not be such a good
958 		 * idea).
959 		 *
960 		 * I worry about the card engine continuing to play noise
961 		 * over and over, however--that could become a very
962 		 * obnoxious problem.  And we know that when this usually
963 		 * happens things are fairly safe, it just means the user's
964 		 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
965 		 */
966 		if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
967 			snd_nm256_playback_stop(chip);
968 		if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
969 			snd_nm256_capture_stop(chip);
970 		chip->badintrcount = 0;
971 		return IRQ_HANDLED;
972 	}
973 	return IRQ_NONE;
974 }
975 
976 /*
977  * Handle a potential interrupt for the device referred to by DEV_ID.
978  *
979  * I don't like the cut-n-paste job here either between the two routines,
980  * but there are sufficient differences between the two interrupt handlers
981  * that parameterizing it isn't all that great either.  (Could use a macro,
982  * I suppose...yucky bleah.)
983  */
984 
985 static irqreturn_t
986 snd_nm256_interrupt(int irq, void *dev_id)
987 {
988 	struct nm256 *chip = dev_id;
989 	u16 status;
990 	u8 cbyte;
991 
992 	status = snd_nm256_readw(chip, NM_INT_REG);
993 
994 	/* Not ours. */
995 	if (status == 0)
996 		return snd_nm256_intr_check(chip);
997 
998 	chip->badintrcount = 0;
999 
1000 	/* Rather boring; check for individual interrupts and process them. */
1001 
1002 	spin_lock(&chip->reg_lock);
1003 	if (status & NM_PLAYBACK_INT) {
1004 		status &= ~NM_PLAYBACK_INT;
1005 		NM_ACK_INT(chip, NM_PLAYBACK_INT);
1006 		snd_nm256_playback_update(chip);
1007 	}
1008 
1009 	if (status & NM_RECORD_INT) {
1010 		status &= ~NM_RECORD_INT;
1011 		NM_ACK_INT(chip, NM_RECORD_INT);
1012 		snd_nm256_capture_update(chip);
1013 	}
1014 
1015 	if (status & NM_MISC_INT_1) {
1016 		status &= ~NM_MISC_INT_1;
1017 		NM_ACK_INT(chip, NM_MISC_INT_1);
1018 		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1019 		snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1020 		cbyte = snd_nm256_readb(chip, 0x400);
1021 		snd_nm256_writeb(chip, 0x400, cbyte | 2);
1022 	}
1023 
1024 	if (status & NM_MISC_INT_2) {
1025 		status &= ~NM_MISC_INT_2;
1026 		NM_ACK_INT(chip, NM_MISC_INT_2);
1027 		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1028 		cbyte = snd_nm256_readb(chip, 0x400);
1029 		snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1030 	}
1031 
1032 	/* Unknown interrupt. */
1033 	if (status) {
1034 		dev_dbg(chip->card->dev,
1035 			"NM256: Fire in the hole! Unknown status 0x%x\n",
1036 			   status);
1037 		/* Pray. */
1038 		NM_ACK_INT(chip, status);
1039 	}
1040 
1041 	spin_unlock(&chip->reg_lock);
1042 	return IRQ_HANDLED;
1043 }
1044 
1045 /*
1046  * Handle a potential interrupt for the device referred to by DEV_ID.
1047  * This handler is for the 256ZX, and is very similar to the non-ZX
1048  * routine.
1049  */
1050 
1051 static irqreturn_t
1052 snd_nm256_interrupt_zx(int irq, void *dev_id)
1053 {
1054 	struct nm256 *chip = dev_id;
1055 	u32 status;
1056 	u8 cbyte;
1057 
1058 	status = snd_nm256_readl(chip, NM_INT_REG);
1059 
1060 	/* Not ours. */
1061 	if (status == 0)
1062 		return snd_nm256_intr_check(chip);
1063 
1064 	chip->badintrcount = 0;
1065 
1066 	/* Rather boring; check for individual interrupts and process them. */
1067 
1068 	spin_lock(&chip->reg_lock);
1069 	if (status & NM2_PLAYBACK_INT) {
1070 		status &= ~NM2_PLAYBACK_INT;
1071 		NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1072 		snd_nm256_playback_update(chip);
1073 	}
1074 
1075 	if (status & NM2_RECORD_INT) {
1076 		status &= ~NM2_RECORD_INT;
1077 		NM2_ACK_INT(chip, NM2_RECORD_INT);
1078 		snd_nm256_capture_update(chip);
1079 	}
1080 
1081 	if (status & NM2_MISC_INT_1) {
1082 		status &= ~NM2_MISC_INT_1;
1083 		NM2_ACK_INT(chip, NM2_MISC_INT_1);
1084 		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1085 		cbyte = snd_nm256_readb(chip, 0x400);
1086 		snd_nm256_writeb(chip, 0x400, cbyte | 2);
1087 	}
1088 
1089 	if (status & NM2_MISC_INT_2) {
1090 		status &= ~NM2_MISC_INT_2;
1091 		NM2_ACK_INT(chip, NM2_MISC_INT_2);
1092 		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1093 		cbyte = snd_nm256_readb(chip, 0x400);
1094 		snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1095 	}
1096 
1097 	/* Unknown interrupt. */
1098 	if (status) {
1099 		dev_dbg(chip->card->dev,
1100 			"NM256: Fire in the hole! Unknown status 0x%x\n",
1101 			   status);
1102 		/* Pray. */
1103 		NM2_ACK_INT(chip, status);
1104 	}
1105 
1106 	spin_unlock(&chip->reg_lock);
1107 	return IRQ_HANDLED;
1108 }
1109 
1110 /*
1111  * AC97 interface
1112  */
1113 
1114 /*
1115  * Waits for the mixer to become ready to be written; returns a zero value
1116  * if it timed out.
1117  */
1118 static int
1119 snd_nm256_ac97_ready(struct nm256 *chip)
1120 {
1121 	int timeout = 10;
1122 	u32 testaddr;
1123 	u16 testb;
1124 
1125 	testaddr = chip->mixer_status_offset;
1126 	testb = chip->mixer_status_mask;
1127 
1128 	/*
1129 	 * Loop around waiting for the mixer to become ready.
1130 	 */
1131 	while (timeout-- > 0) {
1132 		if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1133 			return 1;
1134 		udelay(100);
1135 	}
1136 	return 0;
1137 }
1138 
1139 /*
1140  * Initial register values to be written to the AC97 mixer.
1141  * While most of these are identical to the reset values, we do this
1142  * so that we have most of the register contents cached--this avoids
1143  * reading from the mixer directly (which seems to be problematic,
1144  * probably due to ignorance).
1145  */
1146 
1147 struct initialValues {
1148 	unsigned short reg;
1149 	unsigned short value;
1150 };
1151 
1152 static const struct initialValues nm256_ac97_init_val[] =
1153 {
1154 	{ AC97_MASTER, 		0x8000 },
1155 	{ AC97_HEADPHONE,	0x8000 },
1156 	{ AC97_MASTER_MONO,	0x8000 },
1157 	{ AC97_PC_BEEP,		0x8000 },
1158 	{ AC97_PHONE,		0x8008 },
1159 	{ AC97_MIC,		0x8000 },
1160 	{ AC97_LINE,		0x8808 },
1161 	{ AC97_CD,		0x8808 },
1162 	{ AC97_VIDEO,		0x8808 },
1163 	{ AC97_AUX,		0x8808 },
1164 	{ AC97_PCM,		0x8808 },
1165 	{ AC97_REC_SEL,		0x0000 },
1166 	{ AC97_REC_GAIN,	0x0B0B },
1167 	{ AC97_GENERAL_PURPOSE,	0x0000 },
1168 	{ AC97_3D_CONTROL,	0x8000 },
1169 	{ AC97_VENDOR_ID1, 	0x8384 },
1170 	{ AC97_VENDOR_ID2,	0x7609 },
1171 };
1172 
1173 static int nm256_ac97_idx(unsigned short reg)
1174 {
1175 	int i;
1176 	for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1177 		if (nm256_ac97_init_val[i].reg == reg)
1178 			return i;
1179 	return -1;
1180 }
1181 
1182 /*
1183  * some nm256 easily crash when reading from mixer registers
1184  * thus we're treating it as a write-only mixer and cache the
1185  * written values
1186  */
1187 static unsigned short
1188 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1189 {
1190 	struct nm256 *chip = ac97->private_data;
1191 	int idx = nm256_ac97_idx(reg);
1192 
1193 	if (idx < 0)
1194 		return 0;
1195 	return chip->ac97_regs[idx];
1196 }
1197 
1198 /*
1199  */
1200 static void
1201 snd_nm256_ac97_write(struct snd_ac97 *ac97,
1202 		     unsigned short reg, unsigned short val)
1203 {
1204 	struct nm256 *chip = ac97->private_data;
1205 	int tries = 2;
1206 	int idx = nm256_ac97_idx(reg);
1207 	u32 base;
1208 
1209 	if (idx < 0)
1210 		return;
1211 
1212 	base = chip->mixer_base;
1213 
1214 	snd_nm256_ac97_ready(chip);
1215 
1216 	/* Wait for the write to take, too. */
1217 	while (tries-- > 0) {
1218 		snd_nm256_writew(chip, base + reg, val);
1219 		msleep(1);  /* a little delay here seems better.. */
1220 		if (snd_nm256_ac97_ready(chip)) {
1221 			/* successful write: set cache */
1222 			chip->ac97_regs[idx] = val;
1223 			return;
1224 		}
1225 	}
1226 	dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n");
1227 }
1228 
1229 /* static resolution table */
1230 static const struct snd_ac97_res_table nm256_res_table[] = {
1231 	{ AC97_MASTER, 0x1f1f },
1232 	{ AC97_HEADPHONE, 0x1f1f },
1233 	{ AC97_MASTER_MONO, 0x001f },
1234 	{ AC97_PC_BEEP, 0x001f },
1235 	{ AC97_PHONE, 0x001f },
1236 	{ AC97_MIC, 0x001f },
1237 	{ AC97_LINE, 0x1f1f },
1238 	{ AC97_CD, 0x1f1f },
1239 	{ AC97_VIDEO, 0x1f1f },
1240 	{ AC97_AUX, 0x1f1f },
1241 	{ AC97_PCM, 0x1f1f },
1242 	{ AC97_REC_GAIN, 0x0f0f },
1243 	{ } /* terminator */
1244 };
1245 
1246 /* initialize the ac97 into a known state */
1247 static void
1248 snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1249 {
1250 	struct nm256 *chip = ac97->private_data;
1251 
1252 	/* Reset the mixer.  'Tis magic!  */
1253 	snd_nm256_writeb(chip, 0x6c0, 1);
1254 	if (! chip->reset_workaround) {
1255 		/* Dell latitude LS will lock up by this */
1256 		snd_nm256_writeb(chip, 0x6cc, 0x87);
1257 	}
1258 	if (! chip->reset_workaround_2) {
1259 		/* Dell latitude CSx will lock up by this */
1260 		snd_nm256_writeb(chip, 0x6cc, 0x80);
1261 		snd_nm256_writeb(chip, 0x6cc, 0x0);
1262 	}
1263 	if (! chip->in_resume) {
1264 		int i;
1265 		for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1266 			/* preload the cache, so as to avoid even a single
1267 			 * read of the mixer regs
1268 			 */
1269 			snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1270 					     nm256_ac97_init_val[i].value);
1271 		}
1272 	}
1273 }
1274 
1275 /* create an ac97 mixer interface */
1276 static int
1277 snd_nm256_mixer(struct nm256 *chip)
1278 {
1279 	struct snd_ac97_bus *pbus;
1280 	struct snd_ac97_template ac97;
1281 	int err;
1282 	static const struct snd_ac97_bus_ops ops = {
1283 		.reset = snd_nm256_ac97_reset,
1284 		.write = snd_nm256_ac97_write,
1285 		.read = snd_nm256_ac97_read,
1286 	};
1287 
1288 	chip->ac97_regs = devm_kcalloc(chip->card->dev,
1289 				       ARRAY_SIZE(nm256_ac97_init_val),
1290 				       sizeof(short), GFP_KERNEL);
1291 	if (! chip->ac97_regs)
1292 		return -ENOMEM;
1293 
1294 	err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
1295 	if (err < 0)
1296 		return err;
1297 
1298 	memset(&ac97, 0, sizeof(ac97));
1299 	ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1300 	ac97.private_data = chip;
1301 	ac97.res_table = nm256_res_table;
1302 	pbus->no_vra = 1;
1303 	err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1304 	if (err < 0)
1305 		return err;
1306 	if (! (chip->ac97->id & (0xf0000000))) {
1307 		/* looks like an invalid id */
1308 		sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1309 	}
1310 	return 0;
1311 }
1312 
1313 /*
1314  * See if the signature left by the NM256 BIOS is intact; if so, we use
1315  * the associated address as the end of our audio buffer in the video
1316  * RAM.
1317  */
1318 
1319 static int
1320 snd_nm256_peek_for_sig(struct nm256 *chip)
1321 {
1322 	/* The signature is located 1K below the end of video RAM.  */
1323 	void __iomem *temp;
1324 	/* Default buffer end is 5120 bytes below the top of RAM.  */
1325 	unsigned long pointer_found = chip->buffer_end - 0x1400;
1326 	u32 sig;
1327 
1328 	temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1329 	if (temp == NULL) {
1330 		dev_err(chip->card->dev,
1331 			"Unable to scan for card signature in video RAM\n");
1332 		return -EBUSY;
1333 	}
1334 
1335 	sig = readl(temp);
1336 	if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1337 		u32 pointer = readl(temp + 4);
1338 
1339 		/*
1340 		 * If it's obviously invalid, don't use it
1341 		 */
1342 		if (pointer == 0xffffffff ||
1343 		    pointer < chip->buffer_size ||
1344 		    pointer > chip->buffer_end) {
1345 			dev_err(chip->card->dev,
1346 				"invalid signature found: 0x%x\n", pointer);
1347 			iounmap(temp);
1348 			return -ENODEV;
1349 		} else {
1350 			pointer_found = pointer;
1351 			dev_info(chip->card->dev,
1352 				 "found card signature in video RAM: 0x%x\n",
1353 			       pointer);
1354 		}
1355 	}
1356 
1357 	iounmap(temp);
1358 	chip->buffer_end = pointer_found;
1359 
1360 	return 0;
1361 }
1362 
1363 /*
1364  * APM event handler, so the card is properly reinitialized after a power
1365  * event.
1366  */
1367 static int nm256_suspend(struct device *dev)
1368 {
1369 	struct snd_card *card = dev_get_drvdata(dev);
1370 	struct nm256 *chip = card->private_data;
1371 
1372 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1373 	snd_ac97_suspend(chip->ac97);
1374 	chip->coeffs_current = 0;
1375 	return 0;
1376 }
1377 
1378 static int nm256_resume(struct device *dev)
1379 {
1380 	struct snd_card *card = dev_get_drvdata(dev);
1381 	struct nm256 *chip = card->private_data;
1382 	int i;
1383 
1384 	/* Perform a full reset on the hardware */
1385 	chip->in_resume = 1;
1386 
1387 	snd_nm256_init_chip(chip);
1388 
1389 	/* restore ac97 */
1390 	snd_ac97_resume(chip->ac97);
1391 
1392 	for (i = 0; i < 2; i++) {
1393 		struct nm256_stream *s = &chip->streams[i];
1394 		if (s->substream && s->suspended) {
1395 			spin_lock_irq(&chip->reg_lock);
1396 			snd_nm256_set_format(chip, s, s->substream);
1397 			spin_unlock_irq(&chip->reg_lock);
1398 		}
1399 	}
1400 
1401 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1402 	chip->in_resume = 0;
1403 	return 0;
1404 }
1405 
1406 static DEFINE_SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume);
1407 
1408 static void snd_nm256_free(struct snd_card *card)
1409 {
1410 	struct nm256 *chip = card->private_data;
1411 
1412 	if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1413 		snd_nm256_playback_stop(chip);
1414 	if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1415 		snd_nm256_capture_stop(chip);
1416 }
1417 
1418 static int
1419 snd_nm256_create(struct snd_card *card, struct pci_dev *pci)
1420 {
1421 	struct nm256 *chip = card->private_data;
1422 	int err, pval;
1423 	u32 addr;
1424 
1425 	err = pcim_enable_device(pci);
1426 	if (err < 0)
1427 		return err;
1428 
1429 	chip->card = card;
1430 	chip->pci = pci;
1431 	chip->use_cache = use_cache;
1432 	spin_lock_init(&chip->reg_lock);
1433 	chip->irq = -1;
1434 	mutex_init(&chip->irq_mutex);
1435 
1436 	/* store buffer sizes in bytes */
1437 	chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1438 	chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1439 
1440 	/*
1441 	 * The NM256 has two memory ports.  The first port is nothing
1442 	 * more than a chunk of video RAM, which is used as the I/O ring
1443 	 * buffer.  The second port has the actual juicy stuff (like the
1444 	 * mixer and the playback engine control registers).
1445 	 */
1446 
1447 	chip->buffer_addr = pci_resource_start(pci, 0);
1448 	chip->cport_addr = pci_resource_start(pci, 1);
1449 
1450 	err = pci_request_regions(pci, card->driver);
1451 	if (err < 0)
1452 		return err;
1453 
1454 	/* Init the memory port info.  */
1455 	/* remap control port (#2) */
1456 	chip->cport = devm_ioremap(&pci->dev, chip->cport_addr, NM_PORT2_SIZE);
1457 	if (!chip->cport) {
1458 		dev_err(card->dev, "unable to map control port %lx\n",
1459 			chip->cport_addr);
1460 		return -ENOMEM;
1461 	}
1462 
1463 	if (!strcmp(card->driver, "NM256AV")) {
1464 		/* Ok, try to see if this is a non-AC97 version of the hardware. */
1465 		pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1466 		if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
1467 			if (! force_ac97) {
1468 				dev_err(card->dev,
1469 					"no ac97 is found!\n");
1470 				dev_err(card->dev,
1471 					"force the driver to load by passing in the module parameter\n");
1472 				dev_err(card->dev,
1473 					" force_ac97=1\n");
1474 				dev_err(card->dev,
1475 					"or try sb16, opl3sa2, or cs423x drivers instead.\n");
1476 				return -ENXIO;
1477 			}
1478 		}
1479 		chip->buffer_end = 2560 * 1024;
1480 		chip->interrupt = snd_nm256_interrupt;
1481 		chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1482 		chip->mixer_status_mask = NM_MIXER_READY_MASK;
1483 	} else {
1484 		/* Not sure if there is any relevant detect for the ZX or not.  */
1485 		if (snd_nm256_readb(chip, 0xa0b) != 0)
1486 			chip->buffer_end = 6144 * 1024;
1487 		else
1488 			chip->buffer_end = 4096 * 1024;
1489 
1490 		chip->interrupt = snd_nm256_interrupt_zx;
1491 		chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1492 		chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1493 	}
1494 
1495 	chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1496 		chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1497 	if (chip->use_cache)
1498 		chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1499 	else
1500 		chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1501 
1502 	if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1503 		chip->buffer_end = buffer_top;
1504 	else {
1505 		/* get buffer end pointer from signature */
1506 		err = snd_nm256_peek_for_sig(chip);
1507 		if (err < 0)
1508 			return err;
1509 	}
1510 
1511 	chip->buffer_start = chip->buffer_end - chip->buffer_size;
1512 	chip->buffer_addr += chip->buffer_start;
1513 
1514 	dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n",
1515 	       chip->buffer_start, chip->buffer_end);
1516 
1517 	chip->buffer = devm_ioremap(&pci->dev, chip->buffer_addr,
1518 				    chip->buffer_size);
1519 	if (!chip->buffer) {
1520 		dev_err(card->dev, "unable to map ring buffer at %lx\n",
1521 			chip->buffer_addr);
1522 		return -ENOMEM;
1523 	}
1524 
1525 	/* set offsets */
1526 	addr = chip->buffer_start;
1527 	chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1528 	addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1529 	chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1530 	addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1531 	if (chip->use_cache) {
1532 		chip->all_coeff_buf = addr;
1533 	} else {
1534 		chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1535 		addr += NM_MAX_PLAYBACK_COEF_SIZE;
1536 		chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1537 	}
1538 
1539 	/* Fixed setting. */
1540 	chip->mixer_base = NM_MIXER_OFFSET;
1541 
1542 	chip->coeffs_current = 0;
1543 
1544 	snd_nm256_init_chip(chip);
1545 
1546 	// pci_set_master(pci); /* needed? */
1547 	return 0;
1548 }
1549 
1550 
1551 enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1552 
1553 static const struct snd_pci_quirk nm256_quirks[] = {
1554 	/* HP omnibook 4150 has cs4232 codec internally */
1555 	SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED),
1556 	/* Reset workarounds to avoid lock-ups */
1557 	SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
1558 	SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
1559 	SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
1560 	{ } /* terminator */
1561 };
1562 
1563 
1564 static int snd_nm256_probe(struct pci_dev *pci,
1565 			   const struct pci_device_id *pci_id)
1566 {
1567 	struct snd_card *card;
1568 	struct nm256 *chip;
1569 	int err;
1570 	const struct snd_pci_quirk *q;
1571 
1572 	q = snd_pci_quirk_lookup(pci, nm256_quirks);
1573 	if (q) {
1574 		dev_dbg(&pci->dev, "Enabled quirk for %s.\n",
1575 			    snd_pci_quirk_name(q));
1576 		switch (q->value) {
1577 		case NM_IGNORED:
1578 			dev_info(&pci->dev,
1579 				 "The device is on the denylist. Loading stopped\n");
1580 			return -ENODEV;
1581 		case NM_RESET_WORKAROUND_2:
1582 			reset_workaround_2 = 1;
1583 			fallthrough;
1584 		case NM_RESET_WORKAROUND:
1585 			reset_workaround = 1;
1586 			break;
1587 		}
1588 	}
1589 
1590 	err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
1591 				sizeof(*chip), &card);
1592 	if (err < 0)
1593 		return err;
1594 	chip = card->private_data;
1595 
1596 	switch (pci->device) {
1597 	case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1598 		strcpy(card->driver, "NM256AV");
1599 		break;
1600 	case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1601 		strcpy(card->driver, "NM256ZX");
1602 		break;
1603 	case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1604 		strcpy(card->driver, "NM256XL+");
1605 		break;
1606 	default:
1607 		dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device);
1608 		return -EINVAL;
1609 	}
1610 
1611 	if (vaio_hack)
1612 		buffer_top = 0x25a800;	/* this avoids conflicts with XFree86 server */
1613 
1614 	if (playback_bufsize < 4)
1615 		playback_bufsize = 4;
1616 	if (playback_bufsize > 128)
1617 		playback_bufsize = 128;
1618 	if (capture_bufsize < 4)
1619 		capture_bufsize = 4;
1620 	if (capture_bufsize > 128)
1621 		capture_bufsize = 128;
1622 	err = snd_nm256_create(card, pci);
1623 	if (err < 0)
1624 		return err;
1625 
1626 	if (reset_workaround) {
1627 		dev_dbg(&pci->dev, "reset_workaround activated\n");
1628 		chip->reset_workaround = 1;
1629 	}
1630 
1631 	if (reset_workaround_2) {
1632 		dev_dbg(&pci->dev, "reset_workaround_2 activated\n");
1633 		chip->reset_workaround_2 = 1;
1634 	}
1635 
1636 	err = snd_nm256_pcm(chip, 0);
1637 	if (err < 0)
1638 		return err;
1639 	err = snd_nm256_mixer(chip);
1640 	if (err < 0)
1641 		return err;
1642 
1643 	sprintf(card->shortname, "NeoMagic %s", card->driver);
1644 	sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1645 		card->shortname,
1646 		chip->buffer_addr, chip->cport_addr, chip->irq);
1647 
1648 	err = snd_card_register(card);
1649 	if (err < 0)
1650 		return err;
1651 	card->private_free = snd_nm256_free;
1652 
1653 	pci_set_drvdata(pci, card);
1654 	return 0;
1655 }
1656 
1657 static struct pci_driver nm256_driver = {
1658 	.name = KBUILD_MODNAME,
1659 	.id_table = snd_nm256_ids,
1660 	.probe = snd_nm256_probe,
1661 	.driver = {
1662 		.pm = &nm256_pm,
1663 	},
1664 };
1665 
1666 module_pci_driver(nm256_driver);
1667