1 /* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */
2
3 /*-
4 * SPDX-License-Identifier: BSD-4-Clause
5 *
6 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
7 * All rights reserved.
8 *
9 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed for the NetBSD Project by
22 * Wasabi Systems, Inc.
23 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
24 * or promote products derived from this software without specific prior
25 * written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/bus.h>
43 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/devmap.h>
46
47 #include <vm/vm.h>
48 #include <vm/pmap.h>
49 #include <vm/vm_kern.h>
50 #include <vm/vm_extern.h>
51
52 #include <machine/bus.h>
53 #include <machine/cpufunc.h>
54
55 void
generic_bs_unimplemented(void)56 generic_bs_unimplemented(void)
57 {
58
59 panic("unimplemented bus_space function called");
60 }
61
62 /* Prototypes for all the bus_space structure functions */
63 bs_protos(generic);
64
65 int
generic_bs_map(bus_space_tag_t t,bus_addr_t bpa,bus_size_t size,int flags,bus_space_handle_t * bshp)66 generic_bs_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
67 bus_space_handle_t *bshp)
68 {
69 void *va;
70
71 /*
72 * We don't even examine the passed-in flags. For ARM, the CACHEABLE
73 * flag doesn't make sense (we create VM_MEMATTR_DEVICE mappings), and
74 * the LINEAR flag is just implied because we use kva_alloc(size).
75 */
76 if ((va = pmap_mapdev(bpa, size)) == NULL)
77 return (ENOMEM);
78 *bshp = (bus_space_handle_t)va;
79 return (0);
80 }
81
82 int
generic_bs_alloc(bus_space_tag_t t,bus_addr_t rstart,bus_addr_t rend,bus_size_t size,bus_size_t alignment,bus_size_t boundary,int flags,bus_addr_t * bpap,bus_space_handle_t * bshp)83 generic_bs_alloc(bus_space_tag_t t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
84 bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap,
85 bus_space_handle_t *bshp)
86 {
87
88 panic("generic_bs_alloc(): not implemented");
89 }
90
91 void
generic_bs_unmap(bus_space_tag_t t,bus_space_handle_t h,bus_size_t size)92 generic_bs_unmap(bus_space_tag_t t, bus_space_handle_t h, bus_size_t size)
93 {
94
95 pmap_unmapdev((void *)h, size);
96 }
97
98 void
generic_bs_free(bus_space_tag_t t,bus_space_handle_t bsh,bus_size_t size)99 generic_bs_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
100 {
101
102 panic("generic_bs_free(): not implemented");
103 }
104
105 int
generic_bs_subregion(bus_space_tag_t t,bus_space_handle_t bsh,bus_size_t offset,bus_size_t size,bus_space_handle_t * nbshp)106 generic_bs_subregion(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
107 bus_size_t size, bus_space_handle_t *nbshp)
108 {
109
110 *nbshp = bsh + offset;
111 return (0);
112 }
113
114 void
generic_bs_barrier(bus_space_tag_t t,bus_space_handle_t bsh,bus_size_t offset,bus_size_t len,int flags)115 generic_bs_barrier(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
116 bus_size_t len, int flags)
117 {
118
119 /*
120 * dsb() will drain the L1 write buffer and establish a memory access
121 * barrier point on platforms where that has meaning. On a write we
122 * also need to drain the L2 write buffer, because most on-chip memory
123 * mapped devices are downstream of the L2 cache. Note that this needs
124 * to be done even for memory mapped as Device type, because while
125 * Device memory is not cached, writes to it are still buffered.
126 */
127 dsb();
128 if (flags & BUS_SPACE_BARRIER_WRITE) {
129 cpu_l2cache_drain_writebuf();
130 }
131 }
132