xref: /linux/drivers/infiniband/hw/bnxt_re/qplib_fp.c (revision 80c4c25460849f441d35810555539aa3adc52929)
1 /*
2  * Broadcom NetXtreme-E RoCE driver.
3  *
4  * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
5  * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * BSD license below:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  *
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in
21  *    the documentation and/or other materials provided with the
22  *    distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  *
36  * Description: Fast Path Operators
37  */
38 
39 #define dev_fmt(fmt) "QPLIB: " fmt
40 
41 #include <linux/interrupt.h>
42 #include <linux/spinlock.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/delay.h>
47 #include <linux/prefetch.h>
48 #include <linux/if_ether.h>
49 #include <rdma/ib_mad.h>
50 
51 #include "roce_hsi.h"
52 
53 #include "qplib_res.h"
54 #include "qplib_rcfw.h"
55 #include "qplib_sp.h"
56 #include "qplib_fp.h"
57 #include <rdma/ib_addr.h>
58 #include "bnxt_ulp.h"
59 #include "bnxt_re.h"
60 #include "ib_verbs.h"
61 
62 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
63 
bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp * qp)64 static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
65 {
66 	qp->sq.condition = false;
67 	qp->sq.send_phantom = false;
68 	qp->sq.single = false;
69 }
70 
71 /* Flush list */
__bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)72 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
73 {
74 	struct bnxt_qplib_cq *scq, *rcq;
75 
76 	scq = qp->scq;
77 	rcq = qp->rcq;
78 
79 	if (!qp->sq.flushed) {
80 		dev_dbg(&scq->hwq.pdev->dev,
81 			"FP: Adding to SQ Flush list = %p\n", qp);
82 		bnxt_qplib_cancel_phantom_processing(qp);
83 		list_add_tail(&qp->sq_flush, &scq->sqf_head);
84 		qp->sq.flushed = true;
85 	}
86 	if (!qp->srq) {
87 		if (!qp->rq.flushed) {
88 			dev_dbg(&rcq->hwq.pdev->dev,
89 				"FP: Adding to RQ Flush list = %p\n", qp);
90 			list_add_tail(&qp->rq_flush, &rcq->rqf_head);
91 			qp->rq.flushed = true;
92 		}
93 	}
94 }
95 
bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp * qp,unsigned long * flags)96 static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp,
97 				       unsigned long *flags)
98 	__acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
99 {
100 	spin_lock_irqsave(&qp->scq->flush_lock, *flags);
101 	if (qp->scq == qp->rcq)
102 		__acquire(&qp->rcq->flush_lock);
103 	else
104 		spin_lock(&qp->rcq->flush_lock);
105 }
106 
bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp * qp,unsigned long * flags)107 static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp,
108 				       unsigned long *flags)
109 	__releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
110 {
111 	if (qp->scq == qp->rcq)
112 		__release(&qp->rcq->flush_lock);
113 	else
114 		spin_unlock(&qp->rcq->flush_lock);
115 	spin_unlock_irqrestore(&qp->scq->flush_lock, *flags);
116 }
117 
bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)118 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
119 {
120 	unsigned long flags;
121 
122 	bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
123 	__bnxt_qplib_add_flush_qp(qp);
124 	bnxt_qplib_release_cq_flush_locks(qp, &flags);
125 }
126 
__bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp * qp)127 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
128 {
129 	if (qp->sq.flushed) {
130 		qp->sq.flushed = false;
131 		list_del(&qp->sq_flush);
132 	}
133 	if (!qp->srq) {
134 		if (qp->rq.flushed) {
135 			qp->rq.flushed = false;
136 			list_del(&qp->rq_flush);
137 		}
138 	}
139 }
140 
bnxt_qplib_clean_qp(struct bnxt_qplib_qp * qp)141 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
142 {
143 	unsigned long flags;
144 
145 	bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
146 	__clean_cq(qp->scq, (u64)(unsigned long)qp);
147 	qp->sq.hwq.prod = 0;
148 	qp->sq.hwq.cons = 0;
149 	__clean_cq(qp->rcq, (u64)(unsigned long)qp);
150 	qp->rq.hwq.prod = 0;
151 	qp->rq.hwq.cons = 0;
152 
153 	__bnxt_qplib_del_flush_qp(qp);
154 	bnxt_qplib_release_cq_flush_locks(qp, &flags);
155 }
156 
bnxt_qpn_cqn_sched_task(struct work_struct * work)157 static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
158 {
159 	struct bnxt_qplib_nq_work *nq_work =
160 			container_of(work, struct bnxt_qplib_nq_work, work);
161 
162 	struct bnxt_qplib_cq *cq = nq_work->cq;
163 	struct bnxt_qplib_nq *nq = nq_work->nq;
164 
165 	if (cq && nq) {
166 		spin_lock_bh(&cq->compl_lock);
167 		if (atomic_read(&cq->arm_state) && nq->cqn_handler) {
168 			dev_dbg(&nq->pdev->dev,
169 				"%s:Trigger cq  = %p event nq = %p\n",
170 				__func__, cq, nq);
171 			nq->cqn_handler(nq, cq);
172 		}
173 		spin_unlock_bh(&cq->compl_lock);
174 	}
175 	kfree(nq_work);
176 }
177 
bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)178 static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res,
179 				       struct bnxt_qplib_qp *qp)
180 {
181 	struct bnxt_qplib_q *rq = &qp->rq;
182 	struct bnxt_qplib_q *sq = &qp->sq;
183 
184 	if (qp->rq_hdr_buf)
185 		dma_free_coherent(&res->pdev->dev,
186 				  rq->max_wqe * qp->rq_hdr_buf_size,
187 				  qp->rq_hdr_buf, qp->rq_hdr_buf_map);
188 	if (qp->sq_hdr_buf)
189 		dma_free_coherent(&res->pdev->dev,
190 				  sq->max_wqe * qp->sq_hdr_buf_size,
191 				  qp->sq_hdr_buf, qp->sq_hdr_buf_map);
192 	qp->rq_hdr_buf = NULL;
193 	qp->sq_hdr_buf = NULL;
194 	qp->rq_hdr_buf_map = 0;
195 	qp->sq_hdr_buf_map = 0;
196 	qp->sq_hdr_buf_size = 0;
197 	qp->rq_hdr_buf_size = 0;
198 }
199 
bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)200 static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res,
201 				       struct bnxt_qplib_qp *qp)
202 {
203 	struct bnxt_qplib_q *rq = &qp->rq;
204 	struct bnxt_qplib_q *sq = &qp->sq;
205 	int rc = 0;
206 
207 	if (qp->sq_hdr_buf_size && sq->max_wqe) {
208 		qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
209 					sq->max_wqe * qp->sq_hdr_buf_size,
210 					&qp->sq_hdr_buf_map, GFP_KERNEL);
211 		if (!qp->sq_hdr_buf) {
212 			rc = -ENOMEM;
213 			dev_err(&res->pdev->dev,
214 				"Failed to create sq_hdr_buf\n");
215 			goto fail;
216 		}
217 	}
218 
219 	if (qp->rq_hdr_buf_size && rq->max_wqe) {
220 		qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
221 						    rq->max_wqe *
222 						    qp->rq_hdr_buf_size,
223 						    &qp->rq_hdr_buf_map,
224 						    GFP_KERNEL);
225 		if (!qp->rq_hdr_buf) {
226 			rc = -ENOMEM;
227 			dev_err(&res->pdev->dev,
228 				"Failed to create rq_hdr_buf\n");
229 			goto fail;
230 		}
231 	}
232 	return 0;
233 
234 fail:
235 	bnxt_qplib_free_qp_hdr_buf(res, qp);
236 	return rc;
237 }
238 
clean_nq(struct bnxt_qplib_nq * nq,struct bnxt_qplib_cq * cq)239 static void clean_nq(struct bnxt_qplib_nq *nq, struct bnxt_qplib_cq *cq)
240 {
241 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
242 	struct nq_base *nqe, **nq_ptr;
243 	int budget = nq->budget;
244 	uintptr_t q_handle;
245 	u16 type;
246 
247 	spin_lock_bh(&hwq->lock);
248 	/* Service the NQ until empty */
249 	while (budget--) {
250 		nq_ptr = (struct nq_base **)hwq->pbl_ptr;
251 		nqe = &nq_ptr[NQE_PG(hwq->cons)][NQE_IDX(hwq->cons)];
252 		if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
253 			break;
254 
255 		/*
256 		 * The valid test of the entry must be done first before
257 		 * reading any further.
258 		 */
259 		dma_rmb();
260 
261 		type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
262 		switch (type) {
263 		case NQ_BASE_TYPE_CQ_NOTIFICATION:
264 		{
265 			struct nq_cn *nqcne = (struct nq_cn *)nqe;
266 
267 			q_handle = le32_to_cpu(nqcne->cq_handle_low);
268 			q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
269 						     << 32;
270 			if ((unsigned long)cq == q_handle) {
271 				nqcne->cq_handle_low = 0;
272 				nqcne->cq_handle_high = 0;
273 				cq->cnq_events++;
274 			}
275 			break;
276 		}
277 		default:
278 			break;
279 		}
280 		bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons,
281 					 1, &nq->nq_db.dbinfo.flags);
282 	}
283 	spin_unlock_bh(&hwq->lock);
284 }
285 
286 /* Wait for receiving all NQEs for this CQ and clean the NQEs associated with
287  * this CQ.
288  */
__wait_for_all_nqes(struct bnxt_qplib_cq * cq,u16 cnq_events)289 static void __wait_for_all_nqes(struct bnxt_qplib_cq *cq, u16 cnq_events)
290 {
291 	u32 retry_cnt = 100;
292 
293 	while (retry_cnt--) {
294 		if (cnq_events == cq->cnq_events)
295 			return;
296 		usleep_range(50, 100);
297 		clean_nq(cq->nq, cq);
298 	}
299 }
300 
bnxt_qplib_service_nq(struct tasklet_struct * t)301 static void bnxt_qplib_service_nq(struct tasklet_struct *t)
302 {
303 	struct bnxt_qplib_nq *nq = from_tasklet(nq, t, nq_tasklet);
304 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
305 	struct bnxt_qplib_cq *cq;
306 	int budget = nq->budget;
307 	struct nq_base *nqe;
308 	uintptr_t q_handle;
309 	u32 hw_polled = 0;
310 	u16 type;
311 
312 	spin_lock_bh(&hwq->lock);
313 	/* Service the NQ until empty */
314 	while (budget--) {
315 		nqe = bnxt_qplib_get_qe(hwq, hwq->cons, NULL);
316 		if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
317 			break;
318 
319 		/*
320 		 * The valid test of the entry must be done first before
321 		 * reading any further.
322 		 */
323 		dma_rmb();
324 
325 		type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
326 		switch (type) {
327 		case NQ_BASE_TYPE_CQ_NOTIFICATION:
328 		{
329 			struct nq_cn *nqcne = (struct nq_cn *)nqe;
330 			struct bnxt_re_cq *cq_p;
331 
332 			q_handle = le32_to_cpu(nqcne->cq_handle_low);
333 			q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
334 						     << 32;
335 			cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle;
336 			if (!cq)
337 				break;
338 			cq->toggle = (le16_to_cpu(nqe->info10_type) &
339 					NQ_CN_TOGGLE_MASK) >> NQ_CN_TOGGLE_SFT;
340 			cq->dbinfo.toggle = cq->toggle;
341 			cq_p = container_of(cq, struct bnxt_re_cq, qplib_cq);
342 			if (cq_p->uctx_cq_page)
343 				*((u32 *)cq_p->uctx_cq_page) = cq->toggle;
344 
345 			bnxt_qplib_armen_db(&cq->dbinfo,
346 					    DBC_DBC_TYPE_CQ_ARMENA);
347 			spin_lock_bh(&cq->compl_lock);
348 			atomic_set(&cq->arm_state, 0);
349 			if (nq->cqn_handler(nq, (cq)))
350 				dev_warn(&nq->pdev->dev,
351 					 "cqn - type 0x%x not handled\n", type);
352 			cq->cnq_events++;
353 			spin_unlock_bh(&cq->compl_lock);
354 			break;
355 		}
356 		case NQ_BASE_TYPE_SRQ_EVENT:
357 		{
358 			struct bnxt_qplib_srq *srq;
359 			struct bnxt_re_srq *srq_p;
360 			struct nq_srq_event *nqsrqe =
361 						(struct nq_srq_event *)nqe;
362 
363 			q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
364 			q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high)
365 				     << 32;
366 			srq = (struct bnxt_qplib_srq *)q_handle;
367 			srq->toggle = (le16_to_cpu(nqe->info10_type) & NQ_CN_TOGGLE_MASK)
368 				      >> NQ_CN_TOGGLE_SFT;
369 			srq->dbinfo.toggle = srq->toggle;
370 			srq_p = container_of(srq, struct bnxt_re_srq, qplib_srq);
371 			if (srq_p->uctx_srq_page)
372 				*((u32 *)srq_p->uctx_srq_page) = srq->toggle;
373 			bnxt_qplib_armen_db(&srq->dbinfo,
374 					    DBC_DBC_TYPE_SRQ_ARMENA);
375 			if (nq->srqn_handler(nq,
376 					     (struct bnxt_qplib_srq *)q_handle,
377 					     nqsrqe->event))
378 				dev_warn(&nq->pdev->dev,
379 					 "SRQ event 0x%x not handled\n",
380 					 nqsrqe->event);
381 			break;
382 		}
383 		case NQ_BASE_TYPE_DBQ_EVENT:
384 			break;
385 		default:
386 			dev_warn(&nq->pdev->dev,
387 				 "nqe with type = 0x%x not handled\n", type);
388 			break;
389 		}
390 		hw_polled++;
391 		bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons,
392 					 1, &nq->nq_db.dbinfo.flags);
393 	}
394 	if (hw_polled)
395 		bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, true);
396 	spin_unlock_bh(&hwq->lock);
397 }
398 
399 /* bnxt_re_synchronize_nq - self polling notification queue.
400  * @nq      -     notification queue pointer
401  *
402  * This function will start polling entries of a given notification queue
403  * for all pending  entries.
404  * This function is useful to synchronize notification entries while resources
405  * are going away.
406  */
407 
bnxt_re_synchronize_nq(struct bnxt_qplib_nq * nq)408 void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq)
409 {
410 	int budget = nq->budget;
411 
412 	nq->budget = nq->hwq.max_elements;
413 	bnxt_qplib_service_nq(&nq->nq_tasklet);
414 	nq->budget = budget;
415 }
416 
bnxt_qplib_nq_irq(int irq,void * dev_instance)417 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
418 {
419 	struct bnxt_qplib_nq *nq = dev_instance;
420 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
421 	u32 sw_cons;
422 
423 	/* Prefetch the NQ element */
424 	sw_cons = HWQ_CMP(hwq->cons, hwq);
425 	prefetch(bnxt_qplib_get_qe(hwq, sw_cons, NULL));
426 
427 	/* Fan out to CPU affinitized kthreads? */
428 	tasklet_schedule(&nq->nq_tasklet);
429 
430 	return IRQ_HANDLED;
431 }
432 
bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq * nq,bool kill)433 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill)
434 {
435 	if (!nq->requested)
436 		return;
437 
438 	nq->requested = false;
439 	/* Mask h/w interrupt */
440 	bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false);
441 	/* Sync with last running IRQ handler */
442 	synchronize_irq(nq->msix_vec);
443 	irq_set_affinity_hint(nq->msix_vec, NULL);
444 	free_irq(nq->msix_vec, nq);
445 	kfree(nq->name);
446 	nq->name = NULL;
447 
448 	if (kill)
449 		tasklet_kill(&nq->nq_tasklet);
450 	tasklet_disable(&nq->nq_tasklet);
451 }
452 
bnxt_qplib_disable_nq(struct bnxt_qplib_nq * nq)453 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
454 {
455 	if (nq->cqn_wq) {
456 		destroy_workqueue(nq->cqn_wq);
457 		nq->cqn_wq = NULL;
458 	}
459 
460 	/* Make sure the HW is stopped! */
461 	bnxt_qplib_nq_stop_irq(nq, true);
462 
463 	if (nq->nq_db.reg.bar_reg) {
464 		iounmap(nq->nq_db.reg.bar_reg);
465 		nq->nq_db.reg.bar_reg = NULL;
466 	}
467 
468 	nq->cqn_handler = NULL;
469 	nq->srqn_handler = NULL;
470 	nq->msix_vec = 0;
471 }
472 
bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq * nq,int nq_indx,int msix_vector,bool need_init)473 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
474 			    int msix_vector, bool need_init)
475 {
476 	struct bnxt_qplib_res *res = nq->res;
477 	int rc;
478 
479 	if (nq->requested)
480 		return -EFAULT;
481 
482 	nq->msix_vec = msix_vector;
483 	if (need_init)
484 		tasklet_setup(&nq->nq_tasklet, bnxt_qplib_service_nq);
485 	else
486 		tasklet_enable(&nq->nq_tasklet);
487 
488 	nq->name = kasprintf(GFP_KERNEL, "bnxt_re-nq-%d@pci:%s",
489 			     nq_indx, pci_name(res->pdev));
490 	if (!nq->name)
491 		return -ENOMEM;
492 	rc = request_irq(nq->msix_vec, bnxt_qplib_nq_irq, 0, nq->name, nq);
493 	if (rc) {
494 		kfree(nq->name);
495 		nq->name = NULL;
496 		tasklet_disable(&nq->nq_tasklet);
497 		return rc;
498 	}
499 
500 	cpumask_clear(&nq->mask);
501 	cpumask_set_cpu(nq_indx, &nq->mask);
502 	rc = irq_set_affinity_hint(nq->msix_vec, &nq->mask);
503 	if (rc) {
504 		dev_warn(&nq->pdev->dev,
505 			 "set affinity failed; vector: %d nq_idx: %d\n",
506 			 nq->msix_vec, nq_indx);
507 	}
508 	nq->requested = true;
509 	bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true);
510 
511 	return rc;
512 }
513 
bnxt_qplib_map_nq_db(struct bnxt_qplib_nq * nq,u32 reg_offt)514 static int bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq,  u32 reg_offt)
515 {
516 	resource_size_t reg_base;
517 	struct bnxt_qplib_nq_db *nq_db;
518 	struct pci_dev *pdev;
519 
520 	pdev = nq->pdev;
521 	nq_db = &nq->nq_db;
522 
523 	nq_db->dbinfo.flags = 0;
524 	nq_db->reg.bar_id = NQ_CONS_PCI_BAR_REGION;
525 	nq_db->reg.bar_base = pci_resource_start(pdev, nq_db->reg.bar_id);
526 	if (!nq_db->reg.bar_base) {
527 		dev_err(&pdev->dev, "QPLIB: NQ BAR region %d resc start is 0!",
528 			nq_db->reg.bar_id);
529 		return -ENOMEM;
530 	}
531 
532 	reg_base = nq_db->reg.bar_base + reg_offt;
533 	/* Unconditionally map 8 bytes to support 57500 series */
534 	nq_db->reg.len = 8;
535 	nq_db->reg.bar_reg = ioremap(reg_base, nq_db->reg.len);
536 	if (!nq_db->reg.bar_reg) {
537 		dev_err(&pdev->dev, "QPLIB: NQ BAR region %d mapping failed",
538 			nq_db->reg.bar_id);
539 		return -ENOMEM;
540 	}
541 
542 	nq_db->dbinfo.db = nq_db->reg.bar_reg;
543 	nq_db->dbinfo.hwq = &nq->hwq;
544 	nq_db->dbinfo.xid = nq->ring_id;
545 
546 	return 0;
547 }
548 
bnxt_qplib_enable_nq(struct pci_dev * pdev,struct bnxt_qplib_nq * nq,int nq_idx,int msix_vector,int bar_reg_offset,cqn_handler_t cqn_handler,srqn_handler_t srqn_handler)549 int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq,
550 			 int nq_idx, int msix_vector, int bar_reg_offset,
551 			 cqn_handler_t cqn_handler,
552 			 srqn_handler_t srqn_handler)
553 {
554 	int rc;
555 
556 	nq->pdev = pdev;
557 	nq->cqn_handler = cqn_handler;
558 	nq->srqn_handler = srqn_handler;
559 	nq->load = 0;
560 
561 	/* Have a task to schedule CQ notifiers in post send case */
562 	nq->cqn_wq  = create_singlethread_workqueue("bnxt_qplib_nq");
563 	if (!nq->cqn_wq)
564 		return -ENOMEM;
565 
566 	rc = bnxt_qplib_map_nq_db(nq, bar_reg_offset);
567 	if (rc)
568 		goto fail;
569 
570 	rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true);
571 	if (rc) {
572 		dev_err(&nq->pdev->dev,
573 			"Failed to request irq for nq-idx %d\n", nq_idx);
574 		goto fail;
575 	}
576 
577 	return 0;
578 fail:
579 	bnxt_qplib_disable_nq(nq);
580 	return rc;
581 }
582 
bnxt_qplib_free_nq(struct bnxt_qplib_nq * nq)583 void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq)
584 {
585 	if (nq->hwq.max_elements) {
586 		bnxt_qplib_free_hwq(nq->res, &nq->hwq);
587 		nq->hwq.max_elements = 0;
588 	}
589 }
590 
bnxt_qplib_alloc_nq(struct bnxt_qplib_res * res,struct bnxt_qplib_nq * nq)591 int bnxt_qplib_alloc_nq(struct bnxt_qplib_res *res, struct bnxt_qplib_nq *nq)
592 {
593 	struct bnxt_qplib_hwq_attr hwq_attr = {};
594 	struct bnxt_qplib_sg_info sginfo = {};
595 
596 	nq->pdev = res->pdev;
597 	nq->res = res;
598 	if (!nq->hwq.max_elements ||
599 	    nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
600 		nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
601 
602 	sginfo.pgsize = PAGE_SIZE;
603 	sginfo.pgshft = PAGE_SHIFT;
604 	hwq_attr.res = res;
605 	hwq_attr.sginfo = &sginfo;
606 	hwq_attr.depth = nq->hwq.max_elements;
607 	hwq_attr.stride = sizeof(struct nq_base);
608 	hwq_attr.type = bnxt_qplib_get_hwq_type(nq->res);
609 	if (bnxt_qplib_alloc_init_hwq(&nq->hwq, &hwq_attr)) {
610 		dev_err(&nq->pdev->dev, "FP NQ allocation failed");
611 		return -ENOMEM;
612 	}
613 	nq->budget = 8;
614 	return 0;
615 }
616 
617 /* SRQ */
bnxt_qplib_destroy_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)618 void bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
619 			   struct bnxt_qplib_srq *srq)
620 {
621 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
622 	struct creq_destroy_srq_resp resp = {};
623 	struct bnxt_qplib_cmdqmsg msg = {};
624 	struct cmdq_destroy_srq req = {};
625 	int rc;
626 
627 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
628 				 CMDQ_BASE_OPCODE_DESTROY_SRQ,
629 				 sizeof(req));
630 
631 	/* Configure the request */
632 	req.srq_cid = cpu_to_le32(srq->id);
633 
634 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
635 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
636 	kfree(srq->swq);
637 	if (rc)
638 		return;
639 	bnxt_qplib_free_hwq(res, &srq->hwq);
640 }
641 
bnxt_qplib_create_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)642 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
643 			  struct bnxt_qplib_srq *srq)
644 {
645 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
646 	struct bnxt_qplib_hwq_attr hwq_attr = {};
647 	struct creq_create_srq_resp resp = {};
648 	struct bnxt_qplib_cmdqmsg msg = {};
649 	struct cmdq_create_srq req = {};
650 	struct bnxt_qplib_pbl *pbl;
651 	u16 pg_sz_lvl;
652 	int rc, idx;
653 
654 	hwq_attr.res = res;
655 	hwq_attr.sginfo = &srq->sg_info;
656 	hwq_attr.depth = srq->max_wqe;
657 	hwq_attr.stride = srq->wqe_size;
658 	hwq_attr.type = HWQ_TYPE_QUEUE;
659 	rc = bnxt_qplib_alloc_init_hwq(&srq->hwq, &hwq_attr);
660 	if (rc)
661 		return rc;
662 	srq->dbinfo.flags = 0;
663 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
664 				 CMDQ_BASE_OPCODE_CREATE_SRQ,
665 				 sizeof(req));
666 
667 	/* Configure the request */
668 	req.dpi = cpu_to_le32(srq->dpi->dpi);
669 	req.srq_handle = cpu_to_le64((uintptr_t)srq);
670 
671 	req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements);
672 	pbl = &srq->hwq.pbl[PBL_LVL_0];
673 	pg_sz_lvl = ((u16)bnxt_qplib_base_pg_size(&srq->hwq) <<
674 		     CMDQ_CREATE_SRQ_PG_SIZE_SFT);
675 	pg_sz_lvl |= (srq->hwq.level & CMDQ_CREATE_SRQ_LVL_MASK) <<
676 		      CMDQ_CREATE_SRQ_LVL_SFT;
677 	req.pg_size_lvl = cpu_to_le16(pg_sz_lvl);
678 	req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
679 	req.pd_id = cpu_to_le32(srq->pd->id);
680 	req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
681 
682 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
683 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
684 	if (rc)
685 		goto fail;
686 
687 	spin_lock_init(&srq->lock);
688 	srq->start_idx = 0;
689 	srq->last_idx = srq->hwq.max_elements - 1;
690 	if (!srq->hwq.is_user) {
691 		srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq),
692 				   GFP_KERNEL);
693 		if (!srq->swq) {
694 			rc = -ENOMEM;
695 			goto fail;
696 		}
697 		for (idx = 0; idx < srq->hwq.max_elements; idx++)
698 			srq->swq[idx].next_idx = idx + 1;
699 		srq->swq[srq->last_idx].next_idx = -1;
700 	}
701 
702 	srq->id = le32_to_cpu(resp.xid);
703 	srq->dbinfo.hwq = &srq->hwq;
704 	srq->dbinfo.xid = srq->id;
705 	srq->dbinfo.db = srq->dpi->dbr;
706 	srq->dbinfo.max_slot = 1;
707 	srq->dbinfo.priv_db = res->dpi_tbl.priv_db;
708 	if (srq->threshold)
709 		bnxt_qplib_armen_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ_ARMENA);
710 	srq->arm_req = false;
711 
712 	return 0;
713 fail:
714 	bnxt_qplib_free_hwq(res, &srq->hwq);
715 	kfree(srq->swq);
716 
717 	return rc;
718 }
719 
bnxt_qplib_modify_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)720 int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
721 			  struct bnxt_qplib_srq *srq)
722 {
723 	struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
724 	u32 count;
725 
726 	count = __bnxt_qplib_get_avail(srq_hwq);
727 	if (count > srq->threshold) {
728 		srq->arm_req = false;
729 		bnxt_qplib_srq_arm_db(&srq->dbinfo, srq->threshold);
730 	} else {
731 		/* Deferred arming */
732 		srq->arm_req = true;
733 	}
734 
735 	return 0;
736 }
737 
bnxt_qplib_query_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)738 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
739 			 struct bnxt_qplib_srq *srq)
740 {
741 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
742 	struct creq_query_srq_resp resp = {};
743 	struct bnxt_qplib_cmdqmsg msg = {};
744 	struct bnxt_qplib_rcfw_sbuf sbuf;
745 	struct creq_query_srq_resp_sb *sb;
746 	struct cmdq_query_srq req = {};
747 	int rc;
748 
749 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
750 				 CMDQ_BASE_OPCODE_QUERY_SRQ,
751 				 sizeof(req));
752 
753 	/* Configure the request */
754 	sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
755 	sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
756 				     &sbuf.dma_addr, GFP_KERNEL);
757 	if (!sbuf.sb)
758 		return -ENOMEM;
759 	req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
760 	req.srq_cid = cpu_to_le32(srq->id);
761 	sb = sbuf.sb;
762 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
763 				sizeof(resp), 0);
764 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
765 	if (!rc)
766 		srq->threshold = le16_to_cpu(sb->srq_limit);
767 	dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
768 			  sbuf.sb, sbuf.dma_addr);
769 
770 	return rc;
771 }
772 
bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq * srq,struct bnxt_qplib_swqe * wqe)773 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
774 			     struct bnxt_qplib_swqe *wqe)
775 {
776 	struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
777 	struct rq_wqe *srqe;
778 	struct sq_sge *hw_sge;
779 	u32 count = 0;
780 	int i, next;
781 
782 	spin_lock(&srq_hwq->lock);
783 	if (srq->start_idx == srq->last_idx) {
784 		dev_err(&srq_hwq->pdev->dev,
785 			"FP: SRQ (0x%x) is full!\n", srq->id);
786 		spin_unlock(&srq_hwq->lock);
787 		return -EINVAL;
788 	}
789 	next = srq->start_idx;
790 	srq->start_idx = srq->swq[next].next_idx;
791 	spin_unlock(&srq_hwq->lock);
792 
793 	srqe = bnxt_qplib_get_qe(srq_hwq, srq_hwq->prod, NULL);
794 	memset(srqe, 0, srq->wqe_size);
795 	/* Calculate wqe_size16 and data_len */
796 	for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
797 	     i < wqe->num_sge; i++, hw_sge++) {
798 		hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
799 		hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
800 		hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
801 	}
802 	srqe->wqe_type = wqe->type;
803 	srqe->flags = wqe->flags;
804 	srqe->wqe_size = wqe->num_sge +
805 			((offsetof(typeof(*srqe), data) + 15) >> 4);
806 	srqe->wr_id[0] = cpu_to_le32((u32)next);
807 	srq->swq[next].wr_id = wqe->wr_id;
808 
809 	bnxt_qplib_hwq_incr_prod(&srq->dbinfo, srq_hwq, srq->dbinfo.max_slot);
810 
811 	spin_lock(&srq_hwq->lock);
812 	count = __bnxt_qplib_get_avail(srq_hwq);
813 	spin_unlock(&srq_hwq->lock);
814 	/* Ring DB */
815 	bnxt_qplib_ring_prod_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ);
816 	if (srq->arm_req == true && count > srq->threshold) {
817 		srq->arm_req = false;
818 		bnxt_qplib_srq_arm_db(&srq->dbinfo, srq->threshold);
819 	}
820 
821 	return 0;
822 }
823 
824 /* QP */
825 
bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q * que)826 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que)
827 {
828 	int indx;
829 
830 	que->swq = kcalloc(que->max_sw_wqe, sizeof(*que->swq), GFP_KERNEL);
831 	if (!que->swq)
832 		return -ENOMEM;
833 
834 	que->swq_start = 0;
835 	que->swq_last = que->max_sw_wqe - 1;
836 	for (indx = 0; indx < que->max_sw_wqe; indx++)
837 		que->swq[indx].next_idx = indx + 1;
838 	que->swq[que->swq_last].next_idx = 0; /* Make it circular */
839 	que->swq_last = 0;
840 
841 	return 0;
842 }
843 
bnxt_qplib_create_qp1(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)844 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
845 {
846 	struct bnxt_qplib_hwq_attr hwq_attr = {};
847 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
848 	struct creq_create_qp1_resp resp = {};
849 	struct bnxt_qplib_cmdqmsg msg = {};
850 	struct bnxt_qplib_q *sq = &qp->sq;
851 	struct bnxt_qplib_q *rq = &qp->rq;
852 	struct cmdq_create_qp1 req = {};
853 	struct bnxt_qplib_pbl *pbl;
854 	u32 qp_flags = 0;
855 	u8 pg_sz_lvl;
856 	u32 tbl_indx;
857 	int rc;
858 
859 	sq->dbinfo.flags = 0;
860 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
861 				 CMDQ_BASE_OPCODE_CREATE_QP1,
862 				 sizeof(req));
863 	/* General */
864 	req.type = qp->type;
865 	req.dpi = cpu_to_le32(qp->dpi->dpi);
866 	req.qp_handle = cpu_to_le64(qp->qp_handle);
867 
868 	/* SQ */
869 	hwq_attr.res = res;
870 	hwq_attr.sginfo = &sq->sg_info;
871 	hwq_attr.stride = sizeof(struct sq_sge);
872 	hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, false);
873 	hwq_attr.type = HWQ_TYPE_QUEUE;
874 	rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
875 	if (rc)
876 		return rc;
877 
878 	rc = bnxt_qplib_alloc_init_swq(sq);
879 	if (rc)
880 		goto fail_sq;
881 
882 	req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
883 	pbl = &sq->hwq.pbl[PBL_LVL_0];
884 	req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
885 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) <<
886 		     CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT);
887 	pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK);
888 	req.sq_pg_size_sq_lvl = pg_sz_lvl;
889 	req.sq_fwo_sq_sge =
890 		cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) <<
891 			     CMDQ_CREATE_QP1_SQ_SGE_SFT);
892 	req.scq_cid = cpu_to_le32(qp->scq->id);
893 
894 	/* RQ */
895 	if (rq->max_wqe) {
896 		rq->dbinfo.flags = 0;
897 		hwq_attr.res = res;
898 		hwq_attr.sginfo = &rq->sg_info;
899 		hwq_attr.stride = sizeof(struct sq_sge);
900 		hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false);
901 		hwq_attr.type = HWQ_TYPE_QUEUE;
902 		rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
903 		if (rc)
904 			goto sq_swq;
905 		rc = bnxt_qplib_alloc_init_swq(rq);
906 		if (rc)
907 			goto fail_rq;
908 		req.rq_size = cpu_to_le32(rq->max_wqe);
909 		pbl = &rq->hwq.pbl[PBL_LVL_0];
910 		req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
911 		pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) <<
912 			     CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT);
913 		pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK);
914 		req.rq_pg_size_rq_lvl = pg_sz_lvl;
915 		req.rq_fwo_rq_sge =
916 			cpu_to_le16((rq->max_sge &
917 				     CMDQ_CREATE_QP1_RQ_SGE_MASK) <<
918 				    CMDQ_CREATE_QP1_RQ_SGE_SFT);
919 	}
920 	req.rcq_cid = cpu_to_le32(qp->rcq->id);
921 	/* Header buffer - allow hdr_buf pass in */
922 	rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
923 	if (rc) {
924 		rc = -ENOMEM;
925 		goto rq_rwq;
926 	}
927 	qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
928 	req.qp_flags = cpu_to_le32(qp_flags);
929 	req.pd_id = cpu_to_le32(qp->pd->id);
930 
931 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
932 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
933 	if (rc)
934 		goto fail;
935 
936 	qp->id = le32_to_cpu(resp.xid);
937 	qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
938 	qp->cctx = res->cctx;
939 	sq->dbinfo.hwq = &sq->hwq;
940 	sq->dbinfo.xid = qp->id;
941 	sq->dbinfo.db = qp->dpi->dbr;
942 	sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode);
943 	if (rq->max_wqe) {
944 		rq->dbinfo.hwq = &rq->hwq;
945 		rq->dbinfo.xid = qp->id;
946 		rq->dbinfo.db = qp->dpi->dbr;
947 		rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
948 	}
949 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
950 	rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
951 	rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
952 
953 	return 0;
954 
955 fail:
956 	bnxt_qplib_free_qp_hdr_buf(res, qp);
957 rq_rwq:
958 	kfree(rq->swq);
959 fail_rq:
960 	bnxt_qplib_free_hwq(res, &rq->hwq);
961 sq_swq:
962 	kfree(sq->swq);
963 fail_sq:
964 	bnxt_qplib_free_hwq(res, &sq->hwq);
965 	return rc;
966 }
967 
bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp * qp,int size)968 static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size)
969 {
970 	struct bnxt_qplib_hwq *hwq;
971 	struct bnxt_qplib_q *sq;
972 	u64 fpsne, psn_pg;
973 	u16 indx_pad = 0;
974 
975 	sq = &qp->sq;
976 	hwq = &sq->hwq;
977 	/* First psn entry */
978 	fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg);
979 	if (!IS_ALIGNED(fpsne, PAGE_SIZE))
980 		indx_pad = (fpsne & ~PAGE_MASK) / size;
981 	hwq->pad_pgofft = indx_pad;
982 	hwq->pad_pg = (u64 *)psn_pg;
983 	hwq->pad_stride = size;
984 }
985 
bnxt_qplib_create_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)986 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
987 {
988 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
989 	struct bnxt_qplib_hwq_attr hwq_attr = {};
990 	struct bnxt_qplib_sg_info sginfo = {};
991 	struct creq_create_qp_resp resp = {};
992 	struct bnxt_qplib_cmdqmsg msg = {};
993 	struct bnxt_qplib_q *sq = &qp->sq;
994 	struct bnxt_qplib_q *rq = &qp->rq;
995 	struct cmdq_create_qp req = {};
996 	int rc, req_size, psn_sz = 0;
997 	struct bnxt_qplib_hwq *xrrq;
998 	struct bnxt_qplib_pbl *pbl;
999 	u32 qp_flags = 0;
1000 	u8 pg_sz_lvl;
1001 	u32 tbl_indx;
1002 	u16 nsge;
1003 
1004 	qp->is_host_msn_tbl = _is_host_msn_table(res->dattr->dev_cap_flags2);
1005 	sq->dbinfo.flags = 0;
1006 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1007 				 CMDQ_BASE_OPCODE_CREATE_QP,
1008 				 sizeof(req));
1009 
1010 	/* General */
1011 	req.type = qp->type;
1012 	req.dpi = cpu_to_le32(qp->dpi->dpi);
1013 	req.qp_handle = cpu_to_le64(qp->qp_handle);
1014 
1015 	/* SQ */
1016 	if (qp->type == CMDQ_CREATE_QP_TYPE_RC) {
1017 		psn_sz = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ?
1018 			 sizeof(struct sq_psn_search_ext) :
1019 			 sizeof(struct sq_psn_search);
1020 
1021 		if (qp->is_host_msn_tbl) {
1022 			psn_sz = sizeof(struct sq_msn_search);
1023 			qp->msn = 0;
1024 		}
1025 	}
1026 
1027 	hwq_attr.res = res;
1028 	hwq_attr.sginfo = &sq->sg_info;
1029 	hwq_attr.stride = sizeof(struct sq_sge);
1030 	hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, true);
1031 	hwq_attr.aux_stride = psn_sz;
1032 	hwq_attr.aux_depth = psn_sz ? bnxt_qplib_set_sq_size(sq, qp->wqe_mode)
1033 				    : 0;
1034 	/* Update msn tbl size */
1035 	if (qp->is_host_msn_tbl && psn_sz) {
1036 		if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC)
1037 			hwq_attr.aux_depth =
1038 				roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
1039 		else
1040 			hwq_attr.aux_depth =
1041 				roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)) / 2;
1042 		qp->msn_tbl_sz = hwq_attr.aux_depth;
1043 		qp->msn = 0;
1044 	}
1045 
1046 	hwq_attr.type = HWQ_TYPE_QUEUE;
1047 	rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
1048 	if (rc)
1049 		return rc;
1050 
1051 	if (!sq->hwq.is_user) {
1052 		rc = bnxt_qplib_alloc_init_swq(sq);
1053 		if (rc)
1054 			goto fail_sq;
1055 
1056 		if (psn_sz)
1057 			bnxt_qplib_init_psn_ptr(qp, psn_sz);
1058 	}
1059 	req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
1060 	pbl = &sq->hwq.pbl[PBL_LVL_0];
1061 	req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
1062 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) <<
1063 		     CMDQ_CREATE_QP_SQ_PG_SIZE_SFT);
1064 	pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK);
1065 	req.sq_pg_size_sq_lvl = pg_sz_lvl;
1066 	req.sq_fwo_sq_sge =
1067 		cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) <<
1068 			     CMDQ_CREATE_QP_SQ_SGE_SFT) | 0);
1069 	req.scq_cid = cpu_to_le32(qp->scq->id);
1070 
1071 	/* RQ */
1072 	if (!qp->srq) {
1073 		rq->dbinfo.flags = 0;
1074 		hwq_attr.res = res;
1075 		hwq_attr.sginfo = &rq->sg_info;
1076 		hwq_attr.stride = sizeof(struct sq_sge);
1077 		hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false);
1078 		hwq_attr.aux_stride = 0;
1079 		hwq_attr.aux_depth = 0;
1080 		hwq_attr.type = HWQ_TYPE_QUEUE;
1081 		rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
1082 		if (rc)
1083 			goto sq_swq;
1084 		if (!rq->hwq.is_user) {
1085 			rc = bnxt_qplib_alloc_init_swq(rq);
1086 			if (rc)
1087 				goto fail_rq;
1088 		}
1089 
1090 		req.rq_size = cpu_to_le32(rq->max_wqe);
1091 		pbl = &rq->hwq.pbl[PBL_LVL_0];
1092 		req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
1093 		pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) <<
1094 			     CMDQ_CREATE_QP_RQ_PG_SIZE_SFT);
1095 		pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK);
1096 		req.rq_pg_size_rq_lvl = pg_sz_lvl;
1097 		nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
1098 			6 : rq->max_sge;
1099 		req.rq_fwo_rq_sge =
1100 			cpu_to_le16(((nsge &
1101 				      CMDQ_CREATE_QP_RQ_SGE_MASK) <<
1102 				     CMDQ_CREATE_QP_RQ_SGE_SFT) | 0);
1103 	} else {
1104 		/* SRQ */
1105 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
1106 		req.srq_cid = cpu_to_le32(qp->srq->id);
1107 	}
1108 	req.rcq_cid = cpu_to_le32(qp->rcq->id);
1109 
1110 	qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
1111 	qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
1112 	if (qp->sig_type)
1113 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
1114 	if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE)
1115 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED;
1116 	if (_is_ext_stats_supported(res->dattr->dev_cap_flags) && !res->is_vf)
1117 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED;
1118 
1119 	req.qp_flags = cpu_to_le32(qp_flags);
1120 
1121 	/* ORRQ and IRRQ */
1122 	if (psn_sz) {
1123 		xrrq = &qp->orrq;
1124 		xrrq->max_elements =
1125 			ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1126 		req_size = xrrq->max_elements *
1127 			   BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1128 		req_size &= ~(PAGE_SIZE - 1);
1129 		sginfo.pgsize = req_size;
1130 		sginfo.pgshft = PAGE_SHIFT;
1131 
1132 		hwq_attr.res = res;
1133 		hwq_attr.sginfo = &sginfo;
1134 		hwq_attr.depth = xrrq->max_elements;
1135 		hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE;
1136 		hwq_attr.aux_stride = 0;
1137 		hwq_attr.aux_depth = 0;
1138 		hwq_attr.type = HWQ_TYPE_CTX;
1139 		rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1140 		if (rc)
1141 			goto rq_swq;
1142 		pbl = &xrrq->pbl[PBL_LVL_0];
1143 		req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
1144 
1145 		xrrq = &qp->irrq;
1146 		xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
1147 						qp->max_dest_rd_atomic);
1148 		req_size = xrrq->max_elements *
1149 			   BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1150 		req_size &= ~(PAGE_SIZE - 1);
1151 		sginfo.pgsize = req_size;
1152 		hwq_attr.depth =  xrrq->max_elements;
1153 		hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE;
1154 		rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1155 		if (rc)
1156 			goto fail_orrq;
1157 
1158 		pbl = &xrrq->pbl[PBL_LVL_0];
1159 		req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
1160 	}
1161 	req.pd_id = cpu_to_le32(qp->pd->id);
1162 
1163 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1164 				sizeof(resp), 0);
1165 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1166 	if (rc)
1167 		goto fail;
1168 
1169 	qp->id = le32_to_cpu(resp.xid);
1170 	qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
1171 	INIT_LIST_HEAD(&qp->sq_flush);
1172 	INIT_LIST_HEAD(&qp->rq_flush);
1173 	qp->cctx = res->cctx;
1174 	sq->dbinfo.hwq = &sq->hwq;
1175 	sq->dbinfo.xid = qp->id;
1176 	sq->dbinfo.db = qp->dpi->dbr;
1177 	sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode);
1178 	if (rq->max_wqe) {
1179 		rq->dbinfo.hwq = &rq->hwq;
1180 		rq->dbinfo.xid = qp->id;
1181 		rq->dbinfo.db = qp->dpi->dbr;
1182 		rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
1183 	}
1184 	spin_lock_bh(&rcfw->tbl_lock);
1185 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
1186 	rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
1187 	rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
1188 	spin_unlock_bh(&rcfw->tbl_lock);
1189 
1190 	return 0;
1191 fail:
1192 	bnxt_qplib_free_hwq(res, &qp->irrq);
1193 fail_orrq:
1194 	bnxt_qplib_free_hwq(res, &qp->orrq);
1195 rq_swq:
1196 	kfree(rq->swq);
1197 fail_rq:
1198 	bnxt_qplib_free_hwq(res, &rq->hwq);
1199 sq_swq:
1200 	kfree(sq->swq);
1201 fail_sq:
1202 	bnxt_qplib_free_hwq(res, &sq->hwq);
1203 	return rc;
1204 }
1205 
__modify_flags_from_init_state(struct bnxt_qplib_qp * qp)1206 static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp)
1207 {
1208 	switch (qp->state) {
1209 	case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1210 		/* INIT->RTR, configure the path_mtu to the default
1211 		 * 2048 if not being requested
1212 		 */
1213 		if (!(qp->modify_flags &
1214 		    CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
1215 			qp->modify_flags |=
1216 				CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
1217 			qp->path_mtu =
1218 				CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1219 		}
1220 		/* Bono FW require the max_dest_rd_atomic to be >= 1 */
1221 		if (qp->max_dest_rd_atomic < 1)
1222 			qp->max_dest_rd_atomic = 1;
1223 		qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
1224 		/* Bono FW 20.6.5 requires SGID_INDEX configuration */
1225 		if (!(qp->modify_flags &
1226 		    CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
1227 			qp->modify_flags |=
1228 				CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
1229 			qp->ah.sgid_index = 0;
1230 		}
1231 		break;
1232 	default:
1233 		break;
1234 	}
1235 }
1236 
__modify_flags_from_rtr_state(struct bnxt_qplib_qp * qp)1237 static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp)
1238 {
1239 	switch (qp->state) {
1240 	case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1241 		/* Bono FW requires the max_rd_atomic to be >= 1 */
1242 		if (qp->max_rd_atomic < 1)
1243 			qp->max_rd_atomic = 1;
1244 		/* Bono FW does not allow PKEY_INDEX,
1245 		 * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT,
1246 		 * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN,
1247 		 * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID
1248 		 * modification
1249 		 */
1250 		qp->modify_flags &=
1251 			~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
1252 			  CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
1253 			  CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
1254 			  CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
1255 			  CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
1256 			  CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
1257 			  CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
1258 			  CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
1259 			  CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
1260 			  CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
1261 			  CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
1262 			  CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
1263 		break;
1264 	default:
1265 		break;
1266 	}
1267 }
1268 
__filter_modify_flags(struct bnxt_qplib_qp * qp)1269 static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
1270 {
1271 	switch (qp->cur_qp_state) {
1272 	case CMDQ_MODIFY_QP_NEW_STATE_RESET:
1273 		break;
1274 	case CMDQ_MODIFY_QP_NEW_STATE_INIT:
1275 		__modify_flags_from_init_state(qp);
1276 		break;
1277 	case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1278 		__modify_flags_from_rtr_state(qp);
1279 		break;
1280 	case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1281 		break;
1282 	case CMDQ_MODIFY_QP_NEW_STATE_SQD:
1283 		break;
1284 	case CMDQ_MODIFY_QP_NEW_STATE_SQE:
1285 		break;
1286 	case CMDQ_MODIFY_QP_NEW_STATE_ERR:
1287 		break;
1288 	default:
1289 		break;
1290 	}
1291 }
1292 
bnxt_set_mandatory_attributes(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp,struct cmdq_modify_qp * req)1293 static void bnxt_set_mandatory_attributes(struct bnxt_qplib_res *res,
1294 					  struct bnxt_qplib_qp *qp,
1295 					  struct cmdq_modify_qp *req)
1296 {
1297 	u32 mandatory_flags = 0;
1298 
1299 	if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC)
1300 		mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS;
1301 
1302 	if (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_INIT &&
1303 	    qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTR) {
1304 		if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC && qp->srq)
1305 			req->flags = cpu_to_le16(CMDQ_MODIFY_QP_FLAGS_SRQ_USED);
1306 		mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_PKEY;
1307 	}
1308 
1309 	if (_is_min_rnr_in_rtr_rts_mandatory(res->dattr->dev_cap_flags2) &&
1310 	    (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RTR &&
1311 	     qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTS)) {
1312 		if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC)
1313 			mandatory_flags |=
1314 				CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER;
1315 	}
1316 
1317 	if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_UD ||
1318 	    qp->type == CMDQ_MODIFY_QP_QP_TYPE_GSI)
1319 		mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_QKEY;
1320 
1321 	qp->modify_flags |= mandatory_flags;
1322 	req->qp_type = qp->type;
1323 }
1324 
is_optimized_state_transition(struct bnxt_qplib_qp * qp)1325 static bool is_optimized_state_transition(struct bnxt_qplib_qp *qp)
1326 {
1327 	if ((qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_INIT &&
1328 	     qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTR) ||
1329 	    (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RTR &&
1330 	     qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTS))
1331 		return true;
1332 
1333 	return false;
1334 }
1335 
bnxt_qplib_modify_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1336 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1337 {
1338 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1339 	struct creq_modify_qp_resp resp = {};
1340 	struct bnxt_qplib_cmdqmsg msg = {};
1341 	struct cmdq_modify_qp req = {};
1342 	u16 vlan_pcp_vlan_dei_vlan_id;
1343 	u32 temp32[4];
1344 	u32 bmask;
1345 	int rc;
1346 
1347 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1348 				 CMDQ_BASE_OPCODE_MODIFY_QP,
1349 				 sizeof(req));
1350 
1351 	/* Filter out the qp_attr_mask based on the state->new transition */
1352 	__filter_modify_flags(qp);
1353 	if (qp->modify_flags & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
1354 		/* Set mandatory attributes for INIT -> RTR and RTR -> RTS transition */
1355 		if (_is_optimize_modify_qp_supported(res->dattr->dev_cap_flags2) &&
1356 		    is_optimized_state_transition(qp))
1357 			bnxt_set_mandatory_attributes(res, qp, &req);
1358 	}
1359 	bmask = qp->modify_flags;
1360 	req.modify_mask = cpu_to_le32(qp->modify_flags);
1361 	req.qp_cid = cpu_to_le32(qp->id);
1362 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
1363 		req.network_type_en_sqd_async_notify_new_state =
1364 				(qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
1365 				(qp->en_sqd_async_notify ?
1366 					CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
1367 	}
1368 	req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
1369 
1370 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS)
1371 		req.access = qp->access;
1372 
1373 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY)
1374 		req.pkey = cpu_to_le16(IB_DEFAULT_PKEY_FULL);
1375 
1376 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY)
1377 		req.qkey = cpu_to_le32(qp->qkey);
1378 
1379 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
1380 		memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
1381 		req.dgid[0] = cpu_to_le32(temp32[0]);
1382 		req.dgid[1] = cpu_to_le32(temp32[1]);
1383 		req.dgid[2] = cpu_to_le32(temp32[2]);
1384 		req.dgid[3] = cpu_to_le32(temp32[3]);
1385 	}
1386 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL)
1387 		req.flow_label = cpu_to_le32(qp->ah.flow_label);
1388 
1389 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)
1390 		req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id
1391 					     [qp->ah.sgid_index]);
1392 
1393 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT)
1394 		req.hop_limit = qp->ah.hop_limit;
1395 
1396 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS)
1397 		req.traffic_class = qp->ah.traffic_class;
1398 
1399 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC)
1400 		memcpy(req.dest_mac, qp->ah.dmac, 6);
1401 
1402 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)
1403 		req.path_mtu_pingpong_push_enable |= qp->path_mtu;
1404 
1405 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT)
1406 		req.timeout = qp->timeout;
1407 
1408 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT)
1409 		req.retry_cnt = qp->retry_cnt;
1410 
1411 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY)
1412 		req.rnr_retry = qp->rnr_retry;
1413 
1414 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER)
1415 		req.min_rnr_timer = qp->min_rnr_timer;
1416 
1417 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN)
1418 		req.rq_psn = cpu_to_le32(qp->rq.psn);
1419 
1420 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN)
1421 		req.sq_psn = cpu_to_le32(qp->sq.psn);
1422 
1423 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC)
1424 		req.max_rd_atomic =
1425 			ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1426 
1427 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC)
1428 		req.max_dest_rd_atomic =
1429 			IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
1430 
1431 	req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
1432 	req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
1433 	req.sq_sge = cpu_to_le16(qp->sq.max_sge);
1434 	req.rq_sge = cpu_to_le16(qp->rq.max_sge);
1435 	req.max_inline_data = cpu_to_le32(qp->max_inline_data);
1436 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
1437 		req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
1438 
1439 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID) {
1440 		vlan_pcp_vlan_dei_vlan_id =
1441 			((res->sgid_tbl.tbl[qp->ah.sgid_index].vlan_id <<
1442 			  CMDQ_MODIFY_QP_VLAN_ID_SFT) &
1443 			 CMDQ_MODIFY_QP_VLAN_ID_MASK);
1444 		vlan_pcp_vlan_dei_vlan_id |=
1445 			((qp->ah.sl << CMDQ_MODIFY_QP_VLAN_PCP_SFT) &
1446 			 CMDQ_MODIFY_QP_VLAN_PCP_MASK);
1447 		req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(vlan_pcp_vlan_dei_vlan_id);
1448 	}
1449 
1450 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),  sizeof(resp), 0);
1451 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1452 	if (rc)
1453 		return rc;
1454 	qp->cur_qp_state = qp->state;
1455 	return 0;
1456 }
1457 
bnxt_qplib_query_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1458 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1459 {
1460 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1461 	struct creq_query_qp_resp resp = {};
1462 	struct bnxt_qplib_cmdqmsg msg = {};
1463 	struct bnxt_qplib_rcfw_sbuf sbuf;
1464 	struct creq_query_qp_resp_sb *sb;
1465 	struct cmdq_query_qp req = {};
1466 	u32 temp32[4];
1467 	int i, rc;
1468 
1469 	sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
1470 	sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
1471 				     &sbuf.dma_addr, GFP_KERNEL);
1472 	if (!sbuf.sb)
1473 		return -ENOMEM;
1474 	sb = sbuf.sb;
1475 
1476 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1477 				 CMDQ_BASE_OPCODE_QUERY_QP,
1478 				 sizeof(req));
1479 
1480 	req.qp_cid = cpu_to_le32(qp->id);
1481 	req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
1482 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
1483 				sizeof(resp), 0);
1484 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1485 	if (rc)
1486 		goto bail;
1487 	/* Extract the context from the side buffer */
1488 	qp->state = sb->en_sqd_async_notify_state &
1489 			CREQ_QUERY_QP_RESP_SB_STATE_MASK;
1490 	qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
1491 				  CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY;
1492 	qp->access = sb->access;
1493 	qp->pkey_index = le16_to_cpu(sb->pkey);
1494 	qp->qkey = le32_to_cpu(sb->qkey);
1495 
1496 	temp32[0] = le32_to_cpu(sb->dgid[0]);
1497 	temp32[1] = le32_to_cpu(sb->dgid[1]);
1498 	temp32[2] = le32_to_cpu(sb->dgid[2]);
1499 	temp32[3] = le32_to_cpu(sb->dgid[3]);
1500 	memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
1501 
1502 	qp->ah.flow_label = le32_to_cpu(sb->flow_label);
1503 
1504 	qp->ah.sgid_index = 0;
1505 	for (i = 0; i < res->sgid_tbl.max; i++) {
1506 		if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
1507 			qp->ah.sgid_index = i;
1508 			break;
1509 		}
1510 	}
1511 	if (i == res->sgid_tbl.max)
1512 		dev_warn(&res->pdev->dev, "SGID not found??\n");
1513 
1514 	qp->ah.hop_limit = sb->hop_limit;
1515 	qp->ah.traffic_class = sb->traffic_class;
1516 	memcpy(qp->ah.dmac, sb->dest_mac, 6);
1517 	qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1518 				CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >>
1519 				CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
1520 	qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1521 				    CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >>
1522 				    CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT;
1523 	qp->timeout = sb->timeout;
1524 	qp->retry_cnt = sb->retry_cnt;
1525 	qp->rnr_retry = sb->rnr_retry;
1526 	qp->min_rnr_timer = sb->min_rnr_timer;
1527 	qp->rq.psn = le32_to_cpu(sb->rq_psn);
1528 	qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
1529 	qp->sq.psn = le32_to_cpu(sb->sq_psn);
1530 	qp->max_dest_rd_atomic =
1531 			IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
1532 	qp->sq.max_wqe = qp->sq.hwq.max_elements;
1533 	qp->rq.max_wqe = qp->rq.hwq.max_elements;
1534 	qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
1535 	qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
1536 	qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
1537 	qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
1538 	memcpy(qp->smac, sb->src_mac, 6);
1539 	qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
1540 	qp->port_id = le16_to_cpu(sb->port_id);
1541 bail:
1542 	dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
1543 			  sbuf.sb, sbuf.dma_addr);
1544 	return rc;
1545 }
1546 
__clean_cq(struct bnxt_qplib_cq * cq,u64 qp)1547 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
1548 {
1549 	struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
1550 	u32 peek_flags, peek_cons;
1551 	struct cq_base *hw_cqe;
1552 	int i;
1553 
1554 	peek_flags = cq->dbinfo.flags;
1555 	peek_cons = cq_hwq->cons;
1556 	for (i = 0; i < cq_hwq->max_elements; i++) {
1557 		hw_cqe = bnxt_qplib_get_qe(cq_hwq, peek_cons, NULL);
1558 		if (!CQE_CMP_VALID(hw_cqe, peek_flags))
1559 			continue;
1560 		/*
1561 		 * The valid test of the entry must be done first before
1562 		 * reading any further.
1563 		 */
1564 		dma_rmb();
1565 		switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
1566 		case CQ_BASE_CQE_TYPE_REQ:
1567 		case CQ_BASE_CQE_TYPE_TERMINAL:
1568 		{
1569 			struct cq_req *cqe = (struct cq_req *)hw_cqe;
1570 
1571 			if (qp == le64_to_cpu(cqe->qp_handle))
1572 				cqe->qp_handle = 0;
1573 			break;
1574 		}
1575 		case CQ_BASE_CQE_TYPE_RES_RC:
1576 		case CQ_BASE_CQE_TYPE_RES_UD:
1577 		case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
1578 		{
1579 			struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
1580 
1581 			if (qp == le64_to_cpu(cqe->qp_handle))
1582 				cqe->qp_handle = 0;
1583 			break;
1584 		}
1585 		default:
1586 			break;
1587 		}
1588 		bnxt_qplib_hwq_incr_cons(cq_hwq->max_elements, &peek_cons,
1589 					 1, &peek_flags);
1590 	}
1591 }
1592 
bnxt_qplib_destroy_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1593 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
1594 			  struct bnxt_qplib_qp *qp)
1595 {
1596 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1597 	struct creq_destroy_qp_resp resp = {};
1598 	struct bnxt_qplib_cmdqmsg msg = {};
1599 	struct cmdq_destroy_qp req = {};
1600 	u32 tbl_indx;
1601 	int rc;
1602 
1603 	spin_lock_bh(&rcfw->tbl_lock);
1604 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
1605 	rcfw->qp_tbl[tbl_indx].qp_id = BNXT_QPLIB_QP_ID_INVALID;
1606 	rcfw->qp_tbl[tbl_indx].qp_handle = NULL;
1607 	spin_unlock_bh(&rcfw->tbl_lock);
1608 
1609 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1610 				 CMDQ_BASE_OPCODE_DESTROY_QP,
1611 				 sizeof(req));
1612 
1613 	req.qp_cid = cpu_to_le32(qp->id);
1614 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1615 				sizeof(resp), 0);
1616 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1617 	if (rc) {
1618 		spin_lock_bh(&rcfw->tbl_lock);
1619 		rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
1620 		rcfw->qp_tbl[tbl_indx].qp_handle = qp;
1621 		spin_unlock_bh(&rcfw->tbl_lock);
1622 		return rc;
1623 	}
1624 
1625 	return 0;
1626 }
1627 
bnxt_qplib_free_qp_res(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1628 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
1629 			    struct bnxt_qplib_qp *qp)
1630 {
1631 	bnxt_qplib_free_qp_hdr_buf(res, qp);
1632 	bnxt_qplib_free_hwq(res, &qp->sq.hwq);
1633 	kfree(qp->sq.swq);
1634 
1635 	bnxt_qplib_free_hwq(res, &qp->rq.hwq);
1636 	kfree(qp->rq.swq);
1637 
1638 	if (qp->irrq.max_elements)
1639 		bnxt_qplib_free_hwq(res, &qp->irrq);
1640 	if (qp->orrq.max_elements)
1641 		bnxt_qplib_free_hwq(res, &qp->orrq);
1642 
1643 }
1644 
bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1645 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
1646 				struct bnxt_qplib_sge *sge)
1647 {
1648 	struct bnxt_qplib_q *sq = &qp->sq;
1649 	u32 sw_prod;
1650 
1651 	memset(sge, 0, sizeof(*sge));
1652 
1653 	if (qp->sq_hdr_buf) {
1654 		sw_prod = sq->swq_start;
1655 		sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map +
1656 					 sw_prod * qp->sq_hdr_buf_size);
1657 		sge->lkey = 0xFFFFFFFF;
1658 		sge->size = qp->sq_hdr_buf_size;
1659 		return qp->sq_hdr_buf + sw_prod * sge->size;
1660 	}
1661 	return NULL;
1662 }
1663 
bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp * qp)1664 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
1665 {
1666 	struct bnxt_qplib_q *rq = &qp->rq;
1667 
1668 	return rq->swq_start;
1669 }
1670 
bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp * qp,u32 index)1671 dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
1672 {
1673 	return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size);
1674 }
1675 
bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1676 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
1677 				struct bnxt_qplib_sge *sge)
1678 {
1679 	struct bnxt_qplib_q *rq = &qp->rq;
1680 	u32 sw_prod;
1681 
1682 	memset(sge, 0, sizeof(*sge));
1683 
1684 	if (qp->rq_hdr_buf) {
1685 		sw_prod = rq->swq_start;
1686 		sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map +
1687 					 sw_prod * qp->rq_hdr_buf_size);
1688 		sge->lkey = 0xFFFFFFFF;
1689 		sge->size = qp->rq_hdr_buf_size;
1690 		return qp->rq_hdr_buf + sw_prod * sge->size;
1691 	}
1692 	return NULL;
1693 }
1694 
1695 /* Fil the MSN table into the next psn row */
bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1696 static void bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp *qp,
1697 				       struct bnxt_qplib_swqe *wqe,
1698 				       struct bnxt_qplib_swq *swq)
1699 {
1700 	struct sq_msn_search *msns;
1701 	u32 start_psn, next_psn;
1702 	u16 start_idx;
1703 
1704 	msns = (struct sq_msn_search *)swq->psn_search;
1705 	msns->start_idx_next_psn_start_psn = 0;
1706 
1707 	start_psn = swq->start_psn;
1708 	next_psn = swq->next_psn;
1709 	start_idx = swq->slot_idx;
1710 	msns->start_idx_next_psn_start_psn |=
1711 		bnxt_re_update_msn_tbl(start_idx, next_psn, start_psn);
1712 	qp->msn++;
1713 	qp->msn %= qp->msn_tbl_sz;
1714 }
1715 
bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1716 static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp,
1717 				       struct bnxt_qplib_swqe *wqe,
1718 				       struct bnxt_qplib_swq *swq)
1719 {
1720 	struct sq_psn_search_ext *psns_ext;
1721 	struct sq_psn_search *psns;
1722 	u32 flg_npsn;
1723 	u32 op_spsn;
1724 
1725 	if (!swq->psn_search)
1726 		return;
1727 	/* Handle MSN differently on cap flags  */
1728 	if (qp->is_host_msn_tbl) {
1729 		bnxt_qplib_fill_msn_search(qp, wqe, swq);
1730 		return;
1731 	}
1732 	psns = (struct sq_psn_search *)swq->psn_search;
1733 	psns = swq->psn_search;
1734 	psns_ext = swq->psn_ext;
1735 
1736 	op_spsn = ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
1737 		    SQ_PSN_SEARCH_START_PSN_MASK);
1738 	op_spsn |= ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
1739 		     SQ_PSN_SEARCH_OPCODE_MASK);
1740 	flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
1741 		     SQ_PSN_SEARCH_NEXT_PSN_MASK);
1742 
1743 	if (bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) {
1744 		psns_ext->opcode_start_psn = cpu_to_le32(op_spsn);
1745 		psns_ext->flags_next_psn = cpu_to_le32(flg_npsn);
1746 		psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx);
1747 	} else {
1748 		psns->opcode_start_psn = cpu_to_le32(op_spsn);
1749 		psns->flags_next_psn = cpu_to_le32(flg_npsn);
1750 	}
1751 }
1752 
bnxt_qplib_put_inline(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u16 * idx)1753 static int bnxt_qplib_put_inline(struct bnxt_qplib_qp *qp,
1754 				 struct bnxt_qplib_swqe *wqe,
1755 				 u16 *idx)
1756 {
1757 	struct bnxt_qplib_hwq *hwq;
1758 	int len, t_len, offt;
1759 	bool pull_dst = true;
1760 	void *il_dst = NULL;
1761 	void *il_src = NULL;
1762 	int t_cplen, cplen;
1763 	int indx;
1764 
1765 	hwq = &qp->sq.hwq;
1766 	t_len = 0;
1767 	for (indx = 0; indx < wqe->num_sge; indx++) {
1768 		len = wqe->sg_list[indx].size;
1769 		il_src = (void *)wqe->sg_list[indx].addr;
1770 		t_len += len;
1771 		if (t_len > qp->max_inline_data)
1772 			return -ENOMEM;
1773 		while (len) {
1774 			if (pull_dst) {
1775 				pull_dst = false;
1776 				il_dst = bnxt_qplib_get_prod_qe(hwq, *idx);
1777 				(*idx)++;
1778 				t_cplen = 0;
1779 				offt = 0;
1780 			}
1781 			cplen = min_t(int, len, sizeof(struct sq_sge));
1782 			cplen = min_t(int, cplen,
1783 					(sizeof(struct sq_sge) - offt));
1784 			memcpy(il_dst, il_src, cplen);
1785 			t_cplen += cplen;
1786 			il_src += cplen;
1787 			il_dst += cplen;
1788 			offt += cplen;
1789 			len -= cplen;
1790 			if (t_cplen == sizeof(struct sq_sge))
1791 				pull_dst = true;
1792 		}
1793 	}
1794 
1795 	return t_len;
1796 }
1797 
bnxt_qplib_put_sges(struct bnxt_qplib_hwq * hwq,struct bnxt_qplib_sge * ssge,u16 nsge,u16 * idx)1798 static u32 bnxt_qplib_put_sges(struct bnxt_qplib_hwq *hwq,
1799 			       struct bnxt_qplib_sge *ssge,
1800 			       u16 nsge, u16 *idx)
1801 {
1802 	struct sq_sge *dsge;
1803 	int indx, len = 0;
1804 
1805 	for (indx = 0; indx < nsge; indx++, (*idx)++) {
1806 		dsge = bnxt_qplib_get_prod_qe(hwq, *idx);
1807 		dsge->va_or_pa = cpu_to_le64(ssge[indx].addr);
1808 		dsge->l_key = cpu_to_le32(ssge[indx].lkey);
1809 		dsge->size = cpu_to_le32(ssge[indx].size);
1810 		len += ssge[indx].size;
1811 	}
1812 
1813 	return len;
1814 }
1815 
bnxt_qplib_required_slots(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u16 * wqe_sz,u16 * qdf,u8 mode)1816 static u16 bnxt_qplib_required_slots(struct bnxt_qplib_qp *qp,
1817 				     struct bnxt_qplib_swqe *wqe,
1818 				     u16 *wqe_sz, u16 *qdf, u8 mode)
1819 {
1820 	u32 ilsize, bytes;
1821 	u16 nsge;
1822 	u16 slot;
1823 
1824 	nsge = wqe->num_sge;
1825 	/* Adding sq_send_hdr is a misnomer, for rq also hdr size is same. */
1826 	bytes = sizeof(struct sq_send_hdr) + nsge * sizeof(struct sq_sge);
1827 	if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
1828 		ilsize = bnxt_qplib_calc_ilsize(wqe, qp->max_inline_data);
1829 		bytes = ALIGN(ilsize, sizeof(struct sq_sge));
1830 		bytes += sizeof(struct sq_send_hdr);
1831 	}
1832 
1833 	*qdf =  __xlate_qfd(qp->sq.q_full_delta, bytes);
1834 	slot = bytes >> 4;
1835 	*wqe_sz = slot;
1836 	if (mode == BNXT_QPLIB_WQE_MODE_STATIC)
1837 		slot = 8;
1838 	return slot;
1839 }
1840 
bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp * qp,struct bnxt_qplib_q * sq,struct bnxt_qplib_swq * swq,bool hw_retx)1841 static void bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp *qp, struct bnxt_qplib_q *sq,
1842 				     struct bnxt_qplib_swq *swq, bool hw_retx)
1843 {
1844 	struct bnxt_qplib_hwq *hwq;
1845 	u32 pg_num, pg_indx;
1846 	void *buff;
1847 	u32 tail;
1848 
1849 	hwq = &sq->hwq;
1850 	if (!hwq->pad_pg)
1851 		return;
1852 	tail = swq->slot_idx / sq->dbinfo.max_slot;
1853 	if (hw_retx) {
1854 		/* For HW retx use qp msn index */
1855 		tail = qp->msn;
1856 		tail %= qp->msn_tbl_sz;
1857 	}
1858 	pg_num = (tail + hwq->pad_pgofft) / (PAGE_SIZE / hwq->pad_stride);
1859 	pg_indx = (tail + hwq->pad_pgofft) % (PAGE_SIZE / hwq->pad_stride);
1860 	buff = (void *)(hwq->pad_pg[pg_num] + pg_indx * hwq->pad_stride);
1861 	swq->psn_ext = buff;
1862 	swq->psn_search = buff;
1863 }
1864 
bnxt_qplib_post_send_db(struct bnxt_qplib_qp * qp)1865 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
1866 {
1867 	struct bnxt_qplib_q *sq = &qp->sq;
1868 
1869 	bnxt_qplib_ring_prod_db(&sq->dbinfo, DBC_DBC_TYPE_SQ);
1870 }
1871 
bnxt_qplib_post_send(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)1872 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
1873 			 struct bnxt_qplib_swqe *wqe)
1874 {
1875 	struct bnxt_qplib_nq_work *nq_work = NULL;
1876 	int i, rc = 0, data_len = 0, pkt_num = 0;
1877 	struct bnxt_qplib_q *sq = &qp->sq;
1878 	struct bnxt_qplib_hwq *hwq;
1879 	struct bnxt_qplib_swq *swq;
1880 	bool sch_handler = false;
1881 	u16 wqe_sz, qdf = 0;
1882 	bool msn_update;
1883 	void *base_hdr;
1884 	void *ext_hdr;
1885 	__le32 temp32;
1886 	u32 wqe_idx;
1887 	u32 slots;
1888 	u16 idx;
1889 
1890 	hwq = &sq->hwq;
1891 	if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS &&
1892 	    qp->state != CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1893 		dev_err(&hwq->pdev->dev,
1894 			"QPLIB: FP: QP (0x%x) is in the 0x%x state",
1895 			qp->id, qp->state);
1896 		rc = -EINVAL;
1897 		goto done;
1898 	}
1899 
1900 	slots = bnxt_qplib_required_slots(qp, wqe, &wqe_sz, &qdf, qp->wqe_mode);
1901 	if (bnxt_qplib_queue_full(sq, slots + qdf)) {
1902 		dev_err(&hwq->pdev->dev,
1903 			"prod = %#x cons = %#x qdepth = %#x delta = %#x\n",
1904 			hwq->prod, hwq->cons, hwq->depth, sq->q_full_delta);
1905 		rc = -ENOMEM;
1906 		goto done;
1907 	}
1908 
1909 	swq = bnxt_qplib_get_swqe(sq, &wqe_idx);
1910 	bnxt_qplib_pull_psn_buff(qp, sq, swq, qp->is_host_msn_tbl);
1911 
1912 	idx = 0;
1913 	swq->slot_idx = hwq->prod;
1914 	swq->slots = slots;
1915 	swq->wr_id = wqe->wr_id;
1916 	swq->type = wqe->type;
1917 	swq->flags = wqe->flags;
1918 	swq->start_psn = sq->psn & BTH_PSN_MASK;
1919 	if (qp->sig_type)
1920 		swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
1921 
1922 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1923 		sch_handler = true;
1924 		dev_dbg(&hwq->pdev->dev,
1925 			"%s Error QP. Scheduling for poll_cq\n", __func__);
1926 		goto queue_err;
1927 	}
1928 
1929 	base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
1930 	ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
1931 	memset(base_hdr, 0, sizeof(struct sq_sge));
1932 	memset(ext_hdr, 0, sizeof(struct sq_sge));
1933 
1934 	if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE)
1935 		/* Copy the inline data */
1936 		data_len = bnxt_qplib_put_inline(qp, wqe, &idx);
1937 	else
1938 		data_len = bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge,
1939 					       &idx);
1940 	if (data_len < 0)
1941 		goto queue_err;
1942 	/* Make sure we update MSN table only for wired wqes */
1943 	msn_update = true;
1944 	/* Specifics */
1945 	switch (wqe->type) {
1946 	case BNXT_QPLIB_SWQE_TYPE_SEND:
1947 		if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
1948 			struct sq_send_raweth_qp1_hdr *sqe = base_hdr;
1949 			struct sq_raw_ext_hdr *ext_sqe = ext_hdr;
1950 			/* Assemble info for Raw Ethertype QPs */
1951 
1952 			sqe->wqe_type = wqe->type;
1953 			sqe->flags = wqe->flags;
1954 			sqe->wqe_size = wqe_sz;
1955 			sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
1956 			sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
1957 			sqe->length = cpu_to_le32(data_len);
1958 			ext_sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
1959 				SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
1960 				SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
1961 
1962 			break;
1963 		}
1964 		fallthrough;
1965 	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
1966 	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
1967 	{
1968 		struct sq_ud_ext_hdr *ext_sqe = ext_hdr;
1969 		struct sq_send_hdr *sqe = base_hdr;
1970 
1971 		sqe->wqe_type = wqe->type;
1972 		sqe->flags = wqe->flags;
1973 		sqe->wqe_size = wqe_sz;
1974 		sqe->inv_key_or_imm_data = cpu_to_le32(wqe->send.inv_key);
1975 		if (qp->type == CMDQ_CREATE_QP_TYPE_UD ||
1976 		    qp->type == CMDQ_CREATE_QP_TYPE_GSI) {
1977 			sqe->q_key = cpu_to_le32(wqe->send.q_key);
1978 			sqe->length = cpu_to_le32(data_len);
1979 			sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
1980 			ext_sqe->dst_qp = cpu_to_le32(wqe->send.dst_qp &
1981 						      SQ_SEND_DST_QP_MASK);
1982 			ext_sqe->avid = cpu_to_le32(wqe->send.avid &
1983 						    SQ_SEND_AVID_MASK);
1984 			msn_update = false;
1985 		} else {
1986 			sqe->length = cpu_to_le32(data_len);
1987 			if (qp->mtu)
1988 				pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
1989 			if (!pkt_num)
1990 				pkt_num = 1;
1991 			sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
1992 		}
1993 		break;
1994 	}
1995 	case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
1996 	case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
1997 	case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
1998 	{
1999 		struct sq_rdma_ext_hdr *ext_sqe = ext_hdr;
2000 		struct sq_rdma_hdr *sqe = base_hdr;
2001 
2002 		sqe->wqe_type = wqe->type;
2003 		sqe->flags = wqe->flags;
2004 		sqe->wqe_size = wqe_sz;
2005 		sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
2006 		sqe->length = cpu_to_le32((u32)data_len);
2007 		ext_sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
2008 		ext_sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
2009 		if (qp->mtu)
2010 			pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
2011 		if (!pkt_num)
2012 			pkt_num = 1;
2013 		sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2014 		break;
2015 	}
2016 	case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
2017 	case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
2018 	{
2019 		struct sq_atomic_ext_hdr *ext_sqe = ext_hdr;
2020 		struct sq_atomic_hdr *sqe = base_hdr;
2021 
2022 		sqe->wqe_type = wqe->type;
2023 		sqe->flags = wqe->flags;
2024 		sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
2025 		sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
2026 		ext_sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
2027 		ext_sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
2028 		if (qp->mtu)
2029 			pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
2030 		if (!pkt_num)
2031 			pkt_num = 1;
2032 		sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2033 		break;
2034 	}
2035 	case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
2036 	{
2037 		struct sq_localinvalidate *sqe = base_hdr;
2038 
2039 		sqe->wqe_type = wqe->type;
2040 		sqe->flags = wqe->flags;
2041 		sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
2042 		msn_update = false;
2043 		break;
2044 	}
2045 	case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
2046 	{
2047 		struct sq_fr_pmr_ext_hdr *ext_sqe = ext_hdr;
2048 		struct sq_fr_pmr_hdr *sqe = base_hdr;
2049 
2050 		sqe->wqe_type = wqe->type;
2051 		sqe->flags = wqe->flags;
2052 		sqe->access_cntl = wqe->frmr.access_cntl |
2053 				   SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
2054 		sqe->zero_based_page_size_log =
2055 			(wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
2056 			SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
2057 			(wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0);
2058 		sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
2059 		temp32 = cpu_to_le32(wqe->frmr.length);
2060 		memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
2061 		sqe->numlevels_pbl_page_size_log =
2062 			((wqe->frmr.pbl_pg_sz_log <<
2063 					SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
2064 					SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
2065 			((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
2066 					SQ_FR_PMR_NUMLEVELS_MASK);
2067 
2068 		for (i = 0; i < wqe->frmr.page_list_len; i++)
2069 			wqe->frmr.pbl_ptr[i] = cpu_to_le64(
2070 						wqe->frmr.page_list[i] |
2071 						PTU_PTE_VALID);
2072 		ext_sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
2073 		ext_sqe->va = cpu_to_le64(wqe->frmr.va);
2074 		msn_update = false;
2075 
2076 		break;
2077 	}
2078 	case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
2079 	{
2080 		struct sq_bind_ext_hdr *ext_sqe = ext_hdr;
2081 		struct sq_bind_hdr *sqe = base_hdr;
2082 
2083 		sqe->wqe_type = wqe->type;
2084 		sqe->flags = wqe->flags;
2085 		sqe->access_cntl = wqe->bind.access_cntl;
2086 		sqe->mw_type_zero_based = wqe->bind.mw_type |
2087 			(wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0);
2088 		sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
2089 		sqe->l_key = cpu_to_le32(wqe->bind.r_key);
2090 		ext_sqe->va = cpu_to_le64(wqe->bind.va);
2091 		ext_sqe->length_lo = cpu_to_le32(wqe->bind.length);
2092 		msn_update = false;
2093 		break;
2094 	}
2095 	default:
2096 		/* Bad wqe, return error */
2097 		rc = -EINVAL;
2098 		goto done;
2099 	}
2100 	if (!qp->is_host_msn_tbl || msn_update) {
2101 		swq->next_psn = sq->psn & BTH_PSN_MASK;
2102 		bnxt_qplib_fill_psn_search(qp, wqe, swq);
2103 	}
2104 queue_err:
2105 	bnxt_qplib_swq_mod_start(sq, wqe_idx);
2106 	bnxt_qplib_hwq_incr_prod(&sq->dbinfo, hwq, swq->slots);
2107 	qp->wqe_cnt++;
2108 done:
2109 	if (sch_handler) {
2110 		nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
2111 		if (nq_work) {
2112 			nq_work->cq = qp->scq;
2113 			nq_work->nq = qp->scq->nq;
2114 			INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2115 			queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
2116 		} else {
2117 			dev_err(&hwq->pdev->dev,
2118 				"FP: Failed to allocate SQ nq_work!\n");
2119 			rc = -ENOMEM;
2120 		}
2121 	}
2122 	return rc;
2123 }
2124 
bnxt_qplib_post_recv_db(struct bnxt_qplib_qp * qp)2125 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
2126 {
2127 	struct bnxt_qplib_q *rq = &qp->rq;
2128 
2129 	bnxt_qplib_ring_prod_db(&rq->dbinfo, DBC_DBC_TYPE_RQ);
2130 }
2131 
bnxt_qplib_post_recv(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)2132 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
2133 			 struct bnxt_qplib_swqe *wqe)
2134 {
2135 	struct bnxt_qplib_nq_work *nq_work = NULL;
2136 	struct bnxt_qplib_q *rq = &qp->rq;
2137 	struct rq_wqe_hdr *base_hdr;
2138 	struct rq_ext_hdr *ext_hdr;
2139 	struct bnxt_qplib_hwq *hwq;
2140 	struct bnxt_qplib_swq *swq;
2141 	bool sch_handler = false;
2142 	u16 wqe_sz, idx;
2143 	u32 wqe_idx;
2144 	int rc = 0;
2145 
2146 	hwq = &rq->hwq;
2147 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_RESET) {
2148 		dev_err(&hwq->pdev->dev,
2149 			"QPLIB: FP: QP (0x%x) is in the 0x%x state",
2150 			qp->id, qp->state);
2151 		rc = -EINVAL;
2152 		goto done;
2153 	}
2154 
2155 	if (bnxt_qplib_queue_full(rq, rq->dbinfo.max_slot)) {
2156 		dev_err(&hwq->pdev->dev,
2157 			"FP: QP (0x%x) RQ is full!\n", qp->id);
2158 		rc = -EINVAL;
2159 		goto done;
2160 	}
2161 
2162 	swq = bnxt_qplib_get_swqe(rq, &wqe_idx);
2163 	swq->wr_id = wqe->wr_id;
2164 	swq->slots = rq->dbinfo.max_slot;
2165 
2166 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
2167 		sch_handler = true;
2168 		dev_dbg(&hwq->pdev->dev,
2169 			"%s: Error QP. Scheduling for poll_cq\n", __func__);
2170 		goto queue_err;
2171 	}
2172 
2173 	idx = 0;
2174 	base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
2175 	ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
2176 	memset(base_hdr, 0, sizeof(struct sq_sge));
2177 	memset(ext_hdr, 0, sizeof(struct sq_sge));
2178 	wqe_sz = (sizeof(struct rq_wqe_hdr) +
2179 	wqe->num_sge * sizeof(struct sq_sge)) >> 4;
2180 	bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, &idx);
2181 	if (!wqe->num_sge) {
2182 		struct sq_sge *sge;
2183 
2184 		sge = bnxt_qplib_get_prod_qe(hwq, idx++);
2185 		sge->size = 0;
2186 		wqe_sz++;
2187 	}
2188 	base_hdr->wqe_type = wqe->type;
2189 	base_hdr->flags = wqe->flags;
2190 	base_hdr->wqe_size = wqe_sz;
2191 	base_hdr->wr_id[0] = cpu_to_le32(wqe_idx);
2192 queue_err:
2193 	bnxt_qplib_swq_mod_start(rq, wqe_idx);
2194 	bnxt_qplib_hwq_incr_prod(&rq->dbinfo, hwq, swq->slots);
2195 done:
2196 	if (sch_handler) {
2197 		nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
2198 		if (nq_work) {
2199 			nq_work->cq = qp->rcq;
2200 			nq_work->nq = qp->rcq->nq;
2201 			INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2202 			queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
2203 		} else {
2204 			dev_err(&hwq->pdev->dev,
2205 				"FP: Failed to allocate RQ nq_work!\n");
2206 			rc = -ENOMEM;
2207 		}
2208 	}
2209 
2210 	return rc;
2211 }
2212 
2213 /* CQ */
bnxt_qplib_create_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2214 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2215 {
2216 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2217 	struct bnxt_qplib_hwq_attr hwq_attr = {};
2218 	struct creq_create_cq_resp resp = {};
2219 	struct bnxt_qplib_cmdqmsg msg = {};
2220 	struct cmdq_create_cq req = {};
2221 	struct bnxt_qplib_pbl *pbl;
2222 	u32 coalescing = 0;
2223 	u32 pg_sz_lvl;
2224 	int rc;
2225 
2226 	if (!cq->dpi) {
2227 		dev_err(&rcfw->pdev->dev,
2228 			"FP: CREATE_CQ failed due to NULL DPI\n");
2229 		return -EINVAL;
2230 	}
2231 
2232 	cq->dbinfo.flags = 0;
2233 	hwq_attr.res = res;
2234 	hwq_attr.depth = cq->max_wqe;
2235 	hwq_attr.stride = sizeof(struct cq_base);
2236 	hwq_attr.type = HWQ_TYPE_QUEUE;
2237 	hwq_attr.sginfo = &cq->sg_info;
2238 	rc = bnxt_qplib_alloc_init_hwq(&cq->hwq, &hwq_attr);
2239 	if (rc)
2240 		return rc;
2241 
2242 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2243 				 CMDQ_BASE_OPCODE_CREATE_CQ,
2244 				 sizeof(req));
2245 
2246 	req.dpi = cpu_to_le32(cq->dpi->dpi);
2247 	req.cq_handle = cpu_to_le64(cq->cq_handle);
2248 	req.cq_size = cpu_to_le32(cq->max_wqe);
2249 
2250 	if (_is_cq_coalescing_supported(res->dattr->dev_cap_flags2)) {
2251 		req.flags |= cpu_to_le16(CMDQ_CREATE_CQ_FLAGS_COALESCING_VALID);
2252 		coalescing |= ((cq->coalescing->buf_maxtime <<
2253 				CMDQ_CREATE_CQ_BUF_MAXTIME_SFT) &
2254 			       CMDQ_CREATE_CQ_BUF_MAXTIME_MASK);
2255 		coalescing |= ((cq->coalescing->normal_maxbuf <<
2256 				CMDQ_CREATE_CQ_NORMAL_MAXBUF_SFT) &
2257 			       CMDQ_CREATE_CQ_NORMAL_MAXBUF_MASK);
2258 		coalescing |= ((cq->coalescing->during_maxbuf <<
2259 				CMDQ_CREATE_CQ_DURING_MAXBUF_SFT) &
2260 			       CMDQ_CREATE_CQ_DURING_MAXBUF_MASK);
2261 		if (cq->coalescing->en_ring_idle_mode)
2262 			coalescing |= CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE;
2263 		else
2264 			coalescing &= ~CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE;
2265 		req.coalescing = cpu_to_le32(coalescing);
2266 	}
2267 
2268 	pbl = &cq->hwq.pbl[PBL_LVL_0];
2269 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&cq->hwq) <<
2270 		     CMDQ_CREATE_CQ_PG_SIZE_SFT);
2271 	pg_sz_lvl |= (cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK);
2272 	req.pg_size_lvl = cpu_to_le32(pg_sz_lvl);
2273 	req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2274 	req.cq_fco_cnq_id = cpu_to_le32(
2275 			(cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
2276 			 CMDQ_CREATE_CQ_CNQ_ID_SFT);
2277 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2278 				sizeof(resp), 0);
2279 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2280 	if (rc)
2281 		goto fail;
2282 
2283 	cq->id = le32_to_cpu(resp.xid);
2284 	cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
2285 	init_waitqueue_head(&cq->waitq);
2286 	INIT_LIST_HEAD(&cq->sqf_head);
2287 	INIT_LIST_HEAD(&cq->rqf_head);
2288 	spin_lock_init(&cq->compl_lock);
2289 	spin_lock_init(&cq->flush_lock);
2290 
2291 	cq->dbinfo.hwq = &cq->hwq;
2292 	cq->dbinfo.xid = cq->id;
2293 	cq->dbinfo.db = cq->dpi->dbr;
2294 	cq->dbinfo.priv_db = res->dpi_tbl.priv_db;
2295 	cq->dbinfo.flags = 0;
2296 	cq->dbinfo.toggle = 0;
2297 
2298 	bnxt_qplib_armen_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMENA);
2299 
2300 	return 0;
2301 
2302 fail:
2303 	bnxt_qplib_free_hwq(res, &cq->hwq);
2304 	return rc;
2305 }
2306 
bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2307 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res,
2308 				   struct bnxt_qplib_cq *cq)
2309 {
2310 	bnxt_qplib_free_hwq(res, &cq->hwq);
2311 	memcpy(&cq->hwq, &cq->resize_hwq, sizeof(cq->hwq));
2312        /* Reset only the cons bit in the flags */
2313 	cq->dbinfo.flags &= ~(1UL << BNXT_QPLIB_FLAG_EPOCH_CONS_SHIFT);
2314 }
2315 
bnxt_qplib_resize_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq,int new_cqes)2316 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq,
2317 			 int new_cqes)
2318 {
2319 	struct bnxt_qplib_hwq_attr hwq_attr = {};
2320 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2321 	struct creq_resize_cq_resp resp = {};
2322 	struct bnxt_qplib_cmdqmsg msg = {};
2323 	struct cmdq_resize_cq req = {};
2324 	struct bnxt_qplib_pbl *pbl;
2325 	u32 pg_sz, lvl, new_sz;
2326 	int rc;
2327 
2328 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2329 				 CMDQ_BASE_OPCODE_RESIZE_CQ,
2330 				 sizeof(req));
2331 	hwq_attr.sginfo = &cq->sg_info;
2332 	hwq_attr.res = res;
2333 	hwq_attr.depth = new_cqes;
2334 	hwq_attr.stride = sizeof(struct cq_base);
2335 	hwq_attr.type = HWQ_TYPE_QUEUE;
2336 	rc = bnxt_qplib_alloc_init_hwq(&cq->resize_hwq, &hwq_attr);
2337 	if (rc)
2338 		return rc;
2339 
2340 	req.cq_cid = cpu_to_le32(cq->id);
2341 	pbl = &cq->resize_hwq.pbl[PBL_LVL_0];
2342 	pg_sz = bnxt_qplib_base_pg_size(&cq->resize_hwq);
2343 	lvl = (cq->resize_hwq.level << CMDQ_RESIZE_CQ_LVL_SFT) &
2344 				       CMDQ_RESIZE_CQ_LVL_MASK;
2345 	new_sz = (new_cqes << CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT) &
2346 		  CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK;
2347 	req.new_cq_size_pg_size_lvl = cpu_to_le32(new_sz | pg_sz | lvl);
2348 	req.new_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2349 
2350 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2351 				sizeof(resp), 0);
2352 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2353 	return rc;
2354 }
2355 
bnxt_qplib_destroy_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2356 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2357 {
2358 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2359 	struct creq_destroy_cq_resp resp = {};
2360 	struct bnxt_qplib_cmdqmsg msg = {};
2361 	struct cmdq_destroy_cq req = {};
2362 	u16 total_cnq_events;
2363 	int rc;
2364 
2365 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2366 				 CMDQ_BASE_OPCODE_DESTROY_CQ,
2367 				 sizeof(req));
2368 
2369 	req.cq_cid = cpu_to_le32(cq->id);
2370 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2371 				sizeof(resp), 0);
2372 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2373 	if (rc)
2374 		return rc;
2375 	total_cnq_events = le16_to_cpu(resp.total_cnq_events);
2376 	__wait_for_all_nqes(cq, total_cnq_events);
2377 	bnxt_qplib_free_hwq(res, &cq->hwq);
2378 	return 0;
2379 }
2380 
__flush_sq(struct bnxt_qplib_q * sq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2381 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
2382 		      struct bnxt_qplib_cqe **pcqe, int *budget)
2383 {
2384 	struct bnxt_qplib_cqe *cqe;
2385 	u32 start, last;
2386 	int rc = 0;
2387 
2388 	/* Now complete all outstanding SQEs with FLUSHED_ERR */
2389 	start = sq->swq_start;
2390 	cqe = *pcqe;
2391 	while (*budget) {
2392 		last = sq->swq_last;
2393 		if (start == last)
2394 			break;
2395 		/* Skip the FENCE WQE completions */
2396 		if (sq->swq[last].wr_id == BNXT_QPLIB_FENCE_WRID) {
2397 			bnxt_qplib_cancel_phantom_processing(qp);
2398 			goto skip_compl;
2399 		}
2400 		memset(cqe, 0, sizeof(*cqe));
2401 		cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
2402 		cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2403 		cqe->qp_handle = (u64)(unsigned long)qp;
2404 		cqe->wr_id = sq->swq[last].wr_id;
2405 		cqe->src_qp = qp->id;
2406 		cqe->type = sq->swq[last].type;
2407 		cqe++;
2408 		(*budget)--;
2409 skip_compl:
2410 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2411 					 sq->swq[last].slots, &sq->dbinfo.flags);
2412 		sq->swq_last = sq->swq[last].next_idx;
2413 	}
2414 	*pcqe = cqe;
2415 	if (!(*budget) && sq->swq_last != start)
2416 		/* Out of budget */
2417 		rc = -EAGAIN;
2418 
2419 	return rc;
2420 }
2421 
__flush_rq(struct bnxt_qplib_q * rq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2422 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
2423 		      struct bnxt_qplib_cqe **pcqe, int *budget)
2424 {
2425 	struct bnxt_qplib_cqe *cqe;
2426 	u32 start, last;
2427 	int opcode = 0;
2428 	int rc = 0;
2429 
2430 	switch (qp->type) {
2431 	case CMDQ_CREATE_QP1_TYPE_GSI:
2432 		opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
2433 		break;
2434 	case CMDQ_CREATE_QP_TYPE_RC:
2435 		opcode = CQ_BASE_CQE_TYPE_RES_RC;
2436 		break;
2437 	case CMDQ_CREATE_QP_TYPE_UD:
2438 	case CMDQ_CREATE_QP_TYPE_GSI:
2439 		opcode = CQ_BASE_CQE_TYPE_RES_UD;
2440 		break;
2441 	}
2442 
2443 	/* Flush the rest of the RQ */
2444 	start = rq->swq_start;
2445 	cqe = *pcqe;
2446 	while (*budget) {
2447 		last = rq->swq_last;
2448 		if (last == start)
2449 			break;
2450 		memset(cqe, 0, sizeof(*cqe));
2451 		cqe->status =
2452 		    CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
2453 		cqe->opcode = opcode;
2454 		cqe->qp_handle = (unsigned long)qp;
2455 		cqe->wr_id = rq->swq[last].wr_id;
2456 		cqe++;
2457 		(*budget)--;
2458 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2459 					 rq->swq[last].slots, &rq->dbinfo.flags);
2460 		rq->swq_last = rq->swq[last].next_idx;
2461 	}
2462 	*pcqe = cqe;
2463 	if (!*budget && rq->swq_last != start)
2464 		/* Out of budget */
2465 		rc = -EAGAIN;
2466 
2467 	return rc;
2468 }
2469 
bnxt_qplib_mark_qp_error(void * qp_handle)2470 void bnxt_qplib_mark_qp_error(void *qp_handle)
2471 {
2472 	struct bnxt_qplib_qp *qp = qp_handle;
2473 
2474 	if (!qp)
2475 		return;
2476 
2477 	/* Must block new posting of SQ and RQ */
2478 	qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2479 	bnxt_qplib_cancel_phantom_processing(qp);
2480 }
2481 
2482 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
2483  *       CQE is track from sw_cq_cons to max_element but valid only if VALID=1
2484  */
do_wa9060(struct bnxt_qplib_qp * qp,struct bnxt_qplib_cq * cq,u32 cq_cons,u32 swq_last,u32 cqe_sq_cons)2485 static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq,
2486 		     u32 cq_cons, u32 swq_last, u32 cqe_sq_cons)
2487 {
2488 	u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags;
2489 	struct bnxt_qplib_q *sq = &qp->sq;
2490 	struct cq_req *peek_req_hwcqe;
2491 	struct bnxt_qplib_qp *peek_qp;
2492 	struct bnxt_qplib_q *peek_sq;
2493 	struct bnxt_qplib_swq *swq;
2494 	struct cq_base *peek_hwcqe;
2495 	int i, rc = 0;
2496 
2497 	/* Normal mode */
2498 	/* Check for the psn_search marking before completing */
2499 	swq = &sq->swq[swq_last];
2500 	if (swq->psn_search &&
2501 	    le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
2502 		/* Unmark */
2503 		swq->psn_search->flags_next_psn = cpu_to_le32
2504 			(le32_to_cpu(swq->psn_search->flags_next_psn)
2505 				     & ~0x80000000);
2506 		dev_dbg(&cq->hwq.pdev->dev,
2507 			"FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
2508 			cq_cons, qp->id, swq_last, cqe_sq_cons);
2509 		sq->condition = true;
2510 		sq->send_phantom = true;
2511 
2512 		/* TODO: Only ARM if the previous SQE is ARMALL */
2513 		bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMALL);
2514 		rc = -EAGAIN;
2515 		goto out;
2516 	}
2517 	if (sq->condition) {
2518 		/* Peek at the completions */
2519 		peek_flags = cq->dbinfo.flags;
2520 		peek_sw_cq_cons = cq_cons;
2521 		i = cq->hwq.max_elements;
2522 		while (i--) {
2523 			peek_hwcqe = bnxt_qplib_get_qe(&cq->hwq,
2524 						       peek_sw_cq_cons, NULL);
2525 			/* If the next hwcqe is VALID */
2526 			if (CQE_CMP_VALID(peek_hwcqe, peek_flags)) {
2527 			/*
2528 			 * The valid test of the entry must be done first before
2529 			 * reading any further.
2530 			 */
2531 				dma_rmb();
2532 				/* If the next hwcqe is a REQ */
2533 				if ((peek_hwcqe->cqe_type_toggle &
2534 				    CQ_BASE_CQE_TYPE_MASK) ==
2535 				    CQ_BASE_CQE_TYPE_REQ) {
2536 					peek_req_hwcqe = (struct cq_req *)
2537 							 peek_hwcqe;
2538 					peek_qp = (struct bnxt_qplib_qp *)
2539 						((unsigned long)
2540 						 le64_to_cpu
2541 						 (peek_req_hwcqe->qp_handle));
2542 					peek_sq = &peek_qp->sq;
2543 					peek_sq_cons_idx =
2544 						((le16_to_cpu(
2545 						  peek_req_hwcqe->sq_cons_idx)
2546 						  - 1) % sq->max_wqe);
2547 					/* If the hwcqe's sq's wr_id matches */
2548 					if (peek_sq == sq &&
2549 					    sq->swq[peek_sq_cons_idx].wr_id ==
2550 					    BNXT_QPLIB_FENCE_WRID) {
2551 						/*
2552 						 *  Unbreak only if the phantom
2553 						 *  comes back
2554 						 */
2555 						dev_dbg(&cq->hwq.pdev->dev,
2556 							"FP: Got Phantom CQE\n");
2557 						sq->condition = false;
2558 						sq->single = true;
2559 						rc = 0;
2560 						goto out;
2561 					}
2562 				}
2563 				/* Valid but not the phantom, so keep looping */
2564 			} else {
2565 				/* Not valid yet, just exit and wait */
2566 				rc = -EINVAL;
2567 				goto out;
2568 			}
2569 			bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements,
2570 						 &peek_sw_cq_cons,
2571 						 1, &peek_flags);
2572 		}
2573 		dev_err(&cq->hwq.pdev->dev,
2574 			"Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x\n",
2575 			cq_cons, qp->id, swq_last, cqe_sq_cons);
2576 		rc = -EINVAL;
2577 	}
2578 out:
2579 	return rc;
2580 }
2581 
bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q * sq,u32 cqe_slot)2582 static int bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q *sq, u32 cqe_slot)
2583 {
2584 	struct bnxt_qplib_hwq *sq_hwq;
2585 	struct bnxt_qplib_swq *swq;
2586 	int cqe_sq_cons = -1;
2587 	u32 start, last;
2588 
2589 	sq_hwq = &sq->hwq;
2590 
2591 	start = sq->swq_start;
2592 	last = sq->swq_last;
2593 
2594 	while (last != start) {
2595 		swq = &sq->swq[last];
2596 		if (swq->slot_idx  == cqe_slot) {
2597 			cqe_sq_cons = swq->next_idx;
2598 			dev_err(&sq_hwq->pdev->dev, "%s: Found cons wqe = %d slot = %d\n",
2599 				__func__, cqe_sq_cons, cqe_slot);
2600 			break;
2601 		}
2602 
2603 		last = swq->next_idx;
2604 	}
2605 	return cqe_sq_cons;
2606 }
2607 
bnxt_qplib_cq_process_req(struct bnxt_qplib_cq * cq,struct cq_req * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget,u32 cq_cons,struct bnxt_qplib_qp ** lib_qp)2608 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
2609 				     struct cq_req *hwcqe,
2610 				     struct bnxt_qplib_cqe **pcqe, int *budget,
2611 				     u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
2612 {
2613 	struct bnxt_qplib_swq *swq;
2614 	struct bnxt_qplib_cqe *cqe;
2615 	u32 cqe_sq_cons, slot_num;
2616 	struct bnxt_qplib_qp *qp;
2617 	struct bnxt_qplib_q *sq;
2618 	int cqe_cons;
2619 	int rc = 0;
2620 
2621 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2622 				      le64_to_cpu(hwcqe->qp_handle));
2623 	if (!qp) {
2624 		dev_err(&cq->hwq.pdev->dev,
2625 			"FP: Process Req qp is NULL\n");
2626 		return -EINVAL;
2627 	}
2628 	sq = &qp->sq;
2629 
2630 	cqe_sq_cons = le16_to_cpu(hwcqe->sq_cons_idx) % sq->max_sw_wqe;
2631 	if (qp->sq.flushed) {
2632 		dev_dbg(&cq->hwq.pdev->dev,
2633 			"%s: QP in Flush QP = %p\n", __func__, qp);
2634 		goto done;
2635 	}
2636 
2637 	if (__is_err_cqe_for_var_wqe(qp, hwcqe->status)) {
2638 		slot_num = le16_to_cpu(hwcqe->sq_cons_idx);
2639 		cqe_cons = bnxt_qplib_get_cqe_sq_cons(sq, slot_num);
2640 		if (cqe_cons < 0) {
2641 			dev_err(&cq->hwq.pdev->dev, "%s: Wrong SQ cons cqe_slot_indx = %d\n",
2642 				__func__, slot_num);
2643 			goto done;
2644 		}
2645 		cqe_sq_cons = cqe_cons;
2646 		dev_err(&cq->hwq.pdev->dev, "%s: cqe_sq_cons = %d swq_last = %d swq_start = %d\n",
2647 			__func__, cqe_sq_cons, sq->swq_last, sq->swq_start);
2648 	}
2649 
2650 	/* Require to walk the sq's swq to fabricate CQEs for all previously
2651 	 * signaled SWQEs due to CQE aggregation from the current sq cons
2652 	 * to the cqe_sq_cons
2653 	 */
2654 	cqe = *pcqe;
2655 	while (*budget) {
2656 		if (sq->swq_last == cqe_sq_cons)
2657 			/* Done */
2658 			break;
2659 
2660 		swq = &sq->swq[sq->swq_last];
2661 		memset(cqe, 0, sizeof(*cqe));
2662 		cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2663 		cqe->qp_handle = (u64)(unsigned long)qp;
2664 		cqe->src_qp = qp->id;
2665 		cqe->wr_id = swq->wr_id;
2666 		if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
2667 			goto skip;
2668 		cqe->type = swq->type;
2669 
2670 		/* For the last CQE, check for status.  For errors, regardless
2671 		 * of the request being signaled or not, it must complete with
2672 		 * the hwcqe error status
2673 		 */
2674 		if (swq->next_idx == cqe_sq_cons &&
2675 		    hwcqe->status != CQ_REQ_STATUS_OK) {
2676 			cqe->status = hwcqe->status;
2677 			dev_err(&cq->hwq.pdev->dev,
2678 				"FP: CQ Processed Req wr_id[%d] = 0x%llx with status 0x%x\n",
2679 				sq->swq_last, cqe->wr_id, cqe->status);
2680 			cqe++;
2681 			(*budget)--;
2682 			bnxt_qplib_mark_qp_error(qp);
2683 			/* Add qp to flush list of the CQ */
2684 			bnxt_qplib_add_flush_qp(qp);
2685 		} else {
2686 			/* Before we complete, do WA 9060 */
2687 			if (!bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) {
2688 				if (do_wa9060(qp, cq, cq_cons, sq->swq_last,
2689 					      cqe_sq_cons)) {
2690 					*lib_qp = qp;
2691 					goto out;
2692 				}
2693 			}
2694 			if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
2695 				cqe->status = CQ_REQ_STATUS_OK;
2696 				cqe++;
2697 				(*budget)--;
2698 			}
2699 		}
2700 skip:
2701 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2702 					 swq->slots, &sq->dbinfo.flags);
2703 		sq->swq_last = swq->next_idx;
2704 		if (sq->single)
2705 			break;
2706 	}
2707 out:
2708 	*pcqe = cqe;
2709 	if (sq->swq_last != cqe_sq_cons) {
2710 		/* Out of budget */
2711 		rc = -EAGAIN;
2712 		goto done;
2713 	}
2714 	/*
2715 	 * Back to normal completion mode only after it has completed all of
2716 	 * the WC for this CQE
2717 	 */
2718 	sq->single = false;
2719 done:
2720 	return rc;
2721 }
2722 
bnxt_qplib_release_srqe(struct bnxt_qplib_srq * srq,u32 tag)2723 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
2724 {
2725 	spin_lock(&srq->hwq.lock);
2726 	srq->swq[srq->last_idx].next_idx = (int)tag;
2727 	srq->last_idx = (int)tag;
2728 	srq->swq[srq->last_idx].next_idx = -1;
2729 	bnxt_qplib_hwq_incr_cons(srq->hwq.max_elements, &srq->hwq.cons,
2730 				 srq->dbinfo.max_slot, &srq->dbinfo.flags);
2731 	spin_unlock(&srq->hwq.lock);
2732 }
2733 
bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq * cq,struct cq_res_rc * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2734 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
2735 					struct cq_res_rc *hwcqe,
2736 					struct bnxt_qplib_cqe **pcqe,
2737 					int *budget)
2738 {
2739 	struct bnxt_qplib_srq *srq;
2740 	struct bnxt_qplib_cqe *cqe;
2741 	struct bnxt_qplib_qp *qp;
2742 	struct bnxt_qplib_q *rq;
2743 	u32 wr_id_idx;
2744 
2745 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2746 				      le64_to_cpu(hwcqe->qp_handle));
2747 	if (!qp) {
2748 		dev_err(&cq->hwq.pdev->dev, "process_cq RC qp is NULL\n");
2749 		return -EINVAL;
2750 	}
2751 	if (qp->rq.flushed) {
2752 		dev_dbg(&cq->hwq.pdev->dev,
2753 			"%s: QP in Flush QP = %p\n", __func__, qp);
2754 		return 0;
2755 	}
2756 
2757 	cqe = *pcqe;
2758 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2759 	cqe->length = le32_to_cpu(hwcqe->length);
2760 	cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
2761 	cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
2762 	cqe->flags = le16_to_cpu(hwcqe->flags);
2763 	cqe->status = hwcqe->status;
2764 	cqe->qp_handle = (u64)(unsigned long)qp;
2765 
2766 	wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
2767 				CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
2768 	if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
2769 		srq = qp->srq;
2770 		if (!srq)
2771 			return -EINVAL;
2772 		if (wr_id_idx >= srq->hwq.max_elements) {
2773 			dev_err(&cq->hwq.pdev->dev,
2774 				"FP: CQ Process RC wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2775 				wr_id_idx, srq->hwq.max_elements);
2776 			return -EINVAL;
2777 		}
2778 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2779 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2780 		cqe++;
2781 		(*budget)--;
2782 		*pcqe = cqe;
2783 	} else {
2784 		struct bnxt_qplib_swq *swq;
2785 
2786 		rq = &qp->rq;
2787 		if (wr_id_idx > (rq->max_wqe - 1)) {
2788 			dev_err(&cq->hwq.pdev->dev,
2789 				"FP: CQ Process RC wr_id idx 0x%x exceeded RQ max 0x%x\n",
2790 				wr_id_idx, rq->max_wqe);
2791 			return -EINVAL;
2792 		}
2793 		if (wr_id_idx != rq->swq_last)
2794 			return -EINVAL;
2795 		swq = &rq->swq[rq->swq_last];
2796 		cqe->wr_id = swq->wr_id;
2797 		cqe++;
2798 		(*budget)--;
2799 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2800 					 swq->slots, &rq->dbinfo.flags);
2801 		rq->swq_last = swq->next_idx;
2802 		*pcqe = cqe;
2803 
2804 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2805 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2806 			/* Add qp to flush list of the CQ */
2807 			bnxt_qplib_add_flush_qp(qp);
2808 		}
2809 	}
2810 
2811 	return 0;
2812 }
2813 
bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq * cq,struct cq_res_ud * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2814 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
2815 					struct cq_res_ud *hwcqe,
2816 					struct bnxt_qplib_cqe **pcqe,
2817 					int *budget)
2818 {
2819 	struct bnxt_qplib_srq *srq;
2820 	struct bnxt_qplib_cqe *cqe;
2821 	struct bnxt_qplib_qp *qp;
2822 	struct bnxt_qplib_q *rq;
2823 	u32 wr_id_idx;
2824 
2825 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2826 				      le64_to_cpu(hwcqe->qp_handle));
2827 	if (!qp) {
2828 		dev_err(&cq->hwq.pdev->dev, "process_cq UD qp is NULL\n");
2829 		return -EINVAL;
2830 	}
2831 	if (qp->rq.flushed) {
2832 		dev_dbg(&cq->hwq.pdev->dev,
2833 			"%s: QP in Flush QP = %p\n", __func__, qp);
2834 		return 0;
2835 	}
2836 	cqe = *pcqe;
2837 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2838 	cqe->length = le16_to_cpu(hwcqe->length) & CQ_RES_UD_LENGTH_MASK;
2839 	cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata);
2840 	cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
2841 	cqe->flags = le16_to_cpu(hwcqe->flags);
2842 	cqe->status = hwcqe->status;
2843 	cqe->qp_handle = (u64)(unsigned long)qp;
2844 	/*FIXME: Endianness fix needed for smace */
2845 	memcpy(cqe->smac, hwcqe->src_mac, ETH_ALEN);
2846 	wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
2847 				& CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK;
2848 	cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
2849 				  ((le32_to_cpu(
2850 				  hwcqe->src_qp_high_srq_or_rq_wr_id) &
2851 				 CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8);
2852 
2853 	if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
2854 		srq = qp->srq;
2855 		if (!srq)
2856 			return -EINVAL;
2857 
2858 		if (wr_id_idx >= srq->hwq.max_elements) {
2859 			dev_err(&cq->hwq.pdev->dev,
2860 				"FP: CQ Process UD wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2861 				wr_id_idx, srq->hwq.max_elements);
2862 			return -EINVAL;
2863 		}
2864 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2865 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2866 		cqe++;
2867 		(*budget)--;
2868 		*pcqe = cqe;
2869 	} else {
2870 		struct bnxt_qplib_swq *swq;
2871 
2872 		rq = &qp->rq;
2873 		if (wr_id_idx > (rq->max_wqe - 1)) {
2874 			dev_err(&cq->hwq.pdev->dev,
2875 				"FP: CQ Process UD wr_id idx 0x%x exceeded RQ max 0x%x\n",
2876 				wr_id_idx, rq->max_wqe);
2877 			return -EINVAL;
2878 		}
2879 
2880 		if (rq->swq_last != wr_id_idx)
2881 			return -EINVAL;
2882 		swq = &rq->swq[rq->swq_last];
2883 		cqe->wr_id = swq->wr_id;
2884 		cqe++;
2885 		(*budget)--;
2886 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2887 					 swq->slots, &rq->dbinfo.flags);
2888 		rq->swq_last = swq->next_idx;
2889 		*pcqe = cqe;
2890 
2891 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2892 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2893 			/* Add qp to flush list of the CQ */
2894 			bnxt_qplib_add_flush_qp(qp);
2895 		}
2896 	}
2897 
2898 	return 0;
2899 }
2900 
bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq * cq)2901 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
2902 {
2903 	struct cq_base *hw_cqe;
2904 	bool rc = true;
2905 
2906 	hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
2907 	 /* Check for Valid bit. If the CQE is valid, return false */
2908 	rc = !CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags);
2909 	return rc;
2910 }
2911 
bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq * cq,struct cq_res_raweth_qp1 * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2912 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
2913 						struct cq_res_raweth_qp1 *hwcqe,
2914 						struct bnxt_qplib_cqe **pcqe,
2915 						int *budget)
2916 {
2917 	struct bnxt_qplib_qp *qp;
2918 	struct bnxt_qplib_q *rq;
2919 	struct bnxt_qplib_srq *srq;
2920 	struct bnxt_qplib_cqe *cqe;
2921 	u32 wr_id_idx;
2922 
2923 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2924 				      le64_to_cpu(hwcqe->qp_handle));
2925 	if (!qp) {
2926 		dev_err(&cq->hwq.pdev->dev, "process_cq Raw/QP1 qp is NULL\n");
2927 		return -EINVAL;
2928 	}
2929 	if (qp->rq.flushed) {
2930 		dev_dbg(&cq->hwq.pdev->dev,
2931 			"%s: QP in Flush QP = %p\n", __func__, qp);
2932 		return 0;
2933 	}
2934 	cqe = *pcqe;
2935 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2936 	cqe->flags = le16_to_cpu(hwcqe->flags);
2937 	cqe->qp_handle = (u64)(unsigned long)qp;
2938 
2939 	wr_id_idx =
2940 		le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
2941 				& CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
2942 	cqe->src_qp = qp->id;
2943 	if (qp->id == 1 && !cqe->length) {
2944 		/* Add workaround for the length misdetection */
2945 		cqe->length = 296;
2946 	} else {
2947 		cqe->length = le16_to_cpu(hwcqe->length);
2948 	}
2949 	cqe->pkey_index = qp->pkey_index;
2950 	memcpy(cqe->smac, qp->smac, 6);
2951 
2952 	cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
2953 	cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
2954 	cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
2955 
2956 	if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
2957 		srq = qp->srq;
2958 		if (!srq) {
2959 			dev_err(&cq->hwq.pdev->dev,
2960 				"FP: SRQ used but not defined??\n");
2961 			return -EINVAL;
2962 		}
2963 		if (wr_id_idx >= srq->hwq.max_elements) {
2964 			dev_err(&cq->hwq.pdev->dev,
2965 				"FP: CQ Process Raw/QP1 wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2966 				wr_id_idx, srq->hwq.max_elements);
2967 			return -EINVAL;
2968 		}
2969 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2970 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2971 		cqe++;
2972 		(*budget)--;
2973 		*pcqe = cqe;
2974 	} else {
2975 		struct bnxt_qplib_swq *swq;
2976 
2977 		rq = &qp->rq;
2978 		if (wr_id_idx > (rq->max_wqe - 1)) {
2979 			dev_err(&cq->hwq.pdev->dev,
2980 				"FP: CQ Process Raw/QP1 RQ wr_id idx 0x%x exceeded RQ max 0x%x\n",
2981 				wr_id_idx, rq->max_wqe);
2982 			return -EINVAL;
2983 		}
2984 		if (rq->swq_last != wr_id_idx)
2985 			return -EINVAL;
2986 		swq = &rq->swq[rq->swq_last];
2987 		cqe->wr_id = swq->wr_id;
2988 		cqe++;
2989 		(*budget)--;
2990 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2991 					 swq->slots, &rq->dbinfo.flags);
2992 		rq->swq_last = swq->next_idx;
2993 		*pcqe = cqe;
2994 
2995 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2996 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2997 			/* Add qp to flush list of the CQ */
2998 			bnxt_qplib_add_flush_qp(qp);
2999 		}
3000 	}
3001 
3002 	return 0;
3003 }
3004 
bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq * cq,struct cq_terminal * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)3005 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
3006 					  struct cq_terminal *hwcqe,
3007 					  struct bnxt_qplib_cqe **pcqe,
3008 					  int *budget)
3009 {
3010 	struct bnxt_qplib_qp *qp;
3011 	struct bnxt_qplib_q *sq, *rq;
3012 	struct bnxt_qplib_cqe *cqe;
3013 	u32 swq_last = 0, cqe_cons;
3014 	int rc = 0;
3015 
3016 	/* Check the Status */
3017 	if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
3018 		dev_warn(&cq->hwq.pdev->dev,
3019 			 "FP: CQ Process Terminal Error status = 0x%x\n",
3020 			 hwcqe->status);
3021 
3022 	qp = (struct bnxt_qplib_qp *)((unsigned long)
3023 				      le64_to_cpu(hwcqe->qp_handle));
3024 	if (!qp)
3025 		return -EINVAL;
3026 
3027 	/* Must block new posting of SQ and RQ */
3028 	qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
3029 
3030 	sq = &qp->sq;
3031 	rq = &qp->rq;
3032 
3033 	cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
3034 	if (cqe_cons == 0xFFFF)
3035 		goto do_rq;
3036 	cqe_cons %= sq->max_sw_wqe;
3037 
3038 	if (qp->sq.flushed) {
3039 		dev_dbg(&cq->hwq.pdev->dev,
3040 			"%s: QP in Flush QP = %p\n", __func__, qp);
3041 		goto sq_done;
3042 	}
3043 
3044 	/* Terminal CQE can also include aggregated successful CQEs prior.
3045 	 * So we must complete all CQEs from the current sq's cons to the
3046 	 * cq_cons with status OK
3047 	 */
3048 	cqe = *pcqe;
3049 	while (*budget) {
3050 		swq_last = sq->swq_last;
3051 		if (swq_last == cqe_cons)
3052 			break;
3053 		if (sq->swq[swq_last].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
3054 			memset(cqe, 0, sizeof(*cqe));
3055 			cqe->status = CQ_REQ_STATUS_OK;
3056 			cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
3057 			cqe->qp_handle = (u64)(unsigned long)qp;
3058 			cqe->src_qp = qp->id;
3059 			cqe->wr_id = sq->swq[swq_last].wr_id;
3060 			cqe->type = sq->swq[swq_last].type;
3061 			cqe++;
3062 			(*budget)--;
3063 		}
3064 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
3065 					 sq->swq[swq_last].slots, &sq->dbinfo.flags);
3066 		sq->swq_last = sq->swq[swq_last].next_idx;
3067 	}
3068 	*pcqe = cqe;
3069 	if (!(*budget) && swq_last != cqe_cons) {
3070 		/* Out of budget */
3071 		rc = -EAGAIN;
3072 		goto sq_done;
3073 	}
3074 sq_done:
3075 	if (rc)
3076 		return rc;
3077 do_rq:
3078 	cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
3079 	if (cqe_cons == 0xFFFF) {
3080 		goto done;
3081 	} else if (cqe_cons > rq->max_wqe - 1) {
3082 		dev_err(&cq->hwq.pdev->dev,
3083 			"FP: CQ Processed terminal reported rq_cons_idx 0x%x exceeds max 0x%x\n",
3084 			cqe_cons, rq->max_wqe);
3085 		rc = -EINVAL;
3086 		goto done;
3087 	}
3088 
3089 	if (qp->rq.flushed) {
3090 		dev_dbg(&cq->hwq.pdev->dev,
3091 			"%s: QP in Flush QP = %p\n", __func__, qp);
3092 		rc = 0;
3093 		goto done;
3094 	}
3095 
3096 	/* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
3097 	 * from the current rq->cons to the rq->prod regardless what the
3098 	 * rq->cons the terminal CQE indicates
3099 	 */
3100 
3101 	/* Add qp to flush list of the CQ */
3102 	bnxt_qplib_add_flush_qp(qp);
3103 done:
3104 	return rc;
3105 }
3106 
bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq * cq,struct cq_cutoff * hwcqe)3107 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
3108 					struct cq_cutoff *hwcqe)
3109 {
3110 	/* Check the Status */
3111 	if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
3112 		dev_err(&cq->hwq.pdev->dev,
3113 			"FP: CQ Process Cutoff Error status = 0x%x\n",
3114 			hwcqe->status);
3115 		return -EINVAL;
3116 	}
3117 	clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
3118 	wake_up_interruptible(&cq->waitq);
3119 
3120 	return 0;
3121 }
3122 
bnxt_qplib_process_flush_list(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes)3123 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
3124 				  struct bnxt_qplib_cqe *cqe,
3125 				  int num_cqes)
3126 {
3127 	struct bnxt_qplib_qp *qp = NULL;
3128 	u32 budget = num_cqes;
3129 	unsigned long flags;
3130 
3131 	spin_lock_irqsave(&cq->flush_lock, flags);
3132 	list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
3133 		dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing SQ QP= %p\n", qp);
3134 		__flush_sq(&qp->sq, qp, &cqe, &budget);
3135 	}
3136 
3137 	list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
3138 		dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing RQ QP= %p\n", qp);
3139 		__flush_rq(&qp->rq, qp, &cqe, &budget);
3140 	}
3141 	spin_unlock_irqrestore(&cq->flush_lock, flags);
3142 
3143 	return num_cqes - budget;
3144 }
3145 
bnxt_qplib_poll_cq(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes,struct bnxt_qplib_qp ** lib_qp)3146 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
3147 		       int num_cqes, struct bnxt_qplib_qp **lib_qp)
3148 {
3149 	struct cq_base *hw_cqe;
3150 	int budget, rc = 0;
3151 	u32 hw_polled = 0;
3152 	u8 type;
3153 
3154 	budget = num_cqes;
3155 
3156 	while (budget) {
3157 		hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
3158 
3159 		/* Check for Valid bit */
3160 		if (!CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags))
3161 			break;
3162 
3163 		/*
3164 		 * The valid test of the entry must be done first before
3165 		 * reading any further.
3166 		 */
3167 		dma_rmb();
3168 		/* From the device's respective CQE format to qplib_wc*/
3169 		type = hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
3170 		switch (type) {
3171 		case CQ_BASE_CQE_TYPE_REQ:
3172 			rc = bnxt_qplib_cq_process_req(cq,
3173 						       (struct cq_req *)hw_cqe,
3174 						       &cqe, &budget,
3175 						       cq->hwq.cons, lib_qp);
3176 			break;
3177 		case CQ_BASE_CQE_TYPE_RES_RC:
3178 			rc = bnxt_qplib_cq_process_res_rc(cq,
3179 							  (struct cq_res_rc *)
3180 							  hw_cqe, &cqe,
3181 							  &budget);
3182 			break;
3183 		case CQ_BASE_CQE_TYPE_RES_UD:
3184 			rc = bnxt_qplib_cq_process_res_ud
3185 					(cq, (struct cq_res_ud *)hw_cqe, &cqe,
3186 					 &budget);
3187 			break;
3188 		case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
3189 			rc = bnxt_qplib_cq_process_res_raweth_qp1
3190 					(cq, (struct cq_res_raweth_qp1 *)
3191 					 hw_cqe, &cqe, &budget);
3192 			break;
3193 		case CQ_BASE_CQE_TYPE_TERMINAL:
3194 			rc = bnxt_qplib_cq_process_terminal
3195 					(cq, (struct cq_terminal *)hw_cqe,
3196 					 &cqe, &budget);
3197 			break;
3198 		case CQ_BASE_CQE_TYPE_CUT_OFF:
3199 			bnxt_qplib_cq_process_cutoff
3200 					(cq, (struct cq_cutoff *)hw_cqe);
3201 			/* Done processing this CQ */
3202 			goto exit;
3203 		default:
3204 			dev_err(&cq->hwq.pdev->dev,
3205 				"process_cq unknown type 0x%lx\n",
3206 				hw_cqe->cqe_type_toggle &
3207 				CQ_BASE_CQE_TYPE_MASK);
3208 			rc = -EINVAL;
3209 			break;
3210 		}
3211 		if (rc < 0) {
3212 			if (rc == -EAGAIN)
3213 				break;
3214 			/* Error while processing the CQE, just skip to the
3215 			 * next one
3216 			 */
3217 			if (type != CQ_BASE_CQE_TYPE_TERMINAL)
3218 				dev_err(&cq->hwq.pdev->dev,
3219 					"process_cqe error rc = 0x%x\n", rc);
3220 		}
3221 		hw_polled++;
3222 		bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, &cq->hwq.cons,
3223 					 1, &cq->dbinfo.flags);
3224 
3225 	}
3226 	if (hw_polled)
3227 		bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ);
3228 exit:
3229 	return num_cqes - budget;
3230 }
3231 
bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq * cq,u32 arm_type)3232 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
3233 {
3234 	cq->dbinfo.toggle = cq->toggle;
3235 	if (arm_type)
3236 		bnxt_qplib_ring_db(&cq->dbinfo, arm_type);
3237 	/* Using cq->arm_state variable to track whether to issue cq handler */
3238 	atomic_set(&cq->arm_state, 1);
3239 }
3240 
bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp * qp)3241 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
3242 {
3243 	flush_workqueue(qp->scq->nq->cqn_wq);
3244 	if (qp->scq != qp->rcq)
3245 		flush_workqueue(qp->rcq->nq->cqn_wq);
3246 }
3247