1 /*
2 * Copyright 2013 Freescale Semiconductor Inc.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution.
11 * * Neither the name of Freescale Semiconductor nor the
12 * names of its contributors may be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 *
16 * ALTERNATIVELY, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") as published by the Free Software
18 * Foundation, either version 2 of that License or (at your option) any
19 * later version.
20 *
21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include "fsl_fman_sp.h"
34
35
fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs * regs,uint16_t index)36 uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs,
37 uint16_t index)
38 {
39 struct fm_pcd_storage_profile_regs *sp_regs;
40 sp_regs = ®s[index];
41 return ioread32be(&sp_regs->fm_sp_acnt);
42 }
43
fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs * regs,uint16_t index,uint32_t value)44 void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,
45 uint16_t index, uint32_t value)
46 {
47 struct fm_pcd_storage_profile_regs *sp_regs;
48 sp_regs = ®s[index];
49 iowrite32be(value, &sp_regs->fm_sp_acnt);
50 }
51
fman_vsp_defconfig(struct fm_storage_profile_params * cfg)52 void fman_vsp_defconfig(struct fm_storage_profile_params *cfg)
53 {
54 cfg->dma_swap_data =
55 DEFAULT_FMAN_SP_DMA_SWAP_DATA;
56 cfg->int_context_cache_attr =
57 DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR;
58 cfg->header_cache_attr =
59 DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR;
60 cfg->scatter_gather_cache_attr =
61 DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR;
62 cfg->dma_write_optimize =
63 DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE;
64 cfg->no_scather_gather =
65 DEFAULT_FMAN_SP_NO_SCATTER_GATHER;
66 }
67
calc_vec_dep(int max_pools,bool * pools,struct fman_ext_pools * ext_buf_pools,uint32_t mask)68 static inline uint32_t calc_vec_dep(int max_pools, bool *pools,
69 struct fman_ext_pools *ext_buf_pools, uint32_t mask)
70 {
71 int i, j;
72 uint32_t vector = 0;
73 for (i = 0; i < max_pools; i++)
74 if (pools[i])
75 for (j = 0; j < ext_buf_pools->num_pools_used; j++)
76 if (i == ext_buf_pools->ext_buf_pool[j].id) {
77 vector |= mask >> j;
78 break;
79 }
80 return vector;
81 }
82
fman_vsp_init(struct fm_pcd_storage_profile_regs * regs,uint16_t index,struct fm_storage_profile_params * fm_vsp_params,int port_max_num_of_ext_pools,int bm_max_num_of_pools,int max_num_of_pfc_priorities)83 void fman_vsp_init(struct fm_pcd_storage_profile_regs *regs,
84 uint16_t index, struct fm_storage_profile_params *fm_vsp_params,
85 int port_max_num_of_ext_pools, int bm_max_num_of_pools,
86 int max_num_of_pfc_priorities)
87 {
88 int i = 0, j = 0;
89 struct fm_pcd_storage_profile_regs *sp_regs;
90 uint32_t tmp_reg, vector;
91 struct fman_ext_pools *ext_buf_pools = &fm_vsp_params->fm_ext_pools;
92 struct fman_buf_pool_depletion *buf_pool_depletion =
93 &fm_vsp_params->buf_pool_depletion;
94 struct fman_backup_bm_pools *backup_pools =
95 &fm_vsp_params->backup_pools;
96 struct fman_sp_int_context_data_copy *int_context_data_copy =
97 fm_vsp_params->int_context;
98 struct fman_sp_buf_margins *external_buffer_margins =
99 fm_vsp_params->buf_margins;
100 bool no_scather_gather = fm_vsp_params->no_scather_gather;
101 uint16_t liodn_offset = fm_vsp_params->liodn_offset;
102
103 sp_regs = ®s[index];
104
105 /* fill external buffers manager pool information register*/
106 for (i = 0; i < ext_buf_pools->num_pools_used; i++) {
107 tmp_reg = FMAN_SP_EXT_BUF_POOL_VALID |
108 FMAN_SP_EXT_BUF_POOL_EN_COUNTER;
109 tmp_reg |= ((uint32_t)ext_buf_pools->ext_buf_pool[i].id <<
110 FMAN_SP_EXT_BUF_POOL_ID_SHIFT);
111 tmp_reg |= ext_buf_pools->ext_buf_pool[i].size;
112 /* functionality available only for some deriviatives
113 (limited by config) */
114 for (j = 0; j < backup_pools->num_backup_pools; j++)
115 if (ext_buf_pools->ext_buf_pool[i].id ==
116 backup_pools->pool_ids[j]) {
117 tmp_reg |= FMAN_SP_EXT_BUF_POOL_BACKUP;
118 break;
119 }
120 iowrite32be(tmp_reg, &sp_regs->fm_sp_ebmpi[i]);
121 }
122
123 /* clear unused pools */
124 for (i = ext_buf_pools->num_pools_used;
125 i < port_max_num_of_ext_pools; i++)
126 iowrite32be(0, &sp_regs->fm_sp_ebmpi[i]);
127
128 /* fill pool depletion register*/
129 tmp_reg = 0;
130 if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->pools_grp_mode_enable) {
131 /* calculate vector for number of pools depletion */
132 vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->
133 pools_to_consider, ext_buf_pools, 0x80000000);
134
135 /* configure num of pools and vector for number of pools mode */
136 tmp_reg |= (((uint32_t)buf_pool_depletion->num_pools - 1) <<
137 FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT);
138 tmp_reg |= vector;
139 }
140
141 if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->single_pool_mode_enable) {
142 /* calculate vector for number of pools depletion */
143 vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->
144 pools_to_consider_for_single_mode,
145 ext_buf_pools, 0x00000080);
146
147 /* configure num of pools and vector for number of pools mode */
148 tmp_reg |= vector;
149 }
150
151 /* fill QbbPEV */
152 if (buf_pool_depletion->buf_pool_depletion_enabled) {
153 vector = 0;
154 for (i = 0; i < max_num_of_pfc_priorities; i++)
155 if (buf_pool_depletion->pfc_priorities_en[i] == TRUE)
156 vector |= 0x00000100 << i;
157 tmp_reg |= vector;
158 }
159 iowrite32be(tmp_reg, &sp_regs->fm_sp_mpd);
160
161 /* fill dma attributes register */
162 tmp_reg = 0;
163 tmp_reg |= (uint32_t)fm_vsp_params->dma_swap_data <<
164 FMAN_SP_DMA_ATTR_SWP_SHIFT;
165 tmp_reg |= (uint32_t)fm_vsp_params->int_context_cache_attr <<
166 FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT;
167 tmp_reg |= (uint32_t)fm_vsp_params->header_cache_attr <<
168 FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT;
169 tmp_reg |= (uint32_t)fm_vsp_params->scatter_gather_cache_attr <<
170 FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT;
171 if (fm_vsp_params->dma_write_optimize)
172 tmp_reg |= FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE;
173 iowrite32be(tmp_reg, &sp_regs->fm_sp_da);
174
175 /* IC parameters - fill internal context parameters register */
176 tmp_reg = 0;
177 tmp_reg |= (((uint32_t)int_context_data_copy->ext_buf_offset/
178 OFFSET_UNITS) << FMAN_SP_IC_TO_EXT_SHIFT);
179 tmp_reg |= (((uint32_t)int_context_data_copy->int_context_offset/
180 OFFSET_UNITS) << FMAN_SP_IC_FROM_INT_SHIFT);
181 tmp_reg |= (((uint32_t)int_context_data_copy->size/OFFSET_UNITS) <<
182 FMAN_SP_IC_SIZE_SHIFT);
183 iowrite32be(tmp_reg, &sp_regs->fm_sp_icp);
184
185 /* buffer margins - fill external buffer margins register */
186 tmp_reg = 0;
187 tmp_reg |= (((uint32_t)external_buffer_margins->start_margins) <<
188 FMAN_SP_EXT_BUF_MARG_START_SHIFT);
189 tmp_reg |= (((uint32_t)external_buffer_margins->end_margins) <<
190 FMAN_SP_EXT_BUF_MARG_END_SHIFT);
191 if (no_scather_gather)
192 tmp_reg |= FMAN_SP_SG_DISABLE;
193 iowrite32be(tmp_reg, &sp_regs->fm_sp_ebm);
194
195 /* buffer margins - fill spliodn register */
196 iowrite32be(liodn_offset, &sp_regs->fm_sp_spliodn);
197 }
198