1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
5 * Copyright (c) 2017 The FreeBSD Foundation
6 * All rights reserved.
7 *
8 * Portions of this software were developed by Landon Fuller
9 * under sponsorship from the FreeBSD Foundation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer,
16 * without modification.
17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
19 * redistribution must be conditioned upon including a substantially
20 * similar Disclaimer requirement for further binary redistribution.
21 *
22 * NO WARRANTY
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
26 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
27 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
28 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
31 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGES.
34 *
35 */
36
37 #ifndef _BHND_CORES_PMU_BHND_PMU_H_
38 #define _BHND_CORES_PMU_BHND_PMU_H_
39
40 #include <sys/types.h>
41
42 #include <dev/bhnd/bhnd.h>
43
44 #include "bhnd_pmu_if.h"
45 #include "bhnd_pmu_types.h"
46
47 /**
48 * Return the current value of a PMU chipctrl register.
49 *
50 * @param dev A bhnd(4) PMU device.
51 * @param reg The PMU chipctrl register to be read.
52 *
53 * Drivers should only use function for functionality that is not
54 * available via another bhnd_chipc() function.
55 *
56 * @returns The chipctrl register value, or 0 if undefined by this hardware.
57 */
58 static inline uint32_t
bhnd_pmu_read_chipctrl(device_t dev,uint32_t reg)59 bhnd_pmu_read_chipctrl(device_t dev, uint32_t reg)
60 {
61 return (BHND_PMU_READ_CHIPCTRL(dev, reg));
62 }
63
64 /**
65 * Write @p value with @p mask to a PMU chipctrl register.
66 *
67 * @param dev A bhnd(4) PMU device.
68 * @param reg The PMU chipctrl register to be written.
69 * @param value The value to write.
70 * @param mask The mask of bits to be written from @p value.
71 *
72 * Drivers should only use function for functionality that is not
73 * available via another bhnd_pmu() function.
74 */
75 static inline void
bhnd_pmu_write_chipctrl(device_t dev,uint32_t reg,uint32_t value,uint32_t mask)76 bhnd_pmu_write_chipctrl(device_t dev, uint32_t reg, uint32_t value,
77 uint32_t mask)
78 {
79 return (BHND_PMU_WRITE_CHIPCTRL(dev, reg, value, mask));
80 }
81
82 /**
83 * Return the current value of a PMU regulator control register.
84 *
85 * @param dev A bhnd(4) PMU device.
86 * @param reg The PMU regctrl register to be read.
87 *
88 * Drivers should only use function for functionality that is not
89 * available via another bhnd_chipc() function.
90 *
91 * @returns The regctrl register value, or 0 if undefined by this hardware.
92 */
93 static inline uint32_t
bhnd_pmu_read_regctrl(device_t dev,uint32_t reg)94 bhnd_pmu_read_regctrl(device_t dev, uint32_t reg)
95 {
96 return (BHND_PMU_READ_REGCTRL(dev, reg));
97 }
98
99 /**
100 * Write @p value with @p mask to a PMU regulator control register.
101 *
102 * @param dev A bhnd(4) PMU device.
103 * @param reg The PMU regctrl register to be written.
104 * @param value The value to write.
105 * @param mask The mask of bits to be written from @p value.
106 *
107 * Drivers should only use function for functionality that is not
108 * available via another bhnd_pmu() function.
109 */
110 static inline void
bhnd_pmu_write_regctrl(device_t dev,uint32_t reg,uint32_t value,uint32_t mask)111 bhnd_pmu_write_regctrl(device_t dev, uint32_t reg, uint32_t value,
112 uint32_t mask)
113 {
114 return (BHND_PMU_WRITE_REGCTRL(dev, reg, value, mask));
115 }
116
117 /**
118 * Return the current value of a PMU PLL control register.
119 *
120 * @param dev A bhnd(4) PMU device.
121 * @param reg The PMU pllctrl register to be read.
122 *
123 * Drivers should only use function for functionality that is not
124 * available via another bhnd_chipc() function.
125 *
126 * @returns The pllctrl register value, or 0 if undefined by this hardware.
127 */
128 static inline uint32_t
bhnd_pmu_read_pllctrl(device_t dev,uint32_t reg)129 bhnd_pmu_read_pllctrl(device_t dev, uint32_t reg)
130 {
131 return (BHND_PMU_READ_PLLCTRL(dev, reg));
132 }
133
134 /**
135 * Write @p value with @p mask to a PMU PLL control register.
136 *
137 * @param dev A bhnd(4) PMU device.
138 * @param reg The PMU pllctrl register to be written.
139 * @param value The value to write.
140 * @param mask The mask of bits to be written from @p value.
141 *
142 * Drivers should only use function for functionality that is not
143 * available via another bhnd_pmu() function.
144 */
145 static inline void
bhnd_pmu_write_pllctrl(device_t dev,uint32_t reg,uint32_t value,uint32_t mask)146 bhnd_pmu_write_pllctrl(device_t dev, uint32_t reg, uint32_t value,
147 uint32_t mask)
148 {
149 return (BHND_PMU_WRITE_PLLCTRL(dev, reg, value, mask));
150 }
151
152 /**
153 * Set a hardware-specific output voltage register value for @p regulator.
154 *
155 * @param dev PMU device.
156 * @param regulator Regulator to be configured.
157 * @param value The raw voltage register value.
158 *
159 * @retval 0 success
160 * @retval ENODEV If @p regulator is not supported by this driver.
161 */
162 static inline int
bhnd_pmu_set_voltage_raw(device_t dev,bhnd_pmu_regulator regulator,uint32_t value)163 bhnd_pmu_set_voltage_raw(device_t dev, bhnd_pmu_regulator regulator,
164 uint32_t value)
165 {
166 return (BHND_PMU_SET_VOLTAGE_RAW(dev, regulator, value));
167 }
168
169 /**
170 * Enable the given @p regulator.
171 *
172 * @param dev PMU device.
173 * @param regulator Regulator to be enabled.
174 *
175 * @retval 0 success
176 * @retval ENODEV If @p regulator is not supported by this driver.
177 */
178 static inline int
bhnd_pmu_enable_regulator(device_t dev,bhnd_pmu_regulator regulator)179 bhnd_pmu_enable_regulator(device_t dev, bhnd_pmu_regulator regulator)
180 {
181 return (BHND_PMU_ENABLE_REGULATOR(dev, regulator));
182 }
183
184 /**
185 * Disable the given @p regulator.
186 *
187 * @param dev PMU device.
188 * @param regulator Regulator to be disabled.
189 *
190 * @retval 0 success
191 * @retval ENODEV If @p regulator is not supported by this driver.
192 */
193 static inline int
bhnd_pmu_disable_regulator(device_t dev,bhnd_pmu_regulator regulator)194 bhnd_pmu_disable_regulator(device_t dev, bhnd_pmu_regulator regulator)
195 {
196 return (BHND_PMU_DISABLE_REGULATOR(dev, regulator));
197 }
198
199 /**
200 * Return the transition latency required for @p clock in microseconds, if
201 * known.
202 *
203 * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's
204 * 'fastpwrup_dly' value.
205 *
206 * @param dev PMU device.
207 * @param clock The clock to be queried for transition latency.
208 * @param[out] latency On success, the transition latency of @p clock in
209 * microseconds.
210 *
211 * @retval 0 success
212 * @retval ENODEV If the transition latency for @p clock is not available.
213 */
214 static inline int
bhnd_pmu_get_clock_latency(device_t dev,bhnd_clock clock,u_int * latency)215 bhnd_pmu_get_clock_latency(device_t dev, bhnd_clock clock, u_int *latency)
216 {
217 return (BHND_PMU_GET_CLOCK_LATENCY(dev, clock, latency));
218 }
219
220 /**
221 * Return the frequency for @p clock in Hz, if known.
222 *
223 * @param dev PMU device.
224 * @param clock The clock to be queried.
225 * @param[out] freq On success, the frequency of @p clock in Hz.
226 *
227 * @retval 0 success
228 * @retval ENODEV If the frequency for @p clock is not available.
229 */
230 static inline int
bhnd_pmu_get_clock_freq(device_t dev,bhnd_clock clock,u_int * freq)231 bhnd_pmu_get_clock_freq(device_t dev, bhnd_clock clock, u_int *freq)
232 {
233 return (BHND_PMU_GET_CLOCK_FREQ(dev, clock, freq));
234 }
235
236 /**
237 * Request that the PMU configure itself for a given hardware-specific
238 * spuravoid mode.
239 *
240 * @param dev PMU device.
241 * @param spuravoid The requested mode.
242 *
243 * @retval 0 success
244 * @retval ENODEV If @p regulator is not supported by this driver.
245 */
246 static inline int
bhnd_pmu_request_spuravoid(device_t dev,bhnd_pmu_spuravoid spuravoid)247 bhnd_pmu_request_spuravoid(device_t dev, bhnd_pmu_spuravoid spuravoid)
248 {
249 return (BHND_PMU_REQUEST_SPURAVOID(dev, spuravoid));
250 }
251
252 /**
253 * Return the PMU's maximum state transition latency in microseconds.
254 *
255 * This upper bound may be used to busy-wait on PMU clock and resource state
256 * transitions.
257 *
258 * @param dev PMU device.
259 */
260 static inline u_int
bhnd_pmu_get_max_transition_latency(device_t dev)261 bhnd_pmu_get_max_transition_latency(device_t dev)
262 {
263 return (BHND_PMU_GET_MAX_TRANSITION_LATENCY(dev));
264 }
265
266 #endif /* _BHND_CORES_PMU_BHND_PMU_H_ */
267