xref: /illumos-gate/usr/src/uts/common/io/rtw/rtwvar.h (revision d3351b346d0c3defc40a1eeafcbebec6201461ec)
1 /*
2  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  *
5  * Copyright 2019 Joyent, Inc.
6  */
7 /*
8  * Copyright (c) 2004, 2005 David Young.  All rights reserved.
9  *
10  * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. The name of David Young may not be used to endorse or promote
21  *    products derived from this software without specific prior
22  *    written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
25  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
27  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
28  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
30  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
35  * OF SUCH DAMAGE.
36  */
37 #ifndef _RTWVAR_H_
38 #define	_RTWVAR_H_
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
44 #include <sys/list.h>
45 #include <sys/net80211.h>
46 
47 #ifndef __func__
48 #define	__func__ ""
49 #endif
50 
51 extern void rtw_dbg(uint32_t dbg_flags, const int8_t *fmt, ...);
52 
53 #define	RTW_DEBUG_TUNE		0x000001
54 #define	RTW_DEBUG_PKTFILT	0x000002
55 #define	RTW_DEBUG_XMIT		0x000004
56 #define	RTW_DEBUG_DMA		0x000008
57 #define	RTW_DEBUG_NODE		0x000010
58 #define	RTW_DEBUG_PWR		0x000020
59 #define	RTW_DEBUG_ATTACH	0x000040
60 #define	RTW_DEBUG_REGDUMP	0x000080
61 #define	RTW_DEBUG_ACCESS	0x000100
62 #define	RTW_DEBUG_RESET		0x000200
63 #define	RTW_DEBUG_INIT		0x000400
64 #define	RTW_DEBUG_PKTDUMP	0x000800
65 #define	RTW_DEBUG_RECV		0x001000
66 #define	RTW_DEBUG_RECV_DESC	0x002000
67 #define	RTW_DEBUG_IOSTATE	0x004000
68 #define	RTW_DEBUG_INTR		0x008000
69 #define	RTW_DEBUG_PHY		0x010000
70 #define	RTW_DEBUG_PHYIO		0x020000
71 #define	RTW_DEBUG_PHYBITIO	0x040000
72 #define	RTW_DEBUG_TIMEOUT	0x080000
73 #define	RTW_DEBUG_BUGS		0x100000
74 #define	RTW_DEBUG_BEACON	0x200000
75 #define	RTW_DEBUG_WIFICFG	0x400000
76 #define	RTW_DEBUG_80211		0x800000
77 #define	RTW_DEBUG_MAX		0xffffff
78 
79 #ifdef DEBUG
80 #define	RTW_DPRINTF \
81 	rtw_dbg
82 #else /* DEBUG */
83 #define	RTW_DPRINTF(...) (void)(0)
84 #endif /* DEBUG */
85 
86 enum rtw_locale {
87 	RTW_LOCALE_USA = 0,
88 	RTW_LOCALE_EUROPE,
89 	RTW_LOCALE_JAPAN,
90 	RTW_LOCALE_UNKNOWN
91 };
92 
93 enum rtw_rfchipid {
94 	RTW_RFCHIPID_RESERVED = 0,
95 	RTW_RFCHIPID_INTERSIL = 1,
96 	RTW_RFCHIPID_RFMD = 2,
97 	RTW_RFCHIPID_PHILIPS = 3,
98 	RTW_RFCHIPID_MAXIM = 4,
99 	RTW_RFCHIPID_GCT = 5
100 };
101 
102 /*
103  * sc_flags
104  */
105 #define	RTW_F_ENABLED		0x00000001	/* chip is enabled */
106 #define	RTW_F_DIGPHY		0x00000002	/* digital PHY */
107 #define	RTW_F_DFLANTB		0x00000004	/* B antenna is default */
108 #define	RTW_F_ANTDIV		0x00000010	/* h/w antenna diversity */
109 #define	RTW_F_9356SROM		0x00000020	/* 93c56 SROM */
110 #define	RTW_F_SLEEP		0x00000040	/* chip is asleep */
111 #define	RTW_F_INVALID		0x00000080	/* chip is absent */
112 #define	RTW_F_SUSPEND		0x00000100	/* driver is suspended */
113 #define	RTW_F_PLUMBED		0x00000200	/* driver is plumbed */
114 #define	RTW_F_ATTACHED		0x01000000	/* driver is attached */
115 /*
116  * all PHY flags
117  */
118 #define	RTW_F_ALLPHY		(RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV)
119 
120 enum rtw_access {RTW_ACCESS_NONE = 0,
121 		RTW_ACCESS_CONFIG = 1,
122 		RTW_ACCESS_ANAPARM = 2};
123 
124 struct rtw_regs {
125 	ddi_acc_handle_t	r_handle;
126 	caddr_t			r_base;
127 	enum rtw_access		r_access;
128 };
129 
130 #define	RTW_SR_GET(sr, ofs) \
131 	(((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff)
132 
133 #define	RTW_SR_GET16(sr, ofs) \
134 	(RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8))
135 
136 struct rtw_srom {
137 	uint16_t		*sr_content;
138 	uint16_t		sr_size;
139 };
140 
141 
142 #define	RTW_NTXPRI	4	/* number of Tx priorities */
143 #define	RTW_TXPRILO	0
144 #define	RTW_TXPRIMD	1
145 #define	RTW_TXPRIHI	2
146 #define	RTW_TXPRIBCN	3	/* beacon priority */
147 
148 #define	RTW_MAXPKTSEGS		64	/* Max 64 segments per Tx packet */
149 
150 /*
151  * Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT
152  * boundaries.  I allocate them consecutively from one buffer, so
153  * just round up.
154  */
155 #define	RTW_TXQLENLO	64	/* low-priority queue length */
156 #define	RTW_TXQLENMD	64	/* medium-priority */
157 #define	RTW_TXQLENHI	64	/* high-priority */
158 #define	RTW_TXQLENBCN	2	/* beacon */
159 
160 #define	RTW_NTXDESCLO	RTW_TXQLENLO
161 #define	RTW_NTXDESCMD	RTW_TXQLENMD
162 #define	RTW_NTXDESCHI	RTW_TXQLENHI
163 #define	RTW_NTXDESCBCN	RTW_TXQLENBCN
164 
165 #define	RTW_NTXDESCTOTAL	(RTW_NTXDESCLO + RTW_NTXDESCMD + \
166 				RTW_NTXDESCHI + RTW_NTXDESCBCN)
167 
168 #define	RTW_RXQLEN	64
169 #define	RTW_DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl,\
170 	(area).offset, (area).alength, (flag)))
171 
172 #define	RTW_DMA_SYNC_DESC(area, offset, len, flag) \
173 	((void) ddi_dma_sync((area).dma_hdl, offset, len, (flag)))
174 
175 #define	RTW_MINC(x, y) (x) = ((x + 1) % y)
176 #define	list_empty(a) ((a)->list_head.list_next == &(a)->list_head)
177 
178 typedef struct dma_area {
179 	ddi_acc_handle_t	acc_hdl;	/* handle for memory */
180 	caddr_t			mem_va;		/* CPU VA of memory */
181 	uint32_t		nslots;		/* number of slots */
182 	uint32_t		size;		/* size per slot */
183 	size_t			alength;	/* allocated size */
184 						/* >= product of above */
185 
186 	ddi_dma_handle_t	dma_hdl;	/* DMA handle */
187 	offset_t		offset;		/* relative to handle */
188 	ddi_dma_cookie_t	cookie;		/* associated cookie */
189 	uint32_t		ncookies;	/* must be 1 */
190 	uint32_t		token;		/* arbitrary identifier */
191 } dma_area_t;						/* 0x50 (80) bytes */
192 
193 struct rtw_txbuf {
194 	struct rtw_txdesc	*txdesc;	/* virtual addr of desc */
195 	uint32_t		bf_daddr;	/* physical addr of desc */
196 	uint32_t		next_bf_daddr;	/* physical addr of next desc */
197 	dma_area_t		bf_dma;		/* dma area for buf */
198 	struct ieee80211_node	*bf_in;		/* pointer to the node */
199 	list_node_t		bf_node;
200 	uint32_t		order;
201 };
202 
203 struct rtw_rxbuf {
204 	struct rtw_rxdesc	*rxdesc;	/* virtual addr of desc */
205 	uint32_t		bf_daddr;	/* physical addr of desc */
206 	dma_area_t		bf_dma;		/* dma area for buf */
207 };
208 
209 struct rtw_txq {
210 	struct	rtw_txdesc	*txdesc_h;
211 	struct	rtw_txbuf	*txbuf_h;
212 	uint32_t		tx_prod;
213 	uint32_t		tx_cons;
214 	uint32_t		tx_nfree;
215 	kmutex_t		txbuf_lock;
216 	list_t			tx_free_list;
217 	list_t			tx_dirty_list;
218 };
219 
220 struct rtw_descs {
221 	struct rtw_txdesc	hd_txlo[RTW_NTXDESCLO];
222 	struct rtw_txdesc	hd_txmd[RTW_NTXDESCMD];
223 	struct rtw_txdesc	hd_txhi[RTW_NTXDESCHI];
224 	struct rtw_rxdesc	hd_rx[RTW_RXQLEN];
225 	struct rtw_txdesc	hd_bcn[RTW_NTXDESCBCN];
226 };
227 #define	RTW_DESC_OFFSET(ring, i)	offsetof(struct rtw_descs, ring[i])
228 #define	RTW_RING_OFFSET(ring)		RTW_DESC_OFFSET(ring, 0)
229 #define	RTW_RING_BASE(baseaddr0, ring) \
230 	(baseaddr0 + RTW_RING_OFFSET(ring))
231 
232 /*
233  * One Time Unit (TU) is 1Kus = 1024 microseconds.
234  */
235 #define	IEEE80211_DUR_TU		1024
236 
237 /*
238  * IEEE 802.11b durations for DSSS PHY in microseconds
239  */
240 #define	IEEE80211_DUR_DS_LONG_PREAMBLE	144
241 #define	IEEE80211_DUR_DS_SHORT_PREAMBLE	72
242 
243 #define	IEEE80211_DUR_DS_SLOW_PLCPHDR	48
244 #define	IEEE80211_DUR_DS_FAST_PLCPHDR	24
245 #define	IEEE80211_DUR_DS_SLOW_ACK	112
246 #define	IEEE80211_DUR_DS_FAST_ACK	56
247 #define	IEEE80211_DUR_DS_SLOW_CTS	112
248 #define	IEEE80211_DUR_DS_FAST_CTS	56
249 
250 #define	IEEE80211_DUR_DS_SLOT		20
251 #define	IEEE80211_DUR_DS_SIFS		10
252 #define	IEEE80211_DUR_DS_PIFS	(IEEE80211_DUR_DS_SIFS + IEEE80211_DUR_DS_SLOT)
253 #define	IEEE80211_DUR_DS_DIFS	(IEEE80211_DUR_DS_SIFS + \
254 				2 * IEEE80211_DUR_DS_SLOT)
255 #define	IEEE80211_DUR_DS_EIFS	(IEEE80211_DUR_DS_SIFS + \
256 				IEEE80211_DUR_DS_SLOW_ACK + \
257 				IEEE80211_DUR_DS_LONG_PREAMBLE + \
258 				IEEE80211_DUR_DS_SLOW_PLCPHDR + \
259 				IEEE80211_DUR_DIFS)
260 
261 /*
262  * 802.11 frame duration definitions.
263  */
264 struct rtw_ieee80211_duration {
265 	uint16_t	d_rts_dur;
266 	uint16_t	d_data_dur;
267 	uint16_t	d_plcp_len;
268 	uint8_t		d_residue;	/* unused octets in time slot */
269 	uint8_t		resv;
270 };
271 
272 
273 #ifdef RTW_RADIOTAP
274 /*
275  * Radio capture format for RTL8180.
276  */
277 
278 #define	RTW_RX_RADIOTAP_PRESENT					\
279 	((1 << IEEE80211_RADIOTAP_TSFT)			|	\
280 	(1 << IEEE80211_RADIOTAP_FLAGS)		|	\
281 	(1 << IEEE80211_RADIOTAP_RATE)			|	\
282 	(1 << IEEE80211_RADIOTAP_CHANNEL)		|	\
283 	(1 << IEEE80211_RADIOTAP_LOCK_QUALITY)		|	\
284 	(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)		|	\
285 	0)
286 
287 struct rtw_rx_radiotap_header {
288 	struct ieee80211_radiotap_header	rr_ihdr;
289 	uint64_t				rr_tsft;
290 	uint8_t				rr_flags;
291 	uint8_t				rr_rate;
292 	uint16_t				rr_chan_freq;
293 	uint16_t				rr_chan_flags;
294 	uint16_t				rr_barker_lock;
295 	uint8_t				rr_antsignal;
296 } __attribute__((__packed__));
297 
298 #define	RTW_TX_RADIOTAP_PRESENT				\
299 	((1 << IEEE80211_RADIOTAP_FLAGS)	|	\
300 	(1 << IEEE80211_RADIOTAP_RATE)		|	\
301 	(1 << IEEE80211_RADIOTAP_CHANNEL)	|	\
302 	0)
303 
304 struct rtw_tx_radiotap_header {
305 	struct ieee80211_radiotap_header	rt_ihdr;
306 	uint8_t				rt_flags;
307 	uint8_t				rt_rate;
308 	uint16_t				rt_chan_freq;
309 	uint16_t				rt_chan_flags;
310 } __attribute__((__packed__));
311 #endif
312 
313 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE,
314 	FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE,
315 	FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM,
316 	FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP,
317 	FINISH_TXCTLBLK_SETUP, DETACHED};
318 
319 struct rtw_hooks {
320 	void			*rh_shutdown;	/* shutdown hook */
321 	void			*rh_power;	/* power management hook */
322 };
323 
324 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON };
325 
326 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int);
327 
328 struct rtw_phy {
329 	struct rtw_rf	*p_rf;
330 	struct rtw_regs	*p_regs;
331 };
332 
333 struct rtw_bbpset {
334 	uint_t	bb_antatten;
335 	uint_t	bb_chestlim;
336 	uint_t	bb_chsqlim;
337 	uint_t	bb_ifagcdet;
338 	uint_t	bb_ifagcini;
339 	uint_t	bb_ifagclimit;
340 	uint_t	bb_lnadet;
341 	uint_t	bb_sys1;
342 	uint_t	bb_sys2;
343 	uint_t	bb_sys3;
344 	uint_t	bb_trl;
345 	uint_t	bb_txagc;
346 };
347 
348 struct rtw_rf {
349 	void	(*rf_destroy)(struct rtw_rf *);
350 	/*
351 	 * args: frequency, txpower, power state
352 	 */
353 	int	(*rf_init)(struct rtw_rf *, uint_t, uint8_t, enum rtw_pwrstate);
354 	/*
355 	 * arg: power state
356 	 */
357 	int	(*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate);
358 	/*
359 	 * arg: frequency
360 	 */
361 	int	(*rf_tune)(struct rtw_rf *, uint_t);
362 	/*
363 	 * arg: txpower
364 	 */
365 	int	(*rf_txpower)(struct rtw_rf *, uint8_t);
366 	rtw_continuous_tx_cb_t	rf_continuous_tx_cb;
367 	void			*rf_continuous_tx_arg;
368 	struct rtw_bbpset	rf_bbpset;
369 };
370 
371 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, uint_t,
372     uint32_t);
373 
374 struct rtw_rfbus {
375 	struct rtw_regs		*b_regs;
376 	rtw_rf_write_t		b_write;
377 };
378 
379 struct rtw_max2820 {
380 	struct rtw_rf		mx_rf;
381 	struct rtw_rfbus	mx_bus;
382 	int			mx_is_a;	/* 1: MAX2820A/MAX2821A */
383 };
384 
385 struct rtw_sa2400 {
386 	struct rtw_rf		sa_rf;
387 	struct rtw_rfbus	sa_bus;
388 	int			sa_digphy;	/* 1: digital PHY */
389 };
390 
391 typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int);
392 
393 union rtw_keys {
394 	uint8_t		rk_keys[4][16];
395 	uint32_t	rk_words[16];
396 };
397 
398 #define	RTW_LED_SLOW_TICKS	MAX(1, hz/2)
399 #define	RTW_LED_FAST_TICKS	MAX(1, hz/10)
400 
401 struct rtw_led_state {
402 #define	RTW_LED0	0x1
403 #define	RTW_LED1	0x2
404 	uint8_t		ls_slowblink:2;
405 	uint8_t		ls_actblink:2;
406 	uint8_t		ls_default:2;
407 	uint8_t		ls_state;
408 	uint8_t		ls_event;
409 #define	RTW_LED_S_RX	0x1
410 #define	RTW_LED_S_TX	0x2
411 #define	RTW_LED_S_SLOW	0x4
412 };
413 
414 typedef struct rtw_softc {
415 	ieee80211com_t		sc_ic;	/* IEEE 802.11 common */
416 	dev_info_t		*sc_dev; /* back pointer to dev_info_t */
417 	kmutex_t		sc_genlock;
418 	struct rtw_regs		sc_regs;
419 	ddi_acc_handle_t	sc_cfg_handle;
420 	caddr_t			sc_cfg_base;
421 	enum ieee80211_phymode	sc_curmode;
422 	uint32_t		sc_flags;
423 	uint32_t		sc_invalid;
424 	ddi_iblock_cookie_t	sc_iblock;
425 	uint32_t		sc_need_reschedule;
426 	uint16_t		sc_cachelsz;	/* cache line size */
427 	uchar_t			sc_macaddr[6];
428 
429 	enum rtw_rfchipid	sc_rfchipid;
430 	enum rtw_locale		sc_locale;
431 	uint8_t			sc_phydelay;
432 
433 	uint32_t		sc_dmabuf_size;
434 	dma_area_t		sc_desc_dma;
435 
436 	struct rtw_txq		sc_txq[RTW_NTXPRI];
437 
438 	struct	rtw_rxdesc	*rxdesc_h;
439 	struct  rtw_rxbuf	*rxbuf_h;
440 	uint32_t		rx_next;
441 	kmutex_t		rxbuf_lock;
442 	kmutex_t		sc_txlock;
443 
444 	struct rtw_srom		sc_srom;
445 	enum rtw_pwrstate	sc_pwrstate;
446 	rtw_pwrstate_t		sc_pwrstate_cb;
447 	struct rtw_rf		*sc_rf;
448 
449 	uint16_t		sc_inten;
450 
451 	void (*sc_intr_ack)(struct rtw_regs *);
452 
453 	int			(*sc_enable)(struct rtw_softc *);
454 	void			(*sc_disable)(struct rtw_softc *);
455 	void			(*sc_power)(struct rtw_softc *, int);
456 	struct rtw_hooks	sc_hooks;
457 
458 	uint_t			sc_cur_chan;
459 
460 	uint32_t		sc_tsfth;	/* most significant TSFT bits */
461 	uint32_t		sc_rcr;		/* RTW_RCR */
462 	uint8_t			sc_csthr;	/* carrier-sense threshold */
463 
464 	uint8_t			sc_rev;		/* PCI/Cardbus revision */
465 
466 	uint32_t		sc_anaparm;	/* register RTW_ANAPARM */
467 #ifdef RTW_RADIOTAP
468 	union {
469 		struct rtw_rx_radiotap_header	tap;
470 		uint8_t			pad[64];
471 	} sc_rxtapu;
472 	union {
473 		struct rtw_tx_radiotap_header	tap;
474 		uint8_t			pad[64];
475 	} sc_txtapu;
476 #endif
477 	union rtw_keys		sc_keys;
478 	int			sc_txkey;
479 	struct rtw_led_state	sc_led_state;
480 	int			sc_hwverid;
481 
482 	int			(*sc_newstate)(ieee80211com_t *,
483 					enum ieee80211_state, int);
484 
485 	timeout_id_t		sc_scan_id;
486 	timeout_id_t		sc_ratectl_id;
487 	uint32_t		sc_tx_ok;
488 	uint32_t		sc_tx_err;
489 	uint32_t		sc_tx_retr;
490 	uint32_t		sc_xmtretry;
491 	uint32_t		sc_noxmtbuf;
492 	uint32_t		sc_norcvbuf;
493 	uint32_t		sc_bytexmt64;
494 	uint32_t		sc_bytercv64;
495 	uint32_t		sc_pktxmt64;
496 	uint32_t		sc_pktrcv64;
497 	uint32_t		sc_intr;
498 	uint32_t		sc_ioerror;
499 	uint32_t		hw_start;
500 	uint32_t		hw_go;
501 } rtw_softc_t;
502 
503 #define	RTW_SC(ic) ((rtw_softc_t *)ic)
504 #ifdef __cplusplus
505 }
506 #endif
507 
508 #endif /* _RTWVAR_H_ */
509