1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright(c) 2021-2022 Intel Corporation
4 //
5 // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 // Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 //
8
9 #include <linux/devcoredump.h>
10 #include <linux/slab.h>
11 #include <sound/hdaudio_ext.h>
12 #include "avs.h"
13 #include "messages.h"
14 #include "path.h"
15 #include "topology.h"
16
avs_apl_dsp_interrupt(struct avs_dev * adev)17 static irqreturn_t avs_apl_dsp_interrupt(struct avs_dev *adev)
18 {
19 u32 adspis = snd_hdac_adsp_readl(adev, AVS_ADSP_REG_ADSPIS);
20 irqreturn_t ret = IRQ_NONE;
21
22 if (adspis == UINT_MAX)
23 return ret;
24
25 if (adspis & AVS_ADSP_ADSPIS_IPC) {
26 avs_skl_ipc_interrupt(adev);
27 ret = IRQ_HANDLED;
28 }
29
30 return ret;
31 }
32
33 #ifdef CONFIG_DEBUG_FS
avs_apl_enable_logs(struct avs_dev * adev,enum avs_log_enable enable,u32 aging_period,u32 fifo_full_period,unsigned long resource_mask,u32 * priorities)34 int avs_apl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,
35 u32 fifo_full_period, unsigned long resource_mask, u32 *priorities)
36 {
37 struct avs_apl_log_state_info *info;
38 u32 size, num_cores = adev->hw_cfg.dsp_cores;
39 int ret, i;
40
41 if (fls_long(resource_mask) > num_cores)
42 return -EINVAL;
43 size = struct_size(info, logs_core, num_cores);
44 info = kzalloc(size, GFP_KERNEL);
45 if (!info)
46 return -ENOMEM;
47
48 info->aging_timer_period = aging_period;
49 info->fifo_full_timer_period = fifo_full_period;
50 info->core_mask = resource_mask;
51 if (enable)
52 for_each_set_bit(i, &resource_mask, num_cores) {
53 info->logs_core[i].enable = enable;
54 info->logs_core[i].min_priority = *priorities++;
55 }
56 else
57 for_each_set_bit(i, &resource_mask, num_cores)
58 info->logs_core[i].enable = enable;
59
60 ret = avs_ipc_set_enable_logs(adev, (u8 *)info, size);
61 kfree(info);
62 if (ret)
63 return AVS_IPC_RET(ret);
64
65 return 0;
66 }
67 #endif
68
avs_apl_log_buffer_status(struct avs_dev * adev,union avs_notify_msg * msg)69 int avs_apl_log_buffer_status(struct avs_dev *adev, union avs_notify_msg *msg)
70 {
71 struct avs_apl_log_buffer_layout layout;
72 void __iomem *addr, *buf;
73
74 addr = avs_log_buffer_addr(adev, msg->log.core);
75 if (!addr)
76 return -ENXIO;
77
78 memcpy_fromio(&layout, addr, sizeof(layout));
79
80 if (!avs_logging_fw(adev))
81 /* consume the logs regardless of consumer presence */
82 goto update_read_ptr;
83
84 buf = avs_apl_log_payload_addr(addr);
85
86 if (layout.read_ptr > layout.write_ptr) {
87 avs_dump_fw_log(adev, buf + layout.read_ptr,
88 avs_apl_log_payload_size(adev) - layout.read_ptr);
89 layout.read_ptr = 0;
90 }
91 avs_dump_fw_log_wakeup(adev, buf + layout.read_ptr, layout.write_ptr - layout.read_ptr);
92
93 update_read_ptr:
94 writel(layout.write_ptr, addr);
95 return 0;
96 }
97
avs_apl_wait_log_entry(struct avs_dev * adev,u32 core,struct avs_apl_log_buffer_layout * layout)98 static int avs_apl_wait_log_entry(struct avs_dev *adev, u32 core,
99 struct avs_apl_log_buffer_layout *layout)
100 {
101 unsigned long timeout;
102 void __iomem *addr;
103
104 addr = avs_log_buffer_addr(adev, core);
105 if (!addr)
106 return -ENXIO;
107
108 timeout = jiffies + msecs_to_jiffies(10);
109
110 do {
111 memcpy_fromio(layout, addr, sizeof(*layout));
112 if (layout->read_ptr != layout->write_ptr)
113 return 0;
114 usleep_range(500, 1000);
115 } while (!time_after(jiffies, timeout));
116
117 return -ETIMEDOUT;
118 }
119
120 /* reads log header and tests its type */
121 #define avs_apl_is_entry_stackdump(addr) ((readl(addr) >> 30) & 0x1)
122
avs_apl_coredump(struct avs_dev * adev,union avs_notify_msg * msg)123 int avs_apl_coredump(struct avs_dev *adev, union avs_notify_msg *msg)
124 {
125 struct avs_apl_log_buffer_layout layout;
126 void __iomem *addr, *buf;
127 size_t dump_size;
128 u16 offset = 0;
129 u8 *dump, *pos;
130
131 dump_size = AVS_FW_REGS_SIZE + msg->ext.coredump.stack_dump_size;
132 dump = vzalloc(dump_size);
133 if (!dump)
134 return -ENOMEM;
135
136 memcpy_fromio(dump, avs_sram_addr(adev, AVS_FW_REGS_WINDOW), AVS_FW_REGS_SIZE);
137
138 if (!msg->ext.coredump.stack_dump_size)
139 goto exit;
140
141 /* Dump the registers even if an external error prevents gathering the stack. */
142 addr = avs_log_buffer_addr(adev, msg->ext.coredump.core_id);
143 if (!addr)
144 goto exit;
145
146 buf = avs_apl_log_payload_addr(addr);
147 memcpy_fromio(&layout, addr, sizeof(layout));
148 if (!avs_apl_is_entry_stackdump(buf + layout.read_ptr)) {
149 union avs_notify_msg lbs_msg = AVS_NOTIFICATION(LOG_BUFFER_STATUS);
150
151 /*
152 * DSP awaits the remaining logs to be
153 * gathered before dumping stack
154 */
155 lbs_msg.log.core = msg->ext.coredump.core_id;
156 avs_log_buffer_status_locked(adev, &lbs_msg);
157 }
158
159 pos = dump + AVS_FW_REGS_SIZE;
160 /* gather the stack */
161 do {
162 u32 count;
163
164 if (avs_apl_wait_log_entry(adev, msg->ext.coredump.core_id, &layout))
165 break;
166
167 if (layout.read_ptr > layout.write_ptr) {
168 count = avs_apl_log_payload_size(adev) - layout.read_ptr;
169 memcpy_fromio(pos + offset, buf + layout.read_ptr, count);
170 layout.read_ptr = 0;
171 offset += count;
172 }
173 count = layout.write_ptr - layout.read_ptr;
174 memcpy_fromio(pos + offset, buf + layout.read_ptr, count);
175 offset += count;
176
177 /* update read pointer */
178 writel(layout.write_ptr, addr);
179 } while (offset < msg->ext.coredump.stack_dump_size);
180
181 exit:
182 dev_coredumpv(adev->dev, dump, dump_size, GFP_KERNEL);
183
184 return 0;
185 }
186
avs_apl_lp_streaming(struct avs_dev * adev)187 static bool avs_apl_lp_streaming(struct avs_dev *adev)
188 {
189 struct avs_path *path;
190
191 spin_lock(&adev->path_list_lock);
192 /* Any gateway without buffer allocated in LP area disqualifies D0IX. */
193 list_for_each_entry(path, &adev->path_list, node) {
194 struct avs_path_pipeline *ppl;
195
196 list_for_each_entry(ppl, &path->ppl_list, node) {
197 struct avs_path_module *mod;
198
199 list_for_each_entry(mod, &ppl->mod_list, node) {
200 struct avs_tplg_modcfg_ext *cfg;
201
202 cfg = mod->template->cfg_ext;
203
204 /* only copiers have gateway attributes */
205 if (!guid_equal(&cfg->type, &AVS_COPIER_MOD_UUID))
206 continue;
207 /* non-gateway copiers do not prevent PG */
208 if (cfg->copier.dma_type == INVALID_OBJECT_ID)
209 continue;
210
211 if (!mod->gtw_attrs.lp_buffer_alloc) {
212 spin_unlock(&adev->path_list_lock);
213 return false;
214 }
215 }
216 }
217 }
218 spin_unlock(&adev->path_list_lock);
219
220 return true;
221 }
222
avs_apl_d0ix_toggle(struct avs_dev * adev,struct avs_ipc_msg * tx,bool wake)223 bool avs_apl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake)
224 {
225 /* wake in all cases */
226 if (wake)
227 return true;
228
229 /*
230 * If no pipelines are running, allow for d0ix schedule.
231 * If all gateways have lp=1, allow for d0ix schedule.
232 * If any gateway with lp=0 is allocated, abort scheduling d0ix.
233 *
234 * Note: for cAVS 1.5+ and 1.8, D0IX is LP-firmware transition,
235 * not the power-gating mechanism known from cAVS 2.0.
236 */
237 return avs_apl_lp_streaming(adev);
238 }
239
avs_apl_set_d0ix(struct avs_dev * adev,bool enable)240 int avs_apl_set_d0ix(struct avs_dev *adev, bool enable)
241 {
242 bool streaming = false;
243 int ret;
244
245 if (enable)
246 /* Either idle or all gateways with lp=1. */
247 streaming = !list_empty(&adev->path_list);
248
249 ret = avs_ipc_set_d0ix(adev, enable, streaming);
250 return AVS_IPC_RET(ret);
251 }
252
253 const struct avs_dsp_ops avs_apl_dsp_ops = {
254 .power = avs_dsp_core_power,
255 .reset = avs_dsp_core_reset,
256 .stall = avs_dsp_core_stall,
257 .dsp_interrupt = avs_apl_dsp_interrupt,
258 .int_control = avs_dsp_interrupt_control,
259 .load_basefw = avs_hda_load_basefw,
260 .load_lib = avs_hda_load_library,
261 .transfer_mods = avs_hda_transfer_modules,
262 .log_buffer_offset = avs_skl_log_buffer_offset,
263 .log_buffer_status = avs_apl_log_buffer_status,
264 .coredump = avs_apl_coredump,
265 .d0ix_toggle = avs_apl_d0ix_toggle,
266 .set_d0ix = avs_apl_set_d0ix,
267 AVS_SET_ENABLE_LOGS_OP(apl)
268 };
269