1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997, 1998, 1999, 2000
5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
6 *
7 * Copyright (c) 2006
8 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Bill Paul.
21 * 4. Neither the name of the author nor the names of any co-contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
35 * THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include <sys/cdefs.h>
39 /*
40 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver.
41 * Datasheet is available from http://www.admtek.com.tw.
42 *
43 * Written by Bill Paul <wpaul@ee.columbia.edu>
44 * Electrical Engineering Department
45 * Columbia University, New York City
46 *
47 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>.
48 * RED Inc.
49 */
50
51 /*
52 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet
53 * support: the control endpoint for reading/writing registers, burst
54 * read endpoint for packet reception, burst write for packet transmission
55 * and one for "interrupts." The chip uses the same RX filter scheme
56 * as the other ADMtek ethernet parts: one perfect filter entry for the
57 * the station address and a 64-bit multicast hash table. The chip supports
58 * both MII and HomePNA attachments.
59 *
60 * Since the maximum data transfer speed of USB is supposed to be 12Mbps,
61 * you're never really going to get 100Mbps speeds from this device. I
62 * think the idea is to allow the device to connect to 10 or 100Mbps
63 * networks, not necessarily to provide 100Mbps performance. Also, since
64 * the controller uses an external PHY chip, it's possible that board
65 * designers might simply choose a 10Mbps PHY.
66 *
67 * Registers are accessed using uether_do_request(). Packet
68 * transfers are done using usbd_transfer() and friends.
69 */
70
71 #include <sys/stdint.h>
72 #include <sys/stddef.h>
73 #include <sys/param.h>
74 #include <sys/queue.h>
75 #include <sys/types.h>
76 #include <sys/systm.h>
77 #include <sys/socket.h>
78 #include <sys/kernel.h>
79 #include <sys/bus.h>
80 #include <sys/module.h>
81 #include <sys/lock.h>
82 #include <sys/mutex.h>
83 #include <sys/condvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sx.h>
86 #include <sys/unistd.h>
87 #include <sys/callout.h>
88 #include <sys/malloc.h>
89 #include <sys/priv.h>
90
91 #include <net/if.h>
92 #include <net/if_var.h>
93 #include <net/if_media.h>
94
95 #include <dev/mii/mii.h>
96 #include <dev/mii/miivar.h>
97
98 #include <dev/usb/usb.h>
99 #include <dev/usb/usbdi.h>
100 #include <dev/usb/usbdi_util.h>
101 #include "usbdevs.h"
102
103 #define USB_DEBUG_VAR aue_debug
104 #include <dev/usb/usb_debug.h>
105 #include <dev/usb/usb_process.h>
106
107 #include <dev/usb/net/usb_ethernet.h>
108 #include <dev/usb/net/if_auereg.h>
109
110 #include "miibus_if.h"
111
112 #ifdef USB_DEBUG
113 static int aue_debug = 0;
114
115 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
116 "USB aue");
117 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RWTUN, &aue_debug, 0,
118 "Debug level");
119 #endif
120
121 /*
122 * Various supported device vendors/products.
123 */
124 static const STRUCT_USB_HOST_ID aue_devs[] = {
125 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
126 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII),
127 AUE_DEV(ABOCOM, DSB650TX_PNA, 0),
128 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS),
129 AUE_DEV(ABOCOM, XX10, 0),
130 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII),
131 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII),
132 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA),
133 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA),
134 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII),
135 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII),
136 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII),
137 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA),
138 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII),
139 AUE_DEV(ACCTON, USB320_EC, 0),
140 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII),
141 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII),
142 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII),
143 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII),
144 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY),
145 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII),
146 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII),
147 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII),
148 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII),
149 AUE_DEV(BILLIONTON, USB100, 0),
150 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII),
151 AUE_DEV(BILLIONTON, USBEL100, 0),
152 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA),
153 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII),
154 AUE_DEV(COREGA, FETHER_USB_TX, 0),
155 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS),
156 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
157 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII),
158 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII),
159 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA),
160 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS),
161 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS),
162 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII),
163 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII),
164 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII),
165 AUE_DEV(ELECOM, LDUSBTX0, 0),
166 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS),
167 AUE_DEV(ELECOM, LDUSBTX2, 0),
168 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS),
169 AUE_DEV(ELSA, USB2ETHERNET, 0),
170 AUE_DEV(GIGABYTE, GNBR402W, 0),
171 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII),
172 AUE_DEV(HP, HN210E, AUE_FLAG_PII),
173 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII),
174 AUE_DEV(IODATA, USBETTX, 0),
175 AUE_DEV(KINGSTON, KNU101TX, 0),
176 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA),
177 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS),
178 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS),
179 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII),
180 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
181 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS),
182 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII),
183 AUE_DEV(MELCO, LUATX1, 0),
184 AUE_DEV(MELCO, LUATX5, 0),
185 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII),
186 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII),
187 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII),
188 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII),
189 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII),
190 AUE_DEV(SMC, 2202USB, 0),
191 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII),
192 AUE_DEV(SOHOWARE, NUB100, 0),
193 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII),
194 #undef AUE_DEV
195 };
196
197 /* prototypes */
198
199 static device_probe_t aue_probe;
200 static device_attach_t aue_attach;
201 static device_detach_t aue_detach;
202 static miibus_readreg_t aue_miibus_readreg;
203 static miibus_writereg_t aue_miibus_writereg;
204 static miibus_statchg_t aue_miibus_statchg;
205
206 static usb_callback_t aue_intr_callback;
207 static usb_callback_t aue_bulk_read_callback;
208 static usb_callback_t aue_bulk_write_callback;
209
210 static uether_fn_t aue_attach_post;
211 static uether_fn_t aue_init;
212 static uether_fn_t aue_stop;
213 static uether_fn_t aue_start;
214 static uether_fn_t aue_tick;
215 static uether_fn_t aue_setmulti;
216 static uether_fn_t aue_setpromisc;
217
218 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t);
219 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t);
220 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t);
221 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t);
222 static uint16_t aue_eeprom_getword(struct aue_softc *, int);
223 static void aue_reset(struct aue_softc *);
224 static void aue_reset_pegasus_II(struct aue_softc *);
225
226 static int aue_ifmedia_upd(if_t);
227 static void aue_ifmedia_sts(if_t, struct ifmediareq *);
228
229 static const struct usb_config aue_config[AUE_N_TRANSFER] = {
230 [AUE_BULK_DT_WR] = {
231 .type = UE_BULK,
232 .endpoint = UE_ADDR_ANY,
233 .direction = UE_DIR_OUT,
234 .bufsize = (MCLBYTES + 2),
235 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
236 .callback = aue_bulk_write_callback,
237 .timeout = 10000, /* 10 seconds */
238 },
239
240 [AUE_BULK_DT_RD] = {
241 .type = UE_BULK,
242 .endpoint = UE_ADDR_ANY,
243 .direction = UE_DIR_IN,
244 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN),
245 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
246 .callback = aue_bulk_read_callback,
247 },
248
249 [AUE_INTR_DT_RD] = {
250 .type = UE_INTERRUPT,
251 .endpoint = UE_ADDR_ANY,
252 .direction = UE_DIR_IN,
253 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
254 .bufsize = 0, /* use wMaxPacketSize */
255 .callback = aue_intr_callback,
256 },
257 };
258
259 static device_method_t aue_methods[] = {
260 /* Device interface */
261 DEVMETHOD(device_probe, aue_probe),
262 DEVMETHOD(device_attach, aue_attach),
263 DEVMETHOD(device_detach, aue_detach),
264
265 /* MII interface */
266 DEVMETHOD(miibus_readreg, aue_miibus_readreg),
267 DEVMETHOD(miibus_writereg, aue_miibus_writereg),
268 DEVMETHOD(miibus_statchg, aue_miibus_statchg),
269
270 DEVMETHOD_END
271 };
272
273 static driver_t aue_driver = {
274 .name = "aue",
275 .methods = aue_methods,
276 .size = sizeof(struct aue_softc)
277 };
278
279 DRIVER_MODULE(aue, uhub, aue_driver, NULL, NULL);
280 DRIVER_MODULE(miibus, aue, miibus_driver, 0, 0);
281 MODULE_DEPEND(aue, uether, 1, 1, 1);
282 MODULE_DEPEND(aue, usb, 1, 1, 1);
283 MODULE_DEPEND(aue, ether, 1, 1, 1);
284 MODULE_DEPEND(aue, miibus, 1, 1, 1);
285 MODULE_VERSION(aue, 1);
286 USB_PNP_HOST_INFO(aue_devs);
287
288 static const struct usb_ether_methods aue_ue_methods = {
289 .ue_attach_post = aue_attach_post,
290 .ue_start = aue_start,
291 .ue_init = aue_init,
292 .ue_stop = aue_stop,
293 .ue_tick = aue_tick,
294 .ue_setmulti = aue_setmulti,
295 .ue_setpromisc = aue_setpromisc,
296 .ue_mii_upd = aue_ifmedia_upd,
297 .ue_mii_sts = aue_ifmedia_sts,
298 };
299
300 #define AUE_SETBIT(sc, reg, x) \
301 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
302
303 #define AUE_CLRBIT(sc, reg, x) \
304 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
305
306 static uint8_t
aue_csr_read_1(struct aue_softc * sc,uint16_t reg)307 aue_csr_read_1(struct aue_softc *sc, uint16_t reg)
308 {
309 struct usb_device_request req;
310 usb_error_t err;
311 uint8_t val;
312
313 req.bmRequestType = UT_READ_VENDOR_DEVICE;
314 req.bRequest = AUE_UR_READREG;
315 USETW(req.wValue, 0);
316 USETW(req.wIndex, reg);
317 USETW(req.wLength, 1);
318
319 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
320 if (err)
321 return (0);
322 return (val);
323 }
324
325 static uint16_t
aue_csr_read_2(struct aue_softc * sc,uint16_t reg)326 aue_csr_read_2(struct aue_softc *sc, uint16_t reg)
327 {
328 struct usb_device_request req;
329 usb_error_t err;
330 uint16_t val;
331
332 req.bmRequestType = UT_READ_VENDOR_DEVICE;
333 req.bRequest = AUE_UR_READREG;
334 USETW(req.wValue, 0);
335 USETW(req.wIndex, reg);
336 USETW(req.wLength, 2);
337
338 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
339 if (err)
340 return (0);
341 return (le16toh(val));
342 }
343
344 static void
aue_csr_write_1(struct aue_softc * sc,uint16_t reg,uint8_t val)345 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val)
346 {
347 struct usb_device_request req;
348
349 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
350 req.bRequest = AUE_UR_WRITEREG;
351 req.wValue[0] = val;
352 req.wValue[1] = 0;
353 USETW(req.wIndex, reg);
354 USETW(req.wLength, 1);
355
356 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
357 /* error ignored */
358 }
359 }
360
361 static void
aue_csr_write_2(struct aue_softc * sc,uint16_t reg,uint16_t val)362 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val)
363 {
364 struct usb_device_request req;
365
366 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
367 req.bRequest = AUE_UR_WRITEREG;
368 USETW(req.wValue, val);
369 USETW(req.wIndex, reg);
370 USETW(req.wLength, 2);
371
372 val = htole16(val);
373
374 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
375 /* error ignored */
376 }
377 }
378
379 /*
380 * Read a word of data stored in the EEPROM at address 'addr.'
381 */
382 static uint16_t
aue_eeprom_getword(struct aue_softc * sc,int addr)383 aue_eeprom_getword(struct aue_softc *sc, int addr)
384 {
385 int i;
386
387 aue_csr_write_1(sc, AUE_EE_REG, addr);
388 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
389
390 for (i = 0; i != AUE_TIMEOUT; i++) {
391 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE)
392 break;
393 if (uether_pause(&sc->sc_ue, hz / 100))
394 break;
395 }
396
397 if (i == AUE_TIMEOUT)
398 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n");
399
400 return (aue_csr_read_2(sc, AUE_EE_DATA));
401 }
402
403 /*
404 * Read station address(offset 0) from the EEPROM.
405 */
406 static void
aue_read_mac(struct aue_softc * sc,uint8_t * eaddr)407 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr)
408 {
409 int i, offset;
410 uint16_t word;
411
412 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) {
413 word = aue_eeprom_getword(sc, offset + i);
414 eaddr[i * 2] = (uint8_t)word;
415 eaddr[i * 2 + 1] = (uint8_t)(word >> 8);
416 }
417 }
418
419 static int
aue_miibus_readreg(device_t dev,int phy,int reg)420 aue_miibus_readreg(device_t dev, int phy, int reg)
421 {
422 struct aue_softc *sc = device_get_softc(dev);
423 int i, locked;
424 uint16_t val = 0;
425
426 locked = mtx_owned(&sc->sc_mtx);
427 if (!locked)
428 AUE_LOCK(sc);
429
430 /*
431 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps
432 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY
433 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is
434 * actually connected to anything, so we ignore the 10Mbps one. It
435 * happens to be configured for MII address 3, so we filter that out.
436 */
437 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) {
438 if (phy == 3)
439 goto done;
440 #if 0
441 if (phy != 1)
442 goto done;
443 #endif
444 }
445 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
446 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
447
448 for (i = 0; i != AUE_TIMEOUT; i++) {
449 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
450 break;
451 if (uether_pause(&sc->sc_ue, hz / 100))
452 break;
453 }
454
455 if (i == AUE_TIMEOUT)
456 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n");
457
458 val = aue_csr_read_2(sc, AUE_PHY_DATA);
459
460 done:
461 if (!locked)
462 AUE_UNLOCK(sc);
463 return (val);
464 }
465
466 static int
aue_miibus_writereg(device_t dev,int phy,int reg,int data)467 aue_miibus_writereg(device_t dev, int phy, int reg, int data)
468 {
469 struct aue_softc *sc = device_get_softc(dev);
470 int i;
471 int locked;
472
473 if (phy == 3)
474 return (0);
475
476 locked = mtx_owned(&sc->sc_mtx);
477 if (!locked)
478 AUE_LOCK(sc);
479
480 aue_csr_write_2(sc, AUE_PHY_DATA, data);
481 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
482 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
483
484 for (i = 0; i != AUE_TIMEOUT; i++) {
485 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
486 break;
487 if (uether_pause(&sc->sc_ue, hz / 100))
488 break;
489 }
490
491 if (i == AUE_TIMEOUT)
492 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n");
493
494 if (!locked)
495 AUE_UNLOCK(sc);
496 return (0);
497 }
498
499 static void
aue_miibus_statchg(device_t dev)500 aue_miibus_statchg(device_t dev)
501 {
502 struct aue_softc *sc = device_get_softc(dev);
503 struct mii_data *mii = GET_MII(sc);
504 int locked;
505
506 locked = mtx_owned(&sc->sc_mtx);
507 if (!locked)
508 AUE_LOCK(sc);
509
510 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
511 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX)
512 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
513 else
514 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
515
516 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
517 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
518 else
519 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
520
521 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
522
523 /*
524 * Set the LED modes on the LinkSys adapter.
525 * This turns on the 'dual link LED' bin in the auxmode
526 * register of the Broadcom PHY.
527 */
528 if (sc->sc_flags & AUE_FLAG_LSYS) {
529 uint16_t auxmode;
530
531 auxmode = aue_miibus_readreg(dev, 0, 0x1b);
532 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04);
533 }
534 if (!locked)
535 AUE_UNLOCK(sc);
536 }
537
538 #define AUE_BITS 6
539 static u_int
aue_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)540 aue_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
541 {
542 uint8_t *hashtbl = arg;
543 uint32_t h;
544
545 h = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1);
546 hashtbl[(h >> 3)] |= 1 << (h & 0x7);
547
548 return (1);
549 }
550
551 static void
aue_setmulti(struct usb_ether * ue)552 aue_setmulti(struct usb_ether *ue)
553 {
554 struct aue_softc *sc = uether_getsc(ue);
555 if_t ifp = uether_getifp(ue);
556 uint32_t i;
557 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
558
559 AUE_LOCK_ASSERT(sc, MA_OWNED);
560
561 if (if_getflags(ifp) & IFF_ALLMULTI || if_getflags(ifp) & IFF_PROMISC) {
562 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
563 return;
564 }
565
566 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
567
568 /* now program new ones */
569 if_foreach_llmaddr(ifp, aue_hash_maddr, hashtbl);
570
571 /* write the hashtable */
572 for (i = 0; i != 8; i++)
573 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]);
574 }
575
576 static void
aue_reset_pegasus_II(struct aue_softc * sc)577 aue_reset_pegasus_II(struct aue_softc *sc)
578 {
579 /* Magic constants taken from Linux driver. */
580 aue_csr_write_1(sc, AUE_REG_1D, 0);
581 aue_csr_write_1(sc, AUE_REG_7B, 2);
582 #if 0
583 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode)
584 aue_csr_write_1(sc, AUE_REG_81, 6);
585 else
586 #endif
587 aue_csr_write_1(sc, AUE_REG_81, 2);
588 }
589
590 static void
aue_reset(struct aue_softc * sc)591 aue_reset(struct aue_softc *sc)
592 {
593 int i;
594
595 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC);
596
597 for (i = 0; i != AUE_TIMEOUT; i++) {
598 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC))
599 break;
600 if (uether_pause(&sc->sc_ue, hz / 100))
601 break;
602 }
603
604 if (i == AUE_TIMEOUT)
605 device_printf(sc->sc_ue.ue_dev, "reset failed\n");
606
607 /*
608 * The PHY(s) attached to the Pegasus chip may be held
609 * in reset until we flip on the GPIO outputs. Make sure
610 * to set the GPIO pins high so that the PHY(s) will
611 * be enabled.
612 *
613 * NOTE: We used to force all of the GPIO pins low first and then
614 * enable the ones we want. This has been changed to better
615 * match the ADMtek's reference design to avoid setting the
616 * power-down configuration line of the PHY at the same time
617 * it is reset.
618 */
619 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
620 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
621
622 if (sc->sc_flags & AUE_FLAG_LSYS) {
623 /* Grrr. LinkSys has to be different from everyone else. */
624 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
625 aue_csr_write_1(sc, AUE_GPIO0,
626 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
627 }
628 if (sc->sc_flags & AUE_FLAG_PII)
629 aue_reset_pegasus_II(sc);
630
631 /* Wait a little while for the chip to get its brains in order: */
632 uether_pause(&sc->sc_ue, hz / 100);
633 }
634
635 static void
aue_attach_post(struct usb_ether * ue)636 aue_attach_post(struct usb_ether *ue)
637 {
638 struct aue_softc *sc = uether_getsc(ue);
639
640 /* reset the adapter */
641 aue_reset(sc);
642
643 /* get station address from the EEPROM */
644 aue_read_mac(sc, ue->ue_eaddr);
645 }
646
647 /*
648 * Probe for a Pegasus chip.
649 */
650 static int
aue_probe(device_t dev)651 aue_probe(device_t dev)
652 {
653 struct usb_attach_arg *uaa = device_get_ivars(dev);
654
655 if (uaa->usb_mode != USB_MODE_HOST)
656 return (ENXIO);
657 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX)
658 return (ENXIO);
659 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX)
660 return (ENXIO);
661 /*
662 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict
663 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of
664 * the devices that look like Bluetooth adapters.
665 */
666 if (uaa->info.idVendor == USB_VENDOR_BELKIN &&
667 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 &&
668 uaa->info.bcdDevice == 0x0413)
669 return (ENXIO);
670
671 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa));
672 }
673
674 /*
675 * Attach the interface. Allocate softc structures, do ifmedia
676 * setup and ethernet/BPF attach.
677 */
678 static int
aue_attach(device_t dev)679 aue_attach(device_t dev)
680 {
681 struct usb_attach_arg *uaa = device_get_ivars(dev);
682 struct aue_softc *sc = device_get_softc(dev);
683 struct usb_ether *ue = &sc->sc_ue;
684 uint8_t iface_index;
685 int error;
686
687 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
688
689 if (uaa->info.bcdDevice >= 0x0201) {
690 /* XXX currently undocumented */
691 sc->sc_flags |= AUE_FLAG_VER_2;
692 }
693
694 device_set_usb_desc(dev);
695 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
696
697 iface_index = AUE_IFACE_IDX;
698 error = usbd_transfer_setup(uaa->device, &iface_index,
699 sc->sc_xfer, aue_config, AUE_N_TRANSFER,
700 sc, &sc->sc_mtx);
701 if (error) {
702 device_printf(dev, "allocating USB transfers failed\n");
703 goto detach;
704 }
705
706 ue->ue_sc = sc;
707 ue->ue_dev = dev;
708 ue->ue_udev = uaa->device;
709 ue->ue_mtx = &sc->sc_mtx;
710 ue->ue_methods = &aue_ue_methods;
711
712 error = uether_ifattach(ue);
713 if (error) {
714 device_printf(dev, "could not attach interface\n");
715 goto detach;
716 }
717 return (0); /* success */
718
719 detach:
720 aue_detach(dev);
721 return (ENXIO); /* failure */
722 }
723
724 static int
aue_detach(device_t dev)725 aue_detach(device_t dev)
726 {
727 struct aue_softc *sc = device_get_softc(dev);
728 struct usb_ether *ue = &sc->sc_ue;
729
730 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER);
731 uether_ifdetach(ue);
732 mtx_destroy(&sc->sc_mtx);
733
734 return (0);
735 }
736
737 static void
aue_intr_callback(struct usb_xfer * xfer,usb_error_t error)738 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error)
739 {
740 struct aue_softc *sc = usbd_xfer_softc(xfer);
741 if_t ifp = uether_getifp(&sc->sc_ue);
742 struct aue_intrpkt pkt;
743 struct usb_page_cache *pc;
744 int actlen;
745
746 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
747
748 switch (USB_GET_STATE(xfer)) {
749 case USB_ST_TRANSFERRED:
750
751 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) &&
752 actlen >= (int)sizeof(pkt)) {
753 pc = usbd_xfer_get_frame(xfer, 0);
754 usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
755
756 if (pkt.aue_txstat0)
757 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
758 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL |
759 AUE_TXSTAT0_EXCESSCOLL))
760 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
761 }
762 /* FALLTHROUGH */
763 case USB_ST_SETUP:
764 tr_setup:
765 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
766 usbd_transfer_submit(xfer);
767 return;
768
769 default: /* Error */
770 if (error != USB_ERR_CANCELLED) {
771 /* try to clear stall first */
772 usbd_xfer_set_stall(xfer);
773 goto tr_setup;
774 }
775 return;
776 }
777 }
778
779 static void
aue_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)780 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
781 {
782 struct aue_softc *sc = usbd_xfer_softc(xfer);
783 struct usb_ether *ue = &sc->sc_ue;
784 if_t ifp = uether_getifp(ue);
785 struct aue_rxpkt stat;
786 struct usb_page_cache *pc;
787 int actlen;
788
789 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
790 pc = usbd_xfer_get_frame(xfer, 0);
791
792 switch (USB_GET_STATE(xfer)) {
793 case USB_ST_TRANSFERRED:
794 DPRINTFN(11, "received %d bytes\n", actlen);
795
796 if (sc->sc_flags & AUE_FLAG_VER_2) {
797 if (actlen == 0) {
798 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
799 goto tr_setup;
800 }
801 } else {
802 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) {
803 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
804 goto tr_setup;
805 }
806 usbd_copy_out(pc, actlen - sizeof(stat), &stat,
807 sizeof(stat));
808
809 /*
810 * turn off all the non-error bits in the rx status
811 * word:
812 */
813 stat.aue_rxstat &= AUE_RXSTAT_MASK;
814 if (stat.aue_rxstat) {
815 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
816 goto tr_setup;
817 }
818 /* No errors; receive the packet. */
819 actlen -= (sizeof(stat) + ETHER_CRC_LEN);
820 }
821 uether_rxbuf(ue, pc, 0, actlen);
822
823 /* FALLTHROUGH */
824 case USB_ST_SETUP:
825 tr_setup:
826 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
827 usbd_transfer_submit(xfer);
828 uether_rxflush(ue);
829 return;
830
831 default: /* Error */
832 DPRINTF("bulk read error, %s\n",
833 usbd_errstr(error));
834
835 if (error != USB_ERR_CANCELLED) {
836 /* try to clear stall first */
837 usbd_xfer_set_stall(xfer);
838 goto tr_setup;
839 }
840 return;
841 }
842 }
843
844 static void
aue_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)845 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
846 {
847 struct aue_softc *sc = usbd_xfer_softc(xfer);
848 if_t ifp = uether_getifp(&sc->sc_ue);
849 struct usb_page_cache *pc;
850 struct mbuf *m;
851 uint8_t buf[2];
852 int actlen;
853
854 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
855 pc = usbd_xfer_get_frame(xfer, 0);
856
857 switch (USB_GET_STATE(xfer)) {
858 case USB_ST_TRANSFERRED:
859 DPRINTFN(11, "transfer of %d bytes complete\n", actlen);
860 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
861
862 /* FALLTHROUGH */
863 case USB_ST_SETUP:
864 tr_setup:
865 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) {
866 /*
867 * don't send anything if there is no link !
868 */
869 return;
870 }
871 m = if_dequeue(ifp);
872
873 if (m == NULL)
874 return;
875 if (m->m_pkthdr.len > MCLBYTES)
876 m->m_pkthdr.len = MCLBYTES;
877 if (sc->sc_flags & AUE_FLAG_VER_2) {
878 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len);
879
880 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len);
881
882 } else {
883 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2));
884
885 /*
886 * The ADMtek documentation says that the
887 * packet length is supposed to be specified
888 * in the first two bytes of the transfer,
889 * however it actually seems to ignore this
890 * info and base the frame size on the bulk
891 * transfer length.
892 */
893 buf[0] = (uint8_t)(m->m_pkthdr.len);
894 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8);
895
896 usbd_copy_in(pc, 0, buf, 2);
897 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len);
898 }
899
900 /*
901 * if there's a BPF listener, bounce a copy
902 * of this frame to him:
903 */
904 BPF_MTAP(ifp, m);
905
906 m_freem(m);
907
908 usbd_transfer_submit(xfer);
909 return;
910
911 default: /* Error */
912 DPRINTFN(11, "transfer error, %s\n",
913 usbd_errstr(error));
914
915 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
916
917 if (error != USB_ERR_CANCELLED) {
918 /* try to clear stall first */
919 usbd_xfer_set_stall(xfer);
920 goto tr_setup;
921 }
922 return;
923 }
924 }
925
926 static void
aue_tick(struct usb_ether * ue)927 aue_tick(struct usb_ether *ue)
928 {
929 struct aue_softc *sc = uether_getsc(ue);
930 struct mii_data *mii = GET_MII(sc);
931
932 AUE_LOCK_ASSERT(sc, MA_OWNED);
933
934 mii_tick(mii);
935 if ((sc->sc_flags & AUE_FLAG_LINK) == 0
936 && mii->mii_media_status & IFM_ACTIVE &&
937 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
938 sc->sc_flags |= AUE_FLAG_LINK;
939 aue_start(ue);
940 }
941 }
942
943 static void
aue_start(struct usb_ether * ue)944 aue_start(struct usb_ether *ue)
945 {
946 struct aue_softc *sc = uether_getsc(ue);
947
948 /*
949 * start the USB transfers, if not already started:
950 */
951 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]);
952 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]);
953 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]);
954 }
955
956 static void
aue_init(struct usb_ether * ue)957 aue_init(struct usb_ether *ue)
958 {
959 struct aue_softc *sc = uether_getsc(ue);
960 if_t ifp = uether_getifp(ue);
961 int i;
962
963 AUE_LOCK_ASSERT(sc, MA_OWNED);
964
965 /*
966 * Cancel pending I/O
967 */
968 aue_reset(sc);
969
970 /* Set MAC address */
971 for (i = 0; i != ETHER_ADDR_LEN; i++)
972 aue_csr_write_1(sc, AUE_PAR0 + i, if_getlladdr(ifp)[i]);
973
974 /* update promiscuous setting */
975 aue_setpromisc(ue);
976
977 /* Load the multicast filter. */
978 aue_setmulti(ue);
979
980 /* Enable RX and TX */
981 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);
982 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB);
983 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR);
984
985 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]);
986
987 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0);
988 aue_start(ue);
989 }
990
991 static void
aue_setpromisc(struct usb_ether * ue)992 aue_setpromisc(struct usb_ether *ue)
993 {
994 struct aue_softc *sc = uether_getsc(ue);
995 if_t ifp = uether_getifp(ue);
996
997 AUE_LOCK_ASSERT(sc, MA_OWNED);
998
999 /* if we want promiscuous mode, set the allframes bit: */
1000 if (if_getflags(ifp) & IFF_PROMISC)
1001 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
1002 else
1003 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
1004 }
1005
1006 /*
1007 * Set media options.
1008 */
1009 static int
aue_ifmedia_upd(if_t ifp)1010 aue_ifmedia_upd(if_t ifp)
1011 {
1012 struct aue_softc *sc = if_getsoftc(ifp);
1013 struct mii_data *mii = GET_MII(sc);
1014 struct mii_softc *miisc;
1015 int error;
1016
1017 AUE_LOCK_ASSERT(sc, MA_OWNED);
1018
1019 sc->sc_flags &= ~AUE_FLAG_LINK;
1020 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1021 PHY_RESET(miisc);
1022 error = mii_mediachg(mii);
1023 return (error);
1024 }
1025
1026 /*
1027 * Report current media status.
1028 */
1029 static void
aue_ifmedia_sts(if_t ifp,struct ifmediareq * ifmr)1030 aue_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
1031 {
1032 struct aue_softc *sc = if_getsoftc(ifp);
1033 struct mii_data *mii = GET_MII(sc);
1034
1035 AUE_LOCK(sc);
1036 mii_pollstat(mii);
1037 ifmr->ifm_active = mii->mii_media_active;
1038 ifmr->ifm_status = mii->mii_media_status;
1039 AUE_UNLOCK(sc);
1040 }
1041
1042 /*
1043 * Stop the adapter and free any mbufs allocated to the
1044 * RX and TX lists.
1045 */
1046 static void
aue_stop(struct usb_ether * ue)1047 aue_stop(struct usb_ether *ue)
1048 {
1049 struct aue_softc *sc = uether_getsc(ue);
1050 if_t ifp = uether_getifp(ue);
1051
1052 AUE_LOCK_ASSERT(sc, MA_OWNED);
1053
1054 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
1055 sc->sc_flags &= ~AUE_FLAG_LINK;
1056
1057 /*
1058 * stop all the transfers, if not already stopped:
1059 */
1060 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]);
1061 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]);
1062 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]);
1063
1064 aue_csr_write_1(sc, AUE_CTL0, 0);
1065 aue_csr_write_1(sc, AUE_CTL1, 0);
1066 aue_reset(sc);
1067 }
1068