1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E2 (R8A77940) SoC 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * Copyright (C) 2014 Ulrich Hecht 7 */ 8 9#include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10#include <dt-bindings/interrupt-controller/arm-gic.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/power/r8a7794-sysc.h> 13 14/ { 15 compatible = "renesas,r8a7794"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c7; 28 spi0 = &qspi; 29 vin0 = &vin0; 30 vin1 = &vin1; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clka: audio_clka { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 audio_clkb: audio_clkb { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 audio_clkc: audio_clkc { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 /* External CAN clock */ 55 can_clk: can { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 /* This value must be overridden by the board. */ 59 clock-frequency = <0>; 60 }; 61 62 cpus { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 66 cpu0: cpu@0 { 67 device_type = "cpu"; 68 compatible = "arm,cortex-a7"; 69 reg = <0>; 70 clock-frequency = <1000000000>; 71 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 72 power-domains = <&sysc R8A7794_PD_CA7_CPU0>; 73 enable-method = "renesas,apmu"; 74 next-level-cache = <&L2_CA7>; 75 }; 76 77 cpu1: cpu@1 { 78 device_type = "cpu"; 79 compatible = "arm,cortex-a7"; 80 reg = <1>; 81 clock-frequency = <1000000000>; 82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 83 power-domains = <&sysc R8A7794_PD_CA7_CPU1>; 84 enable-method = "renesas,apmu"; 85 next-level-cache = <&L2_CA7>; 86 }; 87 88 L2_CA7: cache-controller-0 { 89 compatible = "cache"; 90 power-domains = <&sysc R8A7794_PD_CA7_SCU>; 91 cache-unified; 92 cache-level = <2>; 93 }; 94 }; 95 96 /* External root clock */ 97 extal_clk: extal { 98 compatible = "fixed-clock"; 99 #clock-cells = <0>; 100 /* This value must be overridden by the board. */ 101 clock-frequency = <0>; 102 bootph-all; 103 }; 104 105 pmu { 106 compatible = "arm,cortex-a7-pmu"; 107 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 108 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 109 interrupt-affinity = <&cpu0>, <&cpu1>; 110 }; 111 112 /* External SCIF clock */ 113 scif_clk: scif { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 /* This value must be overridden by the board. */ 117 clock-frequency = <0>; 118 }; 119 120 soc { 121 compatible = "simple-bus"; 122 interrupt-parent = <&gic>; 123 bootph-all; 124 125 #address-cells = <2>; 126 #size-cells = <2>; 127 ranges; 128 129 rwdt: watchdog@e6020000 { 130 compatible = "renesas,r8a7794-wdt", 131 "renesas,rcar-gen2-wdt"; 132 reg = <0 0xe6020000 0 0x0c>; 133 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 134 clocks = <&cpg CPG_MOD 402>; 135 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 136 resets = <&cpg 402>; 137 status = "disabled"; 138 }; 139 140 gpio0: gpio@e6050000 { 141 compatible = "renesas,gpio-r8a7794", 142 "renesas,rcar-gen2-gpio"; 143 reg = <0 0xe6050000 0 0x50>; 144 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 145 #gpio-cells = <2>; 146 gpio-controller; 147 gpio-ranges = <&pfc 0 0 32>; 148 #interrupt-cells = <2>; 149 interrupt-controller; 150 clocks = <&cpg CPG_MOD 912>; 151 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 152 resets = <&cpg 912>; 153 }; 154 155 gpio1: gpio@e6051000 { 156 compatible = "renesas,gpio-r8a7794", 157 "renesas,rcar-gen2-gpio"; 158 reg = <0 0xe6051000 0 0x50>; 159 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 160 #gpio-cells = <2>; 161 gpio-controller; 162 gpio-ranges = <&pfc 0 32 26>; 163 #interrupt-cells = <2>; 164 interrupt-controller; 165 clocks = <&cpg CPG_MOD 911>; 166 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 167 resets = <&cpg 911>; 168 }; 169 170 gpio2: gpio@e6052000 { 171 compatible = "renesas,gpio-r8a7794", 172 "renesas,rcar-gen2-gpio"; 173 reg = <0 0xe6052000 0 0x50>; 174 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 175 #gpio-cells = <2>; 176 gpio-controller; 177 gpio-ranges = <&pfc 0 64 32>; 178 #interrupt-cells = <2>; 179 interrupt-controller; 180 clocks = <&cpg CPG_MOD 910>; 181 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 182 resets = <&cpg 910>; 183 }; 184 185 gpio3: gpio@e6053000 { 186 compatible = "renesas,gpio-r8a7794", 187 "renesas,rcar-gen2-gpio"; 188 reg = <0 0xe6053000 0 0x50>; 189 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 190 #gpio-cells = <2>; 191 gpio-controller; 192 gpio-ranges = <&pfc 0 96 32>; 193 #interrupt-cells = <2>; 194 interrupt-controller; 195 clocks = <&cpg CPG_MOD 909>; 196 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 197 resets = <&cpg 909>; 198 }; 199 200 gpio4: gpio@e6054000 { 201 compatible = "renesas,gpio-r8a7794", 202 "renesas,rcar-gen2-gpio"; 203 reg = <0 0xe6054000 0 0x50>; 204 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 205 #gpio-cells = <2>; 206 gpio-controller; 207 gpio-ranges = <&pfc 0 128 32>; 208 #interrupt-cells = <2>; 209 interrupt-controller; 210 clocks = <&cpg CPG_MOD 908>; 211 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 212 resets = <&cpg 908>; 213 }; 214 215 gpio5: gpio@e6055000 { 216 compatible = "renesas,gpio-r8a7794", 217 "renesas,rcar-gen2-gpio"; 218 reg = <0 0xe6055000 0 0x50>; 219 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 220 #gpio-cells = <2>; 221 gpio-controller; 222 gpio-ranges = <&pfc 0 160 28>; 223 #interrupt-cells = <2>; 224 interrupt-controller; 225 clocks = <&cpg CPG_MOD 907>; 226 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 227 resets = <&cpg 907>; 228 }; 229 230 gpio6: gpio@e6055400 { 231 compatible = "renesas,gpio-r8a7794", 232 "renesas,rcar-gen2-gpio"; 233 reg = <0 0xe6055400 0 0x50>; 234 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 235 #gpio-cells = <2>; 236 gpio-controller; 237 gpio-ranges = <&pfc 0 192 26>; 238 #interrupt-cells = <2>; 239 interrupt-controller; 240 clocks = <&cpg CPG_MOD 905>; 241 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 242 resets = <&cpg 905>; 243 }; 244 245 pfc: pinctrl@e6060000 { 246 compatible = "renesas,pfc-r8a7794"; 247 reg = <0 0xe6060000 0 0x11c>; 248 bootph-all; 249 }; 250 251 cpg: clock-controller@e6150000 { 252 compatible = "renesas,r8a7794-cpg-mssr"; 253 reg = <0 0xe6150000 0 0x1000>; 254 clocks = <&extal_clk>, <&usb_extal_clk>; 255 clock-names = "extal", "usb_extal"; 256 #clock-cells = <2>; 257 #power-domain-cells = <0>; 258 #reset-cells = <1>; 259 bootph-all; 260 }; 261 262 apmu@e6151000 { 263 compatible = "renesas,r8a7794-apmu", "renesas,apmu"; 264 reg = <0 0xe6151000 0 0x188>; 265 cpus = <&cpu0>, <&cpu1>; 266 }; 267 268 rst: reset-controller@e6160000 { 269 compatible = "renesas,r8a7794-rst"; 270 reg = <0 0xe6160000 0 0x0100>; 271 bootph-all; 272 }; 273 274 sysc: system-controller@e6180000 { 275 compatible = "renesas,r8a7794-sysc"; 276 reg = <0 0xe6180000 0 0x0200>; 277 #power-domain-cells = <1>; 278 }; 279 280 irqc0: interrupt-controller@e61c0000 { 281 compatible = "renesas,irqc-r8a7794", "renesas,irqc"; 282 #interrupt-cells = <2>; 283 interrupt-controller; 284 reg = <0 0xe61c0000 0 0x200>; 285 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 295 clocks = <&cpg CPG_MOD 407>; 296 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 297 resets = <&cpg 407>; 298 }; 299 300 tmu0: timer@e61e0000 { 301 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 302 reg = <0 0xe61e0000 0 0x30>; 303 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 306 interrupt-names = "tuni0", "tuni1", "tuni2"; 307 clocks = <&cpg CPG_MOD 125>; 308 clock-names = "fck"; 309 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 310 resets = <&cpg 125>; 311 status = "disabled"; 312 }; 313 314 tmu1: timer@fff60000 { 315 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 316 reg = <0 0xfff60000 0 0x30>; 317 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 321 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 322 clocks = <&cpg CPG_MOD 111>; 323 clock-names = "fck"; 324 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 325 resets = <&cpg 111>; 326 status = "disabled"; 327 }; 328 329 tmu2: timer@fff70000 { 330 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 331 reg = <0 0xfff70000 0 0x30>; 332 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 336 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 337 clocks = <&cpg CPG_MOD 122>; 338 clock-names = "fck"; 339 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 340 resets = <&cpg 122>; 341 status = "disabled"; 342 }; 343 344 tmu3: timer@fff80000 { 345 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 346 reg = <0 0xfff80000 0 0x30>; 347 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 350 interrupt-names = "tuni0", "tuni1", "tuni2"; 351 clocks = <&cpg CPG_MOD 121>; 352 clock-names = "fck"; 353 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 354 resets = <&cpg 121>; 355 status = "disabled"; 356 }; 357 358 ipmmu_sy0: iommu@e6280000 { 359 compatible = "renesas,ipmmu-r8a7794", 360 "renesas,ipmmu-vmsa"; 361 reg = <0 0xe6280000 0 0x1000>; 362 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 364 #iommu-cells = <1>; 365 status = "disabled"; 366 }; 367 368 ipmmu_sy1: iommu@e6290000 { 369 compatible = "renesas,ipmmu-r8a7794", 370 "renesas,ipmmu-vmsa"; 371 reg = <0 0xe6290000 0 0x1000>; 372 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 373 #iommu-cells = <1>; 374 status = "disabled"; 375 }; 376 377 ipmmu_ds: iommu@e6740000 { 378 compatible = "renesas,ipmmu-r8a7794", 379 "renesas,ipmmu-vmsa"; 380 reg = <0 0xe6740000 0 0x1000>; 381 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 383 #iommu-cells = <1>; 384 status = "disabled"; 385 }; 386 387 ipmmu_mp: iommu@ec680000 { 388 compatible = "renesas,ipmmu-r8a7794", 389 "renesas,ipmmu-vmsa"; 390 reg = <0 0xec680000 0 0x1000>; 391 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 392 #iommu-cells = <1>; 393 status = "disabled"; 394 }; 395 396 ipmmu_mx: iommu@fe951000 { 397 compatible = "renesas,ipmmu-r8a7794", 398 "renesas,ipmmu-vmsa"; 399 reg = <0 0xfe951000 0 0x1000>; 400 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 402 #iommu-cells = <1>; 403 status = "disabled"; 404 }; 405 406 ipmmu_gp: iommu@e62a0000 { 407 compatible = "renesas,ipmmu-r8a7794", 408 "renesas,ipmmu-vmsa"; 409 reg = <0 0xe62a0000 0 0x1000>; 410 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 412 #iommu-cells = <1>; 413 status = "disabled"; 414 }; 415 416 icram0: sram@e63a0000 { 417 compatible = "mmio-sram"; 418 reg = <0 0xe63a0000 0 0x12000>; 419 #address-cells = <1>; 420 #size-cells = <1>; 421 ranges = <0 0 0xe63a0000 0x12000>; 422 }; 423 424 icram1: sram@e63c0000 { 425 compatible = "mmio-sram"; 426 reg = <0 0xe63c0000 0 0x1000>; 427 #address-cells = <1>; 428 #size-cells = <1>; 429 ranges = <0 0 0xe63c0000 0x1000>; 430 431 smp-sram@0 { 432 compatible = "renesas,smp-sram"; 433 reg = <0 0x100>; 434 }; 435 }; 436 437 /* The memory map in the User's Manual maps the cores to 438 * bus numbers 439 */ 440 i2c0: i2c@e6508000 { 441 compatible = "renesas,i2c-r8a7794", 442 "renesas,rcar-gen2-i2c"; 443 reg = <0 0xe6508000 0 0x40>; 444 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 931>; 446 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 447 resets = <&cpg 931>; 448 #address-cells = <1>; 449 #size-cells = <0>; 450 i2c-scl-internal-delay-ns = <6>; 451 status = "disabled"; 452 }; 453 454 i2c1: i2c@e6518000 { 455 compatible = "renesas,i2c-r8a7794", 456 "renesas,rcar-gen2-i2c"; 457 reg = <0 0xe6518000 0 0x40>; 458 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 459 clocks = <&cpg CPG_MOD 930>; 460 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 461 resets = <&cpg 930>; 462 #address-cells = <1>; 463 #size-cells = <0>; 464 i2c-scl-internal-delay-ns = <6>; 465 status = "disabled"; 466 }; 467 468 i2c2: i2c@e6530000 { 469 compatible = "renesas,i2c-r8a7794", 470 "renesas,rcar-gen2-i2c"; 471 reg = <0 0xe6530000 0 0x40>; 472 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 473 clocks = <&cpg CPG_MOD 929>; 474 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 475 resets = <&cpg 929>; 476 #address-cells = <1>; 477 #size-cells = <0>; 478 i2c-scl-internal-delay-ns = <6>; 479 status = "disabled"; 480 }; 481 482 i2c3: i2c@e6540000 { 483 compatible = "renesas,i2c-r8a7794", 484 "renesas,rcar-gen2-i2c"; 485 reg = <0 0xe6540000 0 0x40>; 486 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 487 clocks = <&cpg CPG_MOD 928>; 488 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 489 resets = <&cpg 928>; 490 #address-cells = <1>; 491 #size-cells = <0>; 492 i2c-scl-internal-delay-ns = <6>; 493 status = "disabled"; 494 }; 495 496 i2c4: i2c@e6520000 { 497 compatible = "renesas,i2c-r8a7794", 498 "renesas,rcar-gen2-i2c"; 499 reg = <0 0xe6520000 0 0x40>; 500 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 927>; 502 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 503 resets = <&cpg 927>; 504 #address-cells = <1>; 505 #size-cells = <0>; 506 i2c-scl-internal-delay-ns = <6>; 507 status = "disabled"; 508 }; 509 510 i2c5: i2c@e6528000 { 511 compatible = "renesas,i2c-r8a7794", 512 "renesas,rcar-gen2-i2c"; 513 reg = <0 0xe6528000 0 0x40>; 514 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&cpg CPG_MOD 925>; 516 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 517 resets = <&cpg 925>; 518 #address-cells = <1>; 519 #size-cells = <0>; 520 i2c-scl-internal-delay-ns = <6>; 521 status = "disabled"; 522 }; 523 524 i2c6: i2c@e6500000 { 525 compatible = "renesas,iic-r8a7794", 526 "renesas,rcar-gen2-iic", 527 "renesas,rmobile-iic"; 528 reg = <0 0xe6500000 0 0x425>; 529 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 318>; 531 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 532 <&dmac1 0x61>, <&dmac1 0x62>; 533 dma-names = "tx", "rx", "tx", "rx"; 534 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 535 resets = <&cpg 318>; 536 #address-cells = <1>; 537 #size-cells = <0>; 538 status = "disabled"; 539 }; 540 541 i2c7: i2c@e6510000 { 542 compatible = "renesas,iic-r8a7794", 543 "renesas,rcar-gen2-iic", 544 "renesas,rmobile-iic"; 545 reg = <0 0xe6510000 0 0x425>; 546 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 547 clocks = <&cpg CPG_MOD 323>; 548 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 549 <&dmac1 0x65>, <&dmac1 0x66>; 550 dma-names = "tx", "rx", "tx", "rx"; 551 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 552 resets = <&cpg 323>; 553 #address-cells = <1>; 554 #size-cells = <0>; 555 status = "disabled"; 556 }; 557 558 hsusb: usb@e6590000 { 559 compatible = "renesas,usbhs-r8a7794", 560 "renesas,rcar-gen2-usbhs"; 561 reg = <0 0xe6590000 0 0x100>; 562 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&cpg CPG_MOD 704>; 564 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 565 resets = <&cpg 704>; 566 renesas,buswait = <4>; 567 phys = <&usb0 1>; 568 phy-names = "usb"; 569 status = "disabled"; 570 }; 571 572 usbphy: usb-phy-controller@e6590100 { 573 compatible = "renesas,usb-phy-r8a7794", 574 "renesas,rcar-gen2-usb-phy"; 575 reg = <0 0xe6590100 0 0x100>; 576 #address-cells = <1>; 577 #size-cells = <0>; 578 clocks = <&cpg CPG_MOD 704>; 579 clock-names = "usbhs"; 580 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 581 resets = <&cpg 704>; 582 status = "disabled"; 583 584 usb0: usb-phy@0 { 585 reg = <0>; 586 #phy-cells = <1>; 587 }; 588 usb2: usb-phy@2 { 589 reg = <2>; 590 #phy-cells = <1>; 591 }; 592 }; 593 594 dmac0: dma-controller@e6700000 { 595 compatible = "renesas,dmac-r8a7794", 596 "renesas,rcar-dmac"; 597 reg = <0 0xe6700000 0 0x20000>; 598 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 599 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 600 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 603 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 604 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 605 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 606 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 609 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 613 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 614 interrupt-names = "error", 615 "ch0", "ch1", "ch2", "ch3", 616 "ch4", "ch5", "ch6", "ch7", 617 "ch8", "ch9", "ch10", "ch11", 618 "ch12", "ch13", "ch14"; 619 clocks = <&cpg CPG_MOD 219>; 620 clock-names = "fck"; 621 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 622 resets = <&cpg 219>; 623 #dma-cells = <1>; 624 dma-channels = <15>; 625 }; 626 627 dmac1: dma-controller@e6720000 { 628 compatible = "renesas,dmac-r8a7794", 629 "renesas,rcar-dmac"; 630 reg = <0 0xe6720000 0 0x20000>; 631 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 633 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 634 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 635 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 647 interrupt-names = "error", 648 "ch0", "ch1", "ch2", "ch3", 649 "ch4", "ch5", "ch6", "ch7", 650 "ch8", "ch9", "ch10", "ch11", 651 "ch12", "ch13", "ch14"; 652 clocks = <&cpg CPG_MOD 218>; 653 clock-names = "fck"; 654 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 655 resets = <&cpg 218>; 656 #dma-cells = <1>; 657 dma-channels = <15>; 658 }; 659 660 avb: ethernet@e6800000 { 661 compatible = "renesas,etheravb-r8a7794", 662 "renesas,etheravb-rcar-gen2"; 663 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 664 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 665 clocks = <&cpg CPG_MOD 812>; 666 clock-names = "fck"; 667 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 668 resets = <&cpg 812>; 669 #address-cells = <1>; 670 #size-cells = <0>; 671 status = "disabled"; 672 }; 673 674 qspi: spi@e6b10000 { 675 compatible = "renesas,qspi-r8a7794", "renesas,qspi"; 676 reg = <0 0xe6b10000 0 0x2c>; 677 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 917>; 679 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 680 <&dmac1 0x17>, <&dmac1 0x18>; 681 dma-names = "tx", "rx", "tx", "rx"; 682 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 683 resets = <&cpg 917>; 684 num-cs = <1>; 685 #address-cells = <1>; 686 #size-cells = <0>; 687 status = "disabled"; 688 }; 689 690 scifa0: serial@e6c40000 { 691 compatible = "renesas,scifa-r8a7794", 692 "renesas,rcar-gen2-scifa", "renesas,scifa"; 693 reg = <0 0xe6c40000 0 64>; 694 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&cpg CPG_MOD 204>; 696 clock-names = "fck"; 697 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 698 <&dmac1 0x21>, <&dmac1 0x22>; 699 dma-names = "tx", "rx", "tx", "rx"; 700 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 701 resets = <&cpg 204>; 702 status = "disabled"; 703 }; 704 705 scifa1: serial@e6c50000 { 706 compatible = "renesas,scifa-r8a7794", 707 "renesas,rcar-gen2-scifa", "renesas,scifa"; 708 reg = <0 0xe6c50000 0 64>; 709 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 710 clocks = <&cpg CPG_MOD 203>; 711 clock-names = "fck"; 712 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 713 <&dmac1 0x25>, <&dmac1 0x26>; 714 dma-names = "tx", "rx", "tx", "rx"; 715 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 716 resets = <&cpg 203>; 717 status = "disabled"; 718 }; 719 720 scifa2: serial@e6c60000 { 721 compatible = "renesas,scifa-r8a7794", 722 "renesas,rcar-gen2-scifa", "renesas,scifa"; 723 reg = <0 0xe6c60000 0 64>; 724 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 725 clocks = <&cpg CPG_MOD 202>; 726 clock-names = "fck"; 727 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 728 <&dmac1 0x27>, <&dmac1 0x28>; 729 dma-names = "tx", "rx", "tx", "rx"; 730 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 731 resets = <&cpg 202>; 732 status = "disabled"; 733 }; 734 735 scifa3: serial@e6c70000 { 736 compatible = "renesas,scifa-r8a7794", 737 "renesas,rcar-gen2-scifa", "renesas,scifa"; 738 reg = <0 0xe6c70000 0 64>; 739 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 740 clocks = <&cpg CPG_MOD 1106>; 741 clock-names = "fck"; 742 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 743 <&dmac1 0x1b>, <&dmac1 0x1c>; 744 dma-names = "tx", "rx", "tx", "rx"; 745 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 746 resets = <&cpg 1106>; 747 status = "disabled"; 748 }; 749 750 scifa4: serial@e6c78000 { 751 compatible = "renesas,scifa-r8a7794", 752 "renesas,rcar-gen2-scifa", "renesas,scifa"; 753 reg = <0 0xe6c78000 0 64>; 754 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 755 clocks = <&cpg CPG_MOD 1107>; 756 clock-names = "fck"; 757 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 758 <&dmac1 0x1f>, <&dmac1 0x20>; 759 dma-names = "tx", "rx", "tx", "rx"; 760 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 761 resets = <&cpg 1107>; 762 status = "disabled"; 763 }; 764 765 scifa5: serial@e6c80000 { 766 compatible = "renesas,scifa-r8a7794", 767 "renesas,rcar-gen2-scifa", "renesas,scifa"; 768 reg = <0 0xe6c80000 0 64>; 769 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 770 clocks = <&cpg CPG_MOD 1108>; 771 clock-names = "fck"; 772 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 773 <&dmac1 0x23>, <&dmac1 0x24>; 774 dma-names = "tx", "rx", "tx", "rx"; 775 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 776 resets = <&cpg 1108>; 777 status = "disabled"; 778 }; 779 780 scifb0: serial@e6c20000 { 781 compatible = "renesas,scifb-r8a7794", 782 "renesas,rcar-gen2-scifb", "renesas,scifb"; 783 reg = <0 0xe6c20000 0 0x100>; 784 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 785 clocks = <&cpg CPG_MOD 206>; 786 clock-names = "fck"; 787 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 788 <&dmac1 0x3d>, <&dmac1 0x3e>; 789 dma-names = "tx", "rx", "tx", "rx"; 790 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 791 resets = <&cpg 206>; 792 status = "disabled"; 793 }; 794 795 scifb1: serial@e6c30000 { 796 compatible = "renesas,scifb-r8a7794", 797 "renesas,rcar-gen2-scifb", "renesas,scifb"; 798 reg = <0 0xe6c30000 0 0x100>; 799 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 800 clocks = <&cpg CPG_MOD 207>; 801 clock-names = "fck"; 802 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 803 <&dmac1 0x19>, <&dmac1 0x1a>; 804 dma-names = "tx", "rx", "tx", "rx"; 805 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 806 resets = <&cpg 207>; 807 status = "disabled"; 808 }; 809 810 scifb2: serial@e6ce0000 { 811 compatible = "renesas,scifb-r8a7794", 812 "renesas,rcar-gen2-scifb", "renesas,scifb"; 813 reg = <0 0xe6ce0000 0 0x100>; 814 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 815 clocks = <&cpg CPG_MOD 216>; 816 clock-names = "fck"; 817 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 818 <&dmac1 0x1d>, <&dmac1 0x1e>; 819 dma-names = "tx", "rx", "tx", "rx"; 820 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 821 resets = <&cpg 216>; 822 status = "disabled"; 823 }; 824 825 scif0: serial@e6e60000 { 826 compatible = "renesas,scif-r8a7794", 827 "renesas,rcar-gen2-scif", 828 "renesas,scif"; 829 reg = <0 0xe6e60000 0 64>; 830 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 831 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 832 <&scif_clk>; 833 clock-names = "fck", "brg_int", "scif_clk"; 834 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 835 <&dmac1 0x29>, <&dmac1 0x2a>; 836 dma-names = "tx", "rx", "tx", "rx"; 837 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 838 resets = <&cpg 721>; 839 status = "disabled"; 840 }; 841 842 scif1: serial@e6e68000 { 843 compatible = "renesas,scif-r8a7794", 844 "renesas,rcar-gen2-scif", 845 "renesas,scif"; 846 reg = <0 0xe6e68000 0 64>; 847 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 848 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 849 <&scif_clk>; 850 clock-names = "fck", "brg_int", "scif_clk"; 851 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 852 <&dmac1 0x2d>, <&dmac1 0x2e>; 853 dma-names = "tx", "rx", "tx", "rx"; 854 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 855 resets = <&cpg 720>; 856 status = "disabled"; 857 }; 858 859 scif2: serial@e6e58000 { 860 compatible = "renesas,scif-r8a7794", 861 "renesas,rcar-gen2-scif", "renesas,scif"; 862 reg = <0 0xe6e58000 0 64>; 863 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 864 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 865 <&scif_clk>; 866 clock-names = "fck", "brg_int", "scif_clk"; 867 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 868 <&dmac1 0x2b>, <&dmac1 0x2c>; 869 dma-names = "tx", "rx", "tx", "rx"; 870 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 871 resets = <&cpg 719>; 872 status = "disabled"; 873 }; 874 875 scif3: serial@e6ea8000 { 876 compatible = "renesas,scif-r8a7794", 877 "renesas,rcar-gen2-scif", "renesas,scif"; 878 reg = <0 0xe6ea8000 0 64>; 879 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 880 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 881 <&scif_clk>; 882 clock-names = "fck", "brg_int", "scif_clk"; 883 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 884 <&dmac1 0x2f>, <&dmac1 0x30>; 885 dma-names = "tx", "rx", "tx", "rx"; 886 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 887 resets = <&cpg 718>; 888 status = "disabled"; 889 }; 890 891 scif4: serial@e6ee0000 { 892 compatible = "renesas,scif-r8a7794", 893 "renesas,rcar-gen2-scif", "renesas,scif"; 894 reg = <0 0xe6ee0000 0 64>; 895 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 896 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 897 <&scif_clk>; 898 clock-names = "fck", "brg_int", "scif_clk"; 899 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 900 <&dmac1 0xfb>, <&dmac1 0xfc>; 901 dma-names = "tx", "rx", "tx", "rx"; 902 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 903 resets = <&cpg 715>; 904 status = "disabled"; 905 }; 906 907 scif5: serial@e6ee8000 { 908 compatible = "renesas,scif-r8a7794", 909 "renesas,rcar-gen2-scif", "renesas,scif"; 910 reg = <0 0xe6ee8000 0 64>; 911 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 912 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 913 <&scif_clk>; 914 clock-names = "fck", "brg_int", "scif_clk"; 915 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 916 <&dmac1 0xfd>, <&dmac1 0xfe>; 917 dma-names = "tx", "rx", "tx", "rx"; 918 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 919 resets = <&cpg 714>; 920 status = "disabled"; 921 }; 922 923 hscif0: serial@e62c0000 { 924 compatible = "renesas,hscif-r8a7794", 925 "renesas,rcar-gen2-hscif", "renesas,hscif"; 926 reg = <0 0xe62c0000 0 96>; 927 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 928 clocks = <&cpg CPG_MOD 717>, 929 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 930 clock-names = "fck", "brg_int", "scif_clk"; 931 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 932 <&dmac1 0x39>, <&dmac1 0x3a>; 933 dma-names = "tx", "rx", "tx", "rx"; 934 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 935 resets = <&cpg 717>; 936 status = "disabled"; 937 }; 938 939 hscif1: serial@e62c8000 { 940 compatible = "renesas,hscif-r8a7794", 941 "renesas,rcar-gen2-hscif", "renesas,hscif"; 942 reg = <0 0xe62c8000 0 96>; 943 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 944 clocks = <&cpg CPG_MOD 716>, 945 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 946 clock-names = "fck", "brg_int", "scif_clk"; 947 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 948 <&dmac1 0x4d>, <&dmac1 0x4e>; 949 dma-names = "tx", "rx", "tx", "rx"; 950 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 951 resets = <&cpg 716>; 952 status = "disabled"; 953 }; 954 955 hscif2: serial@e62d0000 { 956 compatible = "renesas,hscif-r8a7794", 957 "renesas,rcar-gen2-hscif", "renesas,hscif"; 958 reg = <0 0xe62d0000 0 96>; 959 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 960 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 961 <&scif_clk>; 962 clock-names = "fck", "brg_int", "scif_clk"; 963 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 964 <&dmac1 0x3b>, <&dmac1 0x3c>; 965 dma-names = "tx", "rx", "tx", "rx"; 966 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 967 resets = <&cpg 713>; 968 status = "disabled"; 969 }; 970 971 can0: can@e6e80000 { 972 compatible = "renesas,can-r8a7794", 973 "renesas,rcar-gen2-can"; 974 reg = <0 0xe6e80000 0 0x1000>; 975 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 977 <&can_clk>; 978 clock-names = "clkp1", "clkp2", "can_clk"; 979 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 980 resets = <&cpg 916>; 981 status = "disabled"; 982 }; 983 984 can1: can@e6e88000 { 985 compatible = "renesas,can-r8a7794", 986 "renesas,rcar-gen2-can"; 987 reg = <0 0xe6e88000 0 0x1000>; 988 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 989 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 990 <&can_clk>; 991 clock-names = "clkp1", "clkp2", "can_clk"; 992 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 993 resets = <&cpg 915>; 994 status = "disabled"; 995 }; 996 997 vin0: video@e6ef0000 { 998 compatible = "renesas,vin-r8a7794", 999 "renesas,rcar-gen2-vin"; 1000 reg = <0 0xe6ef0000 0 0x1000>; 1001 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1002 clocks = <&cpg CPG_MOD 811>; 1003 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1004 resets = <&cpg 811>; 1005 status = "disabled"; 1006 }; 1007 1008 vin1: video@e6ef1000 { 1009 compatible = "renesas,vin-r8a7794", 1010 "renesas,rcar-gen2-vin"; 1011 reg = <0 0xe6ef1000 0 0x1000>; 1012 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1013 clocks = <&cpg CPG_MOD 810>; 1014 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1015 resets = <&cpg 810>; 1016 status = "disabled"; 1017 }; 1018 1019 rcar_sound: sound@ec500000 { 1020 /* 1021 * #sound-dai-cells is required if simple-card 1022 * 1023 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1024 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1025 */ 1026 compatible = "renesas,rcar_sound-r8a7794", 1027 "renesas,rcar_sound-gen2"; 1028 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1029 <0 0xec5a0000 0 0x100>, /* ADG */ 1030 <0 0xec540000 0 0x1000>, /* SSIU */ 1031 <0 0xec541000 0 0x280>, /* SSI */ 1032 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 1033 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1034 1035 clocks = <&cpg CPG_MOD 1005>, 1036 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1037 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1038 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1039 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1040 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1041 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1042 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 1043 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 1044 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1045 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1046 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1047 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 1048 <&cpg CPG_CORE R8A7794_CLK_M2>; 1049 clock-names = "ssi-all", 1050 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1051 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1052 "ssi.1", "ssi.0", 1053 "src.6", "src.5", "src.4", "src.3", 1054 "src.2", "src.1", 1055 "ctu.0", "ctu.1", 1056 "mix.0", "mix.1", 1057 "dvc.0", "dvc.1", 1058 "clk_a", "clk_b", "clk_c", "clk_i"; 1059 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1060 resets = <&cpg 1005>, 1061 <&cpg 1006>, <&cpg 1007>, 1062 <&cpg 1008>, <&cpg 1009>, 1063 <&cpg 1010>, <&cpg 1011>, 1064 <&cpg 1012>, <&cpg 1013>, 1065 <&cpg 1014>, <&cpg 1015>; 1066 reset-names = "ssi-all", 1067 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1068 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1069 "ssi.1", "ssi.0"; 1070 1071 status = "disabled"; 1072 1073 rcar_sound,dvc { 1074 dvc0: dvc-0 { 1075 dmas = <&audma0 0xbc>; 1076 dma-names = "tx"; 1077 }; 1078 dvc1: dvc-1 { 1079 dmas = <&audma0 0xbe>; 1080 dma-names = "tx"; 1081 }; 1082 }; 1083 1084 rcar_sound,mix { 1085 mix0: mix-0 { }; 1086 mix1: mix-1 { }; 1087 }; 1088 1089 rcar_sound,ctu { 1090 ctu00: ctu-0 { }; 1091 ctu01: ctu-1 { }; 1092 ctu02: ctu-2 { }; 1093 ctu03: ctu-3 { }; 1094 ctu10: ctu-4 { }; 1095 ctu11: ctu-5 { }; 1096 ctu12: ctu-6 { }; 1097 ctu13: ctu-7 { }; 1098 }; 1099 1100 rcar_sound,src { 1101 src-0 { 1102 status = "disabled"; 1103 }; 1104 src1: src-1 { 1105 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1106 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1107 dma-names = "rx", "tx"; 1108 }; 1109 src2: src-2 { 1110 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1111 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1112 dma-names = "rx", "tx"; 1113 }; 1114 src3: src-3 { 1115 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1116 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1117 dma-names = "rx", "tx"; 1118 }; 1119 src4: src-4 { 1120 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1121 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1122 dma-names = "rx", "tx"; 1123 }; 1124 src5: src-5 { 1125 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1126 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1127 dma-names = "rx", "tx"; 1128 }; 1129 src6: src-6 { 1130 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1131 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1132 dma-names = "rx", "tx"; 1133 }; 1134 }; 1135 1136 rcar_sound,ssi { 1137 ssi0: ssi-0 { 1138 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1139 dmas = <&audma0 0x01>, <&audma0 0x02>, 1140 <&audma0 0x15>, <&audma0 0x16>; 1141 dma-names = "rx", "tx", "rxu", "txu"; 1142 }; 1143 ssi1: ssi-1 { 1144 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1145 dmas = <&audma0 0x03>, <&audma0 0x04>, 1146 <&audma0 0x49>, <&audma0 0x4a>; 1147 dma-names = "rx", "tx", "rxu", "txu"; 1148 }; 1149 ssi2: ssi-2 { 1150 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1151 dmas = <&audma0 0x05>, <&audma0 0x06>, 1152 <&audma0 0x63>, <&audma0 0x64>; 1153 dma-names = "rx", "tx", "rxu", "txu"; 1154 }; 1155 ssi3: ssi-3 { 1156 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1157 dmas = <&audma0 0x07>, <&audma0 0x08>, 1158 <&audma0 0x6f>, <&audma0 0x70>; 1159 dma-names = "rx", "tx", "rxu", "txu"; 1160 }; 1161 ssi4: ssi-4 { 1162 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1163 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1164 <&audma0 0x71>, <&audma0 0x72>; 1165 dma-names = "rx", "tx", "rxu", "txu"; 1166 }; 1167 ssi5: ssi-5 { 1168 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1169 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1170 <&audma0 0x73>, <&audma0 0x74>; 1171 dma-names = "rx", "tx", "rxu", "txu"; 1172 }; 1173 ssi6: ssi-6 { 1174 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1175 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1176 <&audma0 0x75>, <&audma0 0x76>; 1177 dma-names = "rx", "tx", "rxu", "txu"; 1178 }; 1179 ssi7: ssi-7 { 1180 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1181 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1182 <&audma0 0x79>, <&audma0 0x7a>; 1183 dma-names = "rx", "tx", "rxu", "txu"; 1184 }; 1185 ssi8: ssi-8 { 1186 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1187 dmas = <&audma0 0x11>, <&audma0 0x12>, 1188 <&audma0 0x7b>, <&audma0 0x7c>; 1189 dma-names = "rx", "tx", "rxu", "txu"; 1190 }; 1191 ssi9: ssi-9 { 1192 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1193 dmas = <&audma0 0x13>, <&audma0 0x14>, 1194 <&audma0 0x7d>, <&audma0 0x7e>; 1195 dma-names = "rx", "tx", "rxu", "txu"; 1196 }; 1197 }; 1198 }; 1199 1200 audma0: dma-controller@ec700000 { 1201 compatible = "renesas,dmac-r8a7794", 1202 "renesas,rcar-dmac"; 1203 reg = <0 0xec700000 0 0x10000>; 1204 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1205 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1206 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1207 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1208 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1209 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1210 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1211 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1212 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1213 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1214 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1215 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1216 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1217 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1218 interrupt-names = "error", 1219 "ch0", "ch1", "ch2", "ch3", "ch4", 1220 "ch5", "ch6", "ch7", "ch8", "ch9", 1221 "ch10", "ch11", 1222 "ch12"; 1223 clocks = <&cpg CPG_MOD 502>; 1224 clock-names = "fck"; 1225 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1226 resets = <&cpg 502>; 1227 #dma-cells = <1>; 1228 dma-channels = <13>; 1229 }; 1230 1231 pci0: pci@ee090000 { 1232 compatible = "renesas,pci-r8a7794", 1233 "renesas,pci-rcar-gen2"; 1234 device_type = "pci"; 1235 reg = <0 0xee090000 0 0xc00>, 1236 <0 0xee080000 0 0x1100>; 1237 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1238 clocks = <&cpg CPG_MOD 703>; 1239 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1240 resets = <&cpg 703>; 1241 status = "disabled"; 1242 1243 bus-range = <0 0>; 1244 #address-cells = <3>; 1245 #size-cells = <2>; 1246 #interrupt-cells = <1>; 1247 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1248 interrupt-map-mask = <0xf800 0 0 0x7>; 1249 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1250 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1251 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1252 1253 usb@1,0 { 1254 reg = <0x800 0 0 0 0>; 1255 phys = <&usb0 0>; 1256 phy-names = "usb"; 1257 }; 1258 1259 usb@2,0 { 1260 reg = <0x1000 0 0 0 0>; 1261 phys = <&usb0 0>; 1262 phy-names = "usb"; 1263 }; 1264 }; 1265 1266 pci1: pci@ee0d0000 { 1267 compatible = "renesas,pci-r8a7794", 1268 "renesas,pci-rcar-gen2"; 1269 device_type = "pci"; 1270 reg = <0 0xee0d0000 0 0xc00>, 1271 <0 0xee0c0000 0 0x1100>; 1272 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1273 clocks = <&cpg CPG_MOD 703>; 1274 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1275 resets = <&cpg 703>; 1276 status = "disabled"; 1277 1278 bus-range = <1 1>; 1279 #address-cells = <3>; 1280 #size-cells = <2>; 1281 #interrupt-cells = <1>; 1282 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1283 interrupt-map-mask = <0xf800 0 0 0x7>; 1284 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1285 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1286 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1287 1288 usb@1,0 { 1289 reg = <0x10800 0 0 0 0>; 1290 phys = <&usb2 0>; 1291 phy-names = "usb"; 1292 }; 1293 1294 usb@2,0 { 1295 reg = <0x11000 0 0 0 0>; 1296 phys = <&usb2 0>; 1297 phy-names = "usb"; 1298 }; 1299 }; 1300 1301 sdhi0: mmc@ee100000 { 1302 compatible = "renesas,sdhi-r8a7794", 1303 "renesas,rcar-gen2-sdhi"; 1304 reg = <0 0xee100000 0 0x328>; 1305 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1306 clocks = <&cpg CPG_MOD 314>; 1307 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1308 <&dmac1 0xcd>, <&dmac1 0xce>; 1309 dma-names = "tx", "rx", "tx", "rx"; 1310 max-frequency = <195000000>; 1311 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1312 resets = <&cpg 314>; 1313 status = "disabled"; 1314 }; 1315 1316 sdhi1: mmc@ee140000 { 1317 compatible = "renesas,sdhi-r8a7794", 1318 "renesas,rcar-gen2-sdhi"; 1319 reg = <0 0xee140000 0 0x100>; 1320 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 312>; 1322 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1323 <&dmac1 0xc1>, <&dmac1 0xc2>; 1324 dma-names = "tx", "rx", "tx", "rx"; 1325 max-frequency = <97500000>; 1326 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1327 resets = <&cpg 312>; 1328 status = "disabled"; 1329 }; 1330 1331 sdhi2: mmc@ee160000 { 1332 compatible = "renesas,sdhi-r8a7794", 1333 "renesas,rcar-gen2-sdhi"; 1334 reg = <0 0xee160000 0 0x100>; 1335 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1336 clocks = <&cpg CPG_MOD 311>; 1337 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1338 <&dmac1 0xd3>, <&dmac1 0xd4>; 1339 dma-names = "tx", "rx", "tx", "rx"; 1340 max-frequency = <97500000>; 1341 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1342 resets = <&cpg 311>; 1343 status = "disabled"; 1344 }; 1345 1346 mmcif0: mmc@ee200000 { 1347 compatible = "renesas,mmcif-r8a7794", 1348 "renesas,sh-mmcif"; 1349 reg = <0 0xee200000 0 0x80>; 1350 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1351 clocks = <&cpg CPG_MOD 315>; 1352 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1353 <&dmac1 0xd1>, <&dmac1 0xd2>; 1354 dma-names = "tx", "rx", "tx", "rx"; 1355 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1356 resets = <&cpg 315>; 1357 status = "disabled"; 1358 }; 1359 1360 ether: ethernet@ee700000 { 1361 compatible = "renesas,ether-r8a7794", 1362 "renesas,rcar-gen2-ether"; 1363 reg = <0 0xee700000 0 0x400>; 1364 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1365 clocks = <&cpg CPG_MOD 813>; 1366 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1367 resets = <&cpg 813>; 1368 phy-mode = "rmii"; 1369 #address-cells = <1>; 1370 #size-cells = <0>; 1371 status = "disabled"; 1372 }; 1373 1374 gic: interrupt-controller@f1001000 { 1375 compatible = "arm,gic-400"; 1376 #interrupt-cells = <3>; 1377 #address-cells = <0>; 1378 interrupt-controller; 1379 reg = <0 0xf1001000 0 0x1000>, 1380 <0 0xf1002000 0 0x2000>, 1381 <0 0xf1004000 0 0x2000>, 1382 <0 0xf1006000 0 0x2000>; 1383 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1384 clocks = <&cpg CPG_MOD 408>; 1385 clock-names = "clk"; 1386 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1387 resets = <&cpg 408>; 1388 }; 1389 1390 vsp@fe928000 { 1391 compatible = "renesas,vsp1"; 1392 reg = <0 0xfe928000 0 0x8000>; 1393 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1394 clocks = <&cpg CPG_MOD 131>; 1395 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1396 resets = <&cpg 131>; 1397 }; 1398 1399 vsp@fe930000 { 1400 compatible = "renesas,vsp1"; 1401 reg = <0 0xfe930000 0 0x8000>; 1402 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1403 clocks = <&cpg CPG_MOD 128>; 1404 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1405 resets = <&cpg 128>; 1406 }; 1407 1408 fdp1@fe940000 { 1409 compatible = "renesas,fdp1"; 1410 reg = <0 0xfe940000 0 0x2400>; 1411 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1412 clocks = <&cpg CPG_MOD 119>; 1413 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1414 resets = <&cpg 119>; 1415 }; 1416 1417 du: display@feb00000 { 1418 compatible = "renesas,du-r8a7794"; 1419 reg = <0 0xfeb00000 0 0x40000>; 1420 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1421 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1422 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1423 clock-names = "du.0", "du.1"; 1424 resets = <&cpg 724>; 1425 reset-names = "du.0"; 1426 status = "disabled"; 1427 1428 ports { 1429 #address-cells = <1>; 1430 #size-cells = <0>; 1431 1432 port@0 { 1433 reg = <0>; 1434 du_out_rgb0: endpoint { 1435 }; 1436 }; 1437 port@1 { 1438 reg = <1>; 1439 du_out_rgb1: endpoint { 1440 }; 1441 }; 1442 }; 1443 }; 1444 1445 prr: chipid@ff000044 { 1446 compatible = "renesas,prr"; 1447 reg = <0 0xff000044 0 4>; 1448 bootph-all; 1449 }; 1450 1451 cmt0: timer@ffca0000 { 1452 compatible = "renesas,r8a7794-cmt0", 1453 "renesas,rcar-gen2-cmt0"; 1454 reg = <0 0xffca0000 0 0x1004>; 1455 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1456 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 124>; 1458 clock-names = "fck"; 1459 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1460 resets = <&cpg 124>; 1461 1462 status = "disabled"; 1463 }; 1464 1465 cmt1: timer@e6130000 { 1466 compatible = "renesas,r8a7794-cmt1", 1467 "renesas,rcar-gen2-cmt1"; 1468 reg = <0 0xe6130000 0 0x1004>; 1469 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1470 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1471 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1472 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1473 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1474 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1475 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1476 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1477 clocks = <&cpg CPG_MOD 329>; 1478 clock-names = "fck"; 1479 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1480 resets = <&cpg 329>; 1481 1482 status = "disabled"; 1483 }; 1484 }; 1485 1486 timer { 1487 compatible = "arm,armv7-timer"; 1488 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1489 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1490 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1491 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1492 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 1493 }; 1494 1495 /* External USB clock - can be overridden by the board */ 1496 usb_extal_clk: usb_extal { 1497 compatible = "fixed-clock"; 1498 #clock-cells = <0>; 1499 clock-frequency = <48000000>; 1500 bootph-all; 1501 }; 1502}; 1503