1 /*****************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
3
4 Copyright (c) 2001-2017, Intel Corporation
5 All rights reserved.
6
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
9
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12
13 2. Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
15 documentation and/or other materials provided with the distribution.
16
17 3. Neither the name of the Intel Corporation nor the names of its
18 contributors may be used to endorse or promote products derived from
19 this software without specific prior written permission.
20
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32
33 *****************************************************************************/
34
35 #ifndef _IXGBE_H_
36 #define _IXGBE_H_
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/buf_ring.h>
41 #include <sys/mbuf.h>
42 #include <sys/protosw.h>
43 #include <sys/socket.h>
44 #include <sys/malloc.h>
45 #include <sys/kernel.h>
46 #include <sys/module.h>
47 #include <sys/sockio.h>
48 #include <sys/eventhandler.h>
49 #include <sys/priv.h>
50
51 #include <net/if.h>
52 #include <net/if_var.h>
53 #include <net/if_arp.h>
54 #include <net/bpf.h>
55 #include <net/ethernet.h>
56 #include <net/if_dl.h>
57 #include <net/if_media.h>
58
59 #include <net/if_types.h>
60 #include <net/if_vlan_var.h>
61 #include <net/iflib.h>
62
63 #include <netinet/in_systm.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
66
67 #include <sys/bus.h>
68 #include <machine/bus.h>
69 #include <sys/rman.h>
70 #include <machine/resource.h>
71 #include <vm/vm.h>
72 #include <vm/pmap.h>
73 #include <machine/clock.h>
74 #include <dev/pci/pcivar.h>
75 #include <dev/pci/pcireg.h>
76 #include <sys/proc.h>
77 #include <sys/sysctl.h>
78 #include <sys/endian.h>
79 #include <sys/gtaskqueue.h>
80 #include <sys/pcpu.h>
81 #include <sys/smp.h>
82 #include <machine/smp.h>
83 #include <sys/sbuf.h>
84
85 #include "ixgbe_api.h"
86 #include "ixgbe_common.h"
87 #include "ixgbe_phy.h"
88 #include "ixgbe_vf.h"
89 #include "ixgbe_features.h"
90 #include "ixgbe_e610.h"
91
92 /* Tunables */
93
94 /*
95 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
96 * number of transmit descriptors allocated by the driver. Increasing this
97 * value allows the driver to queue more transmits. Each descriptor is 16
98 * bytes. Performance tests have show the 2K value to be optimal for top
99 * performance.
100 */
101 #define DEFAULT_TXD 2048
102 #define PERFORM_TXD 2048
103 #define MAX_TXD 4096
104 #define MIN_TXD 64
105
106 /*
107 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
108 * number of receive descriptors allocated for each RX queue. Increasing this
109 * value allows the driver to buffer more incoming packets. Each descriptor
110 * is 16 bytes. A receive buffer is also allocated for each descriptor.
111 *
112 * Note: with 8 rings and a dual port card, it is possible to bump up
113 * against the system mbuf pool limit, you can tune nmbclusters
114 * to adjust for this.
115 */
116 #define DEFAULT_RXD 2048
117 #define PERFORM_RXD 2048
118 #define MAX_RXD 4096
119 #define MIN_RXD 64
120
121 /* Alignment for rings */
122 #define DBA_ALIGN 128
123
124 /*
125 * This is the max watchdog interval, ie. the time that can
126 * pass between any two TX clean operations, such only happening
127 * when the TX hardware is functioning.
128 */
129 #define IXGBE_WATCHDOG (10 * hz)
130
131 /*
132 * This parameters control when the driver calls the routine to reclaim
133 * transmit descriptors.
134 */
135 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8)
136 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32)
137
138 /* These defines are used in MTU calculations */
139 #define IXGBE_MAX_FRAME_SIZE 9728
140 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN)
141 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \
142 ETHER_VLAN_ENCAP_LEN)
143 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
144 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
145
146 /* Flow control constants */
147 #define IXGBE_FC_PAUSE 0xFFFF
148 #define IXGBE_FC_HI 0x20000
149 #define IXGBE_FC_LO 0x10000
150
151 /*
152 * Used for optimizing small rx mbufs. Effort is made to keep the copy
153 * small and aligned for the CPU L1 cache.
154 *
155 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
156 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
157 * wasted. Getting 64 byte alignment, which _should_ be ideal for
158 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
159 * in observed efficiency of the optimization, 97.9% -> 81.8%.
160 */
161 #define IXGBE_MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr))
162
163 #define IXGBE_RX_COPY_HDR_PADDED ((((IXGBE_MPKTHSIZE - 1) / 32) + 1) * 32)
164 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
165 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - IXGBE_MPKTHSIZE)
166
167 /* Defines for printing debug information */
168 #define DEBUG_INIT 0
169 #define DEBUG_IOCTL 0
170 #define DEBUG_HW 0
171
172 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
173 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
174 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
175 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
176 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
177 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
178 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
179 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
180 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
181
182 #define MAX_NUM_MULTICAST_ADDRESSES 128
183 #define IXGBE_82598_SCATTER 100
184 #define IXGBE_82599_SCATTER 32
185 #define IXGBE_TSO_SIZE 262140
186 #define IXGBE_RX_HDR 128
187 #define IXGBE_VFTA_SIZE 128
188 #define IXGBE_BR_SIZE 4096
189 #define IXGBE_QUEUE_MIN_FREE 32
190 #define IXGBE_MAX_TX_BUSY 10
191 #define IXGBE_QUEUE_HUNG 0x80000000
192
193 #define IXGBE_EITR_DEFAULT 128
194
195 /* Supported offload bits in mbuf flag */
196 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
197 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
198 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
199
200 /* All BASE-T Physical layers */
201 #define IXGBE_PHYSICAL_LAYERS_BASE_T_ALL \
202 (IXGBE_PHYSICAL_LAYER_10GBASE_T |\
203 IXGBE_PHYSICAL_LAYER_5000BASE_T |\
204 IXGBE_PHYSICAL_LAYER_2500BASE_T |\
205 IXGBE_PHYSICAL_LAYER_1000BASE_T |\
206 IXGBE_PHYSICAL_LAYER_100BASE_TX |\
207 IXGBE_PHYSICAL_LAYER_10BASE_T)
208
209 #define IXGBE_CAPS (IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_TSO | \
210 IFCAP_LRO | IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO | \
211 IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU | \
212 IFCAP_VLAN_HWFILTER | IFCAP_WOL)
213
214 #ifndef DEVMETHOD_END
215 #define DEVMETHOD_END { NULL, NULL }
216 #endif
217
218 /*
219 * Interrupt Moderation parameters
220 */
221 #define IXGBE_LOW_LATENCY 128
222 #define IXGBE_AVE_LATENCY 400
223 #define IXGBE_BULK_LATENCY 1200
224
225 /* Using 1FF (the max value), the interval is ~1.05ms */
226 #define IXGBE_LINK_ITR_QUANTA 0x1FF
227 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \
228 IXGBE_EITR_ITR_INT_MASK)
229
230
231 /************************************************************************
232 * vendor_info_array
233 *
234 * Contains the list of Subvendor/Subdevice IDs on
235 * which the driver should load.
236 ************************************************************************/
237 typedef struct _ixgbe_vendor_info_t {
238 unsigned int vendor_id;
239 unsigned int device_id;
240 unsigned int subvendor_id;
241 unsigned int subdevice_id;
242 unsigned int index;
243 } ixgbe_vendor_info_t;
244
245 struct ixgbe_bp_data {
246 u32 low;
247 u32 high;
248 u32 log;
249 };
250
251
252 /*
253 */
254 struct ixgbe_dma_alloc {
255 bus_addr_t dma_paddr;
256 caddr_t dma_vaddr;
257 bus_dma_tag_t dma_tag;
258 bus_dmamap_t dma_map;
259 bus_dma_segment_t dma_seg;
260 bus_size_t dma_size;
261 int dma_nseg;
262 };
263
264 struct ixgbe_mc_addr {
265 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
266 u32 vmdq;
267 };
268
269 /*
270 * The transmit ring, one per queue
271 */
272 struct tx_ring {
273 struct ixgbe_softc *sc;
274 union ixgbe_adv_tx_desc *tx_base;
275 uint64_t tx_paddr;
276 u32 tail;
277 qidx_t *tx_rsq;
278 qidx_t tx_rs_cidx;
279 qidx_t tx_rs_pidx;
280 qidx_t tx_cidx_processed;
281 uint8_t me;
282
283 /* Flow Director */
284 u16 atr_sample;
285 u16 atr_count;
286
287 u32 bytes; /* used for AIM */
288 u32 packets;
289 /* Soft Stats */
290 u64 tso_tx;
291 u64 total_packets;
292 };
293
294
295 /*
296 * The Receive ring, one per rx queue
297 */
298 struct rx_ring {
299 struct ix_rx_queue *que;
300 struct ixgbe_softc *sc;
301 u32 me;
302 u32 tail;
303 union ixgbe_adv_rx_desc *rx_base;
304 bool hw_rsc;
305 bool vtag_strip;
306 uint64_t rx_paddr;
307 bus_dma_tag_t ptag;
308
309 u32 bytes; /* Used for AIM calc */
310 u32 packets;
311
312 /* Soft stats */
313 u64 rx_irq;
314 u64 rx_copies;
315 u64 rx_packets;
316 u64 rx_bytes;
317 u64 rx_discarded;
318 u64 rsc_num;
319
320 /* Flow Director */
321 u64 flm;
322 };
323
324 /*
325 * Driver queue struct: this is the interrupt container
326 * for the associated tx and rx ring.
327 */
328 struct ix_rx_queue {
329 struct ixgbe_softc *sc;
330 u32 msix; /* This queue's MSIX vector */
331 u32 eitr_setting;
332 struct resource *res;
333 void *tag;
334 int busy;
335 struct rx_ring rxr;
336 struct if_irq que_irq;
337 u64 irqs;
338 };
339
340 struct ix_tx_queue {
341 struct ixgbe_softc *sc;
342 u32 msix; /* This queue's MSIX vector */
343 struct tx_ring txr;
344 };
345
346 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */
347
348 struct ixgbe_vf {
349 u_int pool;
350 u_int rar_index;
351 u_int maximum_frame_size;
352 uint32_t flags;
353 uint8_t ether_addr[ETHER_ADDR_LEN];
354 uint16_t mc_hash[IXGBE_MAX_VF_MC];
355 uint16_t num_mc_hashes;
356 uint16_t default_vlan;
357 uint16_t vlan_tag;
358 uint16_t api_ver;
359 };
360
361 /* Our softc structure */
362 struct ixgbe_softc {
363 struct ixgbe_hw hw;
364 struct ixgbe_osdep osdep;
365 if_ctx_t ctx;
366 if_softc_ctx_t shared;
367 #define num_tx_queues shared->isc_ntxqsets
368 #define num_rx_queues shared->isc_nrxqsets
369 #define max_frame_size shared->isc_max_frame_size
370 #define intr_type shared->isc_intr
371
372 device_t dev;
373 struct ifnet *ifp;
374
375 struct resource *pci_mem;
376
377 /*
378 * Interrupt resources: this set is
379 * either used for legacy, or for Link
380 * when doing MSI-X
381 */
382 struct if_irq irq;
383 void *tag;
384 struct resource *res;
385
386 struct ifmedia *media;
387 int if_flags;
388 int msix;
389
390 u16 num_vlans;
391
392 /*
393 * Shadow VFTA table, this is needed because
394 * the real vlan filter table gets cleared during
395 * a soft reset and the driver needs to be able
396 * to repopulate it.
397 */
398 u32 shadow_vfta[IXGBE_VFTA_SIZE];
399
400 /* Info about the interface */
401 int advertise; /* link speeds */
402 int enable_aim; /* adaptive interrupt moderation */
403 bool link_active;
404 u16 num_segs;
405 u32 link_speed;
406 bool link_up;
407 bool link_enabled;
408 u32 vector;
409 u16 dmac;
410 u32 phy_layer;
411
412 /* Power management-related */
413 bool wol_support;
414 u32 wufc;
415
416 /* Mbuf cluster size */
417 u32 rx_mbuf_sz;
418
419 /* Support for pluggable optics */
420 bool sfp_probe;
421
422 /* Flow Director */
423 int fdir_reinit;
424
425 u32 task_requests;
426
427 /*
428 * Queues:
429 * This is the irq holder, it has
430 * and RX/TX pair or rings associated
431 * with it.
432 */
433 struct ix_tx_queue *tx_queues;
434 struct ix_rx_queue *rx_queues;
435
436 /* Multicast array memory */
437 struct ixgbe_mc_addr *mta;
438
439 /* SR-IOV */
440 int iov_mode;
441 int num_vfs;
442 int pool;
443 struct ixgbe_vf *vfs;
444
445 /* Bypass */
446 struct ixgbe_bp_data bypass;
447
448 /* Firmware error check */
449 int recovery_mode;
450 struct callout fw_mode_timer;
451
452 /* Misc stats maintained by the driver */
453 unsigned long dropped_pkts;
454 unsigned long mbuf_header_failed;
455 unsigned long mbuf_packet_failed;
456 unsigned long watchdog_events;
457 unsigned long link_irq;
458 union {
459 struct ixgbe_hw_stats pf;
460 struct ixgbevf_hw_stats vf;
461 } stats;
462
463 /* counter(9) stats */
464 u64 ipackets;
465 u64 ierrors;
466 u64 opackets;
467 u64 oerrors;
468 u64 ibytes;
469 u64 obytes;
470 u64 imcasts;
471 u64 omcasts;
472 u64 iqdrops;
473 u64 noproto;
474
475 /* Feature capable/enabled flags. See ixgbe_features.h */
476 u32 feat_cap;
477 u32 feat_en;
478 u16 lse_mask;
479
480 struct sysctl_oid *debug_sysctls;
481 u32 debug_dump_cluster_mask;
482 bool do_debug_dump;
483 };
484
485 struct ixgbe_debug_dump_cmd {
486 u32 offset; /* offset to read/write from table, in bytes */
487 u8 cluster_id; /* also used to get next cluster id */
488 u16 table_id;
489 u16 data_size; /* size of data field, in bytes */
490 u16 reserved1;
491 u32 reserved2;
492 u8 data[];
493 };
494
495 /* Precision Time Sync (IEEE 1588) defines */
496 #define ETHERTYPE_IEEE1588 0x88F7
497 #define PICOSECS_PER_TICK 20833
498 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
499 #define IXGBE_ADVTXD_TSTAMP 0x00080000
500
501 /* Stats macros */
502 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count)
503 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count)
504 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count)
505 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count)
506 #define IXGBE_SET_COLLISIONS(sc, count)
507 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count)
508 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count)
509 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count)
510 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count)
511 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count)
512
513 /* External PHY register addresses */
514 #define IXGBE_PHY_CURRENT_TEMP 0xC820
515 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830
516
517 /**
518 * The ioctl command number used by NVM update for accessing the driver for
519 * NVM access commands.
520 */
521 #define IXGBE_NVM_ACCESS \
522 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5)
523
524 /*
525 * The ioctl command number used by a userspace tool for accessing the driver
526 * for getting debug dump data from the firmware.
527 */
528 #define IXGBE_DEBUG_DUMP \
529 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6)
530
531 /* Debug Dump related definitions */
532 #define IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID 0xFFFFFF
533 #define IXGBE_ACI_DBG_DUMP_CLUSTER_ID_BASE 50
534 #define IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX 1
535
536 #define IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK 0x3
537 #define IXGBE_DBG_DUMP_BASE_SIZE (2 * 1024 * 1024)
538
539 #define IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER \
540 "\nSelect clusters to dump with \"dump\" sysctl" \
541 "\nFlags:" \
542 "\n\t 0x1 - Link" \
543 "\n\t 0x2 - Full CSR Space, excluding RCW registers" \
544 "\n\t" \
545 "\nUse \"sysctl -x\" to view flags properly."
546
547 #define IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP \
548 "\nWrite 1 to output a FW debug dump containing the clusters " \
549 "specified by the \"clusters\" sysctl" \
550 "\nThe \"-b\" flag must be used in order to dump this data " \
551 "as binary data because" \
552 "\nthis data is opaque and not a string."
553
554 /* Sysctl help messages; displayed with sysctl -d */
555 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
556 "\nControl advertised link speed using these flags:\n" \
557 "\t0x1 - advertise 100M\n" \
558 "\t0x2 - advertise 1G\n" \
559 "\t0x4 - advertise 10G\n" \
560 "\t0x8 - advertise 10M\n\n" \
561 "\t0x10 - advertise 2.5G\n" \
562 "\t0x20 - advertise 5G\n\n" \
563 "\t100M and 10M are only supported on certain adapters.\n"
564
565 #define IXGBE_SYSCTL_DESC_SET_FC \
566 "\nSet flow control mode using these values:\n" \
567 "\t0 - off\n" \
568 "\t1 - rx pause\n" \
569 "\t2 - tx pause\n" \
570 "\t3 - tx and rx pause"
571
572 #define IXGBE_SYSCTL_DESC_RX_ERRS \
573 "\nSum of the following RX errors counters:\n" \
574 " * CRC errors,\n" \
575 " * illegal byte error count,\n" \
576 " * missed packet count,\n" \
577 " * length error count,\n" \
578 " * undersized packets count,\n" \
579 " * fragmented packets count,\n" \
580 " * oversized packets count,\n" \
581 " * jabber count."
582
583 /*
584 * This checks for a zero mac addr, something that will be likely
585 * unless the Admin on the Host has created one.
586 */
587 static inline bool
ixv_check_ether_addr(u8 * addr)588 ixv_check_ether_addr(u8 *addr)
589 {
590 bool status = true;
591
592 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
593 addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
594 status = false;
595
596 return (status);
597 }
598
599 uint64_t ixgbe_link_speed_to_baudrate(ixgbe_link_speed speed);
600
601 /* Shared Prototypes */
602
603 int ixgbe_allocate_queues(struct ixgbe_softc *);
604 int ixgbe_setup_transmit_structures(struct ixgbe_softc *);
605 void ixgbe_free_transmit_structures(struct ixgbe_softc *);
606 int ixgbe_setup_receive_structures(struct ixgbe_softc *);
607 void ixgbe_free_receive_structures(struct ixgbe_softc *);
608 int ixgbe_get_regs(SYSCTL_HANDLER_ARGS);
609
610 #include "ixgbe_bypass.h"
611 #include "ixgbe_fdir.h"
612 #include "ixgbe_rss.h"
613
614 #endif /* _IXGBE_H_ */
615