xref: /freebsd/sys/dev/ath/if_ath_tx.c (revision 785edcc2af5ae32c24f5caf5b9552f62bdae33ee)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5  * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer,
13  *    without modification.
14  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
16  *    redistribution must be conditioned upon including a substantially
17  *    similar Disclaimer requirement for further binary redistribution.
18  *
19  * NO WARRANTY
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
23  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
24  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
25  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
28  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30  * THE POSSIBILITY OF SUCH DAMAGES.
31  */
32 
33 #include <sys/cdefs.h>
34 /*
35  * Driver for the Atheros Wireless LAN controller.
36  *
37  * This software is derived from work of Atsushi Onoe; his contribution
38  * is greatly appreciated.
39  */
40 
41 #include "opt_inet.h"
42 #include "opt_ath.h"
43 #include "opt_wlan.h"
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/sysctl.h>
48 #include <sys/mbuf.h>
49 #include <sys/malloc.h>
50 #include <sys/lock.h>
51 #include <sys/mutex.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
54 #include <sys/sockio.h>
55 #include <sys/errno.h>
56 #include <sys/callout.h>
57 #include <sys/bus.h>
58 #include <sys/endian.h>
59 #include <sys/kthread.h>
60 #include <sys/taskqueue.h>
61 #include <sys/priv.h>
62 #include <sys/ktr.h>
63 
64 #include <machine/bus.h>
65 
66 #include <net/if.h>
67 #include <net/if_var.h>
68 #include <net/if_dl.h>
69 #include <net/if_media.h>
70 #include <net/if_types.h>
71 #include <net/if_arp.h>
72 #include <net/ethernet.h>
73 #include <net/if_llc.h>
74 
75 #include <net80211/ieee80211_var.h>
76 #include <net80211/ieee80211_regdomain.h>
77 #ifdef IEEE80211_SUPPORT_SUPERG
78 #include <net80211/ieee80211_superg.h>
79 #endif
80 #ifdef IEEE80211_SUPPORT_TDMA
81 #include <net80211/ieee80211_tdma.h>
82 #endif
83 #include <net80211/ieee80211_ht.h>
84 
85 #include <net/bpf.h>
86 
87 #ifdef INET
88 #include <netinet/in.h>
89 #include <netinet/if_ether.h>
90 #endif
91 
92 #include <dev/ath/if_athvar.h>
93 #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
94 #include <dev/ath/ath_hal/ah_diagcodes.h>
95 
96 #include <dev/ath/if_ath_debug.h>
97 
98 #ifdef ATH_TX99_DIAG
99 #include <dev/ath/ath_tx99/ath_tx99.h>
100 #endif
101 
102 #include <dev/ath/if_ath_misc.h>
103 #include <dev/ath/if_ath_tx.h>
104 #include <dev/ath/if_ath_tx_ht.h>
105 
106 #ifdef	ATH_DEBUG_ALQ
107 #include <dev/ath/if_ath_alq.h>
108 #endif
109 
110 /*
111  * How many retries to perform in software
112  */
113 #define	SWMAX_RETRIES		10
114 
115 /*
116  * What queue to throw the non-QoS TID traffic into
117  */
118 #define	ATH_NONQOS_TID_AC	WME_AC_VO
119 
120 #if 0
121 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
122 #endif
123 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
124     int tid);
125 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
126     int tid);
127 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
128     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
129 static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
130     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
131 static struct ath_buf *
132 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
133     struct ath_tid *tid, struct ath_buf *bf);
134 
135 #ifdef	ATH_DEBUG_ALQ
136 void
ath_tx_alq_post(struct ath_softc * sc,struct ath_buf * bf_first)137 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
138 {
139 	struct ath_buf *bf;
140 	int i, n;
141 	const char *ds;
142 
143 	/* XXX we should skip out early if debugging isn't enabled! */
144 	bf = bf_first;
145 
146 	while (bf != NULL) {
147 		/* XXX should ensure bf_nseg > 0! */
148 		if (bf->bf_nseg == 0)
149 			break;
150 		n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
151 		for (i = 0, ds = (const char *) bf->bf_desc;
152 		    i < n;
153 		    i++, ds += sc->sc_tx_desclen) {
154 			if_ath_alq_post(&sc->sc_alq,
155 			    ATH_ALQ_EDMA_TXDESC,
156 			    sc->sc_tx_desclen,
157 			    ds);
158 		}
159 		bf = bf->bf_next;
160 	}
161 }
162 #endif /* ATH_DEBUG_ALQ */
163 
164 /*
165  * Whether to use the 11n rate scenario functions or not
166  */
167 static inline int
ath_tx_is_11n(struct ath_softc * sc)168 ath_tx_is_11n(struct ath_softc *sc)
169 {
170 	return ((sc->sc_ah->ah_magic == 0x20065416) ||
171 		    (sc->sc_ah->ah_magic == 0x19741014));
172 }
173 
174 /*
175  * Obtain the current TID from the given frame.
176  *
177  * Non-QoS frames get mapped to a TID so frames consistently
178  * go on a sensible queue.
179  */
180 static int
ath_tx_gettid(struct ath_softc * sc,const struct mbuf * m0)181 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
182 {
183 	const struct ieee80211_frame *wh;
184 
185 	wh = mtod(m0, const struct ieee80211_frame *);
186 
187 	/* Non-QoS: map frame to a TID queue for software queueing */
188 	if (! IEEE80211_QOS_HAS_SEQ(wh))
189 		return (WME_AC_TO_TID(M_WME_GETAC(m0)));
190 
191 	/* QoS - fetch the TID from the header, ignore mbuf WME */
192 	return (ieee80211_gettid(wh));
193 }
194 
195 static void
ath_tx_set_retry(struct ath_softc * sc,struct ath_buf * bf)196 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
197 {
198 	struct ieee80211_frame *wh;
199 
200 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
201 	/* Only update/resync if needed */
202 	if (bf->bf_state.bfs_isretried == 0) {
203 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
204 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
205 		    BUS_DMASYNC_PREWRITE);
206 	}
207 	bf->bf_state.bfs_isretried = 1;
208 	bf->bf_state.bfs_retries ++;
209 }
210 
211 /*
212  * Determine what the correct AC queue for the given frame
213  * should be.
214  *
215  * For QoS frames, obey the TID.  That way things like
216  * management frames that are related to a given TID
217  * are thus serialised with the rest of the TID traffic,
218  * regardless of net80211 overriding priority.
219  *
220  * For non-QoS frames, return the mbuf WMI priority.
221  *
222  * This has implications that higher priority non-QoS traffic
223  * may end up being scheduled before other non-QoS traffic,
224  * leading to out-of-sequence packets being emitted.
225  *
226  * (It'd be nice to log/count this so we can see if it
227  * really is a problem.)
228  *
229  * TODO: maybe we should throw multicast traffic, QoS or
230  * otherwise, into a separate TX queue?
231  */
232 static int
ath_tx_getac(struct ath_softc * sc,const struct mbuf * m0)233 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
234 {
235 	const struct ieee80211_frame *wh;
236 
237 	wh = mtod(m0, const struct ieee80211_frame *);
238 
239 	/*
240 	 * QoS data frame (sequence number or otherwise) -
241 	 * return hardware queue mapping for the underlying
242 	 * TID.
243 	 */
244 	if (IEEE80211_QOS_HAS_SEQ(wh))
245 		return TID_TO_WME_AC(ieee80211_gettid(wh));
246 
247 	/*
248 	 * Otherwise - return mbuf QoS pri.
249 	 */
250 	return (M_WME_GETAC(m0));
251 }
252 
253 void
ath_txfrag_cleanup(struct ath_softc * sc,ath_bufhead * frags,struct ieee80211_node * ni)254 ath_txfrag_cleanup(struct ath_softc *sc,
255 	ath_bufhead *frags, struct ieee80211_node *ni)
256 {
257 	struct ath_buf *bf, *next;
258 
259 	ATH_TXBUF_LOCK_ASSERT(sc);
260 
261 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
262 		/* NB: bf assumed clean */
263 		TAILQ_REMOVE(frags, bf, bf_list);
264 		ath_returnbuf_head(sc, bf);
265 		ieee80211_node_decref(ni);
266 	}
267 }
268 
269 /*
270  * Setup xmit of a fragmented frame.  Allocate a buffer
271  * for each frag and bump the node reference count to
272  * reflect the held reference to be setup by ath_tx_start.
273  */
274 int
ath_txfrag_setup(struct ath_softc * sc,ath_bufhead * frags,struct mbuf * m0,struct ieee80211_node * ni)275 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
276 	struct mbuf *m0, struct ieee80211_node *ni)
277 {
278 	struct mbuf *m;
279 	struct ath_buf *bf;
280 
281 	ATH_TXBUF_LOCK(sc);
282 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
283 		/* XXX non-management? */
284 		bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
285 		if (bf == NULL) {	/* out of buffers, cleanup */
286 			DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n",
287 			    __func__);
288 			ath_txfrag_cleanup(sc, frags, ni);
289 			break;
290 		}
291 		(void) ieee80211_ref_node(ni);
292 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
293 	}
294 	ATH_TXBUF_UNLOCK(sc);
295 
296 	return !TAILQ_EMPTY(frags);
297 }
298 
299 static int
ath_tx_dmasetup(struct ath_softc * sc,struct ath_buf * bf,struct mbuf * m0)300 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
301 {
302 	struct mbuf *m;
303 	int error;
304 
305 	/*
306 	 * Load the DMA map so any coalescing is done.  This
307 	 * also calculates the number of descriptors we need.
308 	 */
309 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
310 				     bf->bf_segs, &bf->bf_nseg,
311 				     BUS_DMA_NOWAIT);
312 	if (error == EFBIG) {
313 		/* XXX packet requires too many descriptors */
314 		bf->bf_nseg = ATH_MAX_SCATTER + 1;
315 	} else if (error != 0) {
316 		sc->sc_stats.ast_tx_busdma++;
317 		ieee80211_free_mbuf(m0);
318 		return error;
319 	}
320 	/*
321 	 * Discard null packets and check for packets that
322 	 * require too many TX descriptors.  We try to convert
323 	 * the latter to a cluster.
324 	 */
325 	if (bf->bf_nseg > ATH_MAX_SCATTER) {		/* too many desc's, linearize */
326 		sc->sc_stats.ast_tx_linear++;
327 		m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
328 		if (m == NULL) {
329 			ieee80211_free_mbuf(m0);
330 			sc->sc_stats.ast_tx_nombuf++;
331 			return ENOMEM;
332 		}
333 		m0 = m;
334 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
335 					     bf->bf_segs, &bf->bf_nseg,
336 					     BUS_DMA_NOWAIT);
337 		if (error != 0) {
338 			sc->sc_stats.ast_tx_busdma++;
339 			ieee80211_free_mbuf(m0);
340 			return error;
341 		}
342 		KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
343 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
344 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
345 		sc->sc_stats.ast_tx_nodata++;
346 		ieee80211_free_mbuf(m0);
347 		return EIO;
348 	}
349 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
350 		__func__, m0, m0->m_pkthdr.len);
351 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
352 	bf->bf_m = m0;
353 
354 	return 0;
355 }
356 
357 /*
358  * Chain together segments+descriptors for a frame - 11n or otherwise.
359  *
360  * For aggregates, this is called on each frame in the aggregate.
361  */
362 static void
ath_tx_chaindesclist(struct ath_softc * sc,struct ath_desc * ds0,struct ath_buf * bf,bool is_aggr,int is_first_subframe,int is_last_subframe)363 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
364     struct ath_buf *bf, bool is_aggr, int is_first_subframe,
365     int is_last_subframe)
366 {
367 	struct ath_hal *ah = sc->sc_ah;
368 	char *ds;
369 	int i, bp, dsp;
370 	HAL_DMA_ADDR bufAddrList[4];
371 	uint32_t segLenList[4];
372 	int numTxMaps = 1;
373 	int isFirstDesc = 1;
374 
375 	/*
376 	 * XXX There's txdma and txdma_mgmt; the descriptor
377 	 * sizes must match.
378 	 */
379 	struct ath_descdma *dd = &sc->sc_txdma;
380 
381 	/*
382 	 * Fillin the remainder of the descriptor info.
383 	 */
384 
385 	/*
386 	 * We need the number of TX data pointers in each descriptor.
387 	 * EDMA and later chips support 4 TX buffers per descriptor;
388 	 * previous chips just support one.
389 	 */
390 	numTxMaps = sc->sc_tx_nmaps;
391 
392 	/*
393 	 * For EDMA and later chips ensure the TX map is fully populated
394 	 * before advancing to the next descriptor.
395 	 */
396 	ds = (char *) bf->bf_desc;
397 	bp = dsp = 0;
398 	bzero(bufAddrList, sizeof(bufAddrList));
399 	bzero(segLenList, sizeof(segLenList));
400 	for (i = 0; i < bf->bf_nseg; i++) {
401 		bufAddrList[bp] = bf->bf_segs[i].ds_addr;
402 		segLenList[bp] = bf->bf_segs[i].ds_len;
403 		bp++;
404 
405 		/*
406 		 * Go to the next segment if this isn't the last segment
407 		 * and there's space in the current TX map.
408 		 */
409 		if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
410 			continue;
411 
412 		/*
413 		 * Last segment or we're out of buffer pointers.
414 		 */
415 		bp = 0;
416 
417 		if (i == bf->bf_nseg - 1)
418 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
419 		else
420 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
421 			    bf->bf_daddr + dd->dd_descsize * (dsp + 1));
422 
423 		/*
424 		 * XXX This assumes that bfs_txq is the actual destination
425 		 * hardware queue at this point.  It may not have been
426 		 * assigned, it may actually be pointing to the multicast
427 		 * software TXQ id.  These must be fixed!
428 		 */
429 		ath_hal_filltxdesc(ah, (struct ath_desc *) ds
430 			, bufAddrList
431 			, segLenList
432 			, bf->bf_descid		/* XXX desc id */
433 			, bf->bf_state.bfs_tx_queue
434 			, isFirstDesc		/* first segment */
435 			, i == bf->bf_nseg - 1	/* last segment */
436 			, (struct ath_desc *) ds0	/* first descriptor */
437 		);
438 
439 		/*
440 		 * Make sure the 11n aggregate fields are cleared.
441 		 *
442 		 * XXX TODO: this doesn't need to be called for
443 		 * aggregate frames; as it'll be called on all
444 		 * sub-frames.  Since the descriptors are in
445 		 * non-cacheable memory, this leads to some
446 		 * rather slow writes on MIPS/ARM platforms.
447 		 */
448 		if (ath_tx_is_11n(sc))
449 			ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
450 
451 		/*
452 		 * If 11n is enabled, set it up as if it's an aggregate
453 		 * frame.
454 		 */
455 		if (is_last_subframe) {
456 			ath_hal_set11n_aggr_last(sc->sc_ah,
457 			    (struct ath_desc *) ds);
458 		} else if (is_aggr) {
459 			/*
460 			 * This clears the aggrlen field; so
461 			 * the caller needs to call set_aggr_first()!
462 			 *
463 			 * XXX TODO: don't call this for the first
464 			 * descriptor in the first frame in an
465 			 * aggregate!
466 			 */
467 			ath_hal_set11n_aggr_middle(sc->sc_ah,
468 			    (struct ath_desc *) ds,
469 			    bf->bf_state.bfs_ndelim);
470 		}
471 		isFirstDesc = 0;
472 		bf->bf_lastds = (struct ath_desc *) ds;
473 
474 		/*
475 		 * Don't forget to skip to the next descriptor.
476 		 */
477 		ds += sc->sc_tx_desclen;
478 		dsp++;
479 
480 		/*
481 		 * .. and don't forget to blank these out!
482 		 */
483 		bzero(bufAddrList, sizeof(bufAddrList));
484 		bzero(segLenList, sizeof(segLenList));
485 	}
486 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
487 }
488 
489 /*
490  * Set the rate control fields in the given descriptor based on
491  * the bf_state fields and node state.
492  *
493  * The bfs fields should already be set with the relevant rate
494  * control information, including whether MRR is to be enabled.
495  *
496  * Since the FreeBSD HAL currently sets up the first TX rate
497  * in ath_hal_setuptxdesc(), this will setup the MRR
498  * conditionally for the pre-11n chips, and call ath_buf_set_rate
499  * unconditionally for 11n chips. These require the 11n rate
500  * scenario to be set if MCS rates are enabled, so it's easier
501  * to just always call it. The caller can then only set rates 2, 3
502  * and 4 if multi-rate retry is needed.
503  */
504 static void
ath_tx_set_ratectrl(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf)505 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
506     struct ath_buf *bf)
507 {
508 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
509 
510 	/* If mrr is disabled, blank tries 1, 2, 3 */
511 	if (! bf->bf_state.bfs_ismrr)
512 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
513 
514 #if 0
515 	/*
516 	 * If NOACK is set, just set ntries=1.
517 	 */
518 	else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
519 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
520 		rc[0].tries = 1;
521 	}
522 #endif
523 
524 	/*
525 	 * Always call - that way a retried descriptor will
526 	 * have the MRR fields overwritten.
527 	 *
528 	 * XXX TODO: see if this is really needed - setting up
529 	 * the first descriptor should set the MRR fields to 0
530 	 * for us anyway.
531 	 */
532 	if (ath_tx_is_11n(sc)) {
533 		ath_buf_set_rate(sc, ni, bf);
534 	} else {
535 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
536 			, rc[1].ratecode, rc[1].tries
537 			, rc[2].ratecode, rc[2].tries
538 			, rc[3].ratecode, rc[3].tries
539 		);
540 	}
541 }
542 
543 /*
544  * Setup segments+descriptors for an 11n aggregate.
545  * bf_first is the first buffer in the aggregate.
546  * The descriptor list must already been linked together using
547  * bf->bf_next.
548  */
549 static void
ath_tx_setds_11n(struct ath_softc * sc,struct ath_buf * bf_first)550 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
551 {
552 	struct ath_buf *bf, *bf_prev = NULL;
553 	struct ath_desc *ds0 = bf_first->bf_desc;
554 
555 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
556 	    __func__, bf_first->bf_state.bfs_nframes,
557 	    bf_first->bf_state.bfs_al);
558 
559 	bf = bf_first;
560 
561 	if (bf->bf_state.bfs_txrate0 == 0)
562 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n",
563 		    __func__, bf, 0);
564 	if (bf->bf_state.bfs_rc[0].ratecode == 0)
565 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n",
566 		    __func__, bf, 0);
567 
568 	/*
569 	 * Setup all descriptors of all subframes - this will
570 	 * call ath_hal_set11naggrmiddle() on every frame.
571 	 */
572 	while (bf != NULL) {
573 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
574 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
575 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
576 		    SEQNO(bf->bf_state.bfs_seqno));
577 
578 		/*
579 		 * Setup the initial fields for the first descriptor - all
580 		 * the non-11n specific stuff.
581 		 */
582 		ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
583 			, bf->bf_state.bfs_pktlen	/* packet length */
584 			, bf->bf_state.bfs_hdrlen	/* header length */
585 			, bf->bf_state.bfs_atype	/* Atheros packet type */
586 			, bf->bf_state.bfs_txpower	/* txpower */
587 			, bf->bf_state.bfs_txrate0
588 			, bf->bf_state.bfs_try0		/* series 0 rate/tries */
589 			, bf->bf_state.bfs_keyix	/* key cache index */
590 			, bf->bf_state.bfs_txantenna	/* antenna mode */
591 			, bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ	/* flags */
592 			, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
593 			, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
594 		);
595 
596 		/*
597 		 * First descriptor? Setup the rate control and initial
598 		 * aggregate header information.
599 		 */
600 		if (bf == bf_first) {
601 			/*
602 			 * setup first desc with rate and aggr info
603 			 */
604 			ath_tx_set_ratectrl(sc, bf->bf_node, bf);
605 		}
606 
607 		/*
608 		 * Setup the descriptors for a multi-descriptor frame.
609 		 * This is both aggregate and non-aggregate aware.
610 		 */
611 		ath_tx_chaindesclist(sc, ds0, bf,
612 		    1, /* is_aggr */
613 		    !! (bf == bf_first), /* is_first_subframe */
614 		    !! (bf->bf_next == NULL) /* is_last_subframe */
615 		    );
616 
617 		if (bf == bf_first) {
618 			/*
619 			 * Initialise the first 11n aggregate with the
620 			 * aggregate length and aggregate enable bits.
621 			 */
622 			ath_hal_set11n_aggr_first(sc->sc_ah,
623 			    ds0,
624 			    bf->bf_state.bfs_al,
625 			    bf->bf_state.bfs_ndelim);
626 		}
627 
628 		/*
629 		 * Link the last descriptor of the previous frame
630 		 * to the beginning descriptor of this frame.
631 		 */
632 		if (bf_prev != NULL)
633 			ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
634 			    bf->bf_daddr);
635 
636 		/* Save a copy so we can link the next descriptor in */
637 		bf_prev = bf;
638 		bf = bf->bf_next;
639 	}
640 
641 	/*
642 	 * Set the first descriptor bf_lastds field to point to
643 	 * the last descriptor in the last subframe, that's where
644 	 * the status update will occur.
645 	 */
646 	bf_first->bf_lastds = bf_prev->bf_lastds;
647 
648 	/*
649 	 * And bf_last in the first descriptor points to the end of
650 	 * the aggregate list.
651 	 */
652 	bf_first->bf_last = bf_prev;
653 
654 	/*
655 	 * For non-AR9300 NICs, which require the rate control
656 	 * in the final descriptor - let's set that up now.
657 	 *
658 	 * This is because the filltxdesc() HAL call doesn't
659 	 * populate the last segment with rate control information
660 	 * if firstSeg is also true.  For non-aggregate frames
661 	 * that is fine, as the first frame already has rate control
662 	 * info.  But if the last frame in an aggregate has one
663 	 * descriptor, both firstseg and lastseg will be true and
664 	 * the rate info isn't copied.
665 	 *
666 	 * This is inefficient on MIPS/ARM platforms that have
667 	 * non-cachable memory for TX descriptors, but we'll just
668 	 * make do for now.
669 	 *
670 	 * As to why the rate table is stashed in the last descriptor
671 	 * rather than the first descriptor?  Because proctxdesc()
672 	 * is called on the final descriptor in an MPDU or A-MPDU -
673 	 * ie, the one that gets updated by the hardware upon
674 	 * completion.  That way proctxdesc() doesn't need to know
675 	 * about the first _and_ last TX descriptor.
676 	 */
677 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
678 
679 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
680 }
681 
682 /*
683  * Hand-off a frame to the multicast TX queue.
684  *
685  * This is a software TXQ which will be appended to the CAB queue
686  * during the beacon setup code.
687  *
688  * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
689  * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
690  * with the actual hardware txq, or all of this will fall apart.
691  *
692  * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
693  * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
694  * correctly.
695  */
696 static void
ath_tx_handoff_mcast(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)697 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
698     struct ath_buf *bf)
699 {
700 	ATH_TX_LOCK_ASSERT(sc);
701 
702 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
703 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
704 
705 	/*
706 	 * Ensure that the tx queue is the cabq, so things get
707 	 * mapped correctly.
708 	 */
709 	if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) {
710 		DPRINTF(sc, ATH_DEBUG_XMIT,
711 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
712 		    __func__, bf, bf->bf_state.bfs_tx_queue,
713 		    txq->axq_qnum);
714 	}
715 
716 	ATH_TXQ_LOCK(txq);
717 	if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
718 		struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
719 		struct ieee80211_frame *wh;
720 
721 		/* mark previous frame */
722 		wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
723 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
724 		bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
725 		    BUS_DMASYNC_PREWRITE);
726 
727 		/* link descriptor */
728 		ath_hal_settxdesclink(sc->sc_ah,
729 		    bf_last->bf_lastds,
730 		    bf->bf_daddr);
731 	}
732 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
733 	ATH_TXQ_UNLOCK(txq);
734 }
735 
736 /*
737  * Hand-off packet to a hardware queue.
738  */
739 static void
ath_tx_handoff_hw(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)740 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
741     struct ath_buf *bf)
742 {
743 	struct ath_hal *ah = sc->sc_ah;
744 	struct ath_buf *bf_first;
745 
746 	/*
747 	 * Insert the frame on the outbound list and pass it on
748 	 * to the hardware.  Multicast frames buffered for power
749 	 * save stations and transmit from the CAB queue are stored
750 	 * on a s/w only queue and loaded on to the CAB queue in
751 	 * the SWBA handler since frames only go out on DTIM and
752 	 * to avoid possible races.
753 	 */
754 	ATH_TX_LOCK_ASSERT(sc);
755 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
756 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
757 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
758 	     ("ath_tx_handoff_hw called for mcast queue"));
759 
760 	/*
761 	 * XXX We should instead just verify that sc_txstart_cnt
762 	 * or ath_txproc_cnt > 0.  That would mean that
763 	 * the reset is going to be waiting for us to complete.
764 	 */
765 	if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) {
766 		device_printf(sc->sc_dev,
767 		    "%s: TX dispatch without holding txcount/txstart refcnt!\n",
768 		    __func__);
769 	}
770 
771 	/*
772 	 * XXX .. this is going to cause the hardware to get upset;
773 	 * so we really should find some way to drop or queue
774 	 * things.
775 	 */
776 
777 	ATH_TXQ_LOCK(txq);
778 
779 	/*
780 	 * XXX TODO: if there's a holdingbf, then
781 	 * ATH_TXQ_PUTRUNNING should be clear.
782 	 *
783 	 * If there is a holdingbf and the list is empty,
784 	 * then axq_link should be pointing to the holdingbf.
785 	 *
786 	 * Otherwise it should point to the last descriptor
787 	 * in the last ath_buf.
788 	 *
789 	 * In any case, we should really ensure that we
790 	 * update the previous descriptor link pointer to
791 	 * this descriptor, regardless of all of the above state.
792 	 *
793 	 * For now this is captured by having axq_link point
794 	 * to either the holdingbf (if the TXQ list is empty)
795 	 * or the end of the list (if the TXQ list isn't empty.)
796 	 * I'd rather just kill axq_link here and do it as above.
797 	 */
798 
799 	/*
800 	 * Append the frame to the TX queue.
801 	 */
802 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
803 	ATH_KTR(sc, ATH_KTR_TX, 3,
804 	    "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
805 	    "depth=%d",
806 	    txq->axq_qnum,
807 	    bf,
808 	    txq->axq_depth);
809 
810 	/*
811 	 * If there's a link pointer, update it.
812 	 *
813 	 * XXX we should replace this with the above logic, just
814 	 * to kill axq_link with fire.
815 	 */
816 	if (txq->axq_link != NULL) {
817 		*txq->axq_link = bf->bf_daddr;
818 		DPRINTF(sc, ATH_DEBUG_XMIT,
819 		    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
820 		    txq->axq_qnum, txq->axq_link,
821 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
822 		    txq->axq_depth);
823 		ATH_KTR(sc, ATH_KTR_TX, 5,
824 		    "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
825 		    "lastds=%d",
826 		    txq->axq_qnum, txq->axq_link,
827 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
828 		    bf->bf_lastds);
829 	}
830 
831 	/*
832 	 * If we've not pushed anything into the hardware yet,
833 	 * push the head of the queue into the TxDP.
834 	 *
835 	 * Once we've started DMA, there's no guarantee that
836 	 * updating the TxDP with a new value will actually work.
837 	 * So we just don't do that - if we hit the end of the list,
838 	 * we keep that buffer around (the "holding buffer") and
839 	 * re-start DMA by updating the link pointer of _that_
840 	 * descriptor and then restart DMA.
841 	 */
842 	if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) {
843 		bf_first = TAILQ_FIRST(&txq->axq_q);
844 		txq->axq_flags |= ATH_TXQ_PUTRUNNING;
845 		ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr);
846 		DPRINTF(sc, ATH_DEBUG_XMIT,
847 		    "%s: TXDP[%u] = %p (%p) depth %d\n",
848 		    __func__, txq->axq_qnum,
849 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
850 		    txq->axq_depth);
851 		ATH_KTR(sc, ATH_KTR_TX, 5,
852 		    "ath_tx_handoff: TXDP[%u] = %p (%p) "
853 		    "lastds=%p depth %d",
854 		    txq->axq_qnum,
855 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
856 		    bf_first->bf_lastds,
857 		    txq->axq_depth);
858 	}
859 
860 	/*
861 	 * Ensure that the bf TXQ matches this TXQ, so later
862 	 * checking and holding buffer manipulation is sane.
863 	 */
864 	if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) {
865 		DPRINTF(sc, ATH_DEBUG_XMIT,
866 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
867 		    __func__, bf, bf->bf_state.bfs_tx_queue,
868 		    txq->axq_qnum);
869 	}
870 
871 	/*
872 	 * Track aggregate queue depth.
873 	 */
874 	if (bf->bf_state.bfs_aggr)
875 		txq->axq_aggr_depth++;
876 
877 	/*
878 	 * Update the link pointer.
879 	 */
880 	ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
881 
882 	/*
883 	 * Start DMA.
884 	 *
885 	 * If we wrote a TxDP above, DMA will start from here.
886 	 *
887 	 * If DMA is running, it'll do nothing.
888 	 *
889 	 * If the DMA engine hit the end of the QCU list (ie LINK=NULL,
890 	 * or VEOL) then it stops at the last transmitted write.
891 	 * We then append a new frame by updating the link pointer
892 	 * in that descriptor and then kick TxE here; it will re-read
893 	 * that last descriptor and find the new descriptor to transmit.
894 	 *
895 	 * This is why we keep the holding descriptor around.
896 	 */
897 	ath_hal_txstart(ah, txq->axq_qnum);
898 	ATH_TXQ_UNLOCK(txq);
899 	ATH_KTR(sc, ATH_KTR_TX, 1,
900 	    "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
901 }
902 
903 /*
904  * Restart TX DMA for the given TXQ.
905  *
906  * This must be called whether the queue is empty or not.
907  */
908 static void
ath_legacy_tx_dma_restart(struct ath_softc * sc,struct ath_txq * txq)909 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
910 {
911 	struct ath_buf *bf, *bf_last;
912 
913 	ATH_TXQ_LOCK_ASSERT(txq);
914 
915 	/* XXX make this ATH_TXQ_FIRST */
916 	bf = TAILQ_FIRST(&txq->axq_q);
917 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
918 
919 	if (bf == NULL)
920 		return;
921 
922 	DPRINTF(sc, ATH_DEBUG_RESET,
923 	    "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n",
924 	    __func__,
925 	    txq->axq_qnum,
926 	    bf,
927 	    bf_last,
928 	    (uint32_t) bf->bf_daddr);
929 
930 #ifdef	ATH_DEBUG
931 	if (sc->sc_debug & ATH_DEBUG_RESET)
932 		ath_tx_dump(sc, txq);
933 #endif
934 
935 	/*
936 	 * This is called from a restart, so DMA is known to be
937 	 * completely stopped.
938 	 */
939 	KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)),
940 	    ("%s: Q%d: called with PUTRUNNING=1\n",
941 	    __func__,
942 	    txq->axq_qnum));
943 
944 	ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr);
945 	txq->axq_flags |= ATH_TXQ_PUTRUNNING;
946 
947 	ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds,
948 	    &txq->axq_link);
949 	ath_hal_txstart(sc->sc_ah, txq->axq_qnum);
950 }
951 
952 /*
953  * Hand off a packet to the hardware (or mcast queue.)
954  *
955  * The relevant hardware txq should be locked.
956  */
957 static void
ath_legacy_xmit_handoff(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)958 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
959     struct ath_buf *bf)
960 {
961 	ATH_TX_LOCK_ASSERT(sc);
962 
963 #ifdef	ATH_DEBUG_ALQ
964 	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
965 		ath_tx_alq_post(sc, bf);
966 #endif
967 
968 	if (txq->axq_qnum == ATH_TXQ_SWQ)
969 		ath_tx_handoff_mcast(sc, txq, bf);
970 	else
971 		ath_tx_handoff_hw(sc, txq, bf);
972 }
973 
974 static int
ath_tx_tag_crypto(struct ath_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,int iswep,int isfrag,int * hdrlen,int * pktlen,int * keyix)975 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
976     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
977     int *keyix)
978 {
979 	DPRINTF(sc, ATH_DEBUG_XMIT,
980 	    "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
981 	    __func__,
982 	    *hdrlen,
983 	    *pktlen,
984 	    isfrag,
985 	    iswep,
986 	    m0);
987 
988 	if (iswep) {
989 		const struct ieee80211_cipher *cip;
990 		struct ieee80211_key *k;
991 
992 		/*
993 		 * Construct the 802.11 header+trailer for an encrypted
994 		 * frame. The only reason this can fail is because of an
995 		 * unknown or unsupported cipher/key type.
996 		 */
997 		k = ieee80211_crypto_encap(ni, m0);
998 		if (k == NULL) {
999 			/*
1000 			 * This can happen when the key is yanked after the
1001 			 * frame was queued.  Just discard the frame; the
1002 			 * 802.11 layer counts failures and provides
1003 			 * debugging/diagnostics.
1004 			 */
1005 			return (0);
1006 		}
1007 		/*
1008 		 * Adjust the packet + header lengths for the crypto
1009 		 * additions and calculate the h/w key index.  When
1010 		 * a s/w mic is done the frame will have had any mic
1011 		 * added to it prior to entry so m0->m_pkthdr.len will
1012 		 * account for it. Otherwise we need to add it to the
1013 		 * packet length.
1014 		 */
1015 		cip = k->wk_cipher;
1016 		(*hdrlen) += cip->ic_header;
1017 		(*pktlen) += cip->ic_header + cip->ic_trailer;
1018 		/* NB: frags always have any TKIP MIC done in s/w */
1019 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
1020 			(*pktlen) += cip->ic_miclen;
1021 		(*keyix) = k->wk_keyix;
1022 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
1023 		/*
1024 		 * Use station key cache slot, if assigned.
1025 		 */
1026 		(*keyix) = ni->ni_ucastkey.wk_keyix;
1027 		if ((*keyix) == IEEE80211_KEYIX_NONE)
1028 			(*keyix) = HAL_TXKEYIX_INVALID;
1029 	} else
1030 		(*keyix) = HAL_TXKEYIX_INVALID;
1031 
1032 	return (1);
1033 }
1034 
1035 /*
1036  * Calculate whether interoperability protection is required for
1037  * this frame.
1038  *
1039  * This requires the rate control information be filled in,
1040  * as the protection requirement depends upon the current
1041  * operating mode / PHY.
1042  */
1043 static void
ath_tx_calc_protection(struct ath_softc * sc,struct ath_buf * bf)1044 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1045 {
1046 	struct ieee80211_frame *wh;
1047 	uint8_t rix;
1048 	uint16_t flags;
1049 	int shortPreamble;
1050 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1051 	struct ieee80211com *ic = &sc->sc_ic;
1052 
1053 	flags = bf->bf_state.bfs_txflags;
1054 	rix = bf->bf_state.bfs_rc[0].rix;
1055 	shortPreamble = bf->bf_state.bfs_shpream;
1056 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1057 
1058 	/* Disable frame protection for TOA probe frames */
1059 	if (bf->bf_flags & ATH_BUF_TOA_PROBE) {
1060 		/* XXX count */
1061 		flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA);
1062 		bf->bf_state.bfs_doprot = 0;
1063 		goto finish;
1064 	}
1065 
1066 	/*
1067 	 * If 802.11g protection is enabled, determine whether
1068 	 * to use RTS/CTS or just CTS.  Note that this is only
1069 	 * done for OFDM unicast frames.
1070 	 */
1071 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1072 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1073 	    (flags & HAL_TXDESC_NOACK) == 0) {
1074 		bf->bf_state.bfs_doprot = 1;
1075 		/* XXX fragments must use CCK rates w/ protection */
1076 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1077 			flags |= HAL_TXDESC_RTSENA;
1078 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1079 			flags |= HAL_TXDESC_CTSENA;
1080 		}
1081 		/*
1082 		 * For frags it would be desirable to use the
1083 		 * highest CCK rate for RTS/CTS.  But stations
1084 		 * farther away may detect it at a lower CCK rate
1085 		 * so use the configured protection rate instead
1086 		 * (for now).
1087 		 */
1088 		sc->sc_stats.ast_tx_protect++;
1089 	}
1090 
1091 	/*
1092 	 * If 11n protection is enabled and it's a HT frame,
1093 	 * enable RTS.
1094 	 *
1095 	 * XXX ic_htprotmode or ic_curhtprotmode?
1096 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
1097 	 * XXX indicates it's not a HT pure environment?
1098 	 */
1099 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1100 	    rt->info[rix].phy == IEEE80211_T_HT &&
1101 	    (flags & HAL_TXDESC_NOACK) == 0) {
1102 		flags |= HAL_TXDESC_RTSENA;
1103 		sc->sc_stats.ast_tx_htprotect++;
1104 	}
1105 
1106 finish:
1107 	bf->bf_state.bfs_txflags = flags;
1108 }
1109 
1110 /*
1111  * Update the frame duration given the currently selected rate.
1112  *
1113  * This also updates the frame duration value, so it will require
1114  * a DMA flush.
1115  */
1116 static void
ath_tx_calc_duration(struct ath_softc * sc,struct ath_buf * bf)1117 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1118 {
1119 	struct ieee80211_frame *wh;
1120 	uint8_t rix;
1121 	uint16_t flags;
1122 	int shortPreamble;
1123 	struct ath_hal *ah = sc->sc_ah;
1124 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1125 	int isfrag = bf->bf_m->m_flags & M_FRAG;
1126 
1127 	flags = bf->bf_state.bfs_txflags;
1128 	rix = bf->bf_state.bfs_rc[0].rix;
1129 	shortPreamble = bf->bf_state.bfs_shpream;
1130 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1131 
1132 	/*
1133 	 * Calculate duration.  This logically belongs in the 802.11
1134 	 * layer but it lacks sufficient information to calculate it.
1135 	 */
1136 	if ((flags & HAL_TXDESC_NOACK) == 0 && !IEEE80211_IS_CTL(wh)) {
1137 		u_int16_t dur;
1138 		if (shortPreamble)
1139 			dur = rt->info[rix].spAckDuration;
1140 		else
1141 			dur = rt->info[rix].lpAckDuration;
1142 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1143 			dur += dur;		/* additional SIFS+ACK */
1144 			/*
1145 			 * Include the size of next fragment so NAV is
1146 			 * updated properly.  The last fragment uses only
1147 			 * the ACK duration
1148 			 *
1149 			 * XXX TODO: ensure that the rate lookup for each
1150 			 * fragment is the same as the rate used by the
1151 			 * first fragment!
1152 			 */
1153 			dur += ath_hal_computetxtime(ah,
1154 			    rt,
1155 			    bf->bf_nextfraglen,
1156 			    rix, shortPreamble,
1157 			    AH_TRUE);
1158 		}
1159 		if (isfrag) {
1160 			/*
1161 			 * Force hardware to use computed duration for next
1162 			 * fragment by disabling multi-rate retry which updates
1163 			 * duration based on the multi-rate duration table.
1164 			 */
1165 			bf->bf_state.bfs_ismrr = 0;
1166 			bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1167 			/* XXX update bfs_rc[0].try? */
1168 		}
1169 
1170 		/* Update the duration field itself */
1171 		*(u_int16_t *)wh->i_dur = htole16(dur);
1172 	}
1173 }
1174 
1175 static uint8_t
ath_tx_get_rtscts_rate(struct ath_hal * ah,const HAL_RATE_TABLE * rt,int cix,int shortPreamble)1176 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1177     int cix, int shortPreamble)
1178 {
1179 	uint8_t ctsrate;
1180 
1181 	/*
1182 	 * CTS transmit rate is derived from the transmit rate
1183 	 * by looking in the h/w rate table.  We must also factor
1184 	 * in whether or not a short preamble is to be used.
1185 	 */
1186 	/* NB: cix is set above where RTS/CTS is enabled */
1187 	KASSERT(cix != 0xff, ("cix not setup"));
1188 	ctsrate = rt->info[cix].rateCode;
1189 
1190 	/* XXX this should only matter for legacy rates */
1191 	if (shortPreamble)
1192 		ctsrate |= rt->info[cix].shortPreamble;
1193 
1194 	return (ctsrate);
1195 }
1196 
1197 /*
1198  * Calculate the RTS/CTS duration for legacy frames.
1199  */
1200 static int
ath_tx_calc_ctsduration(struct ath_hal * ah,int rix,int cix,int shortPreamble,int pktlen,const HAL_RATE_TABLE * rt,int flags)1201 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1202     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1203     int flags)
1204 {
1205 	int ctsduration = 0;
1206 
1207 	/* This mustn't be called for HT modes */
1208 	if (rt->info[cix].phy == IEEE80211_T_HT) {
1209 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
1210 		    __func__, rt->info[cix].rateCode);
1211 		return (-1);
1212 	}
1213 
1214 	/*
1215 	 * Compute the transmit duration based on the frame
1216 	 * size and the size of an ACK frame.  We call into the
1217 	 * HAL to do the computation since it depends on the
1218 	 * characteristics of the actual PHY being used.
1219 	 *
1220 	 * NB: CTS is assumed the same size as an ACK so we can
1221 	 *     use the precalculated ACK durations.
1222 	 */
1223 	if (shortPreamble) {
1224 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1225 			ctsduration += rt->info[cix].spAckDuration;
1226 		ctsduration += ath_hal_computetxtime(ah,
1227 			rt, pktlen, rix, AH_TRUE, AH_TRUE);
1228 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1229 			ctsduration += rt->info[rix].spAckDuration;
1230 	} else {
1231 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1232 			ctsduration += rt->info[cix].lpAckDuration;
1233 		ctsduration += ath_hal_computetxtime(ah,
1234 			rt, pktlen, rix, AH_FALSE, AH_TRUE);
1235 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1236 			ctsduration += rt->info[rix].lpAckDuration;
1237 	}
1238 
1239 	return (ctsduration);
1240 }
1241 
1242 /*
1243  * Update the given ath_buf with updated rts/cts setup and duration
1244  * values.
1245  *
1246  * To support rate lookups for each software retry, the rts/cts rate
1247  * and cts duration must be re-calculated.
1248  *
1249  * This function assumes the RTS/CTS flags have been set as needed;
1250  * mrr has been disabled; and the rate control lookup has been done.
1251  *
1252  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1253  * XXX The 11n NICs support per-rate RTS/CTS configuration.
1254  */
1255 static void
ath_tx_set_rtscts(struct ath_softc * sc,struct ath_buf * bf)1256 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1257 {
1258 	uint16_t ctsduration = 0;
1259 	uint8_t ctsrate = 0;
1260 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1261 	uint8_t cix = 0;
1262 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1263 
1264 	/*
1265 	 * No RTS/CTS enabled? Don't bother.
1266 	 */
1267 	if ((bf->bf_state.bfs_txflags &
1268 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1269 		/* XXX is this really needed? */
1270 		bf->bf_state.bfs_ctsrate = 0;
1271 		bf->bf_state.bfs_ctsduration = 0;
1272 		return;
1273 	}
1274 
1275 	/*
1276 	 * If protection is enabled, use the protection rix control
1277 	 * rate. Otherwise use the rate0 control rate.
1278 	 */
1279 	if (bf->bf_state.bfs_doprot)
1280 		rix = sc->sc_protrix;
1281 	else
1282 		rix = bf->bf_state.bfs_rc[0].rix;
1283 
1284 	/*
1285 	 * If the raw path has hard-coded ctsrate0 to something,
1286 	 * use it.
1287 	 */
1288 	if (bf->bf_state.bfs_ctsrate0 != 0)
1289 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1290 	else
1291 		/* Control rate from above */
1292 		cix = rt->info[rix].controlRate;
1293 
1294 	/* Calculate the rtscts rate for the given cix */
1295 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1296 	    bf->bf_state.bfs_shpream);
1297 
1298 	/* The 11n chipsets do ctsduration calculations for you */
1299 	if (! ath_tx_is_11n(sc))
1300 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1301 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1302 		    rt, bf->bf_state.bfs_txflags);
1303 
1304 	/* Squirrel away in ath_buf */
1305 	bf->bf_state.bfs_ctsrate = ctsrate;
1306 	bf->bf_state.bfs_ctsduration = ctsduration;
1307 
1308 	/*
1309 	 * Must disable multi-rate retry when using RTS/CTS.
1310 	 */
1311 	if (!sc->sc_mrrprot) {
1312 		bf->bf_state.bfs_ismrr = 0;
1313 		bf->bf_state.bfs_try0 =
1314 		    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1315 	}
1316 }
1317 
1318 /*
1319  * Setup the descriptor chain for a normal or fast-frame
1320  * frame.
1321  *
1322  * XXX TODO: extend to include the destination hardware QCU ID.
1323  * Make sure that is correct.  Make sure that when being added
1324  * to the mcastq, the CABQ QCUID is set or things will get a bit
1325  * odd.
1326  */
1327 static void
ath_tx_setds(struct ath_softc * sc,struct ath_buf * bf)1328 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1329 {
1330 	struct ath_desc *ds = bf->bf_desc;
1331 	struct ath_hal *ah = sc->sc_ah;
1332 
1333 	if (bf->bf_state.bfs_txrate0 == 0)
1334 		DPRINTF(sc, ATH_DEBUG_XMIT,
1335 		    "%s: bf=%p, txrate0=%d\n", __func__, bf, 0);
1336 
1337 	ath_hal_setuptxdesc(ah, ds
1338 		, bf->bf_state.bfs_pktlen	/* packet length */
1339 		, bf->bf_state.bfs_hdrlen	/* header length */
1340 		, bf->bf_state.bfs_atype	/* Atheros packet type */
1341 		, bf->bf_state.bfs_txpower	/* txpower */
1342 		, bf->bf_state.bfs_txrate0
1343 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
1344 		, bf->bf_state.bfs_keyix	/* key cache index */
1345 		, bf->bf_state.bfs_txantenna	/* antenna mode */
1346 		, bf->bf_state.bfs_txflags	/* flags */
1347 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
1348 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
1349 	);
1350 
1351 	/*
1352 	 * This will be overridden when the descriptor chain is written.
1353 	 */
1354 	bf->bf_lastds = ds;
1355 	bf->bf_last = bf;
1356 
1357 	/* Set rate control and descriptor chain for this frame */
1358 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1359 	ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1360 }
1361 
1362 /*
1363  * Do a rate lookup.
1364  *
1365  * This performs a rate lookup for the given ath_buf only if it's required.
1366  * Non-data frames and raw frames don't require it.
1367  *
1368  * This populates the primary and MRR entries; MRR values are
1369  * then disabled later on if something requires it (eg RTS/CTS on
1370  * pre-11n chipsets.
1371  *
1372  * This needs to be done before the RTS/CTS fields are calculated
1373  * as they may depend upon the rate chosen.
1374  */
1375 static void
ath_tx_do_ratelookup(struct ath_softc * sc,struct ath_buf * bf,int tid,int pktlen,int is_aggr)1376 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf, int tid,
1377     int pktlen, int is_aggr)
1378 {
1379 	uint8_t rate, rix;
1380 	int try0;
1381 	int maxdur; // Note: Unused for now
1382 	int maxpktlen;
1383 
1384 	if (! bf->bf_state.bfs_doratelookup)
1385 		return;
1386 
1387 	/* Get rid of any previous state */
1388 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1389 
1390 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1391 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1392 	    pktlen, tid, is_aggr, &rix, &try0, &rate, &maxdur, &maxpktlen);
1393 
1394 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
1395 	bf->bf_state.bfs_rc[0].rix = rix;
1396 	bf->bf_state.bfs_rc[0].ratecode = rate;
1397 	bf->bf_state.bfs_rc[0].tries = try0;
1398 
1399 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1400 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1401 		    is_aggr, bf->bf_state.bfs_rc);
1402 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1403 
1404 	sc->sc_txrix = rix;	/* for LED blinking */
1405 	sc->sc_lastdatarix = rix;	/* for fast frames */
1406 	bf->bf_state.bfs_try0 = try0;
1407 	bf->bf_state.bfs_txrate0 = rate;
1408 	bf->bf_state.bfs_rc_maxpktlen = maxpktlen;
1409 }
1410 
1411 /*
1412  * Update the CLRDMASK bit in the ath_buf if it needs to be set.
1413  */
1414 static void
ath_tx_update_clrdmask(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)1415 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
1416     struct ath_buf *bf)
1417 {
1418 	struct ath_node *an = ATH_NODE(bf->bf_node);
1419 
1420 	ATH_TX_LOCK_ASSERT(sc);
1421 
1422 	if (an->clrdmask == 1) {
1423 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1424 		an->clrdmask = 0;
1425 	}
1426 }
1427 
1428 /*
1429  * Return whether this frame should be software queued or
1430  * direct dispatched.
1431  *
1432  * When doing powersave, BAR frames should be queued but other management
1433  * frames should be directly sent.
1434  *
1435  * When not doing powersave, stick BAR frames into the hardware queue
1436  * so it goes out even though the queue is paused.
1437  *
1438  * For now, management frames are also software queued by default.
1439  */
1440 static int
ath_tx_should_swq_frame(struct ath_softc * sc,struct ath_node * an,struct mbuf * m0,int * queue_to_head)1441 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
1442     struct mbuf *m0, int *queue_to_head)
1443 {
1444 	struct ieee80211_node *ni = &an->an_node;
1445 	struct ieee80211_frame *wh;
1446 	uint8_t type, subtype;
1447 
1448 	wh = mtod(m0, struct ieee80211_frame *);
1449 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1450 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1451 
1452 	(*queue_to_head) = 0;
1453 
1454 	/* If it's not in powersave - direct-dispatch BAR */
1455 	if ((ATH_NODE(ni)->an_is_powersave == 0)
1456 	    && type == IEEE80211_FC0_TYPE_CTL &&
1457 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1458 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1459 		    "%s: BAR: TX'ing direct\n", __func__);
1460 		return (0);
1461 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1462 	    && type == IEEE80211_FC0_TYPE_CTL &&
1463 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1464 		/* BAR TX whilst asleep; queue */
1465 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1466 		    "%s: swq: TX'ing\n", __func__);
1467 		(*queue_to_head) = 1;
1468 		return (1);
1469 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1470 	    && (type == IEEE80211_FC0_TYPE_MGT ||
1471 	        type == IEEE80211_FC0_TYPE_CTL)) {
1472 		/*
1473 		 * Other control/mgmt frame; bypass software queuing
1474 		 * for now!
1475 		 */
1476 		DPRINTF(sc, ATH_DEBUG_XMIT,
1477 		    "%s: %6D: Node is asleep; sending mgmt "
1478 		    "(type=%d, subtype=%d)\n",
1479 		    __func__, ni->ni_macaddr, ":", type, subtype);
1480 		return (0);
1481 	} else {
1482 		return (1);
1483 	}
1484 }
1485 
1486 /*
1487  * Transmit the given frame to the hardware.
1488  *
1489  * The frame must already be setup; rate control must already have
1490  * been done.
1491  *
1492  * XXX since the TXQ lock is being held here (and I dislike holding
1493  * it for this long when not doing software aggregation), later on
1494  * break this function into "setup_normal" and "xmit_normal". The
1495  * lock only needs to be held for the ath_tx_handoff call.
1496  *
1497  * XXX we don't update the leak count here - if we're doing
1498  * direct frame dispatch, we need to be able to do it without
1499  * decrementing the leak count (eg multicast queue frames.)
1500  */
1501 static void
ath_tx_xmit_normal(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)1502 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1503     struct ath_buf *bf)
1504 {
1505 	struct ath_node *an = ATH_NODE(bf->bf_node);
1506 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1507 
1508 	ATH_TX_LOCK_ASSERT(sc);
1509 
1510 	/*
1511 	 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
1512 	 * set a completion handler however it doesn't (yet) properly
1513 	 * handle the strict ordering requirements needed for normal,
1514 	 * non-aggregate session frames.
1515 	 *
1516 	 * Once this is implemented, only set CLRDMASK like this for
1517 	 * frames that must go out - eg management/raw frames.
1518 	 */
1519 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1520 
1521 	/* Setup the descriptor before handoff */
1522 	ath_tx_do_ratelookup(sc, bf, tid->tid, bf->bf_state.bfs_pktlen, false);
1523 	ath_tx_calc_duration(sc, bf);
1524 	ath_tx_calc_protection(sc, bf);
1525 	ath_tx_set_rtscts(sc, bf);
1526 	ath_tx_rate_fill_rcflags(sc, bf);
1527 	ath_tx_setds(sc, bf);
1528 
1529 	/* Track per-TID hardware queue depth correctly */
1530 	tid->hwq_depth++;
1531 
1532 	/* Assign the completion handler */
1533 	bf->bf_comp = ath_tx_normal_comp;
1534 
1535 	/* Hand off to hardware */
1536 	ath_tx_handoff(sc, txq, bf);
1537 }
1538 
1539 /*
1540  * Do the basic frame setup stuff that's required before the frame
1541  * is added to a software queue.
1542  *
1543  * All frames get mostly the same treatment and it's done once.
1544  * Retransmits fiddle with things like the rate control setup,
1545  * setting the retransmit bit in the packet; doing relevant DMA/bus
1546  * syncing and relinking it (back) into the hardware TX queue.
1547  *
1548  * Note that this may cause the mbuf to be reallocated, so
1549  * m0 may not be valid.
1550  */
1551 static int
ath_tx_normal_setup(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0,struct ath_txq * txq)1552 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1553     struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1554 {
1555 	struct ieee80211vap *vap = ni->ni_vap;
1556 	struct ieee80211com *ic = &sc->sc_ic;
1557 	int error, iswep, ismcast, isfrag, ismrr;
1558 	int keyix, hdrlen, pktlen, try0 = 0;
1559 	u_int8_t rix = 0, txrate = 0;
1560 	struct ath_desc *ds;
1561 	struct ieee80211_frame *wh;
1562 	u_int subtype, flags;
1563 	HAL_PKT_TYPE atype;
1564 	const HAL_RATE_TABLE *rt;
1565 	HAL_BOOL shortPreamble;
1566 	struct ath_node *an;
1567 
1568 	/* XXX TODO: this pri is only used for non-QoS check, right? */
1569 	u_int pri;
1570 
1571 	/*
1572 	 * To ensure that both sequence numbers and the CCMP PN handling
1573 	 * is "correct", make sure that the relevant TID queue is locked.
1574 	 * Otherwise the CCMP PN and seqno may appear out of order, causing
1575 	 * re-ordered frames to have out of order CCMP PN's, resulting
1576 	 * in many, many frame drops.
1577 	 */
1578 	ATH_TX_LOCK_ASSERT(sc);
1579 
1580 	wh = mtod(m0, struct ieee80211_frame *);
1581 	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1582 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1583 	isfrag = m0->m_flags & M_FRAG;
1584 	hdrlen = ieee80211_anyhdrsize(wh);
1585 	/*
1586 	 * Packet length must not include any
1587 	 * pad bytes; deduct them here.
1588 	 */
1589 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1590 
1591 	/* seqno allocate, only if AMPDU isn't running */
1592 	if ((m0->m_flags & M_AMPDU_MPDU) == 0)
1593 		ieee80211_output_seqno_assign(ni, -1, m0);
1594 
1595 	/* Handle encryption twiddling if needed */
1596 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1597 	    &pktlen, &keyix)) {
1598 		ieee80211_free_mbuf(m0);
1599 		return EIO;
1600 	}
1601 
1602 	/* packet header may have moved, reset our local pointer */
1603 	wh = mtod(m0, struct ieee80211_frame *);
1604 
1605 	pktlen += IEEE80211_CRC_LEN;
1606 
1607 	/*
1608 	 * Load the DMA map so any coalescing is done.  This
1609 	 * also calculates the number of descriptors we need.
1610 	 */
1611 	error = ath_tx_dmasetup(sc, bf, m0);
1612 	if (error != 0)
1613 		return error;
1614 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
1615 	bf->bf_node = ni;			/* NB: held reference */
1616 	m0 = bf->bf_m;				/* NB: may have changed */
1617 	wh = mtod(m0, struct ieee80211_frame *);
1618 
1619 	/* setup descriptors */
1620 	ds = bf->bf_desc;
1621 	rt = sc->sc_currates;
1622 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1623 
1624 	/*
1625 	 * NB: the 802.11 layer marks whether or not we should
1626 	 * use short preamble based on the current mode and
1627 	 * negotiated parameters.
1628 	 */
1629 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1630 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1631 		shortPreamble = AH_TRUE;
1632 		sc->sc_stats.ast_tx_shortpre++;
1633 	} else {
1634 		shortPreamble = AH_FALSE;
1635 	}
1636 
1637 	an = ATH_NODE(ni);
1638 	//flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
1639 	flags = 0;
1640 	ismrr = 0;				/* default no multi-rate retry*/
1641 
1642 	pri = ath_tx_getac(sc, m0);			/* honor classification */
1643 	/* XXX use txparams instead of fixed values */
1644 	/*
1645 	 * Calculate Atheros packet type from IEEE80211 packet header,
1646 	 * setup for rate calculations, and select h/w transmit queue.
1647 	 */
1648 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1649 	case IEEE80211_FC0_TYPE_MGT:
1650 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1651 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1652 			atype = HAL_PKT_TYPE_BEACON;
1653 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1654 			atype = HAL_PKT_TYPE_PROBE_RESP;
1655 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1656 			atype = HAL_PKT_TYPE_ATIM;
1657 		else
1658 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1659 		rix = an->an_mgmtrix;
1660 		txrate = rt->info[rix].rateCode;
1661 		if (shortPreamble)
1662 			txrate |= rt->info[rix].shortPreamble;
1663 		try0 = ATH_TXMGTTRY;
1664 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1665 		break;
1666 	case IEEE80211_FC0_TYPE_CTL:
1667 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1668 		rix = an->an_mgmtrix;
1669 		txrate = rt->info[rix].rateCode;
1670 		if (shortPreamble)
1671 			txrate |= rt->info[rix].shortPreamble;
1672 		try0 = ATH_TXMGTTRY;
1673 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1674 		break;
1675 	case IEEE80211_FC0_TYPE_DATA:
1676 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1677 		/*
1678 		 * Data frames: multicast frames go out at a fixed rate,
1679 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1680 		 * the rate control module for the rate to use.
1681 		 */
1682 		if (ismcast) {
1683 			rix = an->an_mcastrix;
1684 			txrate = rt->info[rix].rateCode;
1685 			if (shortPreamble)
1686 				txrate |= rt->info[rix].shortPreamble;
1687 			try0 = 1;
1688 		} else if (m0->m_flags & M_EAPOL) {
1689 			/* XXX? maybe always use long preamble? */
1690 			rix = an->an_mgmtrix;
1691 			txrate = rt->info[rix].rateCode;
1692 			if (shortPreamble)
1693 				txrate |= rt->info[rix].shortPreamble;
1694 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1695 		} else {
1696 			/*
1697 			 * Do rate lookup on each TX, rather than using
1698 			 * the hard-coded TX information decided here.
1699 			 */
1700 			ismrr = 1;
1701 			bf->bf_state.bfs_doratelookup = 1;
1702 		}
1703 
1704 		/*
1705 		 * Check whether to set NOACK for this WME category or not.
1706 		 */
1707 		if (ieee80211_wme_vap_ac_is_noack(vap, pri))
1708 			flags |= HAL_TXDESC_NOACK;
1709 		break;
1710 	default:
1711 		device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n",
1712 		    wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1713 		/* XXX statistic */
1714 		/* XXX free tx dmamap */
1715 		ieee80211_free_mbuf(m0);
1716 		return EIO;
1717 	}
1718 
1719 	/*
1720 	 * There are two known scenarios where the frame AC doesn't match
1721 	 * what the destination TXQ is.
1722 	 *
1723 	 * + non-QoS frames (eg management?) that the net80211 stack has
1724 	 *   assigned a higher AC to, but since it's a non-QoS TID, it's
1725 	 *   being thrown into TID 16.  TID 16 gets the AC_BE queue.
1726 	 *   It's quite possible that management frames should just be
1727 	 *   direct dispatched to hardware rather than go via the software
1728 	 *   queue; that should be investigated in the future.  There are
1729 	 *   some specific scenarios where this doesn't make sense, mostly
1730 	 *   surrounding ADDBA request/response - hence why that is special
1731 	 *   cased.
1732 	 *
1733 	 * + Multicast frames going into the VAP mcast queue.  That shows up
1734 	 *   as "TXQ 11".
1735 	 *
1736 	 * This driver should eventually support separate TID and TXQ locking,
1737 	 * allowing for arbitrary AC frames to appear on arbitrary software
1738 	 * queues, being queued to the "correct" hardware queue when needed.
1739 	 */
1740 #if 0
1741 	if (txq != sc->sc_ac2q[pri]) {
1742 		DPRINTF(sc, ATH_DEBUG_XMIT,
1743 		    "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1744 		    __func__,
1745 		    txq,
1746 		    txq->axq_qnum,
1747 		    pri,
1748 		    sc->sc_ac2q[pri],
1749 		    sc->sc_ac2q[pri]->axq_qnum);
1750 	}
1751 #endif
1752 
1753 	/*
1754 	 * Calculate miscellaneous flags.
1755 	 */
1756 	if (ismcast) {
1757 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1758 	} else if (pktlen > vap->iv_rtsthreshold &&
1759 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1760 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1761 		sc->sc_stats.ast_tx_rts++;
1762 	}
1763 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1764 		sc->sc_stats.ast_tx_noack++;
1765 #ifdef IEEE80211_SUPPORT_TDMA
1766 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1767 		DPRINTF(sc, ATH_DEBUG_TDMA,
1768 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1769 		sc->sc_stats.ast_tdma_ack++;
1770 		/* XXX free tx dmamap */
1771 		ieee80211_free_mbuf(m0);
1772 		return EIO;
1773 	}
1774 #endif
1775 
1776 	/*
1777 	 * If it's a frame to do location reporting on,
1778 	 * communicate it to the HAL.
1779 	 */
1780 	if (ieee80211_get_toa_params(m0, NULL)) {
1781 		device_printf(sc->sc_dev,
1782 		    "%s: setting TX positioning bit\n", __func__);
1783 		flags |= HAL_TXDESC_POS;
1784 
1785 		/*
1786 		 * Note: The hardware reports timestamps for
1787 		 * each of the RX'ed packets as part of the packet
1788 		 * exchange.  So this means things like RTS/CTS
1789 		 * exchanges, as well as the final ACK.
1790 		 *
1791 		 * So, if you send a RTS-protected NULL data frame,
1792 		 * you'll get an RX report for the RTS response, then
1793 		 * an RX report for the NULL frame, and then the TX
1794 		 * completion at the end.
1795 		 *
1796 		 * NOTE: it doesn't work right for CCK frames;
1797 		 * there's no channel info data provided unless
1798 		 * it's OFDM or HT.  Will have to dig into it.
1799 		 */
1800 		flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
1801 		bf->bf_flags |= ATH_BUF_TOA_PROBE;
1802 	}
1803 
1804 #if 0
1805 	/*
1806 	 * Placeholder: if you want to transmit with the azimuth
1807 	 * timestamp in the end of the payload, here's where you
1808 	 * should set the TXDESC field.
1809 	 */
1810 	flags |= HAL_TXDESC_HWTS;
1811 #endif
1812 
1813 	/*
1814 	 * Determine if a tx interrupt should be generated for
1815 	 * this descriptor.  We take a tx interrupt to reap
1816 	 * descriptors when the h/w hits an EOL condition or
1817 	 * when the descriptor is specifically marked to generate
1818 	 * an interrupt.  We periodically mark descriptors in this
1819 	 * way to insure timely replenishing of the supply needed
1820 	 * for sending frames.  Defering interrupts reduces system
1821 	 * load and potentially allows more concurrent work to be
1822 	 * done but if done to aggressively can cause senders to
1823 	 * backup.
1824 	 *
1825 	 * NB: use >= to deal with sc_txintrperiod changing
1826 	 *     dynamically through sysctl.
1827 	 */
1828 	if (flags & HAL_TXDESC_INTREQ) {
1829 		txq->axq_intrcnt = 0;
1830 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1831 		flags |= HAL_TXDESC_INTREQ;
1832 		txq->axq_intrcnt = 0;
1833 	}
1834 
1835 	/* This point forward is actual TX bits */
1836 
1837 	/*
1838 	 * At this point we are committed to sending the frame
1839 	 * and we don't need to look at m_nextpkt; clear it in
1840 	 * case this frame is part of frag chain.
1841 	 */
1842 	m0->m_nextpkt = NULL;
1843 
1844 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1845 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1846 		    sc->sc_hwmap[rix].ieeerate, -1);
1847 
1848 	if (ieee80211_radiotap_active_vap(vap)) {
1849 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1850 		if (iswep)
1851 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1852 		if (isfrag)
1853 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1854 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1855 		sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1856 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1857 
1858 		ieee80211_radiotap_tx(vap, m0);
1859 	}
1860 
1861 	/* Blank the legacy rate array */
1862 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1863 
1864 	/*
1865 	 * ath_buf_set_rate needs at least one rate/try to setup
1866 	 * the rate scenario.
1867 	 */
1868 	bf->bf_state.bfs_rc[0].rix = rix;
1869 	bf->bf_state.bfs_rc[0].tries = try0;
1870 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1871 
1872 	/* Store the decided rate index values away */
1873 	bf->bf_state.bfs_pktlen = pktlen;
1874 	bf->bf_state.bfs_hdrlen = hdrlen;
1875 	bf->bf_state.bfs_atype = atype;
1876 	bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1877 	bf->bf_state.bfs_txrate0 = txrate;
1878 	bf->bf_state.bfs_try0 = try0;
1879 	bf->bf_state.bfs_keyix = keyix;
1880 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1881 	bf->bf_state.bfs_txflags = flags;
1882 	bf->bf_state.bfs_shpream = shortPreamble;
1883 
1884 	/* XXX this should be done in ath_tx_setrate() */
1885 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1886 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1887 	bf->bf_state.bfs_ctsduration = 0;
1888 	bf->bf_state.bfs_ismrr = ismrr;
1889 
1890 	return 0;
1891 }
1892 
1893 /*
1894  * Queue a frame to the hardware or software queue.
1895  *
1896  * This can be called by the net80211 code.
1897  *
1898  * XXX what about locking? Or, push the seqno assign into the
1899  * XXX aggregate scheduler so its serialised?
1900  *
1901  * XXX When sending management frames via ath_raw_xmit(),
1902  *     should CLRDMASK be set unconditionally?
1903  */
1904 int
ath_tx_start(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0)1905 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1906     struct ath_buf *bf, struct mbuf *m0)
1907 {
1908 	struct ieee80211vap *vap = ni->ni_vap;
1909 	struct ath_vap *avp = ATH_VAP(vap);
1910 	int r = 0;
1911 	u_int pri;
1912 	int tid;
1913 	struct ath_txq *txq;
1914 	int ismcast;
1915 	const struct ieee80211_frame *wh;
1916 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1917 	ieee80211_seq seqno;
1918 	uint8_t type, subtype;
1919 	int queue_to_head;
1920 
1921 	ATH_TX_LOCK_ASSERT(sc);
1922 
1923 	/*
1924 	 * Determine the target hardware queue.
1925 	 *
1926 	 * For multicast frames, the txq gets overridden appropriately
1927 	 * depending upon the state of PS.  If powersave is enabled
1928 	 * then they get added to the cabq for later transmit.
1929 	 *
1930 	 * The "fun" issue here is that group addressed frames should
1931 	 * have the sequence number from a different pool, rather than
1932 	 * the per-TID pool.  That means that even QoS group addressed
1933 	 * frames will have a sequence number from that global value,
1934 	 * which means if we transmit different group addressed frames
1935 	 * at different traffic priorities, the sequence numbers will
1936 	 * all be out of whack.  So - chances are, the right thing
1937 	 * to do here is to always put group addressed frames into the BE
1938 	 * queue, and ignore the TID for queue selection.
1939 	 *
1940 	 * For any other frame, we do a TID/QoS lookup inside the frame
1941 	 * to see what the TID should be. If it's a non-QoS frame, the
1942 	 * AC and TID are overridden. The TID/TXQ code assumes the
1943 	 * TID is on a predictable hardware TXQ, so we don't support
1944 	 * having a node TID queued to multiple hardware TXQs.
1945 	 * This may change in the future but would require some locking
1946 	 * fudgery.
1947 	 */
1948 	pri = ath_tx_getac(sc, m0);
1949 	tid = ath_tx_gettid(sc, m0);
1950 
1951 	txq = sc->sc_ac2q[pri];
1952 	wh = mtod(m0, struct ieee80211_frame *);
1953 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1954 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1955 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1956 
1957 	/*
1958 	 * Enforce how deep the multicast queue can grow.
1959 	 *
1960 	 * XXX duplicated in ath_raw_xmit().
1961 	 */
1962 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1963 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
1964 		    > sc->sc_txq_mcastq_maxdepth) {
1965 			sc->sc_stats.ast_tx_mcastq_overflow++;
1966 			m_freem(m0);
1967 			return (ENOBUFS);
1968 		}
1969 	}
1970 
1971 	/*
1972 	 * Enforce how deep the unicast queue can grow.
1973 	 *
1974 	 * If the node is in power save then we don't want
1975 	 * the software queue to grow too deep, or a node may
1976 	 * end up consuming all of the ath_buf entries.
1977 	 *
1978 	 * For now, only do this for DATA frames.
1979 	 *
1980 	 * We will want to cap how many management/control
1981 	 * frames get punted to the software queue so it doesn't
1982 	 * fill up.  But the correct solution isn't yet obvious.
1983 	 * In any case, this check should at least let frames pass
1984 	 * that we are direct-dispatching.
1985 	 *
1986 	 * XXX TODO: duplicate this to the raw xmit path!
1987 	 */
1988 	if (type == IEEE80211_FC0_TYPE_DATA &&
1989 	    ATH_NODE(ni)->an_is_powersave &&
1990 	    ATH_NODE(ni)->an_swq_depth >
1991 	     sc->sc_txq_node_psq_maxdepth) {
1992 		sc->sc_stats.ast_tx_node_psq_overflow++;
1993 		m_freem(m0);
1994 		return (ENOBUFS);
1995 	}
1996 
1997 	/* A-MPDU TX */
1998 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1999 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
2000 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
2001 
2002 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
2003 	    __func__, tid, pri, is_ampdu);
2004 
2005 	/* Set local packet state, used to queue packets to hardware */
2006 	bf->bf_state.bfs_tid = tid;
2007 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
2008 	bf->bf_state.bfs_pri = pri;
2009 
2010 #if 1
2011 	/*
2012 	 * When servicing one or more stations in power-save mode
2013 	 * (or) if there is some mcast data waiting on the mcast
2014 	 * queue (to prevent out of order delivery) multicast frames
2015 	 * must be bufferd until after the beacon.
2016 	 *
2017 	 * TODO: we should lock the mcastq before we check the length.
2018 	 */
2019 	if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
2020 		txq = &avp->av_mcastq;
2021 		/*
2022 		 * Mark the frame as eventually belonging on the CAB
2023 		 * queue, so the descriptor setup functions will
2024 		 * correctly initialise the descriptor 'qcuId' field.
2025 		 */
2026 		bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
2027 	}
2028 #endif
2029 
2030 	/* Do the generic frame setup */
2031 	/* XXX should just bzero the bf_state? */
2032 	bf->bf_state.bfs_dobaw = 0;
2033 
2034 	/* A-MPDU TX? Manually set sequence number */
2035 	/*
2036 	 * Don't do it whilst pending; the net80211 layer still
2037 	 * assigns them.
2038 	 *
2039 	 * Don't assign A-MPDU sequence numbers to group address
2040 	 * frames; they come from a different sequence number space.
2041 	 */
2042 	if (is_ampdu_tx && (! IEEE80211_IS_MULTICAST(wh->i_addr1))) {
2043 		/*
2044 		 * Always call; this function will
2045 		 * handle making sure that null data frames
2046 		 * and group-addressed frames don't get a sequence number
2047 		 * from the current TID and thus mess with the BAW.
2048 		 */
2049 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
2050 
2051 		/*
2052 		 * Don't add QoS NULL frames and group-addressed frames
2053 		 * to the BAW.
2054 		 */
2055 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
2056 		    (! IEEE80211_IS_MULTICAST(wh->i_addr1)) &&
2057 		    (! IEEE80211_IS_QOS_NULL(wh))) {
2058 			bf->bf_state.bfs_dobaw = 1;
2059 		}
2060 	}
2061 
2062 	/*
2063 	 * If needed, the sequence number has been assigned.
2064 	 * Squirrel it away somewhere easy to get to.
2065 	 */
2066 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
2067 
2068 	/* Is ampdu pending? fetch the seqno and print it out */
2069 	if (is_ampdu_pending)
2070 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2071 		    "%s: tid %d: ampdu pending, seqno %d\n",
2072 		    __func__, tid, M_SEQNO_GET(m0));
2073 
2074 	/* This also sets up the DMA map; crypto; frame parameters, etc */
2075 	r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
2076 
2077 	if (r != 0)
2078 		goto done;
2079 
2080 	/* At this point m0 could have changed! */
2081 	m0 = bf->bf_m;
2082 
2083 #if 1
2084 	/*
2085 	 * If it's a multicast frame, do a direct-dispatch to the
2086 	 * destination hardware queue. Don't bother software
2087 	 * queuing it.
2088 	 */
2089 	/*
2090 	 * If it's a BAR frame, do a direct dispatch to the
2091 	 * destination hardware queue. Don't bother software
2092 	 * queuing it, as the TID will now be paused.
2093 	 * Sending a BAR frame can occur from the net80211 txa timer
2094 	 * (ie, retries) or from the ath txtask (completion call.)
2095 	 * It queues directly to hardware because the TID is paused
2096 	 * at this point (and won't be unpaused until the BAR has
2097 	 * either been TXed successfully or max retries has been
2098 	 * reached.)
2099 	 */
2100 	/*
2101 	 * Until things are better debugged - if this node is asleep
2102 	 * and we're sending it a non-BAR frame, direct dispatch it.
2103 	 * Why? Because we need to figure out what's actually being
2104 	 * sent - eg, during reassociation/reauthentication after
2105 	 * the node (last) disappeared whilst asleep, the driver should
2106 	 * have unpaused/unsleep'ed the node.  So until that is
2107 	 * sorted out, use this workaround.
2108 	 */
2109 	if (txq == &avp->av_mcastq) {
2110 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2111 		    "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
2112 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2113 		ath_tx_xmit_normal(sc, txq, bf);
2114 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2115 	    &queue_to_head)) {
2116 		ath_tx_swq(sc, ni, txq, queue_to_head, bf);
2117 	} else {
2118 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2119 		ath_tx_xmit_normal(sc, txq, bf);
2120 	}
2121 #else
2122 	/*
2123 	 * For now, since there's no software queue,
2124 	 * direct-dispatch to the hardware.
2125 	 */
2126 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2127 	/*
2128 	 * Update the current leak count if
2129 	 * we're leaking frames; and set the
2130 	 * MORE flag as appropriate.
2131 	 */
2132 	ath_tx_leak_count_update(sc, tid, bf);
2133 	ath_tx_xmit_normal(sc, txq, bf);
2134 #endif
2135 done:
2136 	return 0;
2137 }
2138 
2139 static int
ath_tx_raw_start(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0,const struct ieee80211_bpf_params * params)2140 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2141 	struct ath_buf *bf, struct mbuf *m0,
2142 	const struct ieee80211_bpf_params *params)
2143 {
2144 	struct ieee80211com *ic = &sc->sc_ic;
2145 	struct ieee80211vap *vap = ni->ni_vap;
2146 	int error, ismcast, ismrr;
2147 	int keyix, hdrlen, pktlen, try0, txantenna;
2148 	u_int8_t rix, txrate;
2149 	struct ieee80211_frame *wh;
2150 	u_int flags;
2151 	HAL_PKT_TYPE atype;
2152 	const HAL_RATE_TABLE *rt;
2153 	struct ath_desc *ds;
2154 	u_int pri;
2155 	int o_tid = -1;
2156 	int do_override;
2157 	uint8_t type, subtype;
2158 	int queue_to_head;
2159 	struct ath_node *an = ATH_NODE(ni);
2160 
2161 	ATH_TX_LOCK_ASSERT(sc);
2162 
2163 	wh = mtod(m0, struct ieee80211_frame *);
2164 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2165 	hdrlen = ieee80211_anyhdrsize(wh);
2166 	/*
2167 	 * Packet length must not include any
2168 	 * pad bytes; deduct them here.
2169 	 */
2170 	/* XXX honor IEEE80211_BPF_DATAPAD */
2171 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2172 
2173 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2174 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2175 
2176 	ATH_KTR(sc, ATH_KTR_TX, 2,
2177 	     "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
2178 
2179 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2180 	    __func__, ismcast);
2181 
2182 	pri = params->ibp_pri & 3;
2183 	/* Override pri if the frame isn't a QoS one */
2184 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2185 		pri = ath_tx_getac(sc, m0);
2186 
2187 	/* XXX If it's an ADDBA, override the correct queue */
2188 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
2189 
2190 	/* Map ADDBA to the correct priority */
2191 	if (do_override) {
2192 #if 1
2193 		DPRINTF(sc, ATH_DEBUG_XMIT,
2194 		    "%s: overriding tid %d pri %d -> %d\n",
2195 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
2196 #endif
2197 		pri = TID_TO_WME_AC(o_tid);
2198 	}
2199 
2200 	/*
2201 	 * "pri" is the hardware queue to transmit on.
2202 	 *
2203 	 * Look at the description in ath_tx_start() to understand
2204 	 * what needs to be "fixed" here so we just use the TID
2205 	 * for QoS frames.
2206 	 */
2207 
2208 	/* seqno allocate, only if AMPDU isn't running */
2209 	if ((m0->m_flags & M_AMPDU_MPDU) == 0)
2210 		ieee80211_output_seqno_assign(ni, -1, m0);
2211 
2212 	/* Handle encryption twiddling if needed */
2213 	if (! ath_tx_tag_crypto(sc, ni,
2214 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2215 	    &hdrlen, &pktlen, &keyix)) {
2216 		ieee80211_free_mbuf(m0);
2217 		return EIO;
2218 	}
2219 	/* packet header may have moved, reset our local pointer */
2220 	wh = mtod(m0, struct ieee80211_frame *);
2221 
2222 	/* Do the generic frame setup */
2223 	/* XXX should just bzero the bf_state? */
2224 	bf->bf_state.bfs_dobaw = 0;
2225 
2226 	error = ath_tx_dmasetup(sc, bf, m0);
2227 	if (error != 0)
2228 		return error;
2229 	m0 = bf->bf_m;				/* NB: may have changed */
2230 	wh = mtod(m0, struct ieee80211_frame *);
2231 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
2232 	bf->bf_node = ni;			/* NB: held reference */
2233 
2234 	/* Always enable CLRDMASK for raw frames for now.. */
2235 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
2236 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
2237 	if (params->ibp_flags & IEEE80211_BPF_RTS)
2238 		flags |= HAL_TXDESC_RTSENA;
2239 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2240 		/* XXX assume 11g/11n protection? */
2241 		bf->bf_state.bfs_doprot = 1;
2242 		flags |= HAL_TXDESC_CTSENA;
2243 	}
2244 	/* XXX leave ismcast to injector? */
2245 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2246 		flags |= HAL_TXDESC_NOACK;
2247 
2248 	rt = sc->sc_currates;
2249 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2250 
2251 	/* Fetch first rate information */
2252 	rix = ath_tx_findrix(sc, params->ibp_rate0);
2253 	try0 = params->ibp_try0;
2254 
2255 	/*
2256 	 * Override EAPOL rate as appropriate.
2257 	 */
2258 	if (m0->m_flags & M_EAPOL) {
2259 		/* XXX? maybe always use long preamble? */
2260 		rix = an->an_mgmtrix;
2261 		try0 = ATH_TXMAXTRY;	/* XXX?too many? */
2262 	}
2263 
2264 	/*
2265 	 * If it's a frame to do location reporting on,
2266 	 * communicate it to the HAL.
2267 	 */
2268 	if (ieee80211_get_toa_params(m0, NULL)) {
2269 		device_printf(sc->sc_dev,
2270 		    "%s: setting TX positioning bit\n", __func__);
2271 		flags |= HAL_TXDESC_POS;
2272 		flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
2273 		bf->bf_flags |= ATH_BUF_TOA_PROBE;
2274 	}
2275 
2276 	txrate = rt->info[rix].rateCode;
2277 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2278 		txrate |= rt->info[rix].shortPreamble;
2279 	sc->sc_txrix = rix;
2280 	ismrr = (params->ibp_try1 != 0);
2281 	txantenna = params->ibp_pri >> 2;
2282 	if (txantenna == 0)			/* XXX? */
2283 		txantenna = sc->sc_txantenna;
2284 
2285 	/*
2286 	 * Since ctsrate is fixed, store it away for later
2287 	 * use when the descriptor fields are being set.
2288 	 */
2289 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2290 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
2291 
2292 	/*
2293 	 * NB: we mark all packets as type PSPOLL so the h/w won't
2294 	 * set the sequence number, duration, etc.
2295 	 */
2296 	atype = HAL_PKT_TYPE_PSPOLL;
2297 
2298 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2299 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2300 		    sc->sc_hwmap[rix].ieeerate, -1);
2301 
2302 	if (ieee80211_radiotap_active_vap(vap)) {
2303 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2304 		if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2305 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2306 		if (m0->m_flags & M_FRAG)
2307 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2308 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
2309 		sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
2310 		    ieee80211_get_node_txpower(ni));
2311 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2312 
2313 		ieee80211_radiotap_tx(vap, m0);
2314 	}
2315 
2316 	/*
2317 	 * Formulate first tx descriptor with tx controls.
2318 	 */
2319 	ds = bf->bf_desc;
2320 	/* XXX check return value? */
2321 
2322 	/* Store the decided rate index values away */
2323 	bf->bf_state.bfs_pktlen = pktlen;
2324 	bf->bf_state.bfs_hdrlen = hdrlen;
2325 	bf->bf_state.bfs_atype = atype;
2326 	bf->bf_state.bfs_txpower = MIN(params->ibp_power,
2327 	    ieee80211_get_node_txpower(ni));
2328 	bf->bf_state.bfs_txrate0 = txrate;
2329 	bf->bf_state.bfs_try0 = try0;
2330 	bf->bf_state.bfs_keyix = keyix;
2331 	bf->bf_state.bfs_txantenna = txantenna;
2332 	bf->bf_state.bfs_txflags = flags;
2333 	bf->bf_state.bfs_shpream =
2334 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2335 
2336 	/* Set local packet state, used to queue packets to hardware */
2337 	bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2338 	bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
2339 	bf->bf_state.bfs_pri = pri;
2340 
2341 	/* XXX this should be done in ath_tx_setrate() */
2342 	bf->bf_state.bfs_ctsrate = 0;
2343 	bf->bf_state.bfs_ctsduration = 0;
2344 	bf->bf_state.bfs_ismrr = ismrr;
2345 
2346 	/* Blank the legacy rate array */
2347 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2348 
2349 	bf->bf_state.bfs_rc[0].rix = rix;
2350 	bf->bf_state.bfs_rc[0].tries = try0;
2351 	bf->bf_state.bfs_rc[0].ratecode = txrate;
2352 
2353 	if (ismrr) {
2354 		int rix;
2355 
2356 		rix = ath_tx_findrix(sc, params->ibp_rate1);
2357 		bf->bf_state.bfs_rc[1].rix = rix;
2358 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2359 
2360 		rix = ath_tx_findrix(sc, params->ibp_rate2);
2361 		bf->bf_state.bfs_rc[2].rix = rix;
2362 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2363 
2364 		rix = ath_tx_findrix(sc, params->ibp_rate3);
2365 		bf->bf_state.bfs_rc[3].rix = rix;
2366 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2367 	}
2368 	/*
2369 	 * All the required rate control decisions have been made;
2370 	 * fill in the rc flags.
2371 	 */
2372 	ath_tx_rate_fill_rcflags(sc, bf);
2373 
2374 	/* NB: no buffered multicast in power save support */
2375 
2376 	/*
2377 	 * If we're overiding the ADDBA destination, dump directly
2378 	 * into the hardware queue, right after any pending
2379 	 * frames to that node are.
2380 	 */
2381 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2382 	    __func__, do_override);
2383 
2384 #if 1
2385 	/*
2386 	 * Put addba frames in the right place in the right TID/HWQ.
2387 	 */
2388 	if (do_override) {
2389 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2390 		/*
2391 		 * XXX if it's addba frames, should we be leaking
2392 		 * them out via the frame leak method?
2393 		 * XXX for now let's not risk it; but we may wish
2394 		 * to investigate this later.
2395 		 */
2396 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2397 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2398 	    &queue_to_head)) {
2399 		/* Queue to software queue */
2400 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
2401 	} else {
2402 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2403 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2404 	}
2405 #else
2406 	/* Direct-dispatch to the hardware */
2407 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2408 	/*
2409 	 * Update the current leak count if
2410 	 * we're leaking frames; and set the
2411 	 * MORE flag as appropriate.
2412 	 */
2413 	ath_tx_leak_count_update(sc, tid, bf);
2414 	ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2415 #endif
2416 	return 0;
2417 }
2418 
2419 /*
2420  * Send a raw frame.
2421  *
2422  * This can be called by net80211.
2423  */
2424 int
ath_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)2425 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2426 	const struct ieee80211_bpf_params *params)
2427 {
2428 	struct ieee80211com *ic = ni->ni_ic;
2429 	struct ath_softc *sc = ic->ic_softc;
2430 	struct ath_buf *bf;
2431 	struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
2432 	int error = 0;
2433 
2434 	ATH_PCU_LOCK(sc);
2435 	if (sc->sc_inreset_cnt > 0) {
2436 		DPRINTF(sc, ATH_DEBUG_XMIT,
2437 		    "%s: sc_inreset_cnt > 0; bailing\n", __func__);
2438 		error = EIO;
2439 		ATH_PCU_UNLOCK(sc);
2440 		goto badbad;
2441 	}
2442 	sc->sc_txstart_cnt++;
2443 	ATH_PCU_UNLOCK(sc);
2444 
2445 	/* Wake the hardware up already */
2446 	ATH_LOCK(sc);
2447 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
2448 	ATH_UNLOCK(sc);
2449 
2450 	ATH_TX_LOCK(sc);
2451 
2452 	if (!sc->sc_running || sc->sc_invalid) {
2453 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d",
2454 		    __func__, sc->sc_running, sc->sc_invalid);
2455 		m_freem(m);
2456 		error = ENETDOWN;
2457 		goto bad;
2458 	}
2459 
2460 	/*
2461 	 * Enforce how deep the multicast queue can grow.
2462 	 *
2463 	 * XXX duplicated in ath_tx_start().
2464 	 */
2465 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2466 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
2467 		    > sc->sc_txq_mcastq_maxdepth) {
2468 			sc->sc_stats.ast_tx_mcastq_overflow++;
2469 			error = ENOBUFS;
2470 		}
2471 
2472 		if (error != 0) {
2473 			m_freem(m);
2474 			goto bad;
2475 		}
2476 	}
2477 
2478 	/*
2479 	 * Grab a TX buffer and associated resources.
2480 	 */
2481 	bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2482 	if (bf == NULL) {
2483 		sc->sc_stats.ast_tx_nobuf++;
2484 		m_freem(m);
2485 		error = ENOBUFS;
2486 		goto bad;
2487 	}
2488 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
2489 	    m, params,  bf);
2490 
2491 	if (params == NULL) {
2492 		/*
2493 		 * Legacy path; interpret frame contents to decide
2494 		 * precisely how to send the frame.
2495 		 */
2496 		if (ath_tx_start(sc, ni, bf, m)) {
2497 			error = EIO;		/* XXX */
2498 			goto bad2;
2499 		}
2500 	} else {
2501 		/*
2502 		 * Caller supplied explicit parameters to use in
2503 		 * sending the frame.
2504 		 */
2505 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2506 			error = EIO;		/* XXX */
2507 			goto bad2;
2508 		}
2509 	}
2510 	sc->sc_wd_timer = 5;
2511 	sc->sc_stats.ast_tx_raw++;
2512 
2513 	/*
2514 	 * Update the TIM - if there's anything queued to the
2515 	 * software queue and power save is enabled, we should
2516 	 * set the TIM.
2517 	 */
2518 	ath_tx_update_tim(sc, ni, 1);
2519 
2520 	ATH_TX_UNLOCK(sc);
2521 
2522 	ATH_PCU_LOCK(sc);
2523 	sc->sc_txstart_cnt--;
2524 	ATH_PCU_UNLOCK(sc);
2525 
2526 	/* Put the hardware back to sleep if required */
2527 	ATH_LOCK(sc);
2528 	ath_power_restore_power_state(sc);
2529 	ATH_UNLOCK(sc);
2530 
2531 	return 0;
2532 
2533 bad2:
2534 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
2535 	    "bf=%p",
2536 	    m,
2537 	    params,
2538 	    bf);
2539 	ATH_TXBUF_LOCK(sc);
2540 	ath_returnbuf_head(sc, bf);
2541 	ATH_TXBUF_UNLOCK(sc);
2542 
2543 bad:
2544 	ATH_TX_UNLOCK(sc);
2545 
2546 	ATH_PCU_LOCK(sc);
2547 	sc->sc_txstart_cnt--;
2548 	ATH_PCU_UNLOCK(sc);
2549 
2550 	/* Put the hardware back to sleep if required */
2551 	ATH_LOCK(sc);
2552 	ath_power_restore_power_state(sc);
2553 	ATH_UNLOCK(sc);
2554 
2555 badbad:
2556 	ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
2557 	    m, params);
2558 	sc->sc_stats.ast_tx_raw_fail++;
2559 
2560 	return error;
2561 }
2562 
2563 /* Some helper functions */
2564 
2565 /*
2566  * ADDBA (and potentially others) need to be placed in the same
2567  * hardware queue as the TID/node it's relating to. This is so
2568  * it goes out after any pending non-aggregate frames to the
2569  * same node/TID.
2570  *
2571  * If this isn't done, the ADDBA can go out before the frames
2572  * queued in hardware. Even though these frames have a sequence
2573  * number -earlier- than the ADDBA can be transmitted (but
2574  * no frames whose sequence numbers are after the ADDBA should
2575  * be!) they'll arrive after the ADDBA - and the receiving end
2576  * will simply drop them as being out of the BAW.
2577  *
2578  * The frames can't be appended to the TID software queue - it'll
2579  * never be sent out. So these frames have to be directly
2580  * dispatched to the hardware, rather than queued in software.
2581  * So if this function returns true, the TXQ has to be
2582  * overridden and it has to be directly dispatched.
2583  *
2584  * It's a dirty hack, but someone's gotta do it.
2585  */
2586 
2587 /*
2588  * Return an alternate TID for ADDBA request frames.
2589  *
2590  * Yes, this likely should be done in the net80211 layer.
2591  */
2592 static int
ath_tx_action_frame_override_queue(struct ath_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,int * tid)2593 ath_tx_action_frame_override_queue(struct ath_softc *sc,
2594     struct ieee80211_node *ni,
2595     struct mbuf *m0, int *tid)
2596 {
2597 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2598 	struct ieee80211_action_ba_addbarequest *ia;
2599 	uint8_t *frm;
2600 	uint16_t baparamset;
2601 
2602 	/* Not action frame? Bail */
2603 	if (! IEEE80211_IS_MGMT_ACTION(wh))
2604 		return 0;
2605 
2606 	/* XXX Not needed for frames we send? */
2607 #if 0
2608 	/* Correct length? */
2609 	if (! ieee80211_parse_action(ni, m))
2610 		return 0;
2611 #endif
2612 
2613 	/* Extract out action frame */
2614 	frm = (u_int8_t *)&wh[1];
2615 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
2616 
2617 	/* Not ADDBA? Bail */
2618 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2619 		return 0;
2620 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2621 		return 0;
2622 
2623 	/* Extract TID, return it */
2624 	baparamset = le16toh(ia->rq_baparamset);
2625 	*tid = (int) _IEEE80211_MASKSHIFT(baparamset, IEEE80211_BAPS_TID);
2626 
2627 	return 1;
2628 }
2629 
2630 /* Per-node software queue operations */
2631 
2632 /*
2633  * Add the current packet to the given BAW.
2634  * It is assumed that the current packet
2635  *
2636  * + fits inside the BAW;
2637  * + already has had a sequence number allocated.
2638  *
2639  * Since the BAW status may be modified by both the ath task and
2640  * the net80211/ifnet contexts, the TID must be locked.
2641  */
2642 void
ath_tx_addto_baw(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * bf)2643 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2644     struct ath_tid *tid, struct ath_buf *bf)
2645 {
2646 	int index, cindex;
2647 	struct ieee80211_tx_ampdu *tap;
2648 
2649 	ATH_TX_LOCK_ASSERT(sc);
2650 
2651 	if (bf->bf_state.bfs_isretried)
2652 		return;
2653 
2654 	tap = ath_tx_get_tx_tid(an, tid->tid);
2655 
2656 	if (! bf->bf_state.bfs_dobaw) {
2657 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2658 		    "%s: dobaw=0, seqno=%d, window %d:%d\n",
2659 		    __func__, SEQNO(bf->bf_state.bfs_seqno),
2660 		    tap->txa_start, tap->txa_wnd);
2661 	}
2662 
2663 	if (bf->bf_state.bfs_addedbaw)
2664 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2665 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2666 		    "baw head=%d tail=%d\n",
2667 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2668 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2669 		    tid->baw_tail);
2670 
2671 	/*
2672 	 * Verify that the given sequence number is not outside of the
2673 	 * BAW.  Complain loudly if that's the case.
2674 	 */
2675 	if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2676 	    SEQNO(bf->bf_state.bfs_seqno))) {
2677 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2678 		    "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
2679 		    "baw head=%d tail=%d\n",
2680 		    __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2681 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2682 		    tid->baw_tail);
2683 	}
2684 
2685 	/*
2686 	 * ni->ni_txseqs[] is the currently allocated seqno.
2687 	 * the txa state contains the current baw start.
2688 	 */
2689 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2690 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2691 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2692 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2693 	    "baw head=%d tail=%d\n",
2694 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2695 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2696 	    tid->baw_tail);
2697 
2698 #if 0
2699 	assert(tid->tx_buf[cindex] == NULL);
2700 #endif
2701 	if (tid->tx_buf[cindex] != NULL) {
2702 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2703 		    "%s: ba packet dup (index=%d, cindex=%d, "
2704 		    "head=%d, tail=%d)\n",
2705 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
2706 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2707 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2708 		    __func__,
2709 		    tid->tx_buf[cindex],
2710 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2711 		    bf,
2712 		    SEQNO(bf->bf_state.bfs_seqno)
2713 		);
2714 	}
2715 	tid->tx_buf[cindex] = bf;
2716 
2717 	if (index >= ((tid->baw_tail - tid->baw_head) &
2718 	    (ATH_TID_MAX_BUFS - 1))) {
2719 		tid->baw_tail = cindex;
2720 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2721 	}
2722 }
2723 
2724 /*
2725  * Flip the BAW buffer entry over from the existing one to the new one.
2726  *
2727  * When software retransmitting a (sub-)frame, it is entirely possible that
2728  * the frame ath_buf is marked as BUSY and can't be immediately reused.
2729  * In that instance the buffer is cloned and the new buffer is used for
2730  * retransmit. We thus need to update the ath_buf slot in the BAW buf
2731  * tracking array to maintain consistency.
2732  */
2733 static void
ath_tx_switch_baw_buf(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * old_bf,struct ath_buf * new_bf)2734 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2735     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2736 {
2737 	int index, cindex;
2738 	struct ieee80211_tx_ampdu *tap;
2739 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2740 
2741 	ATH_TX_LOCK_ASSERT(sc);
2742 
2743 	tap = ath_tx_get_tx_tid(an, tid->tid);
2744 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2745 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2746 
2747 	/*
2748 	 * Just warn for now; if it happens then we should find out
2749 	 * about it. It's highly likely the aggregation session will
2750 	 * soon hang.
2751 	 */
2752 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2753 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2754 		    "%s: retransmitted buffer"
2755 		    " has mismatching seqno's, BA session may hang.\n",
2756 		    __func__);
2757 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2758 		    "%s: old seqno=%d, new_seqno=%d\n", __func__,
2759 		    old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno);
2760 	}
2761 
2762 	if (tid->tx_buf[cindex] != old_bf) {
2763 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2764 		    "%s: ath_buf pointer incorrect; "
2765 		    " has m BA session may hang.\n", __func__);
2766 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2767 		    "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf);
2768 	}
2769 
2770 	tid->tx_buf[cindex] = new_bf;
2771 }
2772 
2773 /*
2774  * seq_start - left edge of BAW
2775  * seq_next - current/next sequence number to allocate
2776  *
2777  * Since the BAW status may be modified by both the ath task and
2778  * the net80211/ifnet contexts, the TID must be locked.
2779  */
2780 static void
ath_tx_update_baw(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,const struct ath_buf * bf)2781 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2782     struct ath_tid *tid, const struct ath_buf *bf)
2783 {
2784 	int index, cindex;
2785 	struct ieee80211_tx_ampdu *tap;
2786 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2787 
2788 	ATH_TX_LOCK_ASSERT(sc);
2789 
2790 	tap = ath_tx_get_tx_tid(an, tid->tid);
2791 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2792 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2793 
2794 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2795 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2796 	    "baw head=%d, tail=%d\n",
2797 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2798 	    cindex, tid->baw_head, tid->baw_tail);
2799 
2800 	/*
2801 	 * If this occurs then we have a big problem - something else
2802 	 * has slid tap->txa_start along without updating the BAW
2803 	 * tracking start/end pointers. Thus the TX BAW state is now
2804 	 * completely busted.
2805 	 *
2806 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2807 	 * it's quite possible that a cloned buffer is making its way
2808 	 * here and causing it to fire off. Disable TDMA for now.
2809 	 */
2810 	if (tid->tx_buf[cindex] != bf) {
2811 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2812 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2813 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
2814 		    tid->tx_buf[cindex],
2815 		    (tid->tx_buf[cindex] != NULL) ?
2816 		      SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2817 	}
2818 
2819 	tid->tx_buf[cindex] = NULL;
2820 
2821 	while (tid->baw_head != tid->baw_tail &&
2822 	    !tid->tx_buf[tid->baw_head]) {
2823 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2824 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2825 	}
2826 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2827 	    "%s: tid=%d: baw is now %d:%d, baw head=%d\n",
2828 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head);
2829 }
2830 
2831 static void
ath_tx_leak_count_update(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)2832 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
2833     struct ath_buf *bf)
2834 {
2835 	struct ieee80211_frame *wh;
2836 
2837 	ATH_TX_LOCK_ASSERT(sc);
2838 
2839 	if (tid->an->an_leak_count > 0) {
2840 		wh = mtod(bf->bf_m, struct ieee80211_frame *);
2841 
2842 		/*
2843 		 * Update MORE based on the software/net80211 queue states.
2844 		 */
2845 		if ((tid->an->an_stack_psq > 0)
2846 		    || (tid->an->an_swq_depth > 0))
2847 			wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
2848 		else
2849 			wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
2850 
2851 		DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
2852 		    "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
2853 		    __func__,
2854 		    tid->an->an_node.ni_macaddr,
2855 		    ":",
2856 		    tid->an->an_leak_count,
2857 		    tid->an->an_stack_psq,
2858 		    tid->an->an_swq_depth,
2859 		    !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
2860 
2861 		/*
2862 		 * Re-sync the underlying buffer.
2863 		 */
2864 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2865 		    BUS_DMASYNC_PREWRITE);
2866 
2867 		tid->an->an_leak_count --;
2868 	}
2869 }
2870 
2871 static int
ath_tx_tid_can_tx_or_sched(struct ath_softc * sc,struct ath_tid * tid)2872 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
2873 {
2874 
2875 	ATH_TX_LOCK_ASSERT(sc);
2876 
2877 	if (tid->an->an_leak_count > 0) {
2878 		return (1);
2879 	}
2880 	if (tid->paused)
2881 		return (0);
2882 	return (1);
2883 }
2884 
2885 /*
2886  * Mark the current node/TID as ready to TX.
2887  *
2888  * This is done to make it easy for the software scheduler to
2889  * find which nodes have data to send.
2890  *
2891  * The TXQ lock must be held.
2892  */
2893 void
ath_tx_tid_sched(struct ath_softc * sc,struct ath_tid * tid)2894 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2895 {
2896 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2897 
2898 	ATH_TX_LOCK_ASSERT(sc);
2899 
2900 	/*
2901 	 * If we are leaking out a frame to this destination
2902 	 * for PS-POLL, ensure that we allow scheduling to
2903 	 * occur.
2904 	 */
2905 	if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2906 		return;		/* paused, can't schedule yet */
2907 
2908 	if (tid->sched)
2909 		return;		/* already scheduled */
2910 
2911 	tid->sched = 1;
2912 
2913 #if 0
2914 	/*
2915 	 * If this is a sleeping node we're leaking to, given
2916 	 * it a higher priority.  This is so bad for QoS it hurts.
2917 	 */
2918 	if (tid->an->an_leak_count) {
2919 		TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
2920 	} else {
2921 		TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2922 	}
2923 #endif
2924 
2925 	/*
2926 	 * We can't do the above - it'll confuse the TXQ software
2927 	 * scheduler which will keep checking the _head_ TID
2928 	 * in the list to see if it has traffic.  If we queue
2929 	 * a TID to the head of the list and it doesn't transmit,
2930 	 * we'll check it again.
2931 	 *
2932 	 * So, get the rest of this leaking frames support working
2933 	 * and reliable first and _then_ optimise it so they're
2934 	 * pushed out in front of any other pending software
2935 	 * queued nodes.
2936 	 */
2937 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2938 }
2939 
2940 /*
2941  * Mark the current node as no longer needing to be polled for
2942  * TX packets.
2943  *
2944  * The TXQ lock must be held.
2945  */
2946 static void
ath_tx_tid_unsched(struct ath_softc * sc,struct ath_tid * tid)2947 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2948 {
2949 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2950 
2951 	ATH_TX_LOCK_ASSERT(sc);
2952 
2953 	if (tid->sched == 0)
2954 		return;
2955 
2956 	tid->sched = 0;
2957 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2958 }
2959 
2960 /*
2961  * Assign a sequence number manually to the given frame.
2962  *
2963  * This should only be called for A-MPDU TX frames.
2964  *
2965  * Note: for group addressed frames, the sequence number
2966  * should be from NONQOS_TID, and net80211 should have
2967  * already assigned it for us.
2968  */
2969 static ieee80211_seq
ath_tx_tid_seqno_assign(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0)2970 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2971     struct ath_buf *bf, struct mbuf *m0)
2972 {
2973 	struct ieee80211_frame *wh;
2974 	int tid;
2975 	ieee80211_seq seqno;
2976 	uint8_t subtype;
2977 
2978 	wh = mtod(m0, struct ieee80211_frame *);
2979 	tid = ieee80211_gettid(wh);
2980 
2981 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, qos has seq=%d\n",
2982 	    __func__, tid, IEEE80211_QOS_HAS_SEQ(wh));
2983 
2984 	/* XXX Is it a control frame? Ignore */
2985 
2986 	/* Does the packet require a sequence number? */
2987 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2988 		return -1;
2989 
2990 	ATH_TX_LOCK_ASSERT(sc);
2991 
2992 	/* TODO: can this use ieee80211_output_seqno_assign() now? */
2993 
2994 	/*
2995 	 * Is it a QOS NULL Data frame? Give it a sequence number from
2996 	 * the default TID (IEEE80211_NONQOS_TID.)
2997 	 *
2998 	 * The RX path of everything I've looked at doesn't include the NULL
2999 	 * data frame sequence number in the aggregation state updates, so
3000 	 * assigning it a sequence number there will cause a BAW hole on the
3001 	 * RX side.
3002 	 */
3003 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3004 	if (IEEE80211_IS_QOS_NULL(wh)) {
3005 		/* XXX no locking for this TID? This is a bit of a problem. */
3006 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
3007 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3008 	} else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3009 		/*
3010 		 * group addressed frames get a sequence number from
3011 		 * a different sequence number space.
3012 		 */
3013 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
3014 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3015 	} else {
3016 		/* Manually assign sequence number */
3017 		seqno = ni->ni_txseqs[tid];
3018 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
3019 	}
3020 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
3021 	M_SEQNO_SET(m0, seqno);
3022 
3023 	/* Return so caller can do something with it if needed */
3024 	DPRINTF(sc, ATH_DEBUG_SW_TX,
3025 	    "%s:  -> subtype=0x%x, tid=%d, seqno=%d\n",
3026 	    __func__, subtype, tid, seqno);
3027 	return seqno;
3028 }
3029 
3030 /*
3031  * Attempt to direct dispatch an aggregate frame to hardware.
3032  * If the frame is out of BAW, queue.
3033  * Otherwise, schedule it as a single frame.
3034  */
3035 static void
ath_tx_xmit_aggr(struct ath_softc * sc,struct ath_node * an,struct ath_txq * txq,struct ath_buf * bf)3036 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
3037     struct ath_txq *txq, struct ath_buf *bf)
3038 {
3039 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
3040 	struct ieee80211_tx_ampdu *tap;
3041 
3042 	ATH_TX_LOCK_ASSERT(sc);
3043 
3044 	tap = ath_tx_get_tx_tid(an, tid->tid);
3045 
3046 	/* paused? queue */
3047 	if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
3048 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3049 		/* XXX don't sched - we're paused! */
3050 		return;
3051 	}
3052 
3053 	/* outside baw? queue */
3054 	if (bf->bf_state.bfs_dobaw &&
3055 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
3056 	    SEQNO(bf->bf_state.bfs_seqno)))) {
3057 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3058 		ath_tx_tid_sched(sc, tid);
3059 		return;
3060 	}
3061 
3062 	/*
3063 	 * This is a temporary check and should be removed once
3064 	 * all the relevant code paths have been fixed.
3065 	 *
3066 	 * During aggregate retries, it's possible that the head
3067 	 * frame will fail (which has the bfs_aggr and bfs_nframes
3068 	 * fields set for said aggregate) and will be retried as
3069 	 * a single frame.  In this instance, the values should
3070 	 * be reset or the completion code will get upset with you.
3071 	 */
3072 	if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
3073 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3074 		    "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__,
3075 		    bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes);
3076 		bf->bf_state.bfs_aggr = 0;
3077 		bf->bf_state.bfs_nframes = 1;
3078 	}
3079 
3080 	/* Update CLRDMASK just before this frame is queued */
3081 	ath_tx_update_clrdmask(sc, tid, bf);
3082 
3083 	/* Direct dispatch to hardware */
3084 	ath_tx_do_ratelookup(sc, bf, tid->tid, bf->bf_state.bfs_pktlen,
3085 	    false);
3086 	ath_tx_calc_duration(sc, bf);
3087 	ath_tx_calc_protection(sc, bf);
3088 	ath_tx_set_rtscts(sc, bf);
3089 	ath_tx_rate_fill_rcflags(sc, bf);
3090 	ath_tx_setds(sc, bf);
3091 
3092 	/* Statistics */
3093 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
3094 
3095 	/* Track per-TID hardware queue depth correctly */
3096 	tid->hwq_depth++;
3097 
3098 	/* Add to BAW */
3099 	if (bf->bf_state.bfs_dobaw) {
3100 		ath_tx_addto_baw(sc, an, tid, bf);
3101 		bf->bf_state.bfs_addedbaw = 1;
3102 	}
3103 
3104 	/* Set completion handler, multi-frame aggregate or not */
3105 	bf->bf_comp = ath_tx_aggr_comp;
3106 
3107 	/*
3108 	 * Update the current leak count if
3109 	 * we're leaking frames; and set the
3110 	 * MORE flag as appropriate.
3111 	 */
3112 	ath_tx_leak_count_update(sc, tid, bf);
3113 
3114 	/* Hand off to hardware */
3115 	ath_tx_handoff(sc, txq, bf);
3116 }
3117 
3118 /*
3119  * Attempt to send the packet.
3120  * If the queue isn't busy, direct-dispatch.
3121  * If the queue is busy enough, queue the given packet on the
3122  *  relevant software queue.
3123  */
3124 void
ath_tx_swq(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_txq * txq,int queue_to_head,struct ath_buf * bf)3125 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
3126     struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3127 {
3128 	struct ath_node *an = ATH_NODE(ni);
3129 	struct ieee80211_frame *wh;
3130 	struct ath_tid *atid;
3131 	int pri, tid;
3132 	struct mbuf *m0 = bf->bf_m;
3133 
3134 	ATH_TX_LOCK_ASSERT(sc);
3135 
3136 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
3137 	wh = mtod(m0, struct ieee80211_frame *);
3138 	pri = ath_tx_getac(sc, m0);
3139 	tid = ath_tx_gettid(sc, m0);
3140 	atid = &an->an_tid[tid];
3141 
3142 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3143 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3144 
3145 	/* Set local packet state, used to queue packets to hardware */
3146 	/* XXX potentially duplicate info, re-check */
3147 	bf->bf_state.bfs_tid = tid;
3148 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3149 	bf->bf_state.bfs_pri = pri;
3150 
3151 	/*
3152 	 * If the hardware queue isn't busy, queue it directly.
3153 	 * If the hardware queue is busy, queue it.
3154 	 * If the TID is paused or the traffic it outside BAW, software
3155 	 * queue it.
3156 	 *
3157 	 * If the node is in power-save and we're leaking a frame,
3158 	 * leak a single frame.
3159 	 */
3160 	if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3161 		/* TID is paused, queue */
3162 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
3163 		/*
3164 		 * If the caller requested that it be sent at a high
3165 		 * priority, queue it at the head of the list.
3166 		 */
3167 		if (queue_to_head)
3168 			ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3169 		else
3170 			ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3171 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
3172 		/* AMPDU pending; queue */
3173 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
3174 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3175 		/* XXX sched? */
3176 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
3177 		/*
3178 		 * AMPDU running, queue single-frame if the hardware queue
3179 		 * isn't busy.
3180 		 *
3181 		 * If the hardware queue is busy, sending an aggregate frame
3182 		 * then just hold off so we can queue more aggregate frames.
3183 		 *
3184 		 * Otherwise we may end up with single frames leaking through
3185 		 * because we are dispatching them too quickly.
3186 		 *
3187 		 * TODO: maybe we should treat this as two policies - minimise
3188 		 * latency, or maximise throughput.  Then for BE/BK we can
3189 		 * maximise throughput, and VO/VI (if AMPDU is enabled!)
3190 		 * minimise latency.
3191 		 */
3192 
3193 		/*
3194 		 * Always queue the frame to the tail of the list.
3195 		 */
3196 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3197 
3198 		/*
3199 		 * If the hardware queue isn't busy, direct dispatch
3200 		 * the head frame in the list.
3201 		 *
3202 		 * Note: if we're say, configured to do ADDBA but not A-MPDU
3203 		 * then maybe we want to still queue two non-aggregate frames
3204 		 * to the hardware.  Again with the per-TID policy
3205 		 * configuration..)
3206 		 *
3207 		 * Otherwise, schedule the TID.
3208 		 */
3209 		/* XXX TXQ locking */
3210 		if (txq->axq_depth + txq->fifo.axq_depth == 0) {
3211 			bf = ATH_TID_FIRST(atid);
3212 			ATH_TID_REMOVE(atid, bf, bf_list);
3213 
3214 			/*
3215 			 * Ensure it's definitely treated as a non-AMPDU
3216 			 * frame - this information may have been left
3217 			 * over from a previous attempt.
3218 			 */
3219 			bf->bf_state.bfs_aggr = 0;
3220 			bf->bf_state.bfs_nframes = 1;
3221 
3222 			/* Queue to the hardware */
3223 			ath_tx_xmit_aggr(sc, an, txq, bf);
3224 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3225 			    "%s: xmit_aggr\n",
3226 			    __func__);
3227 		} else {
3228 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3229 			    "%s: ampdu; swq'ing\n",
3230 			    __func__);
3231 
3232 			ath_tx_tid_sched(sc, atid);
3233 		}
3234 	/*
3235 	 * If we're not doing A-MPDU, be prepared to direct dispatch
3236 	 * up to both limits if possible.  This particular corner
3237 	 * case may end up with packet starvation between aggregate
3238 	 * traffic and non-aggregate traffic: we want to ensure
3239 	 * that non-aggregate stations get a few frames queued to the
3240 	 * hardware before the aggregate station(s) get their chance.
3241 	 *
3242 	 * So if you only ever see a couple of frames direct dispatched
3243 	 * to the hardware from a non-AMPDU client, check both here
3244 	 * and in the software queue dispatcher to ensure that those
3245 	 * non-AMPDU stations get a fair chance to transmit.
3246 	 */
3247 	/* XXX TXQ locking */
3248 	} else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) &&
3249 		    (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) {
3250 		/* AMPDU not running, attempt direct dispatch */
3251 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
3252 		/* See if clrdmask needs to be set */
3253 		ath_tx_update_clrdmask(sc, atid, bf);
3254 
3255 		/*
3256 		 * Update the current leak count if
3257 		 * we're leaking frames; and set the
3258 		 * MORE flag as appropriate.
3259 		 */
3260 		ath_tx_leak_count_update(sc, atid, bf);
3261 
3262 		/*
3263 		 * Dispatch the frame.
3264 		 */
3265 		ath_tx_xmit_normal(sc, txq, bf);
3266 	} else {
3267 		/* Busy; queue */
3268 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
3269 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3270 		ath_tx_tid_sched(sc, atid);
3271 	}
3272 }
3273 
3274 /*
3275  * Only set the clrdmask bit if none of the nodes are currently
3276  * filtered.
3277  *
3278  * XXX TODO: go through all the callers and check to see
3279  * which are being called in the context of looping over all
3280  * TIDs (eg, if all tids are being paused, resumed, etc.)
3281  * That'll avoid O(n^2) complexity here.
3282  */
3283 static void
ath_tx_set_clrdmask(struct ath_softc * sc,struct ath_node * an)3284 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
3285 {
3286 	int i;
3287 
3288 	ATH_TX_LOCK_ASSERT(sc);
3289 
3290 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3291 		if (an->an_tid[i].isfiltered == 1)
3292 			return;
3293 	}
3294 	an->clrdmask = 1;
3295 }
3296 
3297 /*
3298  * Configure the per-TID node state.
3299  *
3300  * This likely belongs in if_ath_node.c but I can't think of anywhere
3301  * else to put it just yet.
3302  *
3303  * This sets up the SLISTs and the mutex as appropriate.
3304  */
3305 void
ath_tx_tid_init(struct ath_softc * sc,struct ath_node * an)3306 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3307 {
3308 	int i, j;
3309 	struct ath_tid *atid;
3310 
3311 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3312 		atid = &an->an_tid[i];
3313 
3314 		/* XXX now with this bzer(), is the field 0'ing needed? */
3315 		bzero(atid, sizeof(*atid));
3316 
3317 		TAILQ_INIT(&atid->tid_q);
3318 		TAILQ_INIT(&atid->filtq.tid_q);
3319 		atid->tid = i;
3320 		atid->an = an;
3321 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3322 			atid->tx_buf[j] = NULL;
3323 		atid->baw_head = atid->baw_tail = 0;
3324 		atid->paused = 0;
3325 		atid->sched = 0;
3326 		atid->hwq_depth = 0;
3327 		atid->cleanup_inprogress = 0;
3328 		if (i == IEEE80211_NONQOS_TID)
3329 			atid->ac = ATH_NONQOS_TID_AC;
3330 		else
3331 			atid->ac = TID_TO_WME_AC(i);
3332 	}
3333 	an->clrdmask = 1;	/* Always start by setting this bit */
3334 }
3335 
3336 /*
3337  * Pause the current TID. This stops packets from being transmitted
3338  * on it.
3339  *
3340  * Since this is also called from upper layers as well as the driver,
3341  * it will get the TID lock.
3342  */
3343 static void
ath_tx_tid_pause(struct ath_softc * sc,struct ath_tid * tid)3344 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3345 {
3346 
3347 	ATH_TX_LOCK_ASSERT(sc);
3348 	tid->paused++;
3349 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n",
3350 	    __func__,
3351 	    tid->an->an_node.ni_macaddr, ":",
3352 	    tid->tid,
3353 	    tid->paused);
3354 }
3355 
3356 /*
3357  * Unpause the current TID, and schedule it if needed.
3358  */
3359 static void
ath_tx_tid_resume(struct ath_softc * sc,struct ath_tid * tid)3360 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3361 {
3362 	ATH_TX_LOCK_ASSERT(sc);
3363 
3364 	/*
3365 	 * There's some odd places where ath_tx_tid_resume() is called
3366 	 * when it shouldn't be; this works around that particular issue
3367 	 * until it's actually resolved.
3368 	 */
3369 	if (tid->paused == 0) {
3370 		device_printf(sc->sc_dev,
3371 		    "%s: [%6D]: tid=%d, paused=0?\n",
3372 		    __func__,
3373 		    tid->an->an_node.ni_macaddr, ":",
3374 		    tid->tid);
3375 	} else {
3376 		tid->paused--;
3377 	}
3378 
3379 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3380 	    "%s: [%6D]: tid=%d, unpaused = %d\n",
3381 	    __func__,
3382 	    tid->an->an_node.ni_macaddr, ":",
3383 	    tid->tid,
3384 	    tid->paused);
3385 
3386 	if (tid->paused)
3387 		return;
3388 
3389 	/*
3390 	 * Override the clrdmask configuration for the next frame
3391 	 * from this TID, just to get the ball rolling.
3392 	 */
3393 	ath_tx_set_clrdmask(sc, tid->an);
3394 
3395 	if (tid->axq_depth == 0)
3396 		return;
3397 
3398 	/* XXX isfiltered shouldn't ever be 0 at this point */
3399 	if (tid->isfiltered == 1) {
3400 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n",
3401 		    __func__);
3402 		return;
3403 	}
3404 
3405 	ath_tx_tid_sched(sc, tid);
3406 
3407 	/*
3408 	 * Queue the software TX scheduler.
3409 	 */
3410 	ath_tx_swq_kick(sc);
3411 }
3412 
3413 /*
3414  * Add the given ath_buf to the TID filtered frame list.
3415  * This requires the TID be filtered.
3416  */
3417 static void
ath_tx_tid_filt_addbuf(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3418 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3419     struct ath_buf *bf)
3420 {
3421 
3422 	ATH_TX_LOCK_ASSERT(sc);
3423 
3424 	if (!tid->isfiltered)
3425 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n",
3426 		    __func__);
3427 
3428 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3429 
3430 	/* Set the retry bit and bump the retry counter */
3431 	ath_tx_set_retry(sc, bf);
3432 	sc->sc_stats.ast_tx_swfiltered++;
3433 
3434 	ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3435 }
3436 
3437 /*
3438  * Handle a completed filtered frame from the given TID.
3439  * This just enables/pauses the filtered frame state if required
3440  * and appends the filtered frame to the filtered queue.
3441  */
3442 static void
ath_tx_tid_filt_comp_buf(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3443 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3444     struct ath_buf *bf)
3445 {
3446 
3447 	ATH_TX_LOCK_ASSERT(sc);
3448 
3449 	if (! tid->isfiltered) {
3450 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n",
3451 		    __func__, tid->tid);
3452 		tid->isfiltered = 1;
3453 		ath_tx_tid_pause(sc, tid);
3454 	}
3455 
3456 	/* Add the frame to the filter queue */
3457 	ath_tx_tid_filt_addbuf(sc, tid, bf);
3458 }
3459 
3460 /*
3461  * Complete the filtered frame TX completion.
3462  *
3463  * If there are no more frames in the hardware queue, unpause/unfilter
3464  * the TID if applicable.  Otherwise we will wait for a node PS transition
3465  * to unfilter.
3466  */
3467 static void
ath_tx_tid_filt_comp_complete(struct ath_softc * sc,struct ath_tid * tid)3468 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3469 {
3470 	struct ath_buf *bf;
3471 	int do_resume = 0;
3472 
3473 	ATH_TX_LOCK_ASSERT(sc);
3474 
3475 	if (tid->hwq_depth != 0)
3476 		return;
3477 
3478 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n",
3479 	    __func__, tid->tid);
3480 	if (tid->isfiltered == 1) {
3481 		tid->isfiltered = 0;
3482 		do_resume = 1;
3483 	}
3484 
3485 	/* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
3486 	ath_tx_set_clrdmask(sc, tid->an);
3487 
3488 	/* XXX this is really quite inefficient */
3489 	while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
3490 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3491 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3492 	}
3493 
3494 	/* And only resume if we had paused before */
3495 	if (do_resume)
3496 		ath_tx_tid_resume(sc, tid);
3497 }
3498 
3499 /*
3500  * Called when a single (aggregate or otherwise) frame is completed.
3501  *
3502  * Returns 0 if the buffer could be added to the filtered list
3503  * (cloned or otherwise), 1 if the buffer couldn't be added to the
3504  * filtered list (failed clone; expired retry) and the caller should
3505  * free it and handle it like a failure (eg by sending a BAR.)
3506  *
3507  * since the buffer may be cloned, bf must be not touched after this
3508  * if the return value is 0.
3509  */
3510 static int
ath_tx_tid_filt_comp_single(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3511 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3512     struct ath_buf *bf)
3513 {
3514 	struct ath_buf *nbf;
3515 	int retval;
3516 
3517 	ATH_TX_LOCK_ASSERT(sc);
3518 
3519 	/*
3520 	 * Don't allow a filtered frame to live forever.
3521 	 */
3522 	if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3523 		sc->sc_stats.ast_tx_swretrymax++;
3524 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3525 		    "%s: bf=%p, seqno=%d, exceeded retries\n",
3526 		    __func__,
3527 		    bf,
3528 		    SEQNO(bf->bf_state.bfs_seqno));
3529 		retval = 1; /* error */
3530 		goto finish;
3531 	}
3532 
3533 	/*
3534 	 * A busy buffer can't be added to the retry list.
3535 	 * It needs to be cloned.
3536 	 */
3537 	if (bf->bf_flags & ATH_BUF_BUSY) {
3538 		nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3539 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3540 		    "%s: busy buffer clone: %p -> %p\n",
3541 		    __func__, bf, nbf);
3542 	} else {
3543 		nbf = bf;
3544 	}
3545 
3546 	if (nbf == NULL) {
3547 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3548 		    "%s: busy buffer couldn't be cloned (%p)!\n",
3549 		    __func__, bf);
3550 		retval = 1; /* error */
3551 	} else {
3552 		ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3553 		retval = 0; /* ok */
3554 	}
3555 finish:
3556 	ath_tx_tid_filt_comp_complete(sc, tid);
3557 
3558 	return (retval);
3559 }
3560 
3561 static void
ath_tx_tid_filt_comp_aggr(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf_first,ath_bufhead * bf_q)3562 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3563     struct ath_buf *bf_first, ath_bufhead *bf_q)
3564 {
3565 	struct ath_buf *bf, *bf_next, *nbf;
3566 
3567 	ATH_TX_LOCK_ASSERT(sc);
3568 
3569 	bf = bf_first;
3570 	while (bf) {
3571 		bf_next = bf->bf_next;
3572 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3573 
3574 		/*
3575 		 * Don't allow a filtered frame to live forever.
3576 		 */
3577 		if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3578 			sc->sc_stats.ast_tx_swretrymax++;
3579 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3580 			    "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n",
3581 			    __func__,
3582 			    tid->tid,
3583 			    bf,
3584 			    SEQNO(bf->bf_state.bfs_seqno));
3585 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3586 			goto next;
3587 		}
3588 
3589 		if (bf->bf_flags & ATH_BUF_BUSY) {
3590 			nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3591 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3592 			    "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n",
3593 			    __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno));
3594 		} else {
3595 			nbf = bf;
3596 		}
3597 
3598 		/*
3599 		 * If the buffer couldn't be cloned, add it to bf_q;
3600 		 * the caller will free the buffer(s) as required.
3601 		 */
3602 		if (nbf == NULL) {
3603 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3604 			    "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n",
3605 			    __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno));
3606 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3607 		} else {
3608 			ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3609 		}
3610 next:
3611 		bf = bf_next;
3612 	}
3613 
3614 	ath_tx_tid_filt_comp_complete(sc, tid);
3615 }
3616 
3617 /*
3618  * Suspend the queue because we need to TX a BAR.
3619  */
3620 static void
ath_tx_tid_bar_suspend(struct ath_softc * sc,struct ath_tid * tid)3621 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
3622 {
3623 
3624 	ATH_TX_LOCK_ASSERT(sc);
3625 
3626 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3627 	    "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n",
3628 	    __func__,
3629 	    tid->tid,
3630 	    tid->bar_wait,
3631 	    tid->bar_tx);
3632 
3633 	/* We shouldn't be called when bar_tx is 1 */
3634 	if (tid->bar_tx) {
3635 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3636 		    "%s: bar_tx is 1?!\n", __func__);
3637 	}
3638 
3639 	/* If we've already been called, just be patient. */
3640 	if (tid->bar_wait)
3641 		return;
3642 
3643 	/* Wait! */
3644 	tid->bar_wait = 1;
3645 
3646 	/* Only one pause, no matter how many frames fail */
3647 	ath_tx_tid_pause(sc, tid);
3648 }
3649 
3650 /*
3651  * We've finished with BAR handling - either we succeeded or
3652  * failed. Either way, unsuspend TX.
3653  */
3654 static void
ath_tx_tid_bar_unsuspend(struct ath_softc * sc,struct ath_tid * tid)3655 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
3656 {
3657 
3658 	ATH_TX_LOCK_ASSERT(sc);
3659 
3660 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3661 	    "%s: %6D: TID=%d, called\n",
3662 	    __func__,
3663 	    tid->an->an_node.ni_macaddr,
3664 	    ":",
3665 	    tid->tid);
3666 
3667 	if (tid->bar_tx == 0 || tid->bar_wait == 0) {
3668 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3669 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3670 		    __func__, tid->an->an_node.ni_macaddr, ":",
3671 		    tid->tid, tid->bar_tx, tid->bar_wait);
3672 	}
3673 
3674 	tid->bar_tx = tid->bar_wait = 0;
3675 	ath_tx_tid_resume(sc, tid);
3676 }
3677 
3678 /*
3679  * Return whether we're ready to TX a BAR frame.
3680  *
3681  * Requires the TID lock be held.
3682  */
3683 static int
ath_tx_tid_bar_tx_ready(struct ath_softc * sc,struct ath_tid * tid)3684 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
3685 {
3686 
3687 	ATH_TX_LOCK_ASSERT(sc);
3688 
3689 	if (tid->bar_wait == 0 || tid->hwq_depth > 0)
3690 		return (0);
3691 
3692 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3693 	    "%s: %6D: TID=%d, bar ready\n",
3694 	    __func__,
3695 	    tid->an->an_node.ni_macaddr,
3696 	    ":",
3697 	    tid->tid);
3698 
3699 	return (1);
3700 }
3701 
3702 /*
3703  * Check whether the current TID is ready to have a BAR
3704  * TXed and if so, do the TX.
3705  *
3706  * Since the TID/TXQ lock can't be held during a call to
3707  * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
3708  * sending the BAR and locking it again.
3709  *
3710  * Eventually, the code to send the BAR should be broken out
3711  * from this routine so the lock doesn't have to be reacquired
3712  * just to be immediately dropped by the caller.
3713  */
3714 static void
ath_tx_tid_bar_tx(struct ath_softc * sc,struct ath_tid * tid)3715 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
3716 {
3717 	struct ieee80211_tx_ampdu *tap;
3718 
3719 	ATH_TX_LOCK_ASSERT(sc);
3720 
3721 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3722 	    "%s: %6D: TID=%d, called\n",
3723 	    __func__,
3724 	    tid->an->an_node.ni_macaddr,
3725 	    ":",
3726 	    tid->tid);
3727 
3728 	tap = ath_tx_get_tx_tid(tid->an, tid->tid);
3729 
3730 	/*
3731 	 * This is an error condition!
3732 	 */
3733 	if (tid->bar_wait == 0 || tid->bar_tx == 1) {
3734 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3735 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3736 		    __func__, tid->an->an_node.ni_macaddr, ":",
3737 		    tid->tid, tid->bar_tx, tid->bar_wait);
3738 		return;
3739 	}
3740 
3741 	/* Don't do anything if we still have pending frames */
3742 	if (tid->hwq_depth > 0) {
3743 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3744 		    "%s: %6D: TID=%d, hwq_depth=%d, waiting\n",
3745 		    __func__,
3746 		    tid->an->an_node.ni_macaddr,
3747 		    ":",
3748 		    tid->tid,
3749 		    tid->hwq_depth);
3750 		return;
3751 	}
3752 
3753 	/* We're now about to TX */
3754 	tid->bar_tx = 1;
3755 
3756 	/*
3757 	 * Override the clrdmask configuration for the next frame,
3758 	 * just to get the ball rolling.
3759 	 */
3760 	ath_tx_set_clrdmask(sc, tid->an);
3761 
3762 	/*
3763 	 * Calculate new BAW left edge, now that all frames have either
3764 	 * succeeded or failed.
3765 	 *
3766 	 * XXX verify this is _actually_ the valid value to begin at!
3767 	 */
3768 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3769 	    "%s: %6D: TID=%d, new BAW left edge=%d\n",
3770 	    __func__,
3771 	    tid->an->an_node.ni_macaddr,
3772 	    ":",
3773 	    tid->tid,
3774 	    tap->txa_start);
3775 
3776 	/* Try sending the BAR frame */
3777 	/* We can't hold the lock here! */
3778 
3779 	ATH_TX_UNLOCK(sc);
3780 	if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
3781 		/* Success? Now we wait for notification that it's done */
3782 		ATH_TX_LOCK(sc);
3783 		return;
3784 	}
3785 
3786 	/* Failure? For now, warn loudly and continue */
3787 	ATH_TX_LOCK(sc);
3788 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3789 	    "%s: %6D: TID=%d, failed to TX BAR, continue!\n",
3790 	    __func__, tid->an->an_node.ni_macaddr, ":",
3791 	    tid->tid);
3792 	ath_tx_tid_bar_unsuspend(sc, tid);
3793 }
3794 
3795 static void
ath_tx_tid_drain_pkt(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,ath_bufhead * bf_cq,struct ath_buf * bf)3796 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3797     struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3798 {
3799 
3800 	ATH_TX_LOCK_ASSERT(sc);
3801 
3802 	/*
3803 	 * If the current TID is running AMPDU, update
3804 	 * the BAW.
3805 	 */
3806 	if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3807 	    bf->bf_state.bfs_dobaw) {
3808 		/*
3809 		 * Only remove the frame from the BAW if it's
3810 		 * been transmitted at least once; this means
3811 		 * the frame was in the BAW to begin with.
3812 		 */
3813 		if (bf->bf_state.bfs_retries > 0) {
3814 			ath_tx_update_baw(sc, an, tid, bf);
3815 			bf->bf_state.bfs_dobaw = 0;
3816 		}
3817 #if 0
3818 		/*
3819 		 * This has become a non-fatal error now
3820 		 */
3821 		if (! bf->bf_state.bfs_addedbaw)
3822 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW
3823 			    "%s: wasn't added: seqno %d\n",
3824 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3825 #endif
3826 	}
3827 
3828 	/* Strip it out of an aggregate list if it was in one */
3829 	bf->bf_next = NULL;
3830 
3831 	/* Insert on the free queue to be freed by the caller */
3832 	TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3833 }
3834 
3835 static void
ath_tx_tid_drain_print(struct ath_softc * sc,struct ath_node * an,const char * pfx,struct ath_tid * tid,struct ath_buf * bf)3836 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
3837     const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3838 {
3839 	struct ieee80211_node *ni = &an->an_node;
3840 	struct ath_txq *txq;
3841 	struct ieee80211_tx_ampdu *tap;
3842 
3843 	txq = sc->sc_ac2q[tid->ac];
3844 	tap = ath_tx_get_tx_tid(an, tid->tid);
3845 
3846 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3847 	    "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, "
3848 	    "seqno=%d, retry=%d\n",
3849 	    __func__,
3850 	    pfx,
3851 	    ni->ni_macaddr,
3852 	    ":",
3853 	    bf,
3854 	    bf->bf_state.bfs_addedbaw,
3855 	    bf->bf_state.bfs_dobaw,
3856 	    SEQNO(bf->bf_state.bfs_seqno),
3857 	    bf->bf_state.bfs_retries);
3858 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3859 	    "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
3860 	    __func__,
3861 	    pfx,
3862 	    ni->ni_macaddr,
3863 	    ":",
3864 	    bf,
3865 	    txq->axq_qnum,
3866 	    txq->axq_depth,
3867 	    txq->axq_aggr_depth);
3868 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3869 	    "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, "
3870 	      "isfiltered=%d\n",
3871 	    __func__,
3872 	    pfx,
3873 	    ni->ni_macaddr,
3874 	    ":",
3875 	    bf,
3876 	    tid->axq_depth,
3877 	    tid->hwq_depth,
3878 	    tid->bar_wait,
3879 	    tid->isfiltered);
3880 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3881 	    "%s: %s: %6D: tid %d: "
3882 	    "sched=%d, paused=%d, "
3883 	    "incomp=%d, baw_head=%d, "
3884 	    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3885 	     __func__,
3886 	     pfx,
3887 	     ni->ni_macaddr,
3888 	     ":",
3889 	     tid->tid,
3890 	     tid->sched, tid->paused,
3891 	     tid->incomp, tid->baw_head,
3892 	     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3893 	     ni->ni_txseqs[tid->tid]);
3894 
3895 	/* XXX Dump the frame, see what it is? */
3896 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3897 		ieee80211_dump_pkt(ni->ni_ic,
3898 		    mtod(bf->bf_m, const uint8_t *),
3899 		    bf->bf_m->m_len, 0, -1);
3900 }
3901 
3902 /*
3903  * Free any packets currently pending in the software TX queue.
3904  *
3905  * This will be called when a node is being deleted.
3906  *
3907  * It can also be called on an active node during an interface
3908  * reset or state transition.
3909  *
3910  * (From Linux/reference):
3911  *
3912  * TODO: For frame(s) that are in the retry state, we will reuse the
3913  * sequence number(s) without setting the retry bit. The
3914  * alternative is to give up on these and BAR the receiver's window
3915  * forward.
3916  */
3917 static void
ath_tx_tid_drain(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,ath_bufhead * bf_cq)3918 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3919     struct ath_tid *tid, ath_bufhead *bf_cq)
3920 {
3921 	struct ath_buf *bf;
3922 	struct ieee80211_tx_ampdu *tap;
3923 	struct ieee80211_node *ni = &an->an_node;
3924 	int t;
3925 
3926 	tap = ath_tx_get_tx_tid(an, tid->tid);
3927 
3928 	ATH_TX_LOCK_ASSERT(sc);
3929 
3930 	/* Walk the queue, free frames */
3931 	t = 0;
3932 	for (;;) {
3933 		bf = ATH_TID_FIRST(tid);
3934 		if (bf == NULL) {
3935 			break;
3936 		}
3937 
3938 		if (t == 0) {
3939 			ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3940 //			t = 1;
3941 		}
3942 
3943 		ATH_TID_REMOVE(tid, bf, bf_list);
3944 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3945 	}
3946 
3947 	/* And now, drain the filtered frame queue */
3948 	t = 0;
3949 	for (;;) {
3950 		bf = ATH_TID_FILT_FIRST(tid);
3951 		if (bf == NULL)
3952 			break;
3953 
3954 		if (t == 0) {
3955 			ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3956 //			t = 1;
3957 		}
3958 
3959 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3960 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3961 	}
3962 
3963 	/*
3964 	 * Override the clrdmask configuration for the next frame
3965 	 * in case there is some future transmission, just to get
3966 	 * the ball rolling.
3967 	 *
3968 	 * This won't hurt things if the TID is about to be freed.
3969 	 */
3970 	ath_tx_set_clrdmask(sc, tid->an);
3971 
3972 	/*
3973 	 * Now that it's completed, grab the TID lock and update
3974 	 * the sequence number and BAW window.
3975 	 * Because sequence numbers have been assigned to frames
3976 	 * that haven't been sent yet, it's entirely possible
3977 	 * we'll be called with some pending frames that have not
3978 	 * been transmitted.
3979 	 *
3980 	 * The cleaner solution is to do the sequence number allocation
3981 	 * when the packet is first transmitted - and thus the "retries"
3982 	 * check above would be enough to update the BAW/seqno.
3983 	 */
3984 
3985 	/* But don't do it for non-QoS TIDs */
3986 	if (tap) {
3987 #if 1
3988 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3989 		    "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
3990 		    __func__,
3991 		    ni->ni_macaddr,
3992 		    ":",
3993 		    an,
3994 		    tid->tid,
3995 		    tap->txa_start);
3996 #endif
3997 		ni->ni_txseqs[tid->tid] = tap->txa_start;
3998 		tid->baw_tail = tid->baw_head;
3999 	}
4000 }
4001 
4002 /*
4003  * Reset the TID state.  This must be only called once the node has
4004  * had its frames flushed from this TID, to ensure that no other
4005  * pause / unpause logic can kick in.
4006  */
4007 static void
ath_tx_tid_reset(struct ath_softc * sc,struct ath_tid * tid)4008 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
4009 {
4010 
4011 #if 0
4012 	tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
4013 	tid->paused = tid->sched = tid->addba_tx_pending = 0;
4014 	tid->incomp = tid->cleanup_inprogress = 0;
4015 #endif
4016 
4017 	/*
4018 	 * If we have a bar_wait set, we need to unpause the TID
4019 	 * here.  Otherwise once cleanup has finished, the TID won't
4020 	 * have the right paused counter.
4021 	 *
4022 	 * XXX I'm not going through resume here - I don't want the
4023 	 * node to be rescheuled just yet.  This however should be
4024 	 * methodized!
4025 	 */
4026 	if (tid->bar_wait) {
4027 		if (tid->paused > 0) {
4028 			tid->paused --;
4029 		}
4030 	}
4031 
4032 	/*
4033 	 * XXX same with a currently filtered TID.
4034 	 *
4035 	 * Since this is being called during a flush, we assume that
4036 	 * the filtered frame list is actually empty.
4037 	 *
4038 	 * XXX TODO: add in a check to ensure that the filtered queue
4039 	 * depth is actually 0!
4040 	 */
4041 	if (tid->isfiltered) {
4042 		if (tid->paused > 0) {
4043 			tid->paused --;
4044 		}
4045 	}
4046 
4047 	/*
4048 	 * Clear BAR, filtered frames, scheduled and ADDBA pending.
4049 	 * The TID may be going through cleanup from the last association
4050 	 * where things in the BAW are still in the hardware queue.
4051 	 */
4052 	tid->bar_wait = 0;
4053 	tid->bar_tx = 0;
4054 	tid->isfiltered = 0;
4055 	tid->sched = 0;
4056 	tid->addba_tx_pending = 0;
4057 
4058 	/*
4059 	 * XXX TODO: it may just be enough to walk the HWQs and mark
4060 	 * frames for that node as non-aggregate; or mark the ath_node
4061 	 * with something that indicates that aggregation is no longer
4062 	 * occurring.  Then we can just toss the BAW complaints and
4063 	 * do a complete hard reset of state here - no pause, no
4064 	 * complete counter, etc.
4065 	 */
4066 
4067 }
4068 
4069 /*
4070  * Flush all software queued packets for the given node.
4071  *
4072  * This occurs when a completion handler frees the last buffer
4073  * for a node, and the node is thus freed. This causes the node
4074  * to be cleaned up, which ends up calling ath_tx_node_flush.
4075  */
4076 void
ath_tx_node_flush(struct ath_softc * sc,struct ath_node * an)4077 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
4078 {
4079 	int tid;
4080 	ath_bufhead bf_cq;
4081 	struct ath_buf *bf;
4082 
4083 	TAILQ_INIT(&bf_cq);
4084 
4085 	ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
4086 	    &an->an_node);
4087 
4088 	ATH_TX_LOCK(sc);
4089 	DPRINTF(sc, ATH_DEBUG_NODE,
4090 	    "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
4091 	    "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
4092 	    __func__,
4093 	    an->an_node.ni_macaddr,
4094 	    ":",
4095 	    an->an_is_powersave,
4096 	    an->an_stack_psq,
4097 	    an->an_tim_set,
4098 	    an->an_swq_depth,
4099 	    an->clrdmask,
4100 	    an->an_leak_count);
4101 
4102 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
4103 		struct ath_tid *atid = &an->an_tid[tid];
4104 
4105 		/* Free packets */
4106 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
4107 
4108 		/* Remove this tid from the list of active tids */
4109 		ath_tx_tid_unsched(sc, atid);
4110 
4111 		/* Reset the per-TID pause, BAR, etc state */
4112 		ath_tx_tid_reset(sc, atid);
4113 	}
4114 
4115 	/*
4116 	 * Clear global leak count
4117 	 */
4118 	an->an_leak_count = 0;
4119 	ATH_TX_UNLOCK(sc);
4120 
4121 	/* Handle completed frames */
4122 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4123 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4124 		ath_tx_default_comp(sc, bf, 0);
4125 	}
4126 }
4127 
4128 /*
4129  * Drain all the software TXQs currently with traffic queued.
4130  */
4131 void
ath_tx_txq_drain(struct ath_softc * sc,struct ath_txq * txq)4132 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
4133 {
4134 	struct ath_tid *tid;
4135 	ath_bufhead bf_cq;
4136 	struct ath_buf *bf;
4137 
4138 	TAILQ_INIT(&bf_cq);
4139 	ATH_TX_LOCK(sc);
4140 
4141 	/*
4142 	 * Iterate over all active tids for the given txq,
4143 	 * flushing and unsched'ing them
4144 	 */
4145 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
4146 		tid = TAILQ_FIRST(&txq->axq_tidq);
4147 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
4148 		ath_tx_tid_unsched(sc, tid);
4149 	}
4150 
4151 	ATH_TX_UNLOCK(sc);
4152 
4153 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4154 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4155 		ath_tx_default_comp(sc, bf, 0);
4156 	}
4157 }
4158 
4159 /*
4160  * Handle completion of non-aggregate session frames.
4161  *
4162  * This (currently) doesn't implement software retransmission of
4163  * non-aggregate frames!
4164  *
4165  * Software retransmission of non-aggregate frames needs to obey
4166  * the strict sequence number ordering, and drop any frames that
4167  * will fail this.
4168  *
4169  * For now, filtered frames and frame transmission will cause
4170  * all kinds of issues.  So we don't support them.
4171  *
4172  * So anyone queuing frames via ath_tx_normal_xmit() or
4173  * ath_tx_hw_queue_norm() must override and set CLRDMASK.
4174  */
4175 void
ath_tx_normal_comp(struct ath_softc * sc,struct ath_buf * bf,int fail)4176 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4177 {
4178 	struct ieee80211_node *ni = bf->bf_node;
4179 	struct ath_node *an = ATH_NODE(ni);
4180 	int tid = bf->bf_state.bfs_tid;
4181 	struct ath_tid *atid = &an->an_tid[tid];
4182 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4183 
4184 	/* The TID state is protected behind the TXQ lock */
4185 	ATH_TX_LOCK(sc);
4186 
4187 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4188 	    __func__, bf, fail, atid->hwq_depth - 1);
4189 
4190 	atid->hwq_depth--;
4191 
4192 #if 0
4193 	/*
4194 	 * If the frame was filtered, stick it on the filter frame
4195 	 * queue and complain about it.  It shouldn't happen!
4196 	 */
4197 	if ((ts->ts_status & HAL_TXERR_FILT) ||
4198 	    (ts->ts_status != 0 && atid->isfiltered)) {
4199 		DPRINTF(sc, ATH_DEBUG_SW_TX,
4200 		    "%s: isfiltered=%d, ts_status=%d: huh?\n",
4201 		    __func__,
4202 		    atid->isfiltered,
4203 		    ts->ts_status);
4204 		ath_tx_tid_filt_comp_buf(sc, atid, bf);
4205 	}
4206 #endif
4207 	if (atid->isfiltered)
4208 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__);
4209 	if (atid->hwq_depth < 0)
4210 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
4211 		    __func__, atid->hwq_depth);
4212 
4213 	/* If the TID is being cleaned up, track things */
4214 	/* XXX refactor! */
4215 	if (atid->cleanup_inprogress) {
4216 		atid->incomp--;
4217 		if (atid->incomp == 0) {
4218 			DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4219 			    "%s: TID %d: cleaned up! resume!\n",
4220 			    __func__, tid);
4221 			atid->cleanup_inprogress = 0;
4222 			ath_tx_tid_resume(sc, atid);
4223 		}
4224 	}
4225 
4226 	/*
4227 	 * If the queue is filtered, potentially mark it as complete
4228 	 * and reschedule it as needed.
4229 	 *
4230 	 * This is required as there may be a subsequent TX descriptor
4231 	 * for this end-node that has CLRDMASK set, so it's quite possible
4232 	 * that a filtered frame will be followed by a non-filtered
4233 	 * (complete or otherwise) frame.
4234 	 *
4235 	 * XXX should we do this before we complete the frame?
4236 	 */
4237 	if (atid->isfiltered)
4238 		ath_tx_tid_filt_comp_complete(sc, atid);
4239 	ATH_TX_UNLOCK(sc);
4240 
4241 	/*
4242 	 * punt to rate control if we're not being cleaned up
4243 	 * during a hw queue drain and the frame wanted an ACK.
4244 	 */
4245 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4246 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4247 		    ts,
4248 		    bf->bf_state.bfs_pktlen,
4249 		    bf->bf_state.bfs_pktlen,
4250 		    1, (ts->ts_status == 0) ? 0 : 1);
4251 
4252 	ath_tx_default_comp(sc, bf, fail);
4253 }
4254 
4255 /*
4256  * Handle cleanup of aggregate session packets that aren't
4257  * an A-MPDU.
4258  *
4259  * There's no need to update the BAW here - the session is being
4260  * torn down.
4261  */
4262 static void
ath_tx_comp_cleanup_unaggr(struct ath_softc * sc,struct ath_buf * bf)4263 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4264 {
4265 	struct ieee80211_node *ni = bf->bf_node;
4266 	struct ath_node *an = ATH_NODE(ni);
4267 	int tid = bf->bf_state.bfs_tid;
4268 	struct ath_tid *atid = &an->an_tid[tid];
4269 
4270 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4271 	    __func__, tid, atid->incomp);
4272 
4273 	ATH_TX_LOCK(sc);
4274 	atid->incomp--;
4275 
4276 	/* XXX refactor! */
4277 	if (bf->bf_state.bfs_dobaw) {
4278 		ath_tx_update_baw(sc, an, atid, bf);
4279 		if (!bf->bf_state.bfs_addedbaw)
4280 			DPRINTF(sc, ATH_DEBUG_SW_TX,
4281 			    "%s: wasn't added: seqno %d\n",
4282 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4283 	}
4284 
4285 	if (atid->incomp == 0) {
4286 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4287 		    "%s: TID %d: cleaned up! resume!\n",
4288 		    __func__, tid);
4289 		atid->cleanup_inprogress = 0;
4290 		ath_tx_tid_resume(sc, atid);
4291 	}
4292 	ATH_TX_UNLOCK(sc);
4293 
4294 	ath_tx_default_comp(sc, bf, 0);
4295 }
4296 
4297 /*
4298  * This as it currently stands is a bit dumb.  Ideally we'd just
4299  * fail the frame the normal way and have it permanently fail
4300  * via the normal aggregate completion path.
4301  */
4302 static void
ath_tx_tid_cleanup_frame(struct ath_softc * sc,struct ath_node * an,int tid,struct ath_buf * bf_head,ath_bufhead * bf_cq)4303 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an,
4304     int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq)
4305 {
4306 	struct ath_tid *atid = &an->an_tid[tid];
4307 	struct ath_buf *bf, *bf_next;
4308 
4309 	ATH_TX_LOCK_ASSERT(sc);
4310 
4311 	/*
4312 	 * Remove this frame from the queue.
4313 	 */
4314 	ATH_TID_REMOVE(atid, bf_head, bf_list);
4315 
4316 	/*
4317 	 * Loop over all the frames in the aggregate.
4318 	 */
4319 	bf = bf_head;
4320 	while (bf != NULL) {
4321 		bf_next = bf->bf_next;	/* next aggregate frame, or NULL */
4322 
4323 		/*
4324 		 * If it's been added to the BAW we need to kick
4325 		 * it out of the BAW before we continue.
4326 		 *
4327 		 * XXX if it's an aggregate, assert that it's in the
4328 		 * BAW - we shouldn't have it be in an aggregate
4329 		 * otherwise!
4330 		 */
4331 		if (bf->bf_state.bfs_addedbaw) {
4332 			ath_tx_update_baw(sc, an, atid, bf);
4333 			bf->bf_state.bfs_dobaw = 0;
4334 		}
4335 
4336 		/*
4337 		 * Give it the default completion handler.
4338 		 */
4339 		bf->bf_comp = ath_tx_normal_comp;
4340 		bf->bf_next = NULL;
4341 
4342 		/*
4343 		 * Add it to the list to free.
4344 		 */
4345 		TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4346 
4347 		/*
4348 		 * Now advance to the next frame in the aggregate.
4349 		 */
4350 		bf = bf_next;
4351 	}
4352 }
4353 
4354 /*
4355  * Performs transmit side cleanup when TID changes from aggregated to
4356  * unaggregated and during reassociation.
4357  *
4358  * For now, this just tosses everything from the TID software queue
4359  * whether or not it has been retried and marks the TID as
4360  * pending completion if there's anything for this TID queued to
4361  * the hardware.
4362  *
4363  * The caller is responsible for pausing the TID and unpausing the
4364  * TID if no cleanup was required. Otherwise the cleanup path will
4365  * unpause the TID once the last hardware queued frame is completed.
4366  */
4367 static void
ath_tx_tid_cleanup(struct ath_softc * sc,struct ath_node * an,int tid,ath_bufhead * bf_cq)4368 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
4369     ath_bufhead *bf_cq)
4370 {
4371 	struct ath_tid *atid = &an->an_tid[tid];
4372 	struct ath_buf *bf, *bf_next;
4373 
4374 	ATH_TX_LOCK_ASSERT(sc);
4375 
4376 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4377 	    "%s: TID %d: called; inprogress=%d\n", __func__, tid,
4378 	    atid->cleanup_inprogress);
4379 
4380 	/*
4381 	 * Move the filtered frames to the TX queue, before
4382 	 * we run off and discard/process things.
4383 	 */
4384 
4385 	/* XXX this is really quite inefficient */
4386 	while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
4387 		ATH_TID_FILT_REMOVE(atid, bf, bf_list);
4388 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4389 	}
4390 
4391 	/*
4392 	 * Update the frames in the software TX queue:
4393 	 *
4394 	 * + Discard retry frames in the queue
4395 	 * + Fix the completion function to be non-aggregate
4396 	 */
4397 	bf = ATH_TID_FIRST(atid);
4398 	while (bf) {
4399 		/*
4400 		 * Grab the next frame in the list, we may
4401 		 * be fiddling with the list.
4402 		 */
4403 		bf_next = TAILQ_NEXT(bf, bf_list);
4404 
4405 		/*
4406 		 * Free the frame and all subframes.
4407 		 */
4408 		ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq);
4409 
4410 		/*
4411 		 * Next frame!
4412 		 */
4413 		bf = bf_next;
4414 	}
4415 
4416 	/*
4417 	 * If there's anything in the hardware queue we wait
4418 	 * for the TID HWQ to empty.
4419 	 */
4420 	if (atid->hwq_depth > 0) {
4421 		/*
4422 		 * XXX how about we kill atid->incomp, and instead
4423 		 * replace it with a macro that checks that atid->hwq_depth
4424 		 * is 0?
4425 		 */
4426 		atid->incomp = atid->hwq_depth;
4427 		atid->cleanup_inprogress = 1;
4428 	}
4429 
4430 	if (atid->cleanup_inprogress)
4431 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4432 		    "%s: TID %d: cleanup needed: %d packets\n",
4433 		    __func__, tid, atid->incomp);
4434 
4435 	/* Owner now must free completed frames */
4436 }
4437 
4438 static struct ath_buf *
ath_tx_retry_clone(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * bf)4439 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
4440     struct ath_tid *tid, struct ath_buf *bf)
4441 {
4442 	struct ath_buf *nbf;
4443 	int error;
4444 
4445 	/*
4446 	 * Clone the buffer.  This will handle the dma unmap and
4447 	 * copy the node reference to the new buffer.  If this
4448 	 * works out, 'bf' will have no DMA mapping, no mbuf
4449 	 * pointer and no node reference.
4450 	 */
4451 	nbf = ath_buf_clone(sc, bf);
4452 
4453 #if 0
4454 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n",
4455 	    __func__);
4456 #endif
4457 
4458 	if (nbf == NULL) {
4459 		/* Failed to clone */
4460 		DPRINTF(sc, ATH_DEBUG_XMIT,
4461 		    "%s: failed to clone a busy buffer\n",
4462 		    __func__);
4463 		return NULL;
4464 	}
4465 
4466 	/* Setup the dma for the new buffer */
4467 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4468 	if (error != 0) {
4469 		DPRINTF(sc, ATH_DEBUG_XMIT,
4470 		    "%s: failed to setup dma for clone\n",
4471 		    __func__);
4472 		/*
4473 		 * Put this at the head of the list, not tail;
4474 		 * that way it doesn't interfere with the
4475 		 * busy buffer logic (which uses the tail of
4476 		 * the list.)
4477 		 */
4478 		ATH_TXBUF_LOCK(sc);
4479 		ath_returnbuf_head(sc, nbf);
4480 		ATH_TXBUF_UNLOCK(sc);
4481 		return NULL;
4482 	}
4483 
4484 	/* Update BAW if required, before we free the original buf */
4485 	if (bf->bf_state.bfs_dobaw)
4486 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
4487 
4488 	/* Free original buffer; return new buffer */
4489 	ath_freebuf(sc, bf);
4490 
4491 	return nbf;
4492 }
4493 
4494 /*
4495  * Handle retrying an unaggregate frame in an aggregate
4496  * session.
4497  *
4498  * If too many retries occur, pause the TID, wait for
4499  * any further retransmits (as there's no reason why
4500  * non-aggregate frames in an aggregate session are
4501  * transmitted in-order; they just have to be in-BAW)
4502  * and then queue a BAR.
4503  */
4504 static void
ath_tx_aggr_retry_unaggr(struct ath_softc * sc,struct ath_buf * bf)4505 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4506 {
4507 	struct ieee80211_node *ni = bf->bf_node;
4508 	struct ath_node *an = ATH_NODE(ni);
4509 	int tid = bf->bf_state.bfs_tid;
4510 	struct ath_tid *atid = &an->an_tid[tid];
4511 	struct ieee80211_tx_ampdu *tap;
4512 
4513 	ATH_TX_LOCK(sc);
4514 
4515 	tap = ath_tx_get_tx_tid(an, tid);
4516 
4517 	/*
4518 	 * If the buffer is marked as busy, we can't directly
4519 	 * reuse it. Instead, try to clone the buffer.
4520 	 * If the clone is successful, recycle the old buffer.
4521 	 * If the clone is unsuccessful, set bfs_retries to max
4522 	 * to force the next bit of code to free the buffer
4523 	 * for us.
4524 	 */
4525 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4526 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4527 		struct ath_buf *nbf;
4528 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4529 		if (nbf)
4530 			/* bf has been freed at this point */
4531 			bf = nbf;
4532 		else
4533 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4534 	}
4535 
4536 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4537 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4538 		    "%s: exceeded retries; seqno %d\n",
4539 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4540 		sc->sc_stats.ast_tx_swretrymax++;
4541 
4542 		/* Update BAW anyway */
4543 		if (bf->bf_state.bfs_dobaw) {
4544 			ath_tx_update_baw(sc, an, atid, bf);
4545 			if (! bf->bf_state.bfs_addedbaw)
4546 				DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4547 				    "%s: wasn't added: seqno %d\n",
4548 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4549 		}
4550 		bf->bf_state.bfs_dobaw = 0;
4551 
4552 		/* Suspend the TX queue and get ready to send the BAR */
4553 		ath_tx_tid_bar_suspend(sc, atid);
4554 
4555 		/* Send the BAR if there are no other frames waiting */
4556 		if (ath_tx_tid_bar_tx_ready(sc, atid))
4557 			ath_tx_tid_bar_tx(sc, atid);
4558 
4559 		ATH_TX_UNLOCK(sc);
4560 
4561 		/* Free buffer, bf is free after this call */
4562 		ath_tx_default_comp(sc, bf, 0);
4563 		return;
4564 	}
4565 
4566 	/*
4567 	 * This increments the retry counter as well as
4568 	 * sets the retry flag in the ath_buf and packet
4569 	 * body.
4570 	 */
4571 	ath_tx_set_retry(sc, bf);
4572 	sc->sc_stats.ast_tx_swretries++;
4573 
4574 	/*
4575 	 * Insert this at the head of the queue, so it's
4576 	 * retried before any current/subsequent frames.
4577 	 */
4578 	ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4579 	ath_tx_tid_sched(sc, atid);
4580 	/* Send the BAR if there are no other frames waiting */
4581 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4582 		ath_tx_tid_bar_tx(sc, atid);
4583 
4584 	ATH_TX_UNLOCK(sc);
4585 }
4586 
4587 /*
4588  * Common code for aggregate excessive retry/subframe retry.
4589  * If retrying, queues buffers to bf_q. If not, frees the
4590  * buffers.
4591  *
4592  * XXX should unify this with ath_tx_aggr_retry_unaggr()
4593  */
4594 static int
ath_tx_retry_subframe(struct ath_softc * sc,struct ath_buf * bf,ath_bufhead * bf_q)4595 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4596     ath_bufhead *bf_q)
4597 {
4598 	struct ieee80211_node *ni = bf->bf_node;
4599 	struct ath_node *an = ATH_NODE(ni);
4600 	int tid = bf->bf_state.bfs_tid;
4601 	struct ath_tid *atid = &an->an_tid[tid];
4602 
4603 	ATH_TX_LOCK_ASSERT(sc);
4604 
4605 	/* XXX clr11naggr should be done for all subframes */
4606 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4607 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4608 
4609 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4610 
4611 	/*
4612 	 * If the buffer is marked as busy, we can't directly
4613 	 * reuse it. Instead, try to clone the buffer.
4614 	 * If the clone is successful, recycle the old buffer.
4615 	 * If the clone is unsuccessful, set bfs_retries to max
4616 	 * to force the next bit of code to free the buffer
4617 	 * for us.
4618 	 */
4619 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4620 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4621 		struct ath_buf *nbf;
4622 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4623 		if (nbf)
4624 			/* bf has been freed at this point */
4625 			bf = nbf;
4626 		else
4627 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4628 	}
4629 
4630 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4631 		sc->sc_stats.ast_tx_swretrymax++;
4632 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4633 		    "%s: max retries: seqno %d\n",
4634 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4635 		ath_tx_update_baw(sc, an, atid, bf);
4636 		if (!bf->bf_state.bfs_addedbaw)
4637 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4638 			    "%s: wasn't added: seqno %d\n",
4639 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4640 		bf->bf_state.bfs_dobaw = 0;
4641 		return 1;
4642 	}
4643 
4644 	ath_tx_set_retry(sc, bf);
4645 	sc->sc_stats.ast_tx_swretries++;
4646 	bf->bf_next = NULL;		/* Just to make sure */
4647 
4648 	/* Clear the aggregate state */
4649 	bf->bf_state.bfs_aggr = 0;
4650 	bf->bf_state.bfs_ndelim = 0;	/* ??? needed? */
4651 	bf->bf_state.bfs_nframes = 1;
4652 
4653 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4654 	return 0;
4655 }
4656 
4657 /*
4658  * error pkt completion for an aggregate destination
4659  */
4660 static void
ath_tx_comp_aggr_error(struct ath_softc * sc,struct ath_buf * bf_first,struct ath_tid * tid)4661 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4662     struct ath_tid *tid)
4663 {
4664 	struct ieee80211_node *ni = bf_first->bf_node;
4665 	struct ath_node *an = ATH_NODE(ni);
4666 	struct ath_buf *bf_next, *bf;
4667 	ath_bufhead bf_q;
4668 	int drops = 0;
4669 	struct ieee80211_tx_ampdu *tap;
4670 	ath_bufhead bf_cq;
4671 
4672 	TAILQ_INIT(&bf_q);
4673 	TAILQ_INIT(&bf_cq);
4674 
4675 	/*
4676 	 * Update rate control - all frames have failed.
4677 	 */
4678 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4679 	    &bf_first->bf_status.ds_txstat,
4680 	    bf_first->bf_state.bfs_al,
4681 	    bf_first->bf_state.bfs_rc_maxpktlen,
4682 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4683 
4684 	ATH_TX_LOCK(sc);
4685 	tap = ath_tx_get_tx_tid(an, tid->tid);
4686 	sc->sc_stats.ast_tx_aggr_failall++;
4687 
4688 	/* Retry all subframes */
4689 	bf = bf_first;
4690 	while (bf) {
4691 		bf_next = bf->bf_next;
4692 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4693 		sc->sc_stats.ast_tx_aggr_fail++;
4694 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4695 			drops++;
4696 			bf->bf_next = NULL;
4697 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4698 		}
4699 		bf = bf_next;
4700 	}
4701 
4702 	/* Prepend all frames to the beginning of the queue */
4703 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4704 		TAILQ_REMOVE(&bf_q, bf, bf_list);
4705 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4706 	}
4707 
4708 	/*
4709 	 * Schedule the TID to be re-tried.
4710 	 */
4711 	ath_tx_tid_sched(sc, tid);
4712 
4713 	/*
4714 	 * send bar if we dropped any frames
4715 	 *
4716 	 * Keep the txq lock held for now, as we need to ensure
4717 	 * that ni_txseqs[] is consistent (as it's being updated
4718 	 * in the ifnet TX context or raw TX context.)
4719 	 */
4720 	if (drops) {
4721 		/* Suspend the TX queue and get ready to send the BAR */
4722 		ath_tx_tid_bar_suspend(sc, tid);
4723 	}
4724 
4725 	/*
4726 	 * Send BAR if required
4727 	 */
4728 	if (ath_tx_tid_bar_tx_ready(sc, tid))
4729 		ath_tx_tid_bar_tx(sc, tid);
4730 
4731 	ATH_TX_UNLOCK(sc);
4732 
4733 	/* Complete frames which errored out */
4734 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4735 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4736 		ath_tx_default_comp(sc, bf, 0);
4737 	}
4738 }
4739 
4740 /*
4741  * Handle clean-up of packets from an aggregate list.
4742  *
4743  * There's no need to update the BAW here - the session is being
4744  * torn down.
4745  */
4746 static void
ath_tx_comp_cleanup_aggr(struct ath_softc * sc,struct ath_buf * bf_first)4747 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4748 {
4749 	struct ath_buf *bf, *bf_next;
4750 	struct ieee80211_node *ni = bf_first->bf_node;
4751 	struct ath_node *an = ATH_NODE(ni);
4752 	int tid = bf_first->bf_state.bfs_tid;
4753 	struct ath_tid *atid = &an->an_tid[tid];
4754 
4755 	ATH_TX_LOCK(sc);
4756 
4757 	/* update incomp */
4758 	atid->incomp--;
4759 
4760 	/* Update the BAW */
4761 	bf = bf_first;
4762 	while (bf) {
4763 		/* XXX refactor! */
4764 		if (bf->bf_state.bfs_dobaw) {
4765 			ath_tx_update_baw(sc, an, atid, bf);
4766 			if (!bf->bf_state.bfs_addedbaw)
4767 				DPRINTF(sc, ATH_DEBUG_SW_TX,
4768 				    "%s: wasn't added: seqno %d\n",
4769 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4770 		}
4771 		bf = bf->bf_next;
4772 	}
4773 
4774 	if (atid->incomp == 0) {
4775 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4776 		    "%s: TID %d: cleaned up! resume!\n",
4777 		    __func__, tid);
4778 		atid->cleanup_inprogress = 0;
4779 		ath_tx_tid_resume(sc, atid);
4780 	}
4781 
4782 	/* Send BAR if required */
4783 	/* XXX why would we send a BAR when transitioning to non-aggregation? */
4784 	/*
4785 	 * XXX TODO: we should likely just tear down the BAR state here,
4786 	 * rather than sending a BAR.
4787 	 */
4788 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4789 		ath_tx_tid_bar_tx(sc, atid);
4790 
4791 	ATH_TX_UNLOCK(sc);
4792 
4793 	/* Handle frame completion as individual frames */
4794 	bf = bf_first;
4795 	while (bf) {
4796 		bf_next = bf->bf_next;
4797 		bf->bf_next = NULL;
4798 		ath_tx_default_comp(sc, bf, 1);
4799 		bf = bf_next;
4800 	}
4801 }
4802 
4803 /*
4804  * Handle completion of an set of aggregate frames.
4805  *
4806  * Note: the completion handler is the last descriptor in the aggregate,
4807  * not the last descriptor in the first frame.
4808  */
4809 static void
ath_tx_aggr_comp_aggr(struct ath_softc * sc,struct ath_buf * bf_first,int fail)4810 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4811     int fail)
4812 {
4813 	//struct ath_desc *ds = bf->bf_lastds;
4814 	struct ieee80211_node *ni = bf_first->bf_node;
4815 	struct ath_node *an = ATH_NODE(ni);
4816 	int tid = bf_first->bf_state.bfs_tid;
4817 	struct ath_tid *atid = &an->an_tid[tid];
4818 	struct ath_tx_status ts;
4819 	struct ieee80211_tx_ampdu *tap;
4820 	ath_bufhead bf_q;
4821 	ath_bufhead bf_cq;
4822 	int seq_st, tx_ok;
4823 	int hasba, isaggr;
4824 	uint32_t ba[2];
4825 	struct ath_buf *bf, *bf_next;
4826 	int ba_index;
4827 	int drops = 0;
4828 	int nframes = 0, nbad = 0, nf;
4829 	int pktlen;
4830 	int agglen, rc_agglen;
4831 	/* XXX there's too much on the stack? */
4832 	struct ath_rc_series rc[ATH_RC_NUM];
4833 	int txseq;
4834 
4835 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4836 	    __func__, atid->hwq_depth);
4837 
4838 	/*
4839 	 * Take a copy; this may be needed -after- bf_first
4840 	 * has been completed and freed.
4841 	 */
4842 	ts = bf_first->bf_status.ds_txstat;
4843 	agglen = bf_first->bf_state.bfs_al;
4844 	rc_agglen = bf_first->bf_state.bfs_rc_maxpktlen;
4845 
4846 	TAILQ_INIT(&bf_q);
4847 	TAILQ_INIT(&bf_cq);
4848 
4849 	/* The TID state is kept behind the TXQ lock */
4850 	ATH_TX_LOCK(sc);
4851 
4852 	atid->hwq_depth--;
4853 	if (atid->hwq_depth < 0)
4854 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n",
4855 		    __func__, atid->hwq_depth);
4856 
4857 	/*
4858 	 * If the TID is filtered, handle completing the filter
4859 	 * transition before potentially kicking it to the cleanup
4860 	 * function.
4861 	 *
4862 	 * XXX this is duplicate work, ew.
4863 	 */
4864 	if (atid->isfiltered)
4865 		ath_tx_tid_filt_comp_complete(sc, atid);
4866 
4867 	/*
4868 	 * Punt cleanup to the relevant function, not our problem now
4869 	 */
4870 	if (atid->cleanup_inprogress) {
4871 		if (atid->isfiltered)
4872 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4873 			    "%s: isfiltered=1, normal_comp?\n",
4874 			    __func__);
4875 		ATH_TX_UNLOCK(sc);
4876 		ath_tx_comp_cleanup_aggr(sc, bf_first);
4877 		return;
4878 	}
4879 
4880 	/*
4881 	 * If the frame is filtered, transition to filtered frame
4882 	 * mode and add this to the filtered frame list.
4883 	 *
4884 	 * XXX TODO: figure out how this interoperates with
4885 	 * BAR, pause and cleanup states.
4886 	 */
4887 	if ((ts.ts_status & HAL_TXERR_FILT) ||
4888 	    (ts.ts_status != 0 && atid->isfiltered)) {
4889 		if (fail != 0)
4890 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4891 			    "%s: isfiltered=1, fail=%d\n", __func__, fail);
4892 		ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4893 
4894 		/* Remove from BAW */
4895 		TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4896 			if (bf->bf_state.bfs_addedbaw)
4897 				drops++;
4898 			if (bf->bf_state.bfs_dobaw) {
4899 				ath_tx_update_baw(sc, an, atid, bf);
4900 				if (!bf->bf_state.bfs_addedbaw)
4901 					DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4902 					    "%s: wasn't added: seqno %d\n",
4903 					    __func__,
4904 					    SEQNO(bf->bf_state.bfs_seqno));
4905 			}
4906 			bf->bf_state.bfs_dobaw = 0;
4907 		}
4908 		/*
4909 		 * If any intermediate frames in the BAW were dropped when
4910 		 * handling filtering things, send a BAR.
4911 		 */
4912 		if (drops)
4913 			ath_tx_tid_bar_suspend(sc, atid);
4914 
4915 		/*
4916 		 * Finish up by sending a BAR if required and freeing
4917 		 * the frames outside of the TX lock.
4918 		 */
4919 		goto finish_send_bar;
4920 	}
4921 
4922 	/*
4923 	 * XXX for now, use the first frame in the aggregate for
4924 	 * XXX rate control completion; it's at least consistent.
4925 	 */
4926 	pktlen = bf_first->bf_state.bfs_pktlen;
4927 
4928 	/*
4929 	 * Handle errors first!
4930 	 *
4931 	 * Here, handle _any_ error as a "exceeded retries" error.
4932 	 * Later on (when filtered frames are to be specially handled)
4933 	 * it'll have to be expanded.
4934 	 */
4935 #if 0
4936 	if (ts.ts_status & HAL_TXERR_XRETRY) {
4937 #endif
4938 	if (ts.ts_status != 0) {
4939 		ATH_TX_UNLOCK(sc);
4940 		ath_tx_comp_aggr_error(sc, bf_first, atid);
4941 		return;
4942 	}
4943 
4944 	tap = ath_tx_get_tx_tid(an, tid);
4945 
4946 	/*
4947 	 * extract starting sequence and block-ack bitmap
4948 	 */
4949 	/* XXX endian-ness of seq_st, ba? */
4950 	seq_st = ts.ts_seqnum;
4951 	hasba = !! (ts.ts_flags & HAL_TX_BA);
4952 	tx_ok = (ts.ts_status == 0);
4953 	isaggr = bf_first->bf_state.bfs_aggr;
4954 	ba[0] = ts.ts_ba_low;
4955 	ba[1] = ts.ts_ba_high;
4956 
4957 	/*
4958 	 * Copy the TX completion status and the rate control
4959 	 * series from the first descriptor, as it may be freed
4960 	 * before the rate control code can get its grubby fingers
4961 	 * into things.
4962 	 */
4963 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4964 
4965 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4966 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4967 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4968 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4969 	    isaggr, seq_st, hasba, ba[0], ba[1]);
4970 
4971 	/*
4972 	 * The reference driver doesn't do this; it simply ignores
4973 	 * this check in its entirety.
4974 	 *
4975 	 * I've seen this occur when using iperf to send traffic
4976 	 * out tid 1 - the aggregate frames are all marked as TID 1,
4977 	 * but the TXSTATUS has TID=0.  So, let's just ignore this
4978 	 * check.
4979 	 */
4980 #if 0
4981 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
4982 	if (tid != ts.ts_tid) {
4983 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n",
4984 		    __func__, tid, ts.ts_tid);
4985 		tx_ok = 0;
4986 	}
4987 #endif
4988 
4989 	/* AR5416 BA bug; this requires an interface reset */
4990 	if (isaggr && tx_ok && (! hasba)) {
4991 		device_printf(sc->sc_dev,
4992 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4993 		    "seq_st=%d\n",
4994 		    __func__, hasba, tx_ok, isaggr, seq_st);
4995 		taskqueue_enqueue(sc->sc_tq, &sc->sc_fataltask);
4996 		/* And as we can't really trust the BA here .. */
4997 		ba[0] = 0;
4998 		ba[1] = 0;
4999 		seq_st = 0;
5000 #ifdef ATH_DEBUG
5001 		ath_printtxbuf(sc, bf_first,
5002 		    sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
5003 #endif
5004 	}
5005 
5006 	/*
5007 	 * Walk the list of frames, figure out which ones were correctly
5008 	 * sent and which weren't.
5009 	 */
5010 	bf = bf_first;
5011 	nf = bf_first->bf_state.bfs_nframes;
5012 
5013 	/* bf_first is going to be invalid once this list is walked */
5014 	bf_first = NULL;
5015 
5016 	/*
5017 	 * Walk the list of completed frames and determine
5018 	 * which need to be completed and which need to be
5019 	 * retransmitted.
5020 	 *
5021 	 * For completed frames, the completion functions need
5022 	 * to be called at the end of this function as the last
5023 	 * node reference may free the node.
5024 	 *
5025 	 * Finally, since the TXQ lock can't be held during the
5026 	 * completion callback (to avoid lock recursion),
5027 	 * the completion calls have to be done outside of the
5028 	 * lock.
5029 	 */
5030 	while (bf) {
5031 		nframes++;
5032 		ba_index = ATH_BA_INDEX(seq_st,
5033 		    SEQNO(bf->bf_state.bfs_seqno));
5034 		bf_next = bf->bf_next;
5035 		bf->bf_next = NULL;	/* Remove it from the aggr list */
5036 
5037 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5038 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
5039 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
5040 		    ATH_BA_ISSET(ba, ba_index));
5041 
5042 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
5043 			sc->sc_stats.ast_tx_aggr_ok++;
5044 			ath_tx_update_baw(sc, an, atid, bf);
5045 			bf->bf_state.bfs_dobaw = 0;
5046 			if (!bf->bf_state.bfs_addedbaw)
5047 				DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5048 				    "%s: wasn't added: seqno %d\n",
5049 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
5050 			bf->bf_next = NULL;
5051 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5052 		} else {
5053 			sc->sc_stats.ast_tx_aggr_fail++;
5054 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
5055 				drops++;
5056 				bf->bf_next = NULL;
5057 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5058 			}
5059 			nbad++;
5060 		}
5061 		bf = bf_next;
5062 	}
5063 
5064 	/*
5065 	 * Now that the BAW updates have been done, unlock
5066 	 *
5067 	 * txseq is grabbed before the lock is released so we
5068 	 * have a consistent view of what -was- in the BAW.
5069 	 * Anything after this point will not yet have been
5070 	 * TXed.
5071 	 */
5072 	txseq = tap->txa_start;
5073 	ATH_TX_UNLOCK(sc);
5074 
5075 	if (nframes != nf)
5076 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5077 		    "%s: num frames seen=%d; bf nframes=%d\n",
5078 		    __func__, nframes, nf);
5079 
5080 	/*
5081 	 * Now we know how many frames were bad, call the rate
5082 	 * control code.
5083 	 */
5084 	if (fail == 0) {
5085 		ath_tx_update_ratectrl(sc, ni, rc, &ts, agglen, rc_agglen,
5086 		    nframes, nbad);
5087 	}
5088 
5089 	/*
5090 	 * send bar if we dropped any frames
5091 	 */
5092 	if (drops) {
5093 		/* Suspend the TX queue and get ready to send the BAR */
5094 		ATH_TX_LOCK(sc);
5095 		ath_tx_tid_bar_suspend(sc, atid);
5096 		ATH_TX_UNLOCK(sc);
5097 	}
5098 
5099 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5100 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
5101 
5102 	ATH_TX_LOCK(sc);
5103 
5104 	/* Prepend all frames to the beginning of the queue */
5105 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
5106 		TAILQ_REMOVE(&bf_q, bf, bf_list);
5107 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
5108 	}
5109 
5110 	/*
5111 	 * Reschedule to grab some further frames.
5112 	 */
5113 	ath_tx_tid_sched(sc, atid);
5114 
5115 	/*
5116 	 * If the queue is filtered, re-schedule as required.
5117 	 *
5118 	 * This is required as there may be a subsequent TX descriptor
5119 	 * for this end-node that has CLRDMASK set, so it's quite possible
5120 	 * that a filtered frame will be followed by a non-filtered
5121 	 * (complete or otherwise) frame.
5122 	 *
5123 	 * XXX should we do this before we complete the frame?
5124 	 */
5125 	if (atid->isfiltered)
5126 		ath_tx_tid_filt_comp_complete(sc, atid);
5127 
5128 finish_send_bar:
5129 
5130 	/*
5131 	 * Send BAR if required
5132 	 */
5133 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5134 		ath_tx_tid_bar_tx(sc, atid);
5135 
5136 	ATH_TX_UNLOCK(sc);
5137 
5138 	/* Do deferred completion */
5139 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5140 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
5141 		ath_tx_default_comp(sc, bf, 0);
5142 	}
5143 }
5144 
5145 /*
5146  * Handle completion of unaggregated frames in an ADDBA
5147  * session.
5148  *
5149  * Fail is set to 1 if the entry is being freed via a call to
5150  * ath_tx_draintxq().
5151  */
5152 static void
5153 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
5154 {
5155 	struct ieee80211_node *ni = bf->bf_node;
5156 	struct ath_node *an = ATH_NODE(ni);
5157 	int tid = bf->bf_state.bfs_tid;
5158 	struct ath_tid *atid = &an->an_tid[tid];
5159 	struct ath_tx_status ts;
5160 	int drops = 0;
5161 
5162 	/*
5163 	 * Take a copy of this; filtering/cloning the frame may free the
5164 	 * bf pointer.
5165 	 */
5166 	ts = bf->bf_status.ds_txstat;
5167 
5168 	/*
5169 	 * Update rate control status here, before we possibly
5170 	 * punt to retry or cleanup.
5171 	 *
5172 	 * Do it outside of the TXQ lock.
5173 	 */
5174 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
5175 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
5176 		    &bf->bf_status.ds_txstat,
5177 		    bf->bf_state.bfs_pktlen,
5178 		    bf->bf_state.bfs_pktlen,
5179 		    1, (ts.ts_status == 0) ? 0 : 1);
5180 
5181 	/*
5182 	 * This is called early so atid->hwq_depth can be tracked.
5183 	 * This unfortunately means that it's released and regrabbed
5184 	 * during retry and cleanup. That's rather inefficient.
5185 	 */
5186 	ATH_TX_LOCK(sc);
5187 
5188 	if (tid == IEEE80211_NONQOS_TID)
5189 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__);
5190 
5191 	DPRINTF(sc, ATH_DEBUG_SW_TX,
5192 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
5193 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
5194 	    SEQNO(bf->bf_state.bfs_seqno));
5195 
5196 	atid->hwq_depth--;
5197 	if (atid->hwq_depth < 0)
5198 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
5199 		    __func__, atid->hwq_depth);
5200 
5201 	/*
5202 	 * If the TID is filtered, handle completing the filter
5203 	 * transition before potentially kicking it to the cleanup
5204 	 * function.
5205 	 */
5206 	if (atid->isfiltered)
5207 		ath_tx_tid_filt_comp_complete(sc, atid);
5208 
5209 	/*
5210 	 * If a cleanup is in progress, punt to comp_cleanup;
5211 	 * rather than handling it here. It's thus their
5212 	 * responsibility to clean up, call the completion
5213 	 * function in net80211, etc.
5214 	 */
5215 	if (atid->cleanup_inprogress) {
5216 		if (atid->isfiltered)
5217 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5218 			    "%s: isfiltered=1, normal_comp?\n",
5219 			    __func__);
5220 		ATH_TX_UNLOCK(sc);
5221 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
5222 		    __func__);
5223 		ath_tx_comp_cleanup_unaggr(sc, bf);
5224 		return;
5225 	}
5226 
5227 	/*
5228 	 * XXX TODO: how does cleanup, BAR and filtered frame handling
5229 	 * overlap?
5230 	 *
5231 	 * If the frame is filtered OR if it's any failure but
5232 	 * the TID is filtered, the frame must be added to the
5233 	 * filtered frame list.
5234 	 *
5235 	 * However - a busy buffer can't be added to the filtered
5236 	 * list as it will end up being recycled without having
5237 	 * been made available for the hardware.
5238 	 */
5239 	if ((ts.ts_status & HAL_TXERR_FILT) ||
5240 	    (ts.ts_status != 0 && atid->isfiltered)) {
5241 		int freeframe;
5242 
5243 		if (fail != 0)
5244 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5245 			    "%s: isfiltered=1, fail=%d\n",
5246 			    __func__, fail);
5247 		freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
5248 		/*
5249 		 * If freeframe=0 then bf is no longer ours; don't
5250 		 * touch it.
5251 		 */
5252 		if (freeframe) {
5253 			/* Remove from BAW */
5254 			if (bf->bf_state.bfs_addedbaw)
5255 				drops++;
5256 			if (bf->bf_state.bfs_dobaw) {
5257 				ath_tx_update_baw(sc, an, atid, bf);
5258 				if (!bf->bf_state.bfs_addedbaw)
5259 					DPRINTF(sc, ATH_DEBUG_SW_TX,
5260 					    "%s: wasn't added: seqno %d\n",
5261 					    __func__, SEQNO(bf->bf_state.bfs_seqno));
5262 			}
5263 			bf->bf_state.bfs_dobaw = 0;
5264 		}
5265 
5266 		/*
5267 		 * If the frame couldn't be filtered, treat it as a drop and
5268 		 * prepare to send a BAR.
5269 		 */
5270 		if (freeframe && drops)
5271 			ath_tx_tid_bar_suspend(sc, atid);
5272 
5273 		/*
5274 		 * Send BAR if required
5275 		 */
5276 		if (ath_tx_tid_bar_tx_ready(sc, atid))
5277 			ath_tx_tid_bar_tx(sc, atid);
5278 
5279 		ATH_TX_UNLOCK(sc);
5280 		/*
5281 		 * If freeframe is set, then the frame couldn't be
5282 		 * cloned and bf is still valid.  Just complete/free it.
5283 		 */
5284 		if (freeframe)
5285 			ath_tx_default_comp(sc, bf, fail);
5286 
5287 		return;
5288 	}
5289 	/*
5290 	 * Don't bother with the retry check if all frames
5291 	 * are being failed (eg during queue deletion.)
5292 	 */
5293 #if 0
5294 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5295 #endif
5296 	if (fail == 0 && ts.ts_status != 0) {
5297 		ATH_TX_UNLOCK(sc);
5298 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5299 		    __func__);
5300 		ath_tx_aggr_retry_unaggr(sc, bf);
5301 		return;
5302 	}
5303 
5304 	/* Success? Complete */
5305 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5306 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5307 	if (bf->bf_state.bfs_dobaw) {
5308 		ath_tx_update_baw(sc, an, atid, bf);
5309 		bf->bf_state.bfs_dobaw = 0;
5310 		if (!bf->bf_state.bfs_addedbaw)
5311 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5312 			    "%s: wasn't added: seqno %d\n",
5313 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
5314 	}
5315 
5316 	/*
5317 	 * If the queue is filtered, re-schedule as required.
5318 	 *
5319 	 * This is required as there may be a subsequent TX descriptor
5320 	 * for this end-node that has CLRDMASK set, so it's quite possible
5321 	 * that a filtered frame will be followed by a non-filtered
5322 	 * (complete or otherwise) frame.
5323 	 *
5324 	 * XXX should we do this before we complete the frame?
5325 	 */
5326 	if (atid->isfiltered)
5327 		ath_tx_tid_filt_comp_complete(sc, atid);
5328 
5329 	/*
5330 	 * Send BAR if required
5331 	 */
5332 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5333 		ath_tx_tid_bar_tx(sc, atid);
5334 
5335 	ATH_TX_UNLOCK(sc);
5336 
5337 	ath_tx_default_comp(sc, bf, fail);
5338 	/* bf is freed at this point */
5339 }
5340 
5341 void
5342 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5343 {
5344 	if (bf->bf_state.bfs_aggr)
5345 		ath_tx_aggr_comp_aggr(sc, bf, fail);
5346 	else
5347 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
5348 }
5349 
5350 /*
5351  * Grab the software queue depth that we COULD transmit.
5352  *
5353  * This includes checks if it's in the BAW, whether it's a frame
5354  * that is supposed to be in the BAW.  Other checks could be done;
5355  * but for now let's try and avoid doing the whole of ath_tx_form_aggr()
5356  * here.
5357  */
5358 static int
5359 ath_tx_tid_swq_depth_bytes(struct ath_softc *sc, struct ath_node *an,
5360     struct ath_tid *tid)
5361 {
5362 	struct ath_buf *bf;
5363 	struct ieee80211_tx_ampdu *tap;
5364 	int nbytes = 0;
5365 
5366 	ATH_TX_LOCK_ASSERT(sc);
5367 
5368 	tap = ath_tx_get_tx_tid(an, tid->tid);
5369 
5370 	/*
5371 	 * Iterate over each buffer and sum the pkt_len.
5372 	 * Bail if we exceed ATH_AGGR_MAXSIZE bytes; we won't
5373 	 * ever queue more than that in a single frame.
5374 	 */
5375 	TAILQ_FOREACH(bf, &tid->tid_q, bf_list) {
5376 		/*
5377 		 * TODO: I'm not sure if we're going to hit cases where
5378 		 * no frames get sent because the list is empty.
5379 		 */
5380 
5381 		/* Check if it's in the BAW */
5382 		if (tap != NULL && (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
5383 		    SEQNO(bf->bf_state.bfs_seqno)))) {
5384 			break;
5385 		}
5386 
5387 		/* Check if it's even supposed to be in the BAW */
5388 		if (! bf->bf_state.bfs_dobaw) {
5389 			break;
5390 		}
5391 
5392 		nbytes += bf->bf_state.bfs_pktlen;
5393 		if (nbytes >= ATH_AGGR_MAXSIZE)
5394 			break;
5395 
5396 		/*
5397 		 * Check if we're likely going to leak a frame
5398 		 * as part of a PSPOLL.  Break out at this point;
5399 		 * we're only going to send a single frame anyway.
5400 		 */
5401 		if (an->an_leak_count) {
5402 			break;
5403 		}
5404 	}
5405 
5406 	return MIN(nbytes, ATH_AGGR_MAXSIZE);
5407 }
5408 
5409 /*
5410  * Schedule some packets from the given node/TID to the hardware.
5411  *
5412  * This is the aggregate version.
5413  */
5414 void
5415 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5416     struct ath_tid *tid)
5417 {
5418 	struct ath_buf *bf;
5419 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5420 	struct ieee80211_tx_ampdu *tap;
5421 	ATH_AGGR_STATUS status;
5422 	ath_bufhead bf_q;
5423 	int swq_pktbytes;
5424 
5425 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5426 	ATH_TX_LOCK_ASSERT(sc);
5427 
5428 	/*
5429 	 * XXX TODO: If we're called for a queue that we're leaking frames to,
5430 	 * ensure we only leak one.
5431 	 */
5432 
5433 	tap = ath_tx_get_tx_tid(an, tid->tid);
5434 
5435 	if (tid->tid == IEEE80211_NONQOS_TID)
5436 		DPRINTF(sc, ATH_DEBUG_SW_TX,
5437 		    "%s: called for TID=NONQOS_TID?\n", __func__);
5438 
5439 	for (;;) {
5440 		status = ATH_AGGR_DONE;
5441 
5442 		/*
5443 		 * If the upper layer has paused the TID, don't
5444 		 * queue any further packets.
5445 		 *
5446 		 * This can also occur from the completion task because
5447 		 * of packet loss; but as its serialised with this code,
5448 		 * it won't "appear" half way through queuing packets.
5449 		 */
5450 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5451 			break;
5452 
5453 		bf = ATH_TID_FIRST(tid);
5454 		if (bf == NULL) {
5455 			break;
5456 		}
5457 
5458 		/*
5459 		 * If the packet doesn't fall within the BAW (eg a NULL
5460 		 * data frame), schedule it directly; continue.
5461 		 */
5462 		if (! bf->bf_state.bfs_dobaw) {
5463 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5464 			    "%s: non-baw packet\n",
5465 			    __func__);
5466 			ATH_TID_REMOVE(tid, bf, bf_list);
5467 
5468 			if (bf->bf_state.bfs_nframes > 1)
5469 				DPRINTF(sc, ATH_DEBUG_SW_TX,
5470 				    "%s: aggr=%d, nframes=%d\n",
5471 				    __func__,
5472 				    bf->bf_state.bfs_aggr,
5473 				    bf->bf_state.bfs_nframes);
5474 
5475 			/*
5476 			 * This shouldn't happen - such frames shouldn't
5477 			 * ever have been queued as an aggregate in the
5478 			 * first place.  However, make sure the fields
5479 			 * are correctly setup just to be totally sure.
5480 			 */
5481 			bf->bf_state.bfs_aggr = 0;
5482 			bf->bf_state.bfs_nframes = 1;
5483 
5484 			/* Update CLRDMASK just before this frame is queued */
5485 			ath_tx_update_clrdmask(sc, tid, bf);
5486 
5487 			ath_tx_do_ratelookup(sc, bf, tid->tid,
5488 			    bf->bf_state.bfs_pktlen, false);
5489 			ath_tx_calc_duration(sc, bf);
5490 			ath_tx_calc_protection(sc, bf);
5491 			ath_tx_set_rtscts(sc, bf);
5492 			ath_tx_rate_fill_rcflags(sc, bf);
5493 			ath_tx_setds(sc, bf);
5494 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5495 
5496 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5497 
5498 			/* Queue the packet; continue */
5499 			goto queuepkt;
5500 		}
5501 
5502 		TAILQ_INIT(&bf_q);
5503 
5504 		/*
5505 		 * Loop over the swq to find out how long
5506 		 * each packet is (up until 64k) and provide that
5507 		 * to the rate control lookup.
5508 		 */
5509 		swq_pktbytes = ath_tx_tid_swq_depth_bytes(sc, an, tid);
5510 		ath_tx_do_ratelookup(sc, bf, tid->tid, swq_pktbytes, true);
5511 
5512 		/*
5513 		 * Note this only is used for the fragment paths and
5514 		 * should really be rethought out if we want to do
5515 		 * things like an RTS burst across >1 aggregate.
5516 		 */
5517 		ath_tx_calc_duration(sc, bf);
5518 		ath_tx_calc_protection(sc, bf);
5519 
5520 		ath_tx_set_rtscts(sc, bf);
5521 		ath_tx_rate_fill_rcflags(sc, bf);
5522 
5523 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5524 
5525 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5526 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5527 
5528 		/*
5529 		 * No frames to be picked up - out of BAW
5530 		 */
5531 		if (TAILQ_EMPTY(&bf_q))
5532 			break;
5533 
5534 		/*
5535 		 * This assumes that the descriptor list in the ath_bufhead
5536 		 * are already linked together via bf_next pointers.
5537 		 */
5538 		bf = TAILQ_FIRST(&bf_q);
5539 
5540 		if (status == ATH_AGGR_8K_LIMITED)
5541 			sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5542 
5543 		/*
5544 		 * If it's the only frame send as non-aggregate
5545 		 * assume that ath_tx_form_aggr() has checked
5546 		 * whether it's in the BAW and added it appropriately.
5547 		 */
5548 		if (bf->bf_state.bfs_nframes == 1) {
5549 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5550 			    "%s: single-frame aggregate\n", __func__);
5551 
5552 			/* Update CLRDMASK just before this frame is queued */
5553 			ath_tx_update_clrdmask(sc, tid, bf);
5554 
5555 			bf->bf_state.bfs_aggr = 0;
5556 			bf->bf_state.bfs_ndelim = 0;
5557 			ath_tx_setds(sc, bf);
5558 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5559 			if (status == ATH_AGGR_BAW_CLOSED)
5560 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5561 			else
5562 				sc->sc_aggr_stats.aggr_single_pkt++;
5563 		} else {
5564 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5565 			    "%s: multi-frame aggregate: %d frames, "
5566 			    "length %d\n",
5567 			     __func__, bf->bf_state.bfs_nframes,
5568 			    bf->bf_state.bfs_al);
5569 			bf->bf_state.bfs_aggr = 1;
5570 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5571 			sc->sc_aggr_stats.aggr_aggr_pkt++;
5572 
5573 			/* Update CLRDMASK just before this frame is queued */
5574 			ath_tx_update_clrdmask(sc, tid, bf);
5575 
5576 			/*
5577 			 * Calculate the duration/protection as required.
5578 			 */
5579 			ath_tx_calc_duration(sc, bf);
5580 			ath_tx_calc_protection(sc, bf);
5581 
5582 			/*
5583 			 * Update the rate and rtscts information based on the
5584 			 * rate decision made by the rate control code;
5585 			 * the first frame in the aggregate needs it.
5586 			 */
5587 			ath_tx_set_rtscts(sc, bf);
5588 
5589 			/*
5590 			 * Setup the relevant descriptor fields
5591 			 * for aggregation. The first descriptor
5592 			 * already points to the rest in the chain.
5593 			 */
5594 			ath_tx_setds_11n(sc, bf);
5595 		}
5596 	queuepkt:
5597 		/* Set completion handler, multi-frame aggregate or not */
5598 		bf->bf_comp = ath_tx_aggr_comp;
5599 
5600 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
5601 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__);
5602 
5603 		/*
5604 		 * Update leak count and frame config if were leaking frames.
5605 		 *
5606 		 * XXX TODO: it should update all frames in an aggregate
5607 		 * correctly!
5608 		 */
5609 		ath_tx_leak_count_update(sc, tid, bf);
5610 
5611 		/* Punt to txq */
5612 		ath_tx_handoff(sc, txq, bf);
5613 
5614 		/* Track outstanding buffer count to hardware */
5615 		/* aggregates are "one" buffer */
5616 		tid->hwq_depth++;
5617 
5618 		/*
5619 		 * Break out if ath_tx_form_aggr() indicated
5620 		 * there can't be any further progress (eg BAW is full.)
5621 		 * Checking for an empty txq is done above.
5622 		 *
5623 		 * XXX locking on txq here?
5624 		 */
5625 		/* XXX TXQ locking */
5626 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr ||
5627 		    (status == ATH_AGGR_BAW_CLOSED ||
5628 		     status == ATH_AGGR_LEAK_CLOSED))
5629 			break;
5630 	}
5631 }
5632 
5633 /*
5634  * Schedule some packets from the given node/TID to the hardware.
5635  *
5636  * XXX TODO: this routine doesn't enforce the maximum TXQ depth.
5637  * It just dumps frames into the TXQ.  We should limit how deep
5638  * the transmit queue can grow for frames dispatched to the given
5639  * TXQ.
5640  *
5641  * To avoid locking issues, either we need to own the TXQ lock
5642  * at this point, or we need to pass in the maximum frame count
5643  * from the caller.
5644  */
5645 void
5646 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5647     struct ath_tid *tid)
5648 {
5649 	struct ath_buf *bf;
5650 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5651 
5652 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5653 	    __func__, an, tid->tid);
5654 
5655 	ATH_TX_LOCK_ASSERT(sc);
5656 
5657 	/* Check - is AMPDU pending or running? then print out something */
5658 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
5659 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n",
5660 		    __func__, tid->tid);
5661 	if (ath_tx_ampdu_running(sc, an, tid->tid))
5662 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n",
5663 		    __func__, tid->tid);
5664 
5665 	for (;;) {
5666 		/*
5667 		 * If the upper layers have paused the TID, don't
5668 		 * queue any further packets.
5669 		 *
5670 		 * XXX if we are leaking frames, make sure we decrement
5671 		 * that counter _and_ we continue here.
5672 		 */
5673 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5674 			break;
5675 
5676 		bf = ATH_TID_FIRST(tid);
5677 		if (bf == NULL) {
5678 			break;
5679 		}
5680 
5681 		ATH_TID_REMOVE(tid, bf, bf_list);
5682 
5683 		/* Sanity check! */
5684 		if (tid->tid != bf->bf_state.bfs_tid) {
5685 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !="
5686 			    " tid %d\n", __func__, bf->bf_state.bfs_tid,
5687 			    tid->tid);
5688 		}
5689 		/* Normal completion handler */
5690 		bf->bf_comp = ath_tx_normal_comp;
5691 
5692 		/*
5693 		 * Override this for now, until the non-aggregate
5694 		 * completion handler correctly handles software retransmits.
5695 		 */
5696 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
5697 
5698 		/* Update CLRDMASK just before this frame is queued */
5699 		ath_tx_update_clrdmask(sc, tid, bf);
5700 
5701 		/* Program descriptors + rate control */
5702 		ath_tx_do_ratelookup(sc, bf, tid->tid,
5703 		    bf->bf_state.bfs_pktlen, false);
5704 		ath_tx_calc_duration(sc, bf);
5705 		ath_tx_calc_protection(sc, bf);
5706 		ath_tx_set_rtscts(sc, bf);
5707 		ath_tx_rate_fill_rcflags(sc, bf);
5708 		ath_tx_setds(sc, bf);
5709 
5710 		/*
5711 		 * Update the current leak count if
5712 		 * we're leaking frames; and set the
5713 		 * MORE flag as appropriate.
5714 		 */
5715 		ath_tx_leak_count_update(sc, tid, bf);
5716 
5717 		/* Track outstanding buffer count to hardware */
5718 		/* aggregates are "one" buffer */
5719 		tid->hwq_depth++;
5720 
5721 		/* Punt to hardware or software txq */
5722 		ath_tx_handoff(sc, txq, bf);
5723 	}
5724 }
5725 
5726 /*
5727  * Schedule some packets to the given hardware queue.
5728  *
5729  * This function walks the list of TIDs (ie, ath_node TIDs
5730  * with queued traffic) and attempts to schedule traffic
5731  * from them.
5732  *
5733  * TID scheduling is implemented as a FIFO, with TIDs being
5734  * added to the end of the queue after some frames have been
5735  * scheduled.
5736  */
5737 void
5738 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5739 {
5740 	struct ath_tid *tid, *next, *last;
5741 
5742 	ATH_TX_LOCK_ASSERT(sc);
5743 
5744 	/*
5745 	 * For non-EDMA chips, aggr frames that have been built are
5746 	 * in axq_aggr_depth, whether they've been scheduled or not.
5747 	 * There's no FIFO, so txq->axq_depth is what's been scheduled
5748 	 * to the hardware.
5749 	 *
5750 	 * For EDMA chips, we do it in two stages.  The existing code
5751 	 * builds a list of frames to go to the hardware and the EDMA
5752 	 * code turns it into a single entry to push into the FIFO.
5753 	 * That way we don't take up one packet per FIFO slot.
5754 	 * We do push one aggregate per FIFO slot though, just to keep
5755 	 * things simple.
5756 	 *
5757 	 * The FIFO depth is what's in the hardware; the txq->axq_depth
5758 	 * is what's been scheduled to the FIFO.
5759 	 *
5760 	 * fifo.axq_depth is the number of frames (or aggregates) pushed
5761 	 *  into the EDMA FIFO.  For multi-frame lists, this is the number
5762 	 *  of frames pushed in.
5763 	 * axq_fifo_depth is the number of FIFO slots currently busy.
5764 	 */
5765 
5766 	/* For EDMA and non-EDMA, check built/scheduled against aggr limit */
5767 	if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) {
5768 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5769 		return;
5770 	}
5771 
5772 	/*
5773 	 * For non-EDMA chips, axq_depth is the "what's scheduled to
5774 	 * the hardware list".  For EDMA it's "What's built for the hardware"
5775 	 * and fifo.axq_depth is how many frames have been dispatched
5776 	 * already to the hardware.
5777 	 */
5778 	if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) {
5779 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5780 		return;
5781 	}
5782 
5783 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5784 
5785 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5786 		/*
5787 		 * Suspend paused queues here; they'll be resumed
5788 		 * once the addba completes or times out.
5789 		 */
5790 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5791 		    __func__, tid->tid, tid->paused);
5792 		ath_tx_tid_unsched(sc, tid);
5793 		/*
5794 		 * This node may be in power-save and we're leaking
5795 		 * a frame; be careful.
5796 		 */
5797 		if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
5798 			goto loop_done;
5799 		}
5800 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5801 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5802 		else
5803 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5804 
5805 		/* Not empty? Re-schedule */
5806 		if (tid->axq_depth != 0)
5807 			ath_tx_tid_sched(sc, tid);
5808 
5809 		/*
5810 		 * Give the software queue time to aggregate more
5811 		 * packets.  If we aren't running aggregation then
5812 		 * we should still limit the hardware queue depth.
5813 		 */
5814 		/* XXX TXQ locking */
5815 		if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) {
5816 			break;
5817 		}
5818 		if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) {
5819 			break;
5820 		}
5821 loop_done:
5822 		/*
5823 		 * If this was the last entry on the original list, stop.
5824 		 * Otherwise nodes that have been rescheduled onto the end
5825 		 * of the TID FIFO list will just keep being rescheduled.
5826 		 *
5827 		 * XXX What should we do about nodes that were paused
5828 		 * but are pending a leaking frame in response to a ps-poll?
5829 		 * They'll be put at the front of the list; so they'll
5830 		 * prematurely trigger this condition! Ew.
5831 		 */
5832 		if (tid == last)
5833 			break;
5834 	}
5835 }
5836 
5837 /*
5838  * TX addba handling
5839  */
5840 
5841 /*
5842  * Return net80211 TID struct pointer, or NULL for none
5843  */
5844 struct ieee80211_tx_ampdu *
5845 ath_tx_get_tx_tid(struct ath_node *an, int tid)
5846 {
5847 	struct ieee80211_node *ni = &an->an_node;
5848 	struct ieee80211_tx_ampdu *tap;
5849 
5850 	if (tid == IEEE80211_NONQOS_TID)
5851 		return NULL;
5852 
5853 	tap = &ni->ni_tx_ampdu[tid];
5854 	return tap;
5855 }
5856 
5857 /*
5858  * Is AMPDU-TX running?
5859  */
5860 static int
5861 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5862 {
5863 	struct ieee80211_tx_ampdu *tap;
5864 
5865 	if (tid == IEEE80211_NONQOS_TID)
5866 		return 0;
5867 
5868 	tap = ath_tx_get_tx_tid(an, tid);
5869 	if (tap == NULL)
5870 		return 0;	/* Not valid; default to not running */
5871 
5872 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5873 }
5874 
5875 /*
5876  * Is AMPDU-TX negotiation pending?
5877  */
5878 static int
5879 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5880 {
5881 	struct ieee80211_tx_ampdu *tap;
5882 
5883 	if (tid == IEEE80211_NONQOS_TID)
5884 		return 0;
5885 
5886 	tap = ath_tx_get_tx_tid(an, tid);
5887 	if (tap == NULL)
5888 		return 0;	/* Not valid; default to not pending */
5889 
5890 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5891 }
5892 
5893 /*
5894  * Is AMPDU-TX pending for the given TID?
5895  */
5896 
5897 /*
5898  * Method to handle sending an ADDBA request.
5899  *
5900  * We tap this so the relevant flags can be set to pause the TID
5901  * whilst waiting for the response.
5902  *
5903  * XXX there's no timeout handler we can override?
5904  */
5905 int
5906 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5907     int dialogtoken, int baparamset, int batimeout)
5908 {
5909 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5910 	int tid = tap->txa_tid;
5911 	struct ath_node *an = ATH_NODE(ni);
5912 	struct ath_tid *atid = &an->an_tid[tid];
5913 
5914 	/*
5915 	 * XXX danger Will Robinson!
5916 	 *
5917 	 * Although the taskqueue may be running and scheduling some more
5918 	 * packets, these should all be _before_ the addba sequence number.
5919 	 * However, net80211 will keep self-assigning sequence numbers
5920 	 * until addba has been negotiated.
5921 	 *
5922 	 * In the past, these packets would be "paused" (which still works
5923 	 * fine, as they're being scheduled to the driver in the same
5924 	 * serialised method which is calling the addba request routine)
5925 	 * and when the aggregation session begins, they'll be dequeued
5926 	 * as aggregate packets and added to the BAW. However, now there's
5927 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5928 	 * packets. Thus they never get included in the BAW tracking and
5929 	 * this can cause the initial burst of packets after the addba
5930 	 * negotiation to "hang", as they quickly fall outside the BAW.
5931 	 *
5932 	 * The "eventual" solution should be to tag these packets with
5933 	 * dobaw. Although net80211 has given us a sequence number,
5934 	 * it'll be "after" the left edge of the BAW and thus it'll
5935 	 * fall within it.
5936 	 */
5937 	ATH_TX_LOCK(sc);
5938 	/*
5939 	 * This is a bit annoying.  Until net80211 HT code inherits some
5940 	 * (any) locking, we may have this called in parallel BUT only
5941 	 * one response/timeout will be called.  Grr.
5942 	 */
5943 	if (atid->addba_tx_pending == 0) {
5944 		ath_tx_tid_pause(sc, atid);
5945 		atid->addba_tx_pending = 1;
5946 	}
5947 	ATH_TX_UNLOCK(sc);
5948 
5949 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5950 	    "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
5951 	    __func__,
5952 	    ni->ni_macaddr,
5953 	    ":",
5954 	    dialogtoken, baparamset, batimeout);
5955 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5956 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5957 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5958 
5959 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5960 	    batimeout);
5961 }
5962 
5963 /*
5964  * Handle an ADDBA response.
5965  *
5966  * We unpause the queue so TX'ing can resume.
5967  *
5968  * Any packets TX'ed from this point should be "aggregate" (whether
5969  * aggregate or not) so the BAW is updated.
5970  *
5971  * Note! net80211 keeps self-assigning sequence numbers until
5972  * ampdu is negotiated. This means the initially-negotiated BAW left
5973  * edge won't match the ni->ni_txseq.
5974  *
5975  * So, being very dirty, the BAW left edge is "slid" here to match
5976  * ni->ni_txseq.
5977  *
5978  * What likely SHOULD happen is that all packets subsequent to the
5979  * addba request should be tagged as aggregate and queued as non-aggregate
5980  * frames; thus updating the BAW. For now though, I'll just slide the
5981  * window.
5982  */
5983 int
5984 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5985     int status, int code, int batimeout)
5986 {
5987 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5988 	int tid = tap->txa_tid;
5989 	struct ath_node *an = ATH_NODE(ni);
5990 	struct ath_tid *atid = &an->an_tid[tid];
5991 	int r;
5992 
5993 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5994 	    "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
5995 	    ni->ni_macaddr,
5996 	    ":",
5997 	    status, code, batimeout);
5998 
5999 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6000 	    "%s: txa_start=%d, ni_txseqs=%d\n",
6001 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
6002 
6003 	/*
6004 	 * Call this first, so the interface flags get updated
6005 	 * before the TID is unpaused. Otherwise a race condition
6006 	 * exists where the unpaused TID still doesn't yet have
6007 	 * IEEE80211_AGGR_RUNNING set.
6008 	 */
6009 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
6010 
6011 	ATH_TX_LOCK(sc);
6012 	atid->addba_tx_pending = 0;
6013 	/*
6014 	 * XXX dirty!
6015 	 * Slide the BAW left edge to wherever net80211 left it for us.
6016 	 * Read above for more information.
6017 	 */
6018 	tap->txa_start = ni->ni_txseqs[tid];
6019 	ath_tx_tid_resume(sc, atid);
6020 	ATH_TX_UNLOCK(sc);
6021 	return r;
6022 }
6023 
6024 /*
6025  * Stop ADDBA on a queue.
6026  *
6027  * This can be called whilst BAR TX is currently active on the queue,
6028  * so make sure this is unblocked before continuing.
6029  */
6030 void
6031 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
6032 {
6033 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6034 	int tid = tap->txa_tid;
6035 	struct ath_node *an = ATH_NODE(ni);
6036 	struct ath_tid *atid = &an->an_tid[tid];
6037 	ath_bufhead bf_cq;
6038 	struct ath_buf *bf;
6039 
6040 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
6041 	    __func__,
6042 	    ni->ni_macaddr,
6043 	    ":");
6044 
6045 	/*
6046 	 * Pause TID traffic early, so there aren't any races
6047 	 * Unblock the pending BAR held traffic, if it's currently paused.
6048 	 */
6049 	ATH_TX_LOCK(sc);
6050 	ath_tx_tid_pause(sc, atid);
6051 	if (atid->bar_wait) {
6052 		/*
6053 		 * bar_unsuspend() expects bar_tx == 1, as it should be
6054 		 * called from the TX completion path.  This quietens
6055 		 * the warning.  It's cleared for us anyway.
6056 		 */
6057 		atid->bar_tx = 1;
6058 		ath_tx_tid_bar_unsuspend(sc, atid);
6059 	}
6060 	ATH_TX_UNLOCK(sc);
6061 
6062 	/* There's no need to hold the TXQ lock here */
6063 	sc->sc_addba_stop(ni, tap);
6064 
6065 	/*
6066 	 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
6067 	 * it'll set the cleanup flag, and it'll be unpaused once
6068 	 * things have been cleaned up.
6069 	 */
6070 	TAILQ_INIT(&bf_cq);
6071 	ATH_TX_LOCK(sc);
6072 
6073 	/*
6074 	 * In case there's a followup call to this, only call it
6075 	 * if we don't have a cleanup in progress.
6076 	 *
6077 	 * Since we've paused the queue above, we need to make
6078 	 * sure we unpause if there's already a cleanup in
6079 	 * progress - it means something else is also doing
6080 	 * this stuff, so we don't need to also keep it paused.
6081 	 */
6082 	if (atid->cleanup_inprogress) {
6083 		ath_tx_tid_resume(sc, atid);
6084 	} else {
6085 		ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
6086 		/*
6087 		 * Unpause the TID if no cleanup is required.
6088 		 */
6089 		if (! atid->cleanup_inprogress)
6090 			ath_tx_tid_resume(sc, atid);
6091 	}
6092 	ATH_TX_UNLOCK(sc);
6093 
6094 	/* Handle completing frames and fail them */
6095 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
6096 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
6097 		ath_tx_default_comp(sc, bf, 1);
6098 	}
6099 
6100 }
6101 
6102 /*
6103  * Handle a node reassociation.
6104  *
6105  * We may have a bunch of frames queued to the hardware; those need
6106  * to be marked as cleanup.
6107  */
6108 void
6109 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
6110 {
6111 	struct ath_tid *tid;
6112 	int i;
6113 	ath_bufhead bf_cq;
6114 	struct ath_buf *bf;
6115 
6116 	TAILQ_INIT(&bf_cq);
6117 
6118 	ATH_TX_UNLOCK_ASSERT(sc);
6119 
6120 	ATH_TX_LOCK(sc);
6121 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
6122 		tid = &an->an_tid[i];
6123 		if (tid->hwq_depth == 0)
6124 			continue;
6125 		DPRINTF(sc, ATH_DEBUG_NODE,
6126 		    "%s: %6D: TID %d: cleaning up TID\n",
6127 		    __func__,
6128 		    an->an_node.ni_macaddr,
6129 		    ":",
6130 		    i);
6131 		/*
6132 		 * In case there's a followup call to this, only call it
6133 		 * if we don't have a cleanup in progress.
6134 		 */
6135 		if (! tid->cleanup_inprogress) {
6136 			ath_tx_tid_pause(sc, tid);
6137 			ath_tx_tid_cleanup(sc, an, i, &bf_cq);
6138 			/*
6139 			 * Unpause the TID if no cleanup is required.
6140 			 */
6141 			if (! tid->cleanup_inprogress)
6142 				ath_tx_tid_resume(sc, tid);
6143 		}
6144 	}
6145 	ATH_TX_UNLOCK(sc);
6146 
6147 	/* Handle completing frames and fail them */
6148 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
6149 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
6150 		ath_tx_default_comp(sc, bf, 1);
6151 	}
6152 }
6153 
6154 /*
6155  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
6156  * it simply tears down the aggregation session. Ew.
6157  *
6158  * It however will call ieee80211_ampdu_stop() which will call
6159  * ic->ic_addba_stop().
6160  *
6161  * XXX This uses a hard-coded max BAR count value; the whole
6162  * XXX BAR TX success or failure should be better handled!
6163  */
6164 void
6165 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
6166     int status)
6167 {
6168 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6169 	int tid = tap->txa_tid;
6170 	struct ath_node *an = ATH_NODE(ni);
6171 	struct ath_tid *atid = &an->an_tid[tid];
6172 	int attempts = tap->txa_attempts;
6173 	int old_txa_start;
6174 
6175 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6176 	    "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n",
6177 	    __func__,
6178 	    ni->ni_macaddr,
6179 	    ":",
6180 	    tap->txa_tid,
6181 	    atid->tid,
6182 	    status,
6183 	    attempts,
6184 	    tap->txa_start,
6185 	    tap->txa_seqpending);
6186 
6187 	/* Note: This may update the BAW details */
6188 	/*
6189 	 * XXX What if this does slide the BAW along? We need to somehow
6190 	 * XXX either fix things when it does happen, or prevent the
6191 	 * XXX seqpending value to be anything other than exactly what
6192 	 * XXX the hell we want!
6193 	 *
6194 	 * XXX So for now, how I do this inside the TX lock for now
6195 	 * XXX and just correct it afterwards? The below condition should
6196 	 * XXX never happen and if it does I need to fix all kinds of things.
6197 	 */
6198 	ATH_TX_LOCK(sc);
6199 	old_txa_start = tap->txa_start;
6200 	sc->sc_bar_response(ni, tap, status);
6201 	if (tap->txa_start != old_txa_start) {
6202 		device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n",
6203 		    __func__,
6204 		    tid,
6205 		    tap->txa_start,
6206 		    old_txa_start);
6207 	}
6208 	tap->txa_start = old_txa_start;
6209 	ATH_TX_UNLOCK(sc);
6210 
6211 	/* Unpause the TID */
6212 	/*
6213 	 * XXX if this is attempt=50, the TID will be downgraded
6214 	 * XXX to a non-aggregate session. So we must unpause the
6215 	 * XXX TID here or it'll never be done.
6216 	 *
6217 	 * Also, don't call it if bar_tx/bar_wait are 0; something
6218 	 * has beaten us to the punch? (XXX figure out what?)
6219 	 */
6220 	if (status == 0 || attempts == 50) {
6221 		ATH_TX_LOCK(sc);
6222 		if (atid->bar_tx == 0 || atid->bar_wait == 0)
6223 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6224 			    "%s: huh? bar_tx=%d, bar_wait=%d\n",
6225 			    __func__,
6226 			    atid->bar_tx, atid->bar_wait);
6227 		else
6228 			ath_tx_tid_bar_unsuspend(sc, atid);
6229 		ATH_TX_UNLOCK(sc);
6230 	}
6231 }
6232 
6233 /*
6234  * This is called whenever the pending ADDBA request times out.
6235  * Unpause and reschedule the TID.
6236  */
6237 void
6238 ath_addba_response_timeout(struct ieee80211_node *ni,
6239     struct ieee80211_tx_ampdu *tap)
6240 {
6241 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6242 	int tid = tap->txa_tid;
6243 	struct ath_node *an = ATH_NODE(ni);
6244 	struct ath_tid *atid = &an->an_tid[tid];
6245 
6246 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6247 	    "%s: %6D: TID=%d, called; resuming\n",
6248 	    __func__,
6249 	    ni->ni_macaddr,
6250 	    ":",
6251 	    tid);
6252 
6253 	ATH_TX_LOCK(sc);
6254 	atid->addba_tx_pending = 0;
6255 	ATH_TX_UNLOCK(sc);
6256 
6257 	/* Note: This updates the aggregate state to (again) pending */
6258 	sc->sc_addba_response_timeout(ni, tap);
6259 
6260 	/* Unpause the TID; which reschedules it */
6261 	ATH_TX_LOCK(sc);
6262 	ath_tx_tid_resume(sc, atid);
6263 	ATH_TX_UNLOCK(sc);
6264 }
6265 
6266 /*
6267  * Check if a node is asleep or not.
6268  */
6269 int
6270 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
6271 {
6272 
6273 	ATH_TX_LOCK_ASSERT(sc);
6274 
6275 	return (an->an_is_powersave);
6276 }
6277 
6278 /*
6279  * Mark a node as currently "in powersaving."
6280  * This suspends all traffic on the node.
6281  *
6282  * This must be called with the node/tx locks free.
6283  *
6284  * XXX TODO: the locking silliness below is due to how the node
6285  * locking currently works.  Right now, the node lock is grabbed
6286  * to do rate control lookups and these are done with the TX
6287  * queue lock held.  This means the node lock can't be grabbed
6288  * first here or a LOR will occur.
6289  *
6290  * Eventually (hopefully!) the TX path code will only grab
6291  * the TXQ lock when transmitting and the ath_node lock when
6292  * doing node/TID operations.  There are other complications -
6293  * the sched/unsched operations involve walking the per-txq
6294  * 'active tid' list and this requires both locks to be held.
6295  */
6296 void
6297 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
6298 {
6299 	struct ath_tid *atid;
6300 	struct ath_txq *txq;
6301 	int tid;
6302 
6303 	ATH_TX_UNLOCK_ASSERT(sc);
6304 
6305 	/* Suspend all traffic on the node */
6306 	ATH_TX_LOCK(sc);
6307 
6308 	if (an->an_is_powersave) {
6309 		DPRINTF(sc, ATH_DEBUG_XMIT,
6310 		    "%s: %6D: node was already asleep!\n",
6311 		    __func__, an->an_node.ni_macaddr, ":");
6312 		ATH_TX_UNLOCK(sc);
6313 		return;
6314 	}
6315 
6316 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6317 		atid = &an->an_tid[tid];
6318 		txq = sc->sc_ac2q[atid->ac];
6319 
6320 		ath_tx_tid_pause(sc, atid);
6321 	}
6322 
6323 	/* Mark node as in powersaving */
6324 	an->an_is_powersave = 1;
6325 
6326 	ATH_TX_UNLOCK(sc);
6327 }
6328 
6329 /*
6330  * Mark a node as currently "awake."
6331  * This resumes all traffic to the node.
6332  */
6333 void
6334 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
6335 {
6336 	struct ath_tid *atid;
6337 	struct ath_txq *txq;
6338 	int tid;
6339 
6340 	ATH_TX_UNLOCK_ASSERT(sc);
6341 
6342 	ATH_TX_LOCK(sc);
6343 
6344 	/* !? */
6345 	if (an->an_is_powersave == 0) {
6346 		ATH_TX_UNLOCK(sc);
6347 		DPRINTF(sc, ATH_DEBUG_XMIT,
6348 		    "%s: an=%p: node was already awake\n",
6349 		    __func__, an);
6350 		return;
6351 	}
6352 
6353 	/* Mark node as awake */
6354 	an->an_is_powersave = 0;
6355 	/*
6356 	 * Clear any pending leaked frame requests
6357 	 */
6358 	an->an_leak_count = 0;
6359 
6360 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6361 		atid = &an->an_tid[tid];
6362 		txq = sc->sc_ac2q[atid->ac];
6363 
6364 		ath_tx_tid_resume(sc, atid);
6365 	}
6366 	ATH_TX_UNLOCK(sc);
6367 }
6368 
6369 static int
6370 ath_legacy_dma_txsetup(struct ath_softc *sc)
6371 {
6372 
6373 	/* nothing new needed */
6374 	return (0);
6375 }
6376 
6377 static int
6378 ath_legacy_dma_txteardown(struct ath_softc *sc)
6379 {
6380 
6381 	/* nothing new needed */
6382 	return (0);
6383 }
6384 
6385 void
6386 ath_xmit_setup_legacy(struct ath_softc *sc)
6387 {
6388 	/*
6389 	 * For now, just set the descriptor length to sizeof(ath_desc);
6390 	 * worry about extracting the real length out of the HAL later.
6391 	 */
6392 	sc->sc_tx_desclen = sizeof(struct ath_desc);
6393 	sc->sc_tx_statuslen = sizeof(struct ath_desc);
6394 	sc->sc_tx_nmaps = 1;	/* only one buffer per TX desc */
6395 
6396 	sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
6397 	sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
6398 	sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
6399 
6400 	sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
6401 	sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
6402 
6403 	sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
6404 }
6405