1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32 #include <sys/cdefs.h>
33 /*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39
40 #include "opt_inet.h"
41 #include "opt_ath.h"
42 #include "opt_wlan.h"
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/sysctl.h>
47 #include <sys/mbuf.h>
48 #include <sys/malloc.h>
49 #include <sys/lock.h>
50 #include <sys/mutex.h>
51 #include <sys/kernel.h>
52 #include <sys/socket.h>
53 #include <sys/sockio.h>
54 #include <sys/errno.h>
55 #include <sys/callout.h>
56 #include <sys/bus.h>
57 #include <sys/endian.h>
58 #include <sys/kthread.h>
59 #include <sys/taskqueue.h>
60 #include <sys/priv.h>
61
62 #include <machine/bus.h>
63
64 #include <net/if.h>
65 #include <net/if_var.h>
66 #include <net/if_dl.h>
67 #include <net/if_media.h>
68 #include <net/if_types.h>
69 #include <net/if_arp.h>
70 #include <net/ethernet.h>
71 #include <net/if_llc.h>
72
73 #include <net80211/ieee80211_var.h>
74 #include <net80211/ieee80211_regdomain.h>
75 #ifdef IEEE80211_SUPPORT_SUPERG
76 #include <net80211/ieee80211_superg.h>
77 #endif
78 #ifdef IEEE80211_SUPPORT_TDMA
79 #include <net80211/ieee80211_tdma.h>
80 #endif
81
82 #include <net/bpf.h>
83
84 #ifdef INET
85 #include <netinet/in.h>
86 #include <netinet/if_ether.h>
87 #endif
88
89 #include <dev/ath/if_athvar.h>
90 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
91 #include <dev/ath/ath_hal/ah_diagcodes.h>
92
93 #include <dev/ath/if_ath_debug.h>
94 #include <dev/ath/if_ath_led.h>
95 #include <dev/ath/if_ath_misc.h>
96 #include <dev/ath/if_ath_tx.h>
97 #include <dev/ath/if_ath_sysctl.h>
98
99 #ifdef ATH_TX99_DIAG
100 #include <dev/ath/ath_tx99/ath_tx99.h>
101 #endif
102
103 #ifdef ATH_DEBUG_ALQ
104 #include <dev/ath/if_ath_alq.h>
105 #endif
106
107 static int
ath_sysctl_slottime(SYSCTL_HANDLER_ARGS)108 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS)
109 {
110 struct ath_softc *sc = arg1;
111 u_int slottime;
112 int error;
113
114 ATH_LOCK(sc);
115 ath_power_set_power_state(sc, HAL_PM_AWAKE);
116 slottime = ath_hal_getslottime(sc->sc_ah);
117 ATH_UNLOCK(sc);
118
119 error = sysctl_handle_int(oidp, &slottime, 0, req);
120 if (error || !req->newptr)
121 goto finish;
122
123 error = !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0;
124
125 finish:
126 ATH_LOCK(sc);
127 ath_power_restore_power_state(sc);
128 ATH_UNLOCK(sc);
129
130 return error;
131 }
132
133 static int
ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS)134 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS)
135 {
136 struct ath_softc *sc = arg1;
137 u_int acktimeout;
138 int error;
139
140 ATH_LOCK(sc);
141 ath_power_set_power_state(sc, HAL_PM_AWAKE);
142 acktimeout = ath_hal_getacktimeout(sc->sc_ah);
143 ATH_UNLOCK(sc);
144
145 error = sysctl_handle_int(oidp, &acktimeout, 0, req);
146 if (error || !req->newptr)
147 goto finish;
148
149 error = !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0;
150
151 finish:
152 ATH_LOCK(sc);
153 ath_power_restore_power_state(sc);
154 ATH_UNLOCK(sc);
155
156 return (error);
157 }
158
159 static int
ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS)160 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS)
161 {
162 struct ath_softc *sc = arg1;
163 u_int ctstimeout;
164 int error;
165
166 ATH_LOCK(sc);
167 ath_power_set_power_state(sc, HAL_PM_AWAKE);
168 ctstimeout = ath_hal_getctstimeout(sc->sc_ah);
169 ATH_UNLOCK(sc);
170
171 error = sysctl_handle_int(oidp, &ctstimeout, 0, req);
172 if (error || !req->newptr)
173 goto finish;
174
175 error = !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0;
176
177 finish:
178 ATH_LOCK(sc);
179 ath_power_restore_power_state(sc);
180 ATH_UNLOCK(sc);
181
182 return (error);
183 }
184
185 static int
ath_sysctl_softled(SYSCTL_HANDLER_ARGS)186 ath_sysctl_softled(SYSCTL_HANDLER_ARGS)
187 {
188 struct ath_softc *sc = arg1;
189 int softled = sc->sc_softled;
190 int error;
191
192 error = sysctl_handle_int(oidp, &softled, 0, req);
193 if (error || !req->newptr)
194 return error;
195 softled = (softled != 0);
196 if (softled != sc->sc_softled) {
197 if (softled) {
198 /* NB: handle any sc_ledpin change */
199 ath_led_config(sc);
200 }
201 sc->sc_softled = softled;
202 }
203 return 0;
204 }
205
206 static int
ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS)207 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS)
208 {
209 struct ath_softc *sc = arg1;
210 int ledpin = sc->sc_ledpin;
211 int error;
212
213 error = sysctl_handle_int(oidp, &ledpin, 0, req);
214 if (error || !req->newptr)
215 return error;
216 if (ledpin != sc->sc_ledpin) {
217 sc->sc_ledpin = ledpin;
218 if (sc->sc_softled) {
219 ath_led_config(sc);
220 }
221 }
222 return 0;
223 }
224
225 static int
ath_sysctl_hardled(SYSCTL_HANDLER_ARGS)226 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS)
227 {
228 struct ath_softc *sc = arg1;
229 int hardled = sc->sc_hardled;
230 int error;
231
232 error = sysctl_handle_int(oidp, &hardled, 0, req);
233 if (error || !req->newptr)
234 return error;
235 hardled = (hardled != 0);
236 if (hardled != sc->sc_hardled) {
237 if (hardled) {
238 /* NB: handle any sc_ledpin change */
239 ath_led_config(sc);
240 }
241 sc->sc_hardled = hardled;
242 }
243 return 0;
244 }
245
246 static int
ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS)247 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS)
248 {
249 struct ath_softc *sc = arg1;
250 u_int txantenna;
251 int error;
252
253 ATH_LOCK(sc);
254 ath_power_set_power_state(sc, HAL_PM_AWAKE);
255 ATH_UNLOCK(sc);
256
257 txantenna = ath_hal_getantennaswitch(sc->sc_ah);
258
259 error = sysctl_handle_int(oidp, &txantenna, 0, req);
260 if (!error && req->newptr) {
261 /* XXX assumes 2 antenna ports */
262 if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B) {
263 error = EINVAL;
264 goto finish;
265 }
266 ath_hal_setantennaswitch(sc->sc_ah, txantenna);
267 /*
268 * NB: with the switch locked this isn't meaningful,
269 * but set it anyway so things like radiotap get
270 * consistent info in their data.
271 */
272 sc->sc_txantenna = txantenna;
273 }
274
275 finish:
276 ATH_LOCK(sc);
277 ath_power_restore_power_state(sc);
278 ATH_UNLOCK(sc);
279
280 return (error);
281 }
282
283 static int
ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS)284 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS)
285 {
286 struct ath_softc *sc = arg1;
287 u_int defantenna;
288 int error;
289
290 ATH_LOCK(sc);
291 ath_power_set_power_state(sc, HAL_PM_AWAKE);
292 defantenna = ath_hal_getdefantenna(sc->sc_ah);
293 ATH_UNLOCK(sc);
294
295 error = sysctl_handle_int(oidp, &defantenna, 0, req);
296 if (!error && req->newptr)
297 ath_hal_setdefantenna(sc->sc_ah, defantenna);
298
299 ATH_LOCK(sc);
300 ath_power_restore_power_state(sc);
301 ATH_UNLOCK(sc);
302
303 return (error);
304 }
305
306 static int
ath_sysctl_diversity(SYSCTL_HANDLER_ARGS)307 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS)
308 {
309 struct ath_softc *sc = arg1;
310 u_int diversity;
311 int error;
312
313 ATH_LOCK(sc);
314 ath_power_set_power_state(sc, HAL_PM_AWAKE);
315 ATH_UNLOCK(sc);
316
317 diversity = ath_hal_getdiversity(sc->sc_ah);
318
319 error = sysctl_handle_int(oidp, &diversity, 0, req);
320 if (error || !req->newptr)
321 goto finish;
322 if (!ath_hal_setdiversity(sc->sc_ah, diversity)) {
323 error = EINVAL;
324 goto finish;
325 }
326 sc->sc_diversity = diversity;
327 error = 0;
328
329 finish:
330 ATH_LOCK(sc);
331 ath_power_restore_power_state(sc);
332 ATH_UNLOCK(sc);
333
334 return (error);
335 }
336
337 static int
ath_sysctl_diag(SYSCTL_HANDLER_ARGS)338 ath_sysctl_diag(SYSCTL_HANDLER_ARGS)
339 {
340 struct ath_softc *sc = arg1;
341 u_int32_t diag;
342 int error;
343
344 ATH_LOCK(sc);
345 ath_power_set_power_state(sc, HAL_PM_AWAKE);
346 ATH_UNLOCK(sc);
347
348 if (!ath_hal_getdiag(sc->sc_ah, &diag)) {
349 error = EINVAL;
350 goto finish;
351 }
352
353 error = sysctl_handle_int(oidp, &diag, 0, req);
354 if (error || !req->newptr)
355 goto finish;
356 error = !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0;
357
358 finish:
359 ATH_LOCK(sc);
360 ath_power_restore_power_state(sc);
361 ATH_UNLOCK(sc);
362
363 return (error);
364 }
365
366 static int
ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS)367 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS)
368 {
369 struct ath_softc *sc = arg1;
370 u_int32_t scale;
371 int error;
372
373 ATH_LOCK(sc);
374 ath_power_set_power_state(sc, HAL_PM_AWAKE);
375 ATH_UNLOCK(sc);
376
377 (void) ath_hal_gettpscale(sc->sc_ah, &scale);
378 error = sysctl_handle_int(oidp, &scale, 0, req);
379 if (error || !req->newptr)
380 goto finish;
381
382 error = !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL :
383 (sc->sc_running) ? ath_reset(sc, ATH_RESET_NOLOSS,
384 HAL_RESET_NORMAL) : 0;
385
386 finish:
387 ATH_LOCK(sc);
388 ath_power_restore_power_state(sc);
389 ATH_UNLOCK(sc);
390
391 return (error);
392 }
393
394 static int
ath_sysctl_tpc(SYSCTL_HANDLER_ARGS)395 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS)
396 {
397 struct ath_softc *sc = arg1;
398 u_int tpc;
399 int error;
400
401 ATH_LOCK(sc);
402 ath_power_set_power_state(sc, HAL_PM_AWAKE);
403 ATH_UNLOCK(sc);
404
405 tpc = ath_hal_gettpc(sc->sc_ah);
406
407 error = sysctl_handle_int(oidp, &tpc, 0, req);
408 if (error || !req->newptr)
409 goto finish;
410 error = !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0;
411
412 finish:
413 ATH_LOCK(sc);
414 ath_power_restore_power_state(sc);
415 ATH_UNLOCK(sc);
416
417 return (error);
418 }
419
420 static int
ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS)421 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS)
422 {
423 struct ath_softc *sc = arg1;
424 struct ath_hal *ah = sc->sc_ah;
425 u_int rfkill;
426 int error;
427
428 ATH_LOCK(sc);
429 ath_power_set_power_state(sc, HAL_PM_AWAKE);
430 ATH_UNLOCK(sc);
431
432 rfkill = ath_hal_getrfkill(ah);
433
434 error = sysctl_handle_int(oidp, &rfkill, 0, req);
435 if (error || !req->newptr)
436 goto finish;
437 if (rfkill == ath_hal_getrfkill(ah)) { /* unchanged */
438 error = 0;
439 goto finish;
440 }
441 if (!ath_hal_setrfkill(ah, rfkill)) {
442 error = EINVAL;
443 goto finish;
444 }
445 error = sc->sc_running ? ath_reset(sc, ATH_RESET_FULL,
446 HAL_RESET_NORMAL) : 0;
447
448 finish:
449 ATH_LOCK(sc);
450 ath_power_restore_power_state(sc);
451 ATH_UNLOCK(sc);
452
453 return (error);
454 }
455
456 static int
ath_sysctl_txagg(SYSCTL_HANDLER_ARGS)457 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS)
458 {
459 struct ath_softc *sc = arg1;
460 int i, t, param = 0;
461 int error;
462 struct ath_buf *bf;
463
464 error = sysctl_handle_int(oidp, ¶m, 0, req);
465 if (error || !req->newptr)
466 return error;
467
468 if (param != 1)
469 return 0;
470
471 printf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf);
472 printf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf);
473
474 printf("aggr single packet: %d\n",
475 sc->sc_aggr_stats.aggr_single_pkt);
476 printf("aggr single packet w/ BAW closed: %d\n",
477 sc->sc_aggr_stats.aggr_baw_closed_single_pkt);
478 printf("aggr non-baw packet: %d\n",
479 sc->sc_aggr_stats.aggr_nonbaw_pkt);
480 printf("aggr aggregate packet: %d\n",
481 sc->sc_aggr_stats.aggr_aggr_pkt);
482 printf("aggr single packet low hwq: %d\n",
483 sc->sc_aggr_stats.aggr_low_hwq_single_pkt);
484 printf("aggr single packet RTS aggr limited: %d\n",
485 sc->sc_aggr_stats.aggr_rts_aggr_limited);
486 printf("aggr sched, no work: %d\n",
487 sc->sc_aggr_stats.aggr_sched_nopkt);
488 for (i = 0; i < 64; i++) {
489 printf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]);
490 if (i % 4 == 3)
491 printf("\n");
492 }
493 printf("\n");
494
495 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
496 if (ATH_TXQ_SETUP(sc, i)) {
497 printf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, "
498 "axq_fifo_depth=%d, holdingbf=%p\n",
499 i,
500 sc->sc_txq[i].axq_depth,
501 sc->sc_txq[i].axq_aggr_depth,
502 sc->sc_txq[i].axq_fifo_depth,
503 sc->sc_txq[i].axq_holdingbf);
504 }
505 }
506
507 i = t = 0;
508 ATH_TXBUF_LOCK(sc);
509 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) {
510 if (bf->bf_flags & ATH_BUF_BUSY) {
511 printf("Busy: %d\n", t);
512 i++;
513 }
514 t++;
515 }
516 ATH_TXBUF_UNLOCK(sc);
517 printf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n",
518 t, i, sc->sc_txbuf_cnt);
519
520 i = t = 0;
521 ATH_TXBUF_LOCK(sc);
522 TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) {
523 if (bf->bf_flags & ATH_BUF_BUSY) {
524 printf("Busy: %d\n", t);
525 i++;
526 }
527 t++;
528 }
529 ATH_TXBUF_UNLOCK(sc);
530 printf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n",
531 t, i);
532
533 ATH_RX_LOCK(sc);
534 for (i = 0; i < 2; i++) {
535 printf("%d: fifolen: %d/%d; head=%d; tail=%d; m_pending=%p, m_holdbf=%p\n",
536 i,
537 sc->sc_rxedma[i].m_fifo_depth,
538 sc->sc_rxedma[i].m_fifolen,
539 sc->sc_rxedma[i].m_fifo_head,
540 sc->sc_rxedma[i].m_fifo_tail,
541 sc->sc_rxedma[i].m_rxpending,
542 sc->sc_rxedma[i].m_holdbf);
543 }
544 i = 0;
545 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
546 i++;
547 }
548 printf("Total RX buffers in free list: %d buffers\n",
549 i);
550 ATH_RX_UNLOCK(sc);
551
552 return 0;
553 }
554
555 static int
ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS)556 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS)
557 {
558 struct ath_softc *sc = arg1;
559 u_int rfsilent;
560 int error;
561
562 ATH_LOCK(sc);
563 ath_power_set_power_state(sc, HAL_PM_AWAKE);
564 ATH_UNLOCK(sc);
565
566 (void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent);
567 error = sysctl_handle_int(oidp, &rfsilent, 0, req);
568 if (error || !req->newptr)
569 goto finish;
570 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) {
571 error = EINVAL;
572 goto finish;
573 }
574 /*
575 * Earlier chips (< AR5212) have up to 8 GPIO
576 * pins exposed.
577 *
578 * AR5416 and later chips have many more GPIO
579 * pins (up to 16) so the mask is expanded to
580 * four bits.
581 */
582 sc->sc_rfsilentpin = rfsilent & 0x3c;
583 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0;
584 error = 0;
585
586 finish:
587 ATH_LOCK(sc);
588 ath_power_restore_power_state(sc);
589 ATH_UNLOCK(sc);
590
591 return (error);
592 }
593
594 static int
ath_sysctl_tpack(SYSCTL_HANDLER_ARGS)595 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS)
596 {
597 struct ath_softc *sc = arg1;
598 u_int32_t tpack;
599 int error;
600
601 ATH_LOCK(sc);
602 ath_power_set_power_state(sc, HAL_PM_AWAKE);
603 ATH_UNLOCK(sc);
604
605 (void) ath_hal_gettpack(sc->sc_ah, &tpack);
606 error = sysctl_handle_int(oidp, &tpack, 0, req);
607 if (error || !req->newptr)
608 goto finish;
609 error = !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0;
610
611 finish:
612 ATH_LOCK(sc);
613 ath_power_restore_power_state(sc);
614 ATH_UNLOCK(sc);
615
616 return (error);
617 }
618
619 static int
ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS)620 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS)
621 {
622 struct ath_softc *sc = arg1;
623 u_int32_t tpcts;
624 int error;
625
626 ATH_LOCK(sc);
627 ath_power_set_power_state(sc, HAL_PM_AWAKE);
628 ATH_UNLOCK(sc);
629
630 (void) ath_hal_gettpcts(sc->sc_ah, &tpcts);
631 error = sysctl_handle_int(oidp, &tpcts, 0, req);
632 if (error || !req->newptr)
633 goto finish;
634
635 error = !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0;
636
637 finish:
638 ATH_LOCK(sc);
639 ath_power_restore_power_state(sc);
640 ATH_UNLOCK(sc);
641
642 return (error);
643 }
644
645 static int
ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)646 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)
647 {
648 struct ath_softc *sc = arg1;
649 int intmit, error;
650
651 ATH_LOCK(sc);
652 ath_power_set_power_state(sc, HAL_PM_AWAKE);
653 ATH_UNLOCK(sc);
654
655 intmit = ath_hal_getintmit(sc->sc_ah);
656 error = sysctl_handle_int(oidp, &intmit, 0, req);
657 if (error || !req->newptr)
658 goto finish;
659
660 /* reusing error; 1 here means "good"; 0 means "fail" */
661 error = ath_hal_setintmit(sc->sc_ah, intmit);
662 if (! error) {
663 error = EINVAL;
664 goto finish;
665 }
666
667 /*
668 * Reset the hardware here - disabling ANI in the HAL
669 * doesn't reset ANI related registers, so it'll leave
670 * things in an inconsistent state.
671 */
672 if (sc->sc_running)
673 ath_reset(sc, ATH_RESET_NOLOSS, HAL_RESET_NORMAL);
674
675 error = 0;
676
677 finish:
678 ATH_LOCK(sc);
679 ath_power_restore_power_state(sc);
680 ATH_UNLOCK(sc);
681
682 return (error);
683 }
684
685 #ifdef IEEE80211_SUPPORT_TDMA
686 static int
ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)687 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
688 {
689 struct ath_softc *sc = arg1;
690 int setcca, error;
691
692 setcca = sc->sc_setcca;
693 error = sysctl_handle_int(oidp, &setcca, 0, req);
694 if (error || !req->newptr)
695 return error;
696 sc->sc_setcca = (setcca != 0);
697 return 0;
698 }
699 #endif /* IEEE80211_SUPPORT_TDMA */
700
701 static int
ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS)702 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS)
703 {
704 struct ath_softc *sc = arg1;
705 int val = 0;
706 int error;
707
708 error = sysctl_handle_int(oidp, &val, 0, req);
709 if (error || !req->newptr)
710 return error;
711 if (val == 0)
712 return 0;
713
714 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
715 val = 0;
716 return 0;
717 }
718
719 static int
ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS)720 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS)
721 {
722 struct ath_softc *sc = arg1;
723 int val = 0;
724 int error;
725 uint32_t mask = 0xffffffff;
726 uint32_t *sp;
727 uint32_t rsize;
728 struct ath_hal *ah = sc->sc_ah;
729
730 error = sysctl_handle_int(oidp, &val, 0, req);
731 if (error || !req->newptr)
732 return error;
733 if (val == 0)
734 return 0;
735
736 ATH_LOCK(sc);
737 ath_power_set_power_state(sc, HAL_PM_AWAKE);
738 ATH_UNLOCK(sc);
739
740 /* Do a hang check */
741 if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS,
742 &mask, sizeof(mask),
743 (void *) &sp, &rsize)) {
744 error = 0;
745 goto finish;
746 }
747
748 device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp);
749
750 val = 0;
751 error = 0;
752 finish:
753 ATH_LOCK(sc);
754 ath_power_restore_power_state(sc);
755 ATH_UNLOCK(sc);
756
757 return (error);
758 }
759
760 #ifdef ATH_DEBUG_ALQ
761 static int
ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS)762 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS)
763 {
764 struct ath_softc *sc = arg1;
765 int error, enable;
766
767 enable = (sc->sc_alq.sc_alq_isactive);
768
769 error = sysctl_handle_int(oidp, &enable, 0, req);
770 if (error || !req->newptr)
771 return (error);
772 else if (enable)
773 error = if_ath_alq_start(&sc->sc_alq);
774 else
775 error = if_ath_alq_stop(&sc->sc_alq);
776 return (error);
777 }
778
779 /*
780 * Attach the ALQ debugging if required.
781 */
782 static void
ath_sysctl_alq_attach(struct ath_softc * sc)783 ath_sysctl_alq_attach(struct ath_softc *sc)
784 {
785 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
786 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
787 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
788
789 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq",
790 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
791 "Atheros ALQ logging parameters");
792 child = SYSCTL_CHILDREN(tree);
793
794 SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename",
795 CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename");
796
797 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
798 "enable", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
799 ath_sysctl_alq_log, "I", "");
800
801 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
802 "debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0,
803 "ALQ debug mask");
804
805 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
806 "numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0,
807 "number lost");
808 }
809 #endif /* ATH_DEBUG_ALQ */
810
811 void
ath_sysctlattach(struct ath_softc * sc)812 ath_sysctlattach(struct ath_softc *sc)
813 {
814 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
815 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
816 struct ath_hal *ah = sc->sc_ah;
817
818 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
819 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0,
820 "EEPROM country code");
821 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
822 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0,
823 "EEPROM regdomain code");
824 #ifdef ATH_DEBUG
825 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
826 "debug", CTLFLAG_RW, &sc->sc_debug,
827 "control debugging printfs");
828 #endif
829 #ifdef ATH_DEBUG_ALQ
830 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
831 "ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug,
832 "control debugging KTR");
833 #endif /* ATH_DEBUG_ALQ */
834 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
835 "slottime", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
836 ath_sysctl_slottime, "I", "802.11 slot time (us)");
837 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
838 "acktimeout", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
839 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)");
840 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
841 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
842 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)");
843
844 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
845 "softled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
846 ath_sysctl_softled, "I", "enable/disable software LED support");
847 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
848 "ledpin", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
849 ath_sysctl_ledpin, "I", "GPIO pin connected to LED");
850 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
851 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0,
852 "setting to turn LED on");
853 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
854 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0,
855 "idle time for inactivity LED (ticks)");
856
857 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
858 "hardled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
859 ath_sysctl_hardled, "I", "enable/disable hardware LED support");
860 /* XXX Laziness - configure pins, then flip hardled off/on */
861 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
862 "led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0,
863 "MAC Network LED pin, or -1 to disable");
864 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
865 "led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0,
866 "MAC Power LED pin, or -1 to disable");
867
868 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
869 "txantenna", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
870 ath_sysctl_txantenna, "I", "antenna switch");
871 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
872 "rxantenna", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
873 ath_sysctl_rxantenna, "I", "default/rx antenna");
874 if (ath_hal_hasdiversity(ah))
875 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
876 "diversity", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
877 sc, 0, ath_sysctl_diversity, "I", "antenna diversity");
878 sc->sc_txintrperiod = ATH_TXINTR_PERIOD;
879 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
880 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0,
881 "tx descriptor batching");
882 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
883 "diag", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
884 ath_sysctl_diag, "I", "h/w diagnostic control");
885 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
886 "tpscale", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
887 ath_sysctl_tpscale, "I", "tx power scaling");
888 if (ath_hal_hastpc(ah)) {
889 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
890 "tpc", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
891 ath_sysctl_tpc, "I", "enable/disable per-packet TPC");
892 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
893 "tpack", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
894 0, ath_sysctl_tpack, "I", "tx power for ack frames");
895 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
896 "tpcts", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
897 0, ath_sysctl_tpcts, "I", "tx power for cts frames");
898 }
899 if (ath_hal_hasrfsilent(ah)) {
900 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
901 "rfsilent", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
902 sc, 0, ath_sysctl_rfsilent, "I", "h/w RF silent config");
903 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
904 "rfkill", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
905 0, ath_sysctl_rfkill, "I", "enable/disable RF kill switch");
906 }
907
908 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
909 "txagg", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
910 ath_sysctl_txagg, "I", "");
911
912 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
913 "forcebstuck", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
914 0, ath_sysctl_forcebstuck, "I", "");
915
916 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
917 "hangcheck", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
918 ath_sysctl_hangcheck, "I", "");
919
920 if (ath_hal_hasintmit(ah)) {
921 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
922 "intmit", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
923 0, ath_sysctl_intmit, "I", "interference mitigation");
924 }
925 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC;
926 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
927 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0,
928 "mask of error frames to pass when monitoring");
929
930 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
931 "hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0,
932 "Hardware non-AMPDU queue depth before software-queuing TX frames");
933 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
934 "hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0,
935 "Hardware AMPDU queue depth before software-queuing TX frames");
936 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
937 "tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0,
938 "");
939 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
940 "tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0,
941 "");
942
943 /* Aggregate length twiddles */
944 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
945 "aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0,
946 "Maximum A-MPDU size, or 0 for 'default'");
947 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
948 "rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0,
949 "Maximum A-MPDU size for RTS-protected frames, or '0' "
950 "for default");
951 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
952 "delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0,
953 "Enforce a minimum number of delimiters per A-MPDU "
954 " sub-frame");
955
956 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
957 "txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree,
958 0, "Minimum free buffers before adding a data frame"
959 " to the TX queue");
960 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
961 "txq_mcastq_maxdepth", CTLFLAG_RW,
962 &sc->sc_txq_mcastq_maxdepth, 0,
963 "Maximum buffer depth for multicast/broadcast frames");
964 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
965 "txq_node_maxdepth", CTLFLAG_RW,
966 &sc->sc_txq_node_maxdepth, 0,
967 "Maximum buffer depth for a single node");
968
969 #if 0
970 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
971 "cabq_enable", CTLFLAG_RW,
972 &sc->sc_cabq_enable, 0,
973 "Whether to transmit on the CABQ or not");
974 #endif
975
976 #ifdef IEEE80211_SUPPORT_TDMA
977 if (ath_hal_macversion(ah) > 0x78) {
978 sc->sc_tdmadbaprep = 2;
979 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
980 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0,
981 "TDMA DBA preparation time");
982 sc->sc_tdmaswbaprep = 10;
983 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
984 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0,
985 "TDMA SWBA preparation time");
986 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
987 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0,
988 "TDMA slot guard time");
989 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
990 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0,
991 "TDMA calculated super frame");
992 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
993 "setcca", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
994 sc, 0, ath_sysctl_setcca, "I", "enable CCA control");
995 }
996 #endif
997
998 #ifdef ATH_DEBUG_ALQ
999 ath_sysctl_alq_attach(sc);
1000 #endif
1001 }
1002
1003 static int
ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS)1004 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS)
1005 {
1006 struct ath_softc *sc = arg1;
1007 int val = 0;
1008 int error;
1009
1010 error = sysctl_handle_int(oidp, &val, 0, req);
1011 if (error || !req->newptr)
1012 return error;
1013 if (val == 0)
1014 return 0; /* Not clearing the stats is still valid */
1015 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats));
1016 memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats));
1017 memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats));
1018
1019 val = 0;
1020 return 0;
1021 }
1022
1023 static void
ath_sysctl_stats_attach_rxphyerr(struct ath_softc * sc,struct sysctl_oid_list * parent)1024 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent)
1025 {
1026 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1027 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1028 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1029 int i;
1030 char sn[8];
1031
1032 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err",
1033 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Per-code RX PHY Errors");
1034 child = SYSCTL_CHILDREN(tree);
1035 for (i = 0; i < 64; i++) {
1036 snprintf(sn, sizeof(sn), "%d", i);
1037 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, "");
1038 }
1039 }
1040
1041 static void
ath_sysctl_stats_attach_intr(struct ath_softc * sc,struct sysctl_oid_list * parent)1042 ath_sysctl_stats_attach_intr(struct ath_softc *sc,
1043 struct sysctl_oid_list *parent)
1044 {
1045 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1046 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1047 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1048 int i;
1049 char sn[8];
1050
1051 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr",
1052 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Sync interrupt statistics");
1053 child = SYSCTL_CHILDREN(tree);
1054 for (i = 0; i < 32; i++) {
1055 snprintf(sn, sizeof(sn), "%d", i);
1056 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD,
1057 &sc->sc_intr_stats.sync_intr[i], 0, "");
1058 }
1059 }
1060
1061 void
ath_sysctl_stats_attach(struct ath_softc * sc)1062 ath_sysctl_stats_attach(struct ath_softc *sc)
1063 {
1064 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1065 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1066 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1067
1068 /* Create "clear" node */
1069 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1070 "clear_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1071 0, ath_sysctl_clearstats, "I", "clear stats");
1072
1073 /* Create stats node */
1074 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats",
1075 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Statistics");
1076 child = SYSCTL_CHILDREN(tree);
1077
1078 /* This was generated from if_athioctl.h */
1079
1080 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD,
1081 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog");
1082 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD,
1083 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts");
1084 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD,
1085 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts");
1086 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD,
1087 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts");
1088 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD,
1089 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts");
1090 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD,
1091 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts");
1092 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD,
1093 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts");
1094 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD,
1095 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts");
1096 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD,
1097 &sc->sc_stats.ast_mib, 0, "mib interrupts");
1098 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD,
1099 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced");
1100 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD,
1101 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface");
1102 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD,
1103 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted");
1104 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD,
1105 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc");
1106 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD,
1107 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer");
1108 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD,
1109 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed");
1110 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD,
1111 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node");
1112 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD,
1113 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf");
1114 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD,
1115 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster");
1116 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD,
1117 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster");
1118 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD,
1119 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame");
1120 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD,
1121 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs");
1122 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD,
1123 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries");
1124 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD,
1125 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun");
1126 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD,
1127 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered");
1128 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD,
1129 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)");
1130 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD,
1131 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)");
1132 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD,
1133 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate");
1134 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD,
1135 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked");
1136 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD,
1137 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled");
1138 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD,
1139 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled");
1140 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD,
1141 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble");
1142 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD,
1143 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate");
1144 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD,
1145 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection");
1146 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD,
1147 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting");
1148 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD,
1149 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension");
1150 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD,
1151 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf");
1152 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD,
1153 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs");
1154 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD,
1155 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun");
1156 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD,
1157 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC");
1158 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD,
1159 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun");
1160 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD,
1161 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption");
1162 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD,
1163 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure");
1164 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD,
1165 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err");
1166 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD,
1167 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short");
1168 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD,
1169 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large");
1170 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD,
1171 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface");
1172 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD,
1173 &sc->sc_stats.ast_rx_mgt, 0, "management frames received");
1174 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD,
1175 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame");
1176 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD,
1177 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted");
1178 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD,
1179 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf");
1180 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD,
1181 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls");
1182 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD,
1183 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed");
1184 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD,
1185 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset");
1186 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD,
1187 &sc->sc_stats.ast_rate_calls, 0, "rate control checks");
1188 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD,
1189 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate");
1190 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD,
1191 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate");
1192 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD,
1193 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches");
1194 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD,
1195 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches");
1196 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD,
1197 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted");
1198 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD,
1199 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy");
1200 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD,
1201 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api");
1202 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD,
1203 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully");
1204 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD,
1205 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error");
1206 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD,
1207 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd");
1208 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD,
1209 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q");
1210 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD,
1211 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit");
1212 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD,
1213 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer");
1214 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD,
1215 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates");
1216 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD,
1217 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers");
1218 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD,
1219 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF");
1220 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD,
1221 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required");
1222 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD,
1223 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down");
1224 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD,
1225 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer");
1226 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD,
1227 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons");
1228 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD,
1229 &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls");
1230 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD,
1231 &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received");
1232
1233 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD,
1234 &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI");
1235 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD,
1236 &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received");
1237 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD,
1238 &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimiter-CRC errors detected");
1239 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD,
1240 &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected");
1241 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD,
1242 &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine");
1243 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD,
1244 &sc->sc_stats.ast_rx_hi_rx_chain, 0, "");
1245 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD,
1246 &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection");
1247 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD,
1248 &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end");
1249 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD,
1250 &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout");
1251 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD,
1252 &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout");
1253 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD,
1254 &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP");
1255 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD,
1256 &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register");
1257 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD,
1258 &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error");
1259 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD,
1260 &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count");
1261 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD,
1262 &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached");
1263
1264 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD,
1265 &sc->sc_stats.ast_tx_data_underrun, 0, "");
1266 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD,
1267 &sc->sc_stats.ast_tx_delim_underrun, 0, "");
1268 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD,
1269 &sc->sc_stats.ast_tx_aggr_failall, 0,
1270 "Number of aggregate TX failures (whole frame)");
1271 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD,
1272 &sc->sc_stats.ast_tx_aggr_ok, 0,
1273 "Number of aggregate TX OK completions (subframe)");
1274 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD,
1275 &sc->sc_stats.ast_tx_aggr_fail, 0,
1276 "Number of aggregate TX failures (subframe)");
1277
1278 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD,
1279 &sc->sc_stats.ast_rx_intr, 0, "RX interrupts");
1280 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD,
1281 &sc->sc_stats.ast_tx_intr, 0, "TX interrupts");
1282 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow",
1283 CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0,
1284 "Number of multicast frames exceeding maximum mcast queue depth");
1285 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD,
1286 &sc->sc_stats.ast_rx_keymiss, 0, "");
1287 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD,
1288 &sc->sc_stats.ast_tx_swfiltered, 0, "");
1289 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodeq_overflow",
1290 CTLFLAG_RD, &sc->sc_stats.ast_tx_nodeq_overflow, 0,
1291 "tx dropped 'cuz nodeq overflow");
1292 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc",
1293 CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0,
1294 "Number of STBC frames received");
1295 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_stbc",
1296 CTLFLAG_RD, &sc->sc_stats.ast_tx_stbc, 0,
1297 "Number of STBC frames transmitted");
1298 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ldpc",
1299 CTLFLAG_RD, &sc->sc_stats.ast_tx_ldpc, 0,
1300 "Number of LDPC frames transmitted");
1301
1302 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tsfoor",
1303 CTLFLAG_RD, &sc->sc_stats.ast_tsfoor, 0,
1304 "Number of TSF out of range interrupts/resets");
1305
1306 /* Attach the RX phy error array */
1307 ath_sysctl_stats_attach_rxphyerr(sc, child);
1308
1309 /* Attach the interrupt statistics array */
1310 ath_sysctl_stats_attach_intr(sc, child);
1311 }
1312
1313 /*
1314 * This doesn't necessarily belong here (because it's HAL related, not
1315 * driver related).
1316 */
1317 void
ath_sysctl_hal_attach(struct ath_softc * sc)1318 ath_sysctl_hal_attach(struct ath_softc *sc)
1319 {
1320 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1321 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1322 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1323
1324 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal",
1325 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Atheros HAL parameters");
1326 child = SYSCTL_CHILDREN(tree);
1327
1328 sc->sc_ah->ah_config.ah_debug = 0;
1329 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW,
1330 &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs");
1331
1332 sc->sc_ah->ah_config.ah_ar5416_biasadj = 0;
1333 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW,
1334 &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0,
1335 "Enable 2GHz AR5416 direction sensitivity bias adjust");
1336
1337 sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2;
1338 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW,
1339 &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0,
1340 "Atheros HAL DMA beacon response time");
1341
1342 sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10;
1343 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW,
1344 &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0,
1345 "Atheros HAL software beacon response time");
1346
1347 sc->sc_ah->ah_config.ah_additional_swba_backoff = 0;
1348 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW,
1349 &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0,
1350 "Atheros HAL additional SWBA backoff time");
1351
1352 sc->sc_ah->ah_config.ah_force_full_reset = 0;
1353 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW,
1354 &sc->sc_ah->ah_config.ah_force_full_reset, 0,
1355 "Force full chip reset rather than a warm reset");
1356
1357 /*
1358 * This is initialised by the driver.
1359 */
1360 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW,
1361 &sc->sc_ah->ah_config.ah_serialise_reg_war, 0,
1362 "Force register access serialisation");
1363 }
1364