1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
6 */
7
8 #include "core.h"
9 #include "dp_tx.h"
10 #include "debug.h"
11 #include "debugfs_sta.h"
12 #include "hw.h"
13 #include "peer.h"
14 #include "mac.h"
15
16 static enum hal_tcl_encap_type
ath11k_dp_tx_get_encap_type(struct ath11k_vif * arvif,struct sk_buff * skb)17 ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb)
18 {
19 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
20 struct ath11k_base *ab = arvif->ar->ab;
21
22 if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags))
23 return HAL_TCL_ENCAP_TYPE_RAW;
24
25 if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)
26 return HAL_TCL_ENCAP_TYPE_ETHERNET;
27
28 return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI;
29 }
30
ath11k_dp_tx_encap_nwifi(struct sk_buff * skb)31 static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb)
32 {
33 struct ieee80211_hdr *hdr = (void *)skb->data;
34 u8 *qos_ctl;
35
36 if (!ieee80211_is_data_qos(hdr->frame_control))
37 return;
38
39 qos_ctl = ieee80211_get_qos_ctl(hdr);
40 memmove(skb->data + IEEE80211_QOS_CTL_LEN,
41 #if defined(__linux__)
42 skb->data, (void *)qos_ctl - (void *)skb->data);
43 #elif defined(__FreeBSD__)
44 skb->data, qos_ctl - (u8 *)skb->data);
45 #endif
46 skb_pull(skb, IEEE80211_QOS_CTL_LEN);
47
48 hdr = (void *)skb->data;
49 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
50 }
51
ath11k_dp_tx_get_tid(struct sk_buff * skb)52 static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb)
53 {
54 struct ieee80211_hdr *hdr = (void *)skb->data;
55 struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb);
56
57 if (cb->flags & ATH11K_SKB_HW_80211_ENCAP)
58 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
59 else if (!ieee80211_is_data_qos(hdr->frame_control))
60 return HAL_DESC_REO_NON_QOS_TID;
61 else
62 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
63 }
64
ath11k_dp_tx_get_encrypt_type(u32 cipher)65 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)
66 {
67 switch (cipher) {
68 case WLAN_CIPHER_SUITE_WEP40:
69 return HAL_ENCRYPT_TYPE_WEP_40;
70 case WLAN_CIPHER_SUITE_WEP104:
71 return HAL_ENCRYPT_TYPE_WEP_104;
72 case WLAN_CIPHER_SUITE_TKIP:
73 return HAL_ENCRYPT_TYPE_TKIP_MIC;
74 case WLAN_CIPHER_SUITE_CCMP:
75 return HAL_ENCRYPT_TYPE_CCMP_128;
76 case WLAN_CIPHER_SUITE_CCMP_256:
77 return HAL_ENCRYPT_TYPE_CCMP_256;
78 case WLAN_CIPHER_SUITE_GCMP:
79 return HAL_ENCRYPT_TYPE_GCMP_128;
80 case WLAN_CIPHER_SUITE_GCMP_256:
81 return HAL_ENCRYPT_TYPE_AES_GCMP_256;
82 default:
83 return HAL_ENCRYPT_TYPE_OPEN;
84 }
85 }
86
ath11k_dp_tx(struct ath11k * ar,struct ath11k_vif * arvif,struct ath11k_sta * arsta,struct sk_buff * skb)87 int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
88 struct ath11k_sta *arsta, struct sk_buff *skb)
89 {
90 struct ath11k_base *ab = ar->ab;
91 struct ath11k_dp *dp = &ab->dp;
92 struct hal_tx_info ti = {};
93 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
94 struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
95 struct hal_srng *tcl_ring;
96 struct ieee80211_hdr *hdr = (void *)skb->data;
97 struct dp_tx_ring *tx_ring;
98 #if defined(__linux__)
99 void *hal_tcl_desc;
100 #elif defined(__FreeBSD__)
101 u8 *hal_tcl_desc;
102 #endif
103 u8 pool_id;
104 u8 hal_ring_id;
105 int ret;
106 u32 ring_selector = 0;
107 u8 ring_map = 0;
108 bool tcl_ring_retry;
109
110 if (unlikely(test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)))
111 return -ESHUTDOWN;
112
113 if (unlikely(!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
114 !ieee80211_is_data(hdr->frame_control)))
115 return -EOPNOTSUPP;
116
117 pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);
118
119 ring_selector = ab->hw_params.hw_ops->get_ring_selector(skb);
120
121 tcl_ring_sel:
122 tcl_ring_retry = false;
123
124 ti.ring_id = ring_selector % ab->hw_params.max_tx_ring;
125 ti.rbm_id = ab->hw_params.hal_params->tcl2wbm_rbm_map[ti.ring_id].rbm_id;
126
127 ring_map |= BIT(ti.ring_id);
128
129 tx_ring = &dp->tx_ring[ti.ring_id];
130
131 spin_lock_bh(&tx_ring->tx_idr_lock);
132 ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0,
133 DP_TX_IDR_SIZE - 1, GFP_ATOMIC);
134 spin_unlock_bh(&tx_ring->tx_idr_lock);
135
136 if (unlikely(ret < 0)) {
137 if (ring_map == (BIT(ab->hw_params.max_tx_ring) - 1) ||
138 !ab->hw_params.tcl_ring_retry) {
139 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
140 return -ENOSPC;
141 }
142
143 /* Check if the next ring is available */
144 ring_selector++;
145 goto tcl_ring_sel;
146 }
147
148 ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |
149 FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |
150 FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);
151 ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);
152
153 if (ieee80211_has_a4(hdr->frame_control) &&
154 is_multicast_ether_addr(hdr->addr3) && arsta &&
155 arsta->use_4addr_set) {
156 ti.meta_data_flags = arsta->tcl_metadata;
157 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1);
158 } else {
159 ti.meta_data_flags = arvif->tcl_metadata;
160 }
161
162 if (unlikely(ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW)) {
163 if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) {
164 ti.encrypt_type =
165 ath11k_dp_tx_get_encrypt_type(skb_cb->cipher);
166
167 if (ieee80211_has_protected(hdr->frame_control))
168 skb_put(skb, IEEE80211_CCMP_MIC_LEN);
169 } else {
170 ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;
171 }
172 }
173
174 ti.addr_search_flags = arvif->hal_addr_search_flags;
175 ti.search_type = arvif->search_type;
176 ti.type = HAL_TCL_DESC_TYPE_BUFFER;
177 ti.pkt_offset = 0;
178 ti.lmac_id = ar->lmac_id;
179 ti.bss_ast_hash = arvif->ast_hash;
180 ti.bss_ast_idx = arvif->ast_idx;
181 ti.dscp_tid_tbl_idx = 0;
182
183 if (likely(skb->ip_summed == CHECKSUM_PARTIAL &&
184 ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW)) {
185 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |
186 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |
187 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |
188 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |
189 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);
190 }
191
192 if (ieee80211_vif_is_mesh(arvif->vif))
193 ti.enable_mesh = true;
194
195 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);
196
197 ti.tid = ath11k_dp_tx_get_tid(skb);
198
199 switch (ti.encap_type) {
200 case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:
201 ath11k_dp_tx_encap_nwifi(skb);
202 break;
203 case HAL_TCL_ENCAP_TYPE_RAW:
204 if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
205 ret = -EINVAL;
206 goto fail_remove_idr;
207 }
208 break;
209 case HAL_TCL_ENCAP_TYPE_ETHERNET:
210 /* no need to encap */
211 break;
212 case HAL_TCL_ENCAP_TYPE_802_3:
213 default:
214 /* TODO: Take care of other encap modes as well */
215 ret = -EINVAL;
216 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
217 goto fail_remove_idr;
218 }
219
220 ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
221 if (unlikely(dma_mapping_error(ab->dev, ti.paddr))) {
222 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
223 ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
224 ret = -ENOMEM;
225 goto fail_remove_idr;
226 }
227
228 ti.data_len = skb->len;
229 skb_cb->paddr = ti.paddr;
230 skb_cb->vif = arvif->vif;
231 skb_cb->ar = ar;
232
233 hal_ring_id = tx_ring->tcl_data_ring.ring_id;
234 tcl_ring = &ab->hal.srng_list[hal_ring_id];
235
236 spin_lock_bh(&tcl_ring->lock);
237
238 ath11k_hal_srng_access_begin(ab, tcl_ring);
239
240 hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);
241 if (unlikely(!hal_tcl_desc)) {
242 /* NOTE: It is highly unlikely we'll be running out of tcl_ring
243 * desc because the desc is directly enqueued onto hw queue.
244 */
245 ath11k_hal_srng_access_end(ab, tcl_ring);
246 ab->soc_stats.tx_err.desc_na[ti.ring_id]++;
247 spin_unlock_bh(&tcl_ring->lock);
248 ret = -ENOMEM;
249
250 /* Checking for available tcl descriptors in another ring in
251 * case of failure due to full tcl ring now, is better than
252 * checking this ring earlier for each pkt tx.
253 * Restart ring selection if some rings are not checked yet.
254 */
255 if (unlikely(ring_map != (BIT(ab->hw_params.max_tx_ring)) - 1) &&
256 ab->hw_params.tcl_ring_retry && ab->hw_params.max_tx_ring > 1) {
257 tcl_ring_retry = true;
258 ring_selector++;
259 }
260
261 goto fail_unmap_dma;
262 }
263
264 ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc +
265 sizeof(struct hal_tlv_hdr), &ti);
266
267 ath11k_hal_srng_access_end(ab, tcl_ring);
268
269 ath11k_dp_shadow_start_timer(ab, tcl_ring, &dp->tx_ring_timer[ti.ring_id]);
270
271 spin_unlock_bh(&tcl_ring->lock);
272
273 ath11k_dbg_dump(ab, ATH11K_DBG_DP_TX, NULL, "dp tx msdu: ",
274 skb->data, skb->len);
275
276 atomic_inc(&ar->dp.num_tx_pending);
277
278 return 0;
279
280 fail_unmap_dma:
281 dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE);
282
283 fail_remove_idr:
284 spin_lock_bh(&tx_ring->tx_idr_lock);
285 idr_remove(&tx_ring->txbuf_idr,
286 FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id));
287 spin_unlock_bh(&tx_ring->tx_idr_lock);
288
289 if (tcl_ring_retry)
290 goto tcl_ring_sel;
291
292 return ret;
293 }
294
ath11k_dp_tx_free_txbuf(struct ath11k_base * ab,u8 mac_id,int msdu_id,struct dp_tx_ring * tx_ring)295 static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,
296 int msdu_id,
297 struct dp_tx_ring *tx_ring)
298 {
299 struct ath11k *ar;
300 struct sk_buff *msdu;
301 struct ath11k_skb_cb *skb_cb;
302
303 spin_lock(&tx_ring->tx_idr_lock);
304 msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
305 spin_unlock(&tx_ring->tx_idr_lock);
306
307 if (unlikely(!msdu)) {
308 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
309 msdu_id);
310 return;
311 }
312
313 skb_cb = ATH11K_SKB_CB(msdu);
314
315 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
316 dev_kfree_skb_any(msdu);
317
318 ar = ab->pdevs[mac_id].ar;
319 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
320 wake_up(&ar->dp.tx_empty_waitq);
321 }
322
323 static void
ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base * ab,struct dp_tx_ring * tx_ring,struct ath11k_dp_htt_wbm_tx_status * ts)324 ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
325 struct dp_tx_ring *tx_ring,
326 struct ath11k_dp_htt_wbm_tx_status *ts)
327 {
328 struct ieee80211_tx_status status = {};
329 struct sk_buff *msdu;
330 struct ieee80211_tx_info *info;
331 struct ath11k_skb_cb *skb_cb;
332 struct ath11k *ar;
333 struct ath11k_peer *peer;
334
335 spin_lock(&tx_ring->tx_idr_lock);
336 msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
337 spin_unlock(&tx_ring->tx_idr_lock);
338
339 if (unlikely(!msdu)) {
340 ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",
341 ts->msdu_id);
342 return;
343 }
344
345 skb_cb = ATH11K_SKB_CB(msdu);
346 info = IEEE80211_SKB_CB(msdu);
347
348 ar = skb_cb->ar;
349
350 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
351 wake_up(&ar->dp.tx_empty_waitq);
352
353 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
354
355 if (!skb_cb->vif) {
356 ieee80211_free_txskb(ar->hw, msdu);
357 return;
358 }
359
360 memset(&info->status, 0, sizeof(info->status));
361
362 if (ts->acked) {
363 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
364 info->flags |= IEEE80211_TX_STAT_ACK;
365 info->status.ack_signal = ts->ack_rssi;
366
367 if (!test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
368 ab->wmi_ab.svc_map))
369 info->status.ack_signal += ATH11K_DEFAULT_NOISE_FLOOR;
370
371 info->status.flags |=
372 IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
373 } else {
374 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
375 }
376 }
377
378 spin_lock_bh(&ab->base_lock);
379 peer = ath11k_peer_find_by_id(ab, ts->peer_id);
380 if (!peer || !peer->sta) {
381 ath11k_dbg(ab, ATH11K_DBG_DATA,
382 "dp_tx: failed to find the peer with peer_id %d\n",
383 ts->peer_id);
384 spin_unlock_bh(&ab->base_lock);
385 ieee80211_free_txskb(ar->hw, msdu);
386 return;
387 }
388 spin_unlock_bh(&ab->base_lock);
389
390 status.sta = peer->sta;
391 status.info = info;
392 status.skb = msdu;
393
394 ieee80211_tx_status_ext(ar->hw, &status);
395 }
396
397 static void
ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base * ab,void * desc,u8 mac_id,u32 msdu_id,struct dp_tx_ring * tx_ring)398 ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,
399 #if defined(__linux__)
400 void *desc, u8 mac_id,
401 #elif defined(__FreeBSD__)
402 u8 *desc, u8 mac_id,
403 #endif
404 u32 msdu_id, struct dp_tx_ring *tx_ring)
405 {
406 struct htt_tx_wbm_completion *status_desc;
407 struct ath11k_dp_htt_wbm_tx_status ts = {};
408 enum hal_wbm_htt_tx_comp_status wbm_status;
409
410 #if defined(__linux__)
411 status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;
412 #elif defined(__FreeBSD__)
413 status_desc = (void *)(desc + HTT_TX_WBM_COMP_STATUS_OFFSET);
414 #endif
415
416 wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS,
417 status_desc->info0);
418 switch (wbm_status) {
419 case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK:
420 case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:
421 case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:
422 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);
423 ts.msdu_id = msdu_id;
424 ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
425 status_desc->info1);
426
427 if (FIELD_GET(HTT_TX_WBM_COMP_INFO2_VALID, status_desc->info2))
428 ts.peer_id = FIELD_GET(HTT_TX_WBM_COMP_INFO2_SW_PEER_ID,
429 status_desc->info2);
430 else
431 ts.peer_id = HTT_INVALID_PEER_ID;
432
433 ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
434
435 break;
436 case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
437 case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
438 ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring);
439 break;
440 case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY:
441 /* This event is to be handled only when the driver decides to
442 * use WDS offload functionality.
443 */
444 break;
445 default:
446 ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status);
447 break;
448 }
449 }
450
ath11k_dp_tx_cache_peer_stats(struct ath11k * ar,struct sk_buff * msdu,struct hal_tx_status * ts)451 static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar,
452 struct sk_buff *msdu,
453 struct hal_tx_status *ts)
454 {
455 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
456
457 if (ts->try_cnt > 1) {
458 peer_stats->retry_pkts += ts->try_cnt - 1;
459 peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len;
460
461 if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) {
462 peer_stats->failed_pkts += 1;
463 peer_stats->failed_bytes += msdu->len;
464 }
465 }
466 }
467
ath11k_dp_tx_update_txcompl(struct ath11k * ar,struct hal_tx_status * ts)468 void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts)
469 {
470 struct ath11k_base *ab = ar->ab;
471 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
472 enum hal_tx_rate_stats_pkt_type pkt_type;
473 enum hal_tx_rate_stats_sgi sgi;
474 enum hal_tx_rate_stats_bw bw;
475 struct ath11k_peer *peer;
476 struct ath11k_sta *arsta;
477 struct ieee80211_sta *sta;
478 u16 rate, ru_tones;
479 u8 mcs, rate_idx = 0, ofdma;
480 int ret;
481
482 spin_lock_bh(&ab->base_lock);
483 peer = ath11k_peer_find_by_id(ab, ts->peer_id);
484 if (!peer || !peer->sta) {
485 ath11k_dbg(ab, ATH11K_DBG_DP_TX,
486 "failed to find the peer by id %u\n", ts->peer_id);
487 goto err_out;
488 }
489
490 sta = peer->sta;
491 arsta = ath11k_sta_to_arsta(sta);
492
493 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
494 pkt_type = FIELD_GET(HAL_TX_RATE_STATS_INFO0_PKT_TYPE,
495 ts->rate_stats);
496 mcs = FIELD_GET(HAL_TX_RATE_STATS_INFO0_MCS,
497 ts->rate_stats);
498 sgi = FIELD_GET(HAL_TX_RATE_STATS_INFO0_SGI,
499 ts->rate_stats);
500 bw = FIELD_GET(HAL_TX_RATE_STATS_INFO0_BW, ts->rate_stats);
501 ru_tones = FIELD_GET(HAL_TX_RATE_STATS_INFO0_TONES_IN_RU, ts->rate_stats);
502 ofdma = FIELD_GET(HAL_TX_RATE_STATS_INFO0_OFDMA_TX, ts->rate_stats);
503
504 /* This is to prefer choose the real NSS value arsta->last_txrate.nss,
505 * if it is invalid, then choose the NSS value while assoc.
506 */
507 if (arsta->last_txrate.nss)
508 arsta->txrate.nss = arsta->last_txrate.nss;
509 else
510 arsta->txrate.nss = arsta->peer_nss;
511
512 if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11A ||
513 pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11B) {
514 ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,
515 pkt_type,
516 &rate_idx,
517 &rate);
518 if (ret < 0)
519 goto err_out;
520 arsta->txrate.legacy = rate;
521 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11N) {
522 if (mcs > 7) {
523 ath11k_warn(ab, "Invalid HT mcs index %d\n", mcs);
524 goto err_out;
525 }
526
527 if (arsta->txrate.nss != 0)
528 arsta->txrate.mcs = mcs + 8 * (arsta->txrate.nss - 1);
529 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
530 if (sgi)
531 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
532 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AC) {
533 if (mcs > 9) {
534 ath11k_warn(ab, "Invalid VHT mcs index %d\n", mcs);
535 goto err_out;
536 }
537
538 arsta->txrate.mcs = mcs;
539 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
540 if (sgi)
541 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
542 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {
543 if (mcs > 11) {
544 ath11k_warn(ab, "Invalid HE mcs index %d\n", mcs);
545 goto err_out;
546 }
547
548 arsta->txrate.mcs = mcs;
549 arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;
550 arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);
551 }
552
553 arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);
554 if (ofdma && pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {
555 arsta->txrate.bw = RATE_INFO_BW_HE_RU;
556 arsta->txrate.he_ru_alloc =
557 ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones);
558 }
559
560 if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))
561 ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);
562
563 err_out:
564 spin_unlock_bh(&ab->base_lock);
565 }
566
ath11k_dp_tx_complete_msdu(struct ath11k * ar,struct sk_buff * msdu,struct hal_tx_status * ts)567 static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
568 struct sk_buff *msdu,
569 struct hal_tx_status *ts)
570 {
571 struct ieee80211_tx_status status = {};
572 struct ieee80211_rate_status status_rate = {};
573 struct ath11k_base *ab = ar->ab;
574 struct ieee80211_tx_info *info;
575 struct ath11k_skb_cb *skb_cb;
576 struct ath11k_peer *peer;
577 struct ath11k_sta *arsta;
578 struct rate_info rate;
579
580 if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {
581 /* Must not happen */
582 return;
583 }
584
585 skb_cb = ATH11K_SKB_CB(msdu);
586
587 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
588
589 if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {
590 ieee80211_free_txskb(ar->hw, msdu);
591 return;
592 }
593
594 if (unlikely(!skb_cb->vif)) {
595 ieee80211_free_txskb(ar->hw, msdu);
596 return;
597 }
598
599 info = IEEE80211_SKB_CB(msdu);
600 memset(&info->status, 0, sizeof(info->status));
601
602 /* skip tx rate update from ieee80211_status*/
603 info->status.rates[0].idx = -1;
604
605 if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED &&
606 !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
607 info->flags |= IEEE80211_TX_STAT_ACK;
608 info->status.ack_signal = ts->ack_rssi;
609
610 if (!test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
611 ab->wmi_ab.svc_map))
612 info->status.ack_signal += ATH11K_DEFAULT_NOISE_FLOOR;
613
614 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
615 }
616
617 if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX &&
618 (info->flags & IEEE80211_TX_CTL_NO_ACK))
619 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
620
621 if (unlikely(ath11k_debugfs_is_extd_tx_stats_enabled(ar)) ||
622 ab->hw_params.single_pdev_only) {
623 if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {
624 if (ar->last_ppdu_id == 0) {
625 ar->last_ppdu_id = ts->ppdu_id;
626 } else if (ar->last_ppdu_id == ts->ppdu_id ||
627 ar->cached_ppdu_id == ar->last_ppdu_id) {
628 ar->cached_ppdu_id = ar->last_ppdu_id;
629 ar->cached_stats.is_ampdu = true;
630 ath11k_dp_tx_update_txcompl(ar, ts);
631 memset(&ar->cached_stats, 0,
632 sizeof(struct ath11k_per_peer_tx_stats));
633 } else {
634 ar->cached_stats.is_ampdu = false;
635 ath11k_dp_tx_update_txcompl(ar, ts);
636 memset(&ar->cached_stats, 0,
637 sizeof(struct ath11k_per_peer_tx_stats));
638 }
639 ar->last_ppdu_id = ts->ppdu_id;
640 }
641
642 ath11k_dp_tx_cache_peer_stats(ar, msdu, ts);
643 }
644
645 spin_lock_bh(&ab->base_lock);
646 peer = ath11k_peer_find_by_id(ab, ts->peer_id);
647 if (!peer || !peer->sta) {
648 ath11k_dbg(ab, ATH11K_DBG_DATA,
649 "dp_tx: failed to find the peer with peer_id %d\n",
650 ts->peer_id);
651 spin_unlock_bh(&ab->base_lock);
652 ieee80211_free_txskb(ar->hw, msdu);
653 return;
654 }
655 arsta = ath11k_sta_to_arsta(peer->sta);
656 status.sta = peer->sta;
657 status.skb = msdu;
658 status.info = info;
659 rate = arsta->last_txrate;
660
661 status_rate.rate_idx = rate;
662 status_rate.try_count = 1;
663
664 status.rates = &status_rate;
665 status.n_rates = 1;
666
667 spin_unlock_bh(&ab->base_lock);
668
669 ieee80211_tx_status_ext(ar->hw, &status);
670 }
671
ath11k_dp_tx_status_parse(struct ath11k_base * ab,struct hal_wbm_release_ring * desc,struct hal_tx_status * ts)672 static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
673 struct hal_wbm_release_ring *desc,
674 struct hal_tx_status *ts)
675 {
676 ts->buf_rel_source =
677 FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);
678 if (unlikely(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
679 ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM))
680 return;
681
682 if (unlikely(ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW))
683 return;
684
685 ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,
686 desc->info0);
687 ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER,
688 desc->info1);
689 ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT,
690 desc->info1);
691 ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI,
692 desc->info2);
693 if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU)
694 ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU;
695 ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3);
696 ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3);
697 if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID)
698 ts->rate_stats = desc->rate_stats.info0;
699 else
700 ts->rate_stats = 0;
701 }
702
ath11k_dp_tx_completion_handler(struct ath11k_base * ab,int ring_id)703 void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
704 {
705 struct ath11k *ar;
706 struct ath11k_dp *dp = &ab->dp;
707 int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
708 struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
709 struct sk_buff *msdu;
710 struct hal_tx_status ts = {};
711 struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
712 u32 *desc;
713 u32 msdu_id;
714 u8 mac_id;
715
716 spin_lock_bh(&status_ring->lock);
717
718 ath11k_hal_srng_access_begin(ab, status_ring);
719
720 while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) !=
721 tx_ring->tx_status_tail) &&
722 (desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) {
723 memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],
724 desc, sizeof(struct hal_wbm_release_ring));
725 tx_ring->tx_status_head =
726 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);
727 }
728
729 if (unlikely((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
730 (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) ==
731 tx_ring->tx_status_tail))) {
732 /* TODO: Process pending tx_status messages when kfifo_is_full() */
733 ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
734 }
735
736 ath11k_hal_srng_access_end(ab, status_ring);
737
738 spin_unlock_bh(&status_ring->lock);
739
740 while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {
741 struct hal_wbm_release_ring *tx_status;
742 u32 desc_id;
743
744 tx_ring->tx_status_tail =
745 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail);
746 tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];
747 ath11k_dp_tx_status_parse(ab, tx_status, &ts);
748
749 desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
750 tx_status->buf_addr_info.info1);
751 mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);
752 msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);
753
754 if (unlikely(ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) {
755 ath11k_dp_tx_process_htt_tx_complete(ab,
756 (void *)tx_status,
757 mac_id, msdu_id,
758 tx_ring);
759 continue;
760 }
761
762 spin_lock(&tx_ring->tx_idr_lock);
763 msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
764 if (unlikely(!msdu)) {
765 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
766 msdu_id);
767 spin_unlock(&tx_ring->tx_idr_lock);
768 continue;
769 }
770
771 spin_unlock(&tx_ring->tx_idr_lock);
772
773 ar = ab->pdevs[mac_id].ar;
774
775 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
776 wake_up(&ar->dp.tx_empty_waitq);
777
778 ath11k_dp_tx_complete_msdu(ar, msdu, &ts);
779 }
780 }
781
ath11k_dp_tx_send_reo_cmd(struct ath11k_base * ab,struct dp_rx_tid * rx_tid,enum hal_reo_cmd_type type,struct ath11k_hal_reo_cmd * cmd,void (* cb)(struct ath11k_dp *,void *,enum hal_reo_cmd_status))782 int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
783 enum hal_reo_cmd_type type,
784 struct ath11k_hal_reo_cmd *cmd,
785 void (*cb)(struct ath11k_dp *, void *,
786 enum hal_reo_cmd_status))
787 {
788 struct ath11k_dp *dp = &ab->dp;
789 struct dp_reo_cmd *dp_cmd;
790 struct hal_srng *cmd_ring;
791 int cmd_num;
792
793 if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
794 return -ESHUTDOWN;
795
796 cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];
797 cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);
798
799 /* cmd_num should start from 1, during failure return the error code */
800 if (cmd_num < 0)
801 return cmd_num;
802
803 /* reo cmd ring descriptors has cmd_num starting from 1 */
804 if (cmd_num == 0)
805 return -EINVAL;
806
807 if (!cb)
808 return 0;
809
810 /* Can this be optimized so that we keep the pending command list only
811 * for tid delete command to free up the resource on the command status
812 * indication?
813 */
814 dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC);
815
816 if (!dp_cmd)
817 return -ENOMEM;
818
819 memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid));
820 dp_cmd->cmd_num = cmd_num;
821 dp_cmd->handler = cb;
822
823 spin_lock_bh(&dp->reo_cmd_lock);
824 list_add_tail(&dp_cmd->list, &dp->reo_cmd_list);
825 spin_unlock_bh(&dp->reo_cmd_lock);
826
827 return 0;
828 }
829
830 static int
ath11k_dp_tx_get_ring_id_type(struct ath11k_base * ab,int mac_id,u32 ring_id,enum hal_ring_type ring_type,enum htt_srng_ring_type * htt_ring_type,enum htt_srng_ring_id * htt_ring_id)831 ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab,
832 int mac_id, u32 ring_id,
833 enum hal_ring_type ring_type,
834 enum htt_srng_ring_type *htt_ring_type,
835 enum htt_srng_ring_id *htt_ring_id)
836 {
837 int lmac_ring_id_offset = 0;
838 int ret = 0;
839
840 switch (ring_type) {
841 case HAL_RXDMA_BUF:
842 lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC;
843
844 /* for QCA6390, host fills rx buffer to fw and fw fills to
845 * rxbuf ring for each rxdma
846 */
847 if (!ab->hw_params.rx_mac_buf_ring) {
848 if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF +
849 lmac_ring_id_offset) ||
850 ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF +
851 lmac_ring_id_offset))) {
852 ret = -EINVAL;
853 }
854 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
855 *htt_ring_type = HTT_SW_TO_HW_RING;
856 } else {
857 if (ring_id == HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF) {
858 *htt_ring_id = HTT_HOST1_TO_FW_RXBUF_RING;
859 *htt_ring_type = HTT_SW_TO_SW_RING;
860 } else {
861 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
862 *htt_ring_type = HTT_SW_TO_HW_RING;
863 }
864 }
865 break;
866 case HAL_RXDMA_DST:
867 *htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING;
868 *htt_ring_type = HTT_HW_TO_SW_RING;
869 break;
870 case HAL_RXDMA_MONITOR_BUF:
871 *htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING;
872 *htt_ring_type = HTT_SW_TO_HW_RING;
873 break;
874 case HAL_RXDMA_MONITOR_STATUS:
875 *htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING;
876 *htt_ring_type = HTT_SW_TO_HW_RING;
877 break;
878 case HAL_RXDMA_MONITOR_DST:
879 *htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING;
880 *htt_ring_type = HTT_HW_TO_SW_RING;
881 break;
882 case HAL_RXDMA_MONITOR_DESC:
883 *htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING;
884 *htt_ring_type = HTT_SW_TO_HW_RING;
885 break;
886 default:
887 ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type);
888 ret = -EINVAL;
889 }
890 return ret;
891 }
892
ath11k_dp_tx_htt_srng_setup(struct ath11k_base * ab,u32 ring_id,int mac_id,enum hal_ring_type ring_type)893 int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id,
894 int mac_id, enum hal_ring_type ring_type)
895 {
896 struct htt_srng_setup_cmd *cmd;
897 struct hal_srng *srng = &ab->hal.srng_list[ring_id];
898 struct hal_srng_params params;
899 struct sk_buff *skb;
900 u32 ring_entry_sz;
901 int len = sizeof(*cmd);
902 dma_addr_t hp_addr, tp_addr;
903 enum htt_srng_ring_type htt_ring_type;
904 enum htt_srng_ring_id htt_ring_id;
905 int ret;
906
907 skb = ath11k_htc_alloc_skb(ab, len);
908 if (!skb)
909 return -ENOMEM;
910
911 memset(¶ms, 0, sizeof(params));
912 ath11k_hal_srng_get_params(ab, srng, ¶ms);
913
914 hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng);
915 tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng);
916
917 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
918 ring_type, &htt_ring_type,
919 &htt_ring_id);
920 if (ret)
921 goto err_free;
922
923 skb_put(skb, len);
924 cmd = (struct htt_srng_setup_cmd *)skb->data;
925 cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,
926 HTT_H2T_MSG_TYPE_SRING_SETUP);
927 if (htt_ring_type == HTT_SW_TO_HW_RING ||
928 htt_ring_type == HTT_HW_TO_SW_RING)
929 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
930 DP_SW2HW_MACID(mac_id));
931 else
932 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
933 mac_id);
934 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,
935 htt_ring_type);
936 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);
937
938 cmd->ring_base_addr_lo = params.ring_base_paddr &
939 HAL_ADDR_LSB_REG_MASK;
940
941 cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >>
942 HAL_ADDR_MSB_REG_SHIFT;
943
944 ret = ath11k_hal_srng_get_entrysize(ab, ring_type);
945 if (ret < 0)
946 goto err_free;
947
948 ring_entry_sz = ret;
949
950 ring_entry_sz >>= 2;
951 cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,
952 ring_entry_sz);
953 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,
954 params.num_entries * ring_entry_sz);
955 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,
956 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
957 cmd->info1 |= FIELD_PREP(
958 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP,
959 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
960 cmd->info1 |= FIELD_PREP(
961 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP,
962 !!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP));
963 if (htt_ring_type == HTT_SW_TO_HW_RING)
964 cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS;
965
966 cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK;
967 cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >>
968 HAL_ADDR_MSB_REG_SHIFT;
969
970 cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK;
971 cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >>
972 HAL_ADDR_MSB_REG_SHIFT;
973
974 cmd->ring_msi_addr_lo = lower_32_bits(params.msi_addr);
975 cmd->ring_msi_addr_hi = upper_32_bits(params.msi_addr);
976 cmd->msi_data = params.msi_data;
977
978 cmd->intr_info = FIELD_PREP(
979 HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH,
980 params.intr_batch_cntr_thres_entries * ring_entry_sz);
981 cmd->intr_info |= FIELD_PREP(
982 HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH,
983 params.intr_timer_thres_us >> 3);
984
985 cmd->info2 = 0;
986 if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {
987 cmd->info2 = FIELD_PREP(
988 HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH,
989 params.low_threshold);
990 }
991
992 ath11k_dbg(ab, ATH11K_DBG_DP_TX,
993 "htt srng setup msi_addr_lo 0x%x msi_addr_hi 0x%x msi_data 0x%x ring_id %d ring_type %d intr_info 0x%x flags 0x%x\n",
994 cmd->ring_msi_addr_lo, cmd->ring_msi_addr_hi,
995 cmd->msi_data, ring_id, ring_type, cmd->intr_info, cmd->info2);
996
997 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
998 if (ret)
999 goto err_free;
1000
1001 return 0;
1002
1003 err_free:
1004 dev_kfree_skb_any(skb);
1005
1006 return ret;
1007 }
1008
1009 #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
1010
ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base * ab)1011 int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab)
1012 {
1013 struct ath11k_dp *dp = &ab->dp;
1014 struct sk_buff *skb;
1015 struct htt_ver_req_cmd *cmd;
1016 int len = sizeof(*cmd);
1017 int ret;
1018
1019 init_completion(&dp->htt_tgt_version_received);
1020
1021 skb = ath11k_htc_alloc_skb(ab, len);
1022 if (!skb)
1023 return -ENOMEM;
1024
1025 skb_put(skb, len);
1026 cmd = (struct htt_ver_req_cmd *)skb->data;
1027 cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,
1028 HTT_H2T_MSG_TYPE_VERSION_REQ);
1029
1030 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1031 if (ret) {
1032 dev_kfree_skb_any(skb);
1033 return ret;
1034 }
1035
1036 ret = wait_for_completion_timeout(&dp->htt_tgt_version_received,
1037 HTT_TARGET_VERSION_TIMEOUT_HZ);
1038 if (ret == 0) {
1039 ath11k_warn(ab, "htt target version request timed out\n");
1040 return -ETIMEDOUT;
1041 }
1042
1043 if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) {
1044 ath11k_err(ab, "unsupported htt major version %d supported version is %d\n",
1045 dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR);
1046 return -EOPNOTSUPP;
1047 }
1048
1049 return 0;
1050 }
1051
ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k * ar,u32 mask)1052 int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)
1053 {
1054 struct ath11k_base *ab = ar->ab;
1055 struct ath11k_dp *dp = &ab->dp;
1056 struct sk_buff *skb;
1057 struct htt_ppdu_stats_cfg_cmd *cmd;
1058 int len = sizeof(*cmd);
1059 u8 pdev_mask;
1060 int ret;
1061 int i;
1062
1063 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
1064 skb = ath11k_htc_alloc_skb(ab, len);
1065 if (!skb)
1066 return -ENOMEM;
1067
1068 skb_put(skb, len);
1069 cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data;
1070 cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,
1071 HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);
1072
1073 pdev_mask = 1 << (ar->pdev_idx + i);
1074 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);
1075 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);
1076
1077 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1078 if (ret) {
1079 dev_kfree_skb_any(skb);
1080 return ret;
1081 }
1082 }
1083
1084 return 0;
1085 }
1086
ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base * ab,u32 ring_id,int mac_id,enum hal_ring_type ring_type,int rx_buf_size,struct htt_rx_ring_tlv_filter * tlv_filter)1087 int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id,
1088 int mac_id, enum hal_ring_type ring_type,
1089 int rx_buf_size,
1090 struct htt_rx_ring_tlv_filter *tlv_filter)
1091 {
1092 struct htt_rx_ring_selection_cfg_cmd *cmd;
1093 struct hal_srng *srng = &ab->hal.srng_list[ring_id];
1094 struct hal_srng_params params;
1095 struct sk_buff *skb;
1096 int len = sizeof(*cmd);
1097 enum htt_srng_ring_type htt_ring_type;
1098 enum htt_srng_ring_id htt_ring_id;
1099 int ret;
1100
1101 skb = ath11k_htc_alloc_skb(ab, len);
1102 if (!skb)
1103 return -ENOMEM;
1104
1105 memset(¶ms, 0, sizeof(params));
1106 ath11k_hal_srng_get_params(ab, srng, ¶ms);
1107
1108 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
1109 ring_type, &htt_ring_type,
1110 &htt_ring_id);
1111 if (ret)
1112 goto err_free;
1113
1114 skb_put(skb, len);
1115 cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data;
1116 cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,
1117 HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG);
1118 if (htt_ring_type == HTT_SW_TO_HW_RING ||
1119 htt_ring_type == HTT_HW_TO_SW_RING)
1120 cmd->info0 |=
1121 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
1122 DP_SW2HW_MACID(mac_id));
1123 else
1124 cmd->info0 |=
1125 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
1126 mac_id);
1127 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,
1128 htt_ring_id);
1129 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,
1130 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
1131 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,
1132 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
1133
1134 cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,
1135 rx_buf_size);
1136 cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0;
1137 cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1;
1138 cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2;
1139 cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;
1140 cmd->rx_filter_tlv = tlv_filter->rx_filter;
1141
1142 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
1143 if (ret)
1144 goto err_free;
1145
1146 return 0;
1147
1148 err_free:
1149 dev_kfree_skb_any(skb);
1150
1151 return ret;
1152 }
1153
1154 int
ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k * ar,u8 type,struct htt_ext_stats_cfg_params * cfg_params,u64 cookie)1155 ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type,
1156 struct htt_ext_stats_cfg_params *cfg_params,
1157 u64 cookie)
1158 {
1159 struct ath11k_base *ab = ar->ab;
1160 struct ath11k_dp *dp = &ab->dp;
1161 struct sk_buff *skb;
1162 struct htt_ext_stats_cfg_cmd *cmd;
1163 u32 pdev_id;
1164 int len = sizeof(*cmd);
1165 int ret;
1166
1167 skb = ath11k_htc_alloc_skb(ab, len);
1168 if (!skb)
1169 return -ENOMEM;
1170
1171 skb_put(skb, len);
1172
1173 cmd = (struct htt_ext_stats_cfg_cmd *)skb->data;
1174 memset(cmd, 0, sizeof(*cmd));
1175 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG;
1176
1177 if (ab->hw_params.single_pdev_only)
1178 pdev_id = ath11k_mac_get_target_pdev_id(ar);
1179 else
1180 pdev_id = ar->pdev->pdev_id;
1181
1182 cmd->hdr.pdev_mask = 1 << pdev_id;
1183
1184 cmd->hdr.stats_type = type;
1185 cmd->cfg_param0 = cfg_params->cfg0;
1186 cmd->cfg_param1 = cfg_params->cfg1;
1187 cmd->cfg_param2 = cfg_params->cfg2;
1188 cmd->cfg_param3 = cfg_params->cfg3;
1189 cmd->cookie_lsb = lower_32_bits(cookie);
1190 cmd->cookie_msb = upper_32_bits(cookie);
1191
1192 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1193 if (ret) {
1194 ath11k_warn(ab, "failed to send htt type stats request: %d",
1195 ret);
1196 dev_kfree_skb_any(skb);
1197 return ret;
1198 }
1199
1200 return 0;
1201 }
1202
ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k * ar,bool reset)1203 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
1204 {
1205 struct ath11k_pdev_dp *dp = &ar->dp;
1206 struct ath11k_base *ab = ar->ab;
1207 struct htt_rx_ring_tlv_filter tlv_filter = {};
1208 int ret = 0, ring_id = 0, i;
1209
1210 if (ab->hw_params.full_monitor_mode) {
1211 ret = ath11k_dp_tx_htt_rx_full_mon_setup(ab,
1212 dp->mac_id, !reset);
1213 if (ret < 0) {
1214 ath11k_err(ab, "failed to setup full monitor %d\n", ret);
1215 return ret;
1216 }
1217 }
1218
1219 ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
1220
1221 if (!reset) {
1222 tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;
1223 tlv_filter.pkt_filter_flags0 =
1224 HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 |
1225 HTT_RX_MON_MO_MGMT_FILTER_FLAGS0;
1226 tlv_filter.pkt_filter_flags1 =
1227 HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 |
1228 HTT_RX_MON_MO_MGMT_FILTER_FLAGS1;
1229 tlv_filter.pkt_filter_flags2 =
1230 HTT_RX_MON_FP_CTRL_FILTER_FLASG2 |
1231 HTT_RX_MON_MO_CTRL_FILTER_FLASG2;
1232 tlv_filter.pkt_filter_flags3 =
1233 HTT_RX_MON_FP_CTRL_FILTER_FLASG3 |
1234 HTT_RX_MON_MO_CTRL_FILTER_FLASG3 |
1235 HTT_RX_MON_FP_DATA_FILTER_FLASG3 |
1236 HTT_RX_MON_MO_DATA_FILTER_FLASG3;
1237 }
1238
1239 if (ab->hw_params.rxdma1_enable) {
1240 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
1241 HAL_RXDMA_MONITOR_BUF,
1242 DP_RXDMA_REFILL_RING_SIZE,
1243 &tlv_filter);
1244 } else if (!reset) {
1245 /* set in monitor mode only */
1246 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
1247 ring_id = dp->rx_mac_buf_ring[i].ring_id;
1248 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,
1249 dp->mac_id + i,
1250 HAL_RXDMA_BUF,
1251 1024,
1252 &tlv_filter);
1253 }
1254 }
1255
1256 if (ret)
1257 return ret;
1258
1259 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
1260 ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
1261 if (!reset) {
1262 tlv_filter.rx_filter =
1263 HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;
1264 } else {
1265 tlv_filter = ath11k_mac_mon_status_filter_default;
1266
1267 if (ath11k_debugfs_is_extd_rx_stats_enabled(ar))
1268 tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);
1269 }
1270
1271 ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,
1272 dp->mac_id + i,
1273 HAL_RXDMA_MONITOR_STATUS,
1274 DP_RXDMA_REFILL_RING_SIZE,
1275 &tlv_filter);
1276 }
1277
1278 if (!ar->ab->hw_params.rxdma1_enable)
1279 mod_timer(&ar->ab->mon_reap_timer, jiffies +
1280 msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));
1281
1282 return ret;
1283 }
1284
ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base * ab,int mac_id,bool config)1285 int ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base *ab, int mac_id,
1286 bool config)
1287 {
1288 struct htt_rx_full_monitor_mode_cfg_cmd *cmd;
1289 struct sk_buff *skb;
1290 int ret, len = sizeof(*cmd);
1291
1292 skb = ath11k_htc_alloc_skb(ab, len);
1293 if (!skb)
1294 return -ENOMEM;
1295
1296 skb_put(skb, len);
1297 cmd = (struct htt_rx_full_monitor_mode_cfg_cmd *)skb->data;
1298 memset(cmd, 0, sizeof(*cmd));
1299 cmd->info0 = FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE,
1300 HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE);
1301
1302 cmd->info0 |= FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_PDEV_ID, mac_id);
1303
1304 cmd->cfg = HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ENABLE |
1305 FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_RELEASE_RING,
1306 HTT_RX_MON_RING_SW);
1307 if (config) {
1308 cmd->cfg |= HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ZERO_MPDUS_END |
1309 HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_NON_ZERO_MPDUS_END;
1310 }
1311
1312 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
1313 if (ret)
1314 goto err_free;
1315
1316 return 0;
1317
1318 err_free:
1319 dev_kfree_skb_any(skb);
1320
1321 return ret;
1322 }
1323