1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
7 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
8 */
9
10 #if defined(__FreeBSD__)
11 #define LINUXKPI_PARAM_PREFIX ath10k_core_
12 #endif
13
14 #include <linux/export.h>
15 #include <linux/module.h>
16 #include <linux/firmware.h>
17 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
18 #include <linux/of.h>
19 #endif
20 #include <linux/property.h>
21 #include <linux/dmi.h>
22 #include <linux/ctype.h>
23 #include <linux/pm_qos.h>
24 #include <linux/nvmem-consumer.h>
25 #include <asm/byteorder.h>
26
27 #include "core.h"
28 #include "mac.h"
29 #include "htc.h"
30 #include "hif.h"
31 #include "wmi.h"
32 #include "bmi.h"
33 #include "debug.h"
34 #include "htt.h"
35 #include "testmode.h"
36 #include "wmi-ops.h"
37 #include "coredump.h"
38 #if defined(CONFIG_FWLOG)
39 #include "fwlog.h"
40 #endif
41 #include "leds.h"
42
43 unsigned int ath10k_debug_mask;
44 EXPORT_SYMBOL(ath10k_debug_mask);
45
46 static unsigned int ath10k_cryptmode_param;
47 static bool uart_print;
48 static bool skip_otp;
49 static bool fw_diag_log;
50
51 /* frame mode values are mapped as per enum ath10k_hw_txrx_mode */
52 unsigned int ath10k_frame_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
53
54 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
55 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
56
57 /* FIXME: most of these should be readonly */
58 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
59 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
60 module_param(uart_print, bool, 0644);
61 module_param(skip_otp, bool, 0644);
62 module_param(fw_diag_log, bool, 0644);
63 module_param_named(frame_mode, ath10k_frame_mode, uint, 0644);
64 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
65
66 MODULE_PARM_DESC(debug_mask, "Debugging mask");
67 MODULE_PARM_DESC(uart_print, "Uart target debugging");
68 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
69 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
70 MODULE_PARM_DESC(frame_mode,
71 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
72 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
73 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
74
75 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
76 {
77 .id = QCA988X_HW_2_0_VERSION,
78 .dev_id = QCA988X_2_0_DEVICE_ID,
79 .bus = ATH10K_BUS_PCI,
80 .name = "qca988x hw2.0",
81 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
82 .uart_pin = 7,
83 .led_pin = 1,
84 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
85 .otp_exe_param = 0,
86 .channel_counters_freq_hz = 88000,
87 .max_probe_resp_desc_thres = 0,
88 .cal_data_len = 2116,
89 .fw = {
90 .dir = QCA988X_HW_2_0_FW_DIR,
91 .board_size = QCA988X_BOARD_DATA_SZ,
92 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
93 },
94 .rx_desc_ops = &qca988x_rx_desc_ops,
95 .hw_ops = &qca988x_ops,
96 .decap_align_bytes = 4,
97 .spectral_bin_discard = 0,
98 .spectral_bin_offset = 0,
99 .vht160_mcs_rx_highest = 0,
100 .vht160_mcs_tx_highest = 0,
101 .n_cipher_suites = 8,
102 .ast_skid_limit = 0x10,
103 .num_wds_entries = 0x20,
104 .target_64bit = false,
105 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
106 .shadow_reg_support = false,
107 .rri_on_ddr = false,
108 .hw_filter_reset_required = true,
109 .fw_diag_ce_download = false,
110 .credit_size_workaround = false,
111 .tx_stats_over_pktlog = true,
112 .dynamic_sar_support = false,
113 .hw_restart_disconnect = false,
114 .use_fw_tx_credits = true,
115 .delay_unmap_buffer = false,
116 .mcast_frame_registration = false,
117 },
118 {
119 .id = QCA988X_HW_2_0_VERSION,
120 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
121 .name = "qca988x hw2.0 ubiquiti",
122 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
123 .uart_pin = 7,
124 .led_pin = 0,
125 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
126 .otp_exe_param = 0,
127 .channel_counters_freq_hz = 88000,
128 .max_probe_resp_desc_thres = 0,
129 .cal_data_len = 2116,
130 .fw = {
131 .dir = QCA988X_HW_2_0_FW_DIR,
132 .board_size = QCA988X_BOARD_DATA_SZ,
133 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
134 },
135 .rx_desc_ops = &qca988x_rx_desc_ops,
136 .hw_ops = &qca988x_ops,
137 .decap_align_bytes = 4,
138 .spectral_bin_discard = 0,
139 .spectral_bin_offset = 0,
140 .vht160_mcs_rx_highest = 0,
141 .vht160_mcs_tx_highest = 0,
142 .n_cipher_suites = 8,
143 .ast_skid_limit = 0x10,
144 .num_wds_entries = 0x20,
145 .target_64bit = false,
146 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
147 .shadow_reg_support = false,
148 .rri_on_ddr = false,
149 .hw_filter_reset_required = true,
150 .fw_diag_ce_download = false,
151 .credit_size_workaround = false,
152 .tx_stats_over_pktlog = true,
153 .dynamic_sar_support = false,
154 .hw_restart_disconnect = false,
155 .use_fw_tx_credits = true,
156 .delay_unmap_buffer = false,
157 .mcast_frame_registration = false,
158 },
159 {
160 .id = QCA9887_HW_1_0_VERSION,
161 .dev_id = QCA9887_1_0_DEVICE_ID,
162 .bus = ATH10K_BUS_PCI,
163 .name = "qca9887 hw1.0",
164 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
165 .uart_pin = 7,
166 .led_pin = 1,
167 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
168 .otp_exe_param = 0,
169 .channel_counters_freq_hz = 88000,
170 .max_probe_resp_desc_thres = 0,
171 .cal_data_len = 2116,
172 .fw = {
173 .dir = QCA9887_HW_1_0_FW_DIR,
174 .board_size = QCA9887_BOARD_DATA_SZ,
175 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
176 },
177 .rx_desc_ops = &qca988x_rx_desc_ops,
178 .hw_ops = &qca988x_ops,
179 .decap_align_bytes = 4,
180 .spectral_bin_discard = 0,
181 .spectral_bin_offset = 0,
182 .vht160_mcs_rx_highest = 0,
183 .vht160_mcs_tx_highest = 0,
184 .n_cipher_suites = 8,
185 .ast_skid_limit = 0x10,
186 .num_wds_entries = 0x20,
187 .target_64bit = false,
188 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
189 .shadow_reg_support = false,
190 .rri_on_ddr = false,
191 .hw_filter_reset_required = true,
192 .fw_diag_ce_download = false,
193 .credit_size_workaround = false,
194 .tx_stats_over_pktlog = false,
195 .dynamic_sar_support = false,
196 .hw_restart_disconnect = false,
197 .use_fw_tx_credits = true,
198 .delay_unmap_buffer = false,
199 .mcast_frame_registration = false,
200 },
201 {
202 .id = QCA6174_HW_3_2_VERSION,
203 .dev_id = QCA6174_3_2_DEVICE_ID,
204 .bus = ATH10K_BUS_SDIO,
205 .name = "qca6174 hw3.2 sdio",
206 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
207 .uart_pin = 19,
208 .led_pin = 0,
209 .otp_exe_param = 0,
210 .channel_counters_freq_hz = 88000,
211 .max_probe_resp_desc_thres = 0,
212 .cal_data_len = 0,
213 .fw = {
214 .dir = QCA6174_HW_3_0_FW_DIR,
215 .board_size = QCA6174_BOARD_DATA_SZ,
216 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
217 },
218 .rx_desc_ops = &qca988x_rx_desc_ops,
219 .hw_ops = &qca6174_sdio_ops,
220 .hw_clk = qca6174_clk,
221 .target_cpu_freq = 176000000,
222 .decap_align_bytes = 4,
223 .n_cipher_suites = 8,
224 .num_peers = 10,
225 .ast_skid_limit = 0x10,
226 .num_wds_entries = 0x20,
227 .uart_pin_workaround = true,
228 .tx_stats_over_pktlog = false,
229 .credit_size_workaround = false,
230 .bmi_large_size_download = true,
231 .supports_peer_stats_info = true,
232 .dynamic_sar_support = true,
233 .hw_restart_disconnect = false,
234 .use_fw_tx_credits = true,
235 .delay_unmap_buffer = false,
236 .mcast_frame_registration = false,
237 },
238 {
239 .id = QCA6174_HW_2_1_VERSION,
240 .dev_id = QCA6164_2_1_DEVICE_ID,
241 .bus = ATH10K_BUS_PCI,
242 .name = "qca6164 hw2.1",
243 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
244 .uart_pin = 6,
245 .led_pin = 0,
246 .otp_exe_param = 0,
247 .channel_counters_freq_hz = 88000,
248 .max_probe_resp_desc_thres = 0,
249 .cal_data_len = 8124,
250 .fw = {
251 .dir = QCA6174_HW_2_1_FW_DIR,
252 .board_size = QCA6174_BOARD_DATA_SZ,
253 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
254 },
255 .rx_desc_ops = &qca988x_rx_desc_ops,
256 .hw_ops = &qca988x_ops,
257 .decap_align_bytes = 4,
258 .spectral_bin_discard = 0,
259 .spectral_bin_offset = 0,
260 .vht160_mcs_rx_highest = 0,
261 .vht160_mcs_tx_highest = 0,
262 .n_cipher_suites = 8,
263 .ast_skid_limit = 0x10,
264 .num_wds_entries = 0x20,
265 .target_64bit = false,
266 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
267 .shadow_reg_support = false,
268 .rri_on_ddr = false,
269 .hw_filter_reset_required = true,
270 .fw_diag_ce_download = false,
271 .credit_size_workaround = false,
272 .tx_stats_over_pktlog = false,
273 .dynamic_sar_support = false,
274 .hw_restart_disconnect = false,
275 .use_fw_tx_credits = true,
276 .delay_unmap_buffer = false,
277 .mcast_frame_registration = false,
278 },
279 {
280 .id = QCA6174_HW_2_1_VERSION,
281 .dev_id = QCA6174_2_1_DEVICE_ID,
282 .bus = ATH10K_BUS_PCI,
283 .name = "qca6174 hw2.1",
284 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
285 .uart_pin = 6,
286 .led_pin = 0,
287 .otp_exe_param = 0,
288 .channel_counters_freq_hz = 88000,
289 .max_probe_resp_desc_thres = 0,
290 .cal_data_len = 8124,
291 .fw = {
292 .dir = QCA6174_HW_2_1_FW_DIR,
293 .board_size = QCA6174_BOARD_DATA_SZ,
294 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
295 },
296 .rx_desc_ops = &qca988x_rx_desc_ops,
297 .hw_ops = &qca988x_ops,
298 .decap_align_bytes = 4,
299 .spectral_bin_discard = 0,
300 .spectral_bin_offset = 0,
301 .vht160_mcs_rx_highest = 0,
302 .vht160_mcs_tx_highest = 0,
303 .n_cipher_suites = 8,
304 .ast_skid_limit = 0x10,
305 .num_wds_entries = 0x20,
306 .target_64bit = false,
307 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
308 .shadow_reg_support = false,
309 .rri_on_ddr = false,
310 .hw_filter_reset_required = true,
311 .fw_diag_ce_download = false,
312 .credit_size_workaround = false,
313 .tx_stats_over_pktlog = false,
314 .dynamic_sar_support = false,
315 .hw_restart_disconnect = false,
316 .use_fw_tx_credits = true,
317 .delay_unmap_buffer = false,
318 .mcast_frame_registration = false,
319 },
320 {
321 .id = QCA6174_HW_3_0_VERSION,
322 .dev_id = QCA6174_2_1_DEVICE_ID,
323 .bus = ATH10K_BUS_PCI,
324 .name = "qca6174 hw3.0",
325 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
326 .uart_pin = 6,
327 .led_pin = 0,
328 .otp_exe_param = 0,
329 .channel_counters_freq_hz = 88000,
330 .max_probe_resp_desc_thres = 0,
331 .cal_data_len = 8124,
332 .fw = {
333 .dir = QCA6174_HW_3_0_FW_DIR,
334 .board_size = QCA6174_BOARD_DATA_SZ,
335 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
336 },
337 .rx_desc_ops = &qca988x_rx_desc_ops,
338 .hw_ops = &qca988x_ops,
339 .decap_align_bytes = 4,
340 .spectral_bin_discard = 0,
341 .spectral_bin_offset = 0,
342 .vht160_mcs_rx_highest = 0,
343 .vht160_mcs_tx_highest = 0,
344 .n_cipher_suites = 8,
345 .ast_skid_limit = 0x10,
346 .num_wds_entries = 0x20,
347 .target_64bit = false,
348 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
349 .shadow_reg_support = false,
350 .rri_on_ddr = false,
351 .hw_filter_reset_required = true,
352 .fw_diag_ce_download = false,
353 .credit_size_workaround = false,
354 .tx_stats_over_pktlog = false,
355 .dynamic_sar_support = false,
356 .hw_restart_disconnect = false,
357 .use_fw_tx_credits = true,
358 .delay_unmap_buffer = false,
359 .mcast_frame_registration = false,
360 },
361 {
362 .id = QCA6174_HW_3_2_VERSION,
363 .dev_id = QCA6174_2_1_DEVICE_ID,
364 .bus = ATH10K_BUS_PCI,
365 .name = "qca6174 hw3.2",
366 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
367 .uart_pin = 6,
368 .led_pin = 0,
369 .otp_exe_param = 0,
370 .channel_counters_freq_hz = 88000,
371 .max_probe_resp_desc_thres = 0,
372 .cal_data_len = 8124,
373 .fw = {
374 /* uses same binaries as hw3.0 */
375 .dir = QCA6174_HW_3_0_FW_DIR,
376 .board_size = QCA6174_BOARD_DATA_SZ,
377 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
378 },
379 .rx_desc_ops = &qca988x_rx_desc_ops,
380 .hw_ops = &qca6174_ops,
381 .hw_clk = qca6174_clk,
382 .target_cpu_freq = 176000000,
383 .decap_align_bytes = 4,
384 .spectral_bin_discard = 0,
385 .spectral_bin_offset = 0,
386 .vht160_mcs_rx_highest = 0,
387 .vht160_mcs_tx_highest = 0,
388 .n_cipher_suites = 8,
389 .ast_skid_limit = 0x10,
390 .num_wds_entries = 0x20,
391 .target_64bit = false,
392 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
393 .shadow_reg_support = false,
394 .rri_on_ddr = false,
395 .hw_filter_reset_required = true,
396 .fw_diag_ce_download = true,
397 .credit_size_workaround = false,
398 .tx_stats_over_pktlog = false,
399 .supports_peer_stats_info = true,
400 .dynamic_sar_support = true,
401 .hw_restart_disconnect = false,
402 .use_fw_tx_credits = true,
403 .delay_unmap_buffer = false,
404 .mcast_frame_registration = true,
405 },
406 {
407 .id = QCA99X0_HW_2_0_DEV_VERSION,
408 .dev_id = QCA99X0_2_0_DEVICE_ID,
409 .bus = ATH10K_BUS_PCI,
410 .name = "qca99x0 hw2.0",
411 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
412 .uart_pin = 7,
413 .led_pin = 17,
414 .otp_exe_param = 0x00000700,
415 .continuous_frag_desc = true,
416 .cck_rate_map_rev2 = true,
417 .channel_counters_freq_hz = 150000,
418 .max_probe_resp_desc_thres = 24,
419 .tx_chain_mask = 0xf,
420 .rx_chain_mask = 0xf,
421 .max_spatial_stream = 4,
422 .cal_data_len = 12064,
423 .fw = {
424 .dir = QCA99X0_HW_2_0_FW_DIR,
425 .board_size = QCA99X0_BOARD_DATA_SZ,
426 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
427 },
428 .sw_decrypt_mcast_mgmt = true,
429 .rx_desc_ops = &qca99x0_rx_desc_ops,
430 .hw_ops = &qca99x0_ops,
431 .decap_align_bytes = 1,
432 .spectral_bin_discard = 4,
433 .spectral_bin_offset = 0,
434 .vht160_mcs_rx_highest = 0,
435 .vht160_mcs_tx_highest = 0,
436 .n_cipher_suites = 11,
437 .ast_skid_limit = 0x10,
438 .num_wds_entries = 0x20,
439 .target_64bit = false,
440 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
441 .shadow_reg_support = false,
442 .rri_on_ddr = false,
443 .hw_filter_reset_required = true,
444 .fw_diag_ce_download = false,
445 .credit_size_workaround = false,
446 .tx_stats_over_pktlog = false,
447 .dynamic_sar_support = false,
448 .hw_restart_disconnect = false,
449 .use_fw_tx_credits = true,
450 .delay_unmap_buffer = false,
451 .mcast_frame_registration = false,
452 },
453 {
454 .id = QCA9984_HW_1_0_DEV_VERSION,
455 .dev_id = QCA9984_1_0_DEVICE_ID,
456 .bus = ATH10K_BUS_PCI,
457 .name = "qca9984/qca9994 hw1.0",
458 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
459 .uart_pin = 7,
460 .led_pin = 17,
461 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
462 .otp_exe_param = 0x00000700,
463 .continuous_frag_desc = true,
464 .cck_rate_map_rev2 = true,
465 .channel_counters_freq_hz = 150000,
466 .max_probe_resp_desc_thres = 24,
467 .tx_chain_mask = 0xf,
468 .rx_chain_mask = 0xf,
469 .max_spatial_stream = 4,
470 .cal_data_len = 12064,
471 .fw = {
472 .dir = QCA9984_HW_1_0_FW_DIR,
473 .board_size = QCA99X0_BOARD_DATA_SZ,
474 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
475 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
476 },
477 .sw_decrypt_mcast_mgmt = true,
478 .rx_desc_ops = &qca99x0_rx_desc_ops,
479 .hw_ops = &qca99x0_ops,
480 .decap_align_bytes = 1,
481 .spectral_bin_discard = 12,
482 .spectral_bin_offset = 8,
483
484 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
485 * or 2x2 160Mhz, long-guard-interval.
486 */
487 .vht160_mcs_rx_highest = 1560,
488 .vht160_mcs_tx_highest = 1560,
489 .n_cipher_suites = 11,
490 .ast_skid_limit = 0x10,
491 .num_wds_entries = 0x20,
492 .target_64bit = false,
493 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
494 .shadow_reg_support = false,
495 .rri_on_ddr = false,
496 .hw_filter_reset_required = true,
497 .fw_diag_ce_download = false,
498 .credit_size_workaround = false,
499 .tx_stats_over_pktlog = false,
500 .dynamic_sar_support = false,
501 .hw_restart_disconnect = false,
502 .use_fw_tx_credits = true,
503 .delay_unmap_buffer = false,
504 .mcast_frame_registration = false,
505 },
506 {
507 .id = QCA9888_HW_2_0_DEV_VERSION,
508 .dev_id = QCA9888_2_0_DEVICE_ID,
509 .bus = ATH10K_BUS_PCI,
510 .name = "qca9888 hw2.0",
511 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
512 .uart_pin = 7,
513 .led_pin = 17,
514 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
515 .otp_exe_param = 0x00000700,
516 .continuous_frag_desc = true,
517 .channel_counters_freq_hz = 150000,
518 .max_probe_resp_desc_thres = 24,
519 .tx_chain_mask = 3,
520 .rx_chain_mask = 3,
521 .max_spatial_stream = 2,
522 .cal_data_len = 12064,
523 .fw = {
524 .dir = QCA9888_HW_2_0_FW_DIR,
525 .board_size = QCA99X0_BOARD_DATA_SZ,
526 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
527 },
528 .sw_decrypt_mcast_mgmt = true,
529 .rx_desc_ops = &qca99x0_rx_desc_ops,
530 .hw_ops = &qca99x0_ops,
531 .decap_align_bytes = 1,
532 .spectral_bin_discard = 12,
533 .spectral_bin_offset = 8,
534
535 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
536 * 1x1 160Mhz, long-guard-interval.
537 */
538 .vht160_mcs_rx_highest = 780,
539 .vht160_mcs_tx_highest = 780,
540 .n_cipher_suites = 11,
541 .ast_skid_limit = 0x10,
542 .num_wds_entries = 0x20,
543 .target_64bit = false,
544 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
545 .shadow_reg_support = false,
546 .rri_on_ddr = false,
547 .hw_filter_reset_required = true,
548 .fw_diag_ce_download = false,
549 .credit_size_workaround = false,
550 .tx_stats_over_pktlog = false,
551 .dynamic_sar_support = false,
552 .hw_restart_disconnect = false,
553 .use_fw_tx_credits = true,
554 .delay_unmap_buffer = false,
555 .mcast_frame_registration = false,
556 },
557 {
558 .id = QCA9377_HW_1_0_DEV_VERSION,
559 .dev_id = QCA9377_1_0_DEVICE_ID,
560 .bus = ATH10K_BUS_PCI,
561 .name = "qca9377 hw1.0",
562 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
563 .uart_pin = 6,
564 .led_pin = 0,
565 .otp_exe_param = 0,
566 .channel_counters_freq_hz = 88000,
567 .max_probe_resp_desc_thres = 0,
568 .cal_data_len = 8124,
569 .fw = {
570 .dir = QCA9377_HW_1_0_FW_DIR,
571 .board_size = QCA9377_BOARD_DATA_SZ,
572 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
573 },
574 .rx_desc_ops = &qca988x_rx_desc_ops,
575 .hw_ops = &qca988x_ops,
576 .decap_align_bytes = 4,
577 .spectral_bin_discard = 0,
578 .spectral_bin_offset = 0,
579 .vht160_mcs_rx_highest = 0,
580 .vht160_mcs_tx_highest = 0,
581 .n_cipher_suites = 8,
582 .ast_skid_limit = 0x10,
583 .num_wds_entries = 0x20,
584 .target_64bit = false,
585 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
586 .shadow_reg_support = false,
587 .rri_on_ddr = false,
588 .hw_filter_reset_required = true,
589 .fw_diag_ce_download = false,
590 .credit_size_workaround = false,
591 .tx_stats_over_pktlog = false,
592 .dynamic_sar_support = false,
593 .hw_restart_disconnect = false,
594 .use_fw_tx_credits = true,
595 .delay_unmap_buffer = false,
596 .mcast_frame_registration = false,
597 },
598 {
599 .id = QCA9377_HW_1_1_DEV_VERSION,
600 .dev_id = QCA9377_1_0_DEVICE_ID,
601 .bus = ATH10K_BUS_PCI,
602 .name = "qca9377 hw1.1",
603 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
604 .uart_pin = 6,
605 .led_pin = 0,
606 .otp_exe_param = 0,
607 .channel_counters_freq_hz = 88000,
608 .max_probe_resp_desc_thres = 0,
609 .cal_data_len = 8124,
610 .fw = {
611 .dir = QCA9377_HW_1_0_FW_DIR,
612 .board_size = QCA9377_BOARD_DATA_SZ,
613 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
614 },
615 .rx_desc_ops = &qca988x_rx_desc_ops,
616 .hw_ops = &qca6174_ops,
617 .hw_clk = qca6174_clk,
618 .target_cpu_freq = 176000000,
619 .decap_align_bytes = 4,
620 .spectral_bin_discard = 0,
621 .spectral_bin_offset = 0,
622 .vht160_mcs_rx_highest = 0,
623 .vht160_mcs_tx_highest = 0,
624 .n_cipher_suites = 8,
625 .ast_skid_limit = 0x10,
626 .num_wds_entries = 0x20,
627 .target_64bit = false,
628 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
629 .shadow_reg_support = false,
630 .rri_on_ddr = false,
631 .hw_filter_reset_required = true,
632 .fw_diag_ce_download = true,
633 .credit_size_workaround = false,
634 .tx_stats_over_pktlog = false,
635 .dynamic_sar_support = false,
636 .hw_restart_disconnect = false,
637 .use_fw_tx_credits = true,
638 .delay_unmap_buffer = false,
639 .mcast_frame_registration = false,
640 },
641 {
642 .id = QCA9377_HW_1_1_DEV_VERSION,
643 .dev_id = QCA9377_1_0_DEVICE_ID,
644 .bus = ATH10K_BUS_SDIO,
645 .name = "qca9377 hw1.1 sdio",
646 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
647 .uart_pin = 19,
648 .led_pin = 0,
649 .otp_exe_param = 0,
650 .channel_counters_freq_hz = 88000,
651 .max_probe_resp_desc_thres = 0,
652 .cal_data_len = 8124,
653 .fw = {
654 .dir = QCA9377_HW_1_0_FW_DIR,
655 .board_size = QCA9377_BOARD_DATA_SZ,
656 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
657 },
658 .rx_desc_ops = &qca988x_rx_desc_ops,
659 .hw_ops = &qca6174_ops,
660 .hw_clk = qca6174_clk,
661 .target_cpu_freq = 176000000,
662 .decap_align_bytes = 4,
663 .n_cipher_suites = 8,
664 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
665 .ast_skid_limit = 0x10,
666 .num_wds_entries = 0x20,
667 .uart_pin_workaround = true,
668 .credit_size_workaround = true,
669 .dynamic_sar_support = false,
670 .hw_restart_disconnect = false,
671 .use_fw_tx_credits = true,
672 .delay_unmap_buffer = false,
673 .mcast_frame_registration = false,
674 },
675 {
676 .id = QCA4019_HW_1_0_DEV_VERSION,
677 .dev_id = 0,
678 .bus = ATH10K_BUS_AHB,
679 .name = "qca4019 hw1.0",
680 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
681 .uart_pin = 7,
682 .led_pin = 0,
683 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
684 .otp_exe_param = 0x0010000,
685 .continuous_frag_desc = true,
686 .cck_rate_map_rev2 = true,
687 .channel_counters_freq_hz = 125000,
688 .max_probe_resp_desc_thres = 24,
689 .tx_chain_mask = 0x3,
690 .rx_chain_mask = 0x3,
691 .max_spatial_stream = 2,
692 .cal_data_len = 12064,
693 .fw = {
694 .dir = QCA4019_HW_1_0_FW_DIR,
695 .board_size = QCA4019_BOARD_DATA_SZ,
696 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
697 },
698 .sw_decrypt_mcast_mgmt = true,
699 .rx_desc_ops = &qca99x0_rx_desc_ops,
700 .hw_ops = &qca99x0_ops,
701 .decap_align_bytes = 1,
702 .spectral_bin_discard = 4,
703 .spectral_bin_offset = 0,
704 .vht160_mcs_rx_highest = 0,
705 .vht160_mcs_tx_highest = 0,
706 .n_cipher_suites = 11,
707 .ast_skid_limit = 0x10,
708 .num_wds_entries = 0x20,
709 .target_64bit = false,
710 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
711 .shadow_reg_support = false,
712 .rri_on_ddr = false,
713 .hw_filter_reset_required = true,
714 .fw_diag_ce_download = false,
715 .credit_size_workaround = false,
716 .tx_stats_over_pktlog = false,
717 .dynamic_sar_support = false,
718 .hw_restart_disconnect = false,
719 .use_fw_tx_credits = true,
720 .delay_unmap_buffer = false,
721 .mcast_frame_registration = false,
722 },
723 {
724 .id = WCN3990_HW_1_0_DEV_VERSION,
725 .dev_id = 0,
726 .bus = ATH10K_BUS_SNOC,
727 .name = "wcn3990 hw1.0",
728 .led_pin = 0,
729 .continuous_frag_desc = true,
730 .tx_chain_mask = 0x7,
731 .rx_chain_mask = 0x7,
732 .max_spatial_stream = 4,
733 .fw = {
734 .dir = WCN3990_HW_1_0_FW_DIR,
735 .board_size = WCN3990_BOARD_DATA_SZ,
736 .board_ext_size = WCN3990_BOARD_EXT_DATA_SZ,
737 },
738 .sw_decrypt_mcast_mgmt = true,
739 .rx_desc_ops = &wcn3990_rx_desc_ops,
740 .hw_ops = &wcn3990_ops,
741 .decap_align_bytes = 1,
742 .num_peers = TARGET_HL_TLV_NUM_PEERS,
743 .n_cipher_suites = 11,
744 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
745 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
746 .target_64bit = true,
747 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
748 .shadow_reg_support = true,
749 .rri_on_ddr = true,
750 .hw_filter_reset_required = false,
751 .fw_diag_ce_download = false,
752 .credit_size_workaround = false,
753 .tx_stats_over_pktlog = false,
754 .dynamic_sar_support = true,
755 .hw_restart_disconnect = true,
756 .use_fw_tx_credits = false,
757 .delay_unmap_buffer = true,
758 .mcast_frame_registration = false,
759 },
760 };
761
762 static const char *const ath10k_core_fw_feature_str[] = {
763 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
764 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
765 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
766 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
767 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
768 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
769 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
770 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
771 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
772 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
773 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
774 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
775 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
776 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
777 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
778 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
779 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
780 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
781 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
782 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
783 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
784 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
785 [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
786 };
787
ath10k_core_get_fw_feature_str(char * buf,size_t buf_len,enum ath10k_fw_features feat)788 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
789 size_t buf_len,
790 enum ath10k_fw_features feat)
791 {
792 /* make sure that ath10k_core_fw_feature_str[] gets updated */
793 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
794 ATH10K_FW_FEATURE_COUNT);
795
796 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
797 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
798 return scnprintf(buf, buf_len, "bit%d", feat);
799 }
800
801 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
802 }
803
ath10k_core_get_fw_features_str(struct ath10k * ar,char * buf,size_t buf_len)804 void ath10k_core_get_fw_features_str(struct ath10k *ar,
805 char *buf,
806 size_t buf_len)
807 {
808 size_t len = 0;
809 int i;
810
811 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
812 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
813 if (len > 0)
814 len += scnprintf(buf + len, buf_len - len, ",");
815
816 len += ath10k_core_get_fw_feature_str(buf + len,
817 buf_len - len,
818 i);
819 }
820 }
821 }
822
ath10k_send_suspend_complete(struct ath10k * ar)823 static void ath10k_send_suspend_complete(struct ath10k *ar)
824 {
825 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
826
827 complete(&ar->target_suspend);
828 }
829
ath10k_init_sdio(struct ath10k * ar,enum ath10k_firmware_mode mode)830 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
831 {
832 bool mtu_workaround = ar->hw_params.credit_size_workaround;
833 int ret;
834 u32 param = 0;
835
836 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
837 if (ret)
838 return ret;
839
840 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
841 if (ret)
842 return ret;
843
844 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m);
845 if (ret)
846 return ret;
847
848 param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
849
850 if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
851 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
852 else
853 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
854
855 if (mode == ATH10K_FIRMWARE_MODE_UTF)
856 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
857 else
858 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
859
860 ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
861 if (ret)
862 return ret;
863
864 ret = ath10k_bmi_read32(ar, hi_option_flag2, ¶m);
865 if (ret)
866 return ret;
867
868 param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
869
870 ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
871 if (ret)
872 return ret;
873
874 return 0;
875 }
876
ath10k_init_configure_target(struct ath10k * ar)877 static int ath10k_init_configure_target(struct ath10k *ar)
878 {
879 u32 param_host;
880 int ret;
881
882 /* tell target which HTC version it is used*/
883 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
884 HTC_PROTOCOL_VERSION);
885 if (ret) {
886 ath10k_err(ar, "settings HTC version failed\n");
887 return ret;
888 }
889
890 /* set the firmware mode to STA/IBSS/AP */
891 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
892 if (ret) {
893 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
894 return ret;
895 }
896
897 /* TODO following parameters need to be re-visited. */
898 /* num_device */
899 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
900 /* Firmware mode */
901 /* FIXME: Why FW_MODE_AP ??.*/
902 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
903 /* mac_addr_method */
904 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
905 /* firmware_bridge */
906 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
907 /* fwsubmode */
908 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
909
910 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
911 if (ret) {
912 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
913 return ret;
914 }
915
916 /* We do all byte-swapping on the host */
917 ret = ath10k_bmi_write32(ar, hi_be, 0);
918 if (ret) {
919 ath10k_err(ar, "setting host CPU BE mode failed\n");
920 return ret;
921 }
922
923 /* FW descriptor/Data swap flags */
924 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
925
926 if (ret) {
927 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
928 return ret;
929 }
930
931 /* Some devices have a special sanity check that verifies the PCI
932 * Device ID is written to this host interest var. It is known to be
933 * required to boot QCA6164.
934 */
935 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
936 ar->dev_id);
937 if (ret) {
938 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
939 return ret;
940 }
941
942 return 0;
943 }
944
ath10k_fetch_fw_file(struct ath10k * ar,const char * dir,const char * file)945 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
946 const char *dir,
947 const char *file)
948 {
949 char filename[100];
950 const struct firmware *fw;
951 int ret;
952
953 if (file == NULL)
954 return ERR_PTR(-ENOENT);
955
956 if (dir == NULL)
957 dir = ".";
958
959 if (ar->board_name) {
960 snprintf(filename, sizeof(filename), "%s/%s/%s",
961 dir, ar->board_name, file);
962 ret = firmware_request_nowarn(&fw, filename, ar->dev);
963 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
964 filename, ret);
965 if (!ret)
966 return fw;
967 }
968
969 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
970 ret = firmware_request_nowarn(&fw, filename, ar->dev);
971 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
972 filename, ret);
973 if (ret)
974 return ERR_PTR(ret);
975
976 return fw;
977 }
978
979 #if defined(__linux__)
ath10k_push_board_ext_data(struct ath10k * ar,const void * data,size_t data_len)980 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
981 #elif defined(__FreeBSD__)
982 static int ath10k_push_board_ext_data(struct ath10k *ar, const u8 *data,
983 #endif
984 size_t data_len)
985 {
986 u32 board_data_size = ar->hw_params.fw.board_size;
987 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
988 u32 board_ext_data_addr;
989 int ret;
990
991 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
992 if (ret) {
993 ath10k_err(ar, "could not read board ext data addr (%d)\n",
994 ret);
995 return ret;
996 }
997
998 ath10k_dbg(ar, ATH10K_DBG_BOOT,
999 "boot push board extended data addr 0x%x\n",
1000 board_ext_data_addr);
1001
1002 if (board_ext_data_addr == 0)
1003 return 0;
1004
1005 if (data_len != (board_data_size + board_ext_data_size)) {
1006 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
1007 data_len, board_data_size, board_ext_data_size);
1008 return -EINVAL;
1009 }
1010
1011 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
1012 data + board_data_size,
1013 board_ext_data_size);
1014 if (ret) {
1015 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
1016 return ret;
1017 }
1018
1019 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
1020 (board_ext_data_size << 16) | 1);
1021 if (ret) {
1022 ath10k_err(ar, "could not write board ext data bit (%d)\n",
1023 ret);
1024 return ret;
1025 }
1026
1027 return 0;
1028 }
1029
ath10k_core_get_board_id_from_otp(struct ath10k * ar)1030 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
1031 {
1032 u32 result, address;
1033 u8 board_id, chip_id;
1034 bool ext_bid_support;
1035 int ret, bmi_board_id_param;
1036
1037 address = ar->hw_params.patch_load_addr;
1038
1039 if (!ar->normal_mode_fw.fw_file.otp_data ||
1040 !ar->normal_mode_fw.fw_file.otp_len) {
1041 ath10k_warn(ar,
1042 "failed to retrieve board id because of invalid otp\n");
1043 return -ENODATA;
1044 }
1045
1046 if (ar->id.bmi_ids_valid) {
1047 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1048 "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
1049 ar->id.bmi_board_id, ar->id.bmi_chip_id);
1050 goto skip_otp_download;
1051 }
1052
1053 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1054 "boot upload otp to 0x%x len %zd for board id\n",
1055 address, ar->normal_mode_fw.fw_file.otp_len);
1056
1057 ret = ath10k_bmi_fast_download(ar, address,
1058 ar->normal_mode_fw.fw_file.otp_data,
1059 ar->normal_mode_fw.fw_file.otp_len);
1060 if (ret) {
1061 ath10k_err(ar, "could not write otp for board id check: %d\n",
1062 ret);
1063 return ret;
1064 }
1065
1066 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1067 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1068 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1069 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
1070 else
1071 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
1072
1073 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
1074 if (ret) {
1075 ath10k_err(ar, "could not execute otp for board id check: %d\n",
1076 ret);
1077 return ret;
1078 }
1079
1080 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
1081 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
1082 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
1083
1084 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1085 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
1086 result, board_id, chip_id, ext_bid_support);
1087
1088 ar->id.ext_bid_supported = ext_bid_support;
1089
1090 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
1091 (board_id == 0)) {
1092 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1093 "board id does not exist in otp, ignore it\n");
1094 return -EOPNOTSUPP;
1095 }
1096
1097 ar->id.bmi_ids_valid = true;
1098 ar->id.bmi_board_id = board_id;
1099 ar->id.bmi_chip_id = chip_id;
1100
1101 skip_otp_download:
1102
1103 return 0;
1104 }
1105
ath10k_core_check_bdfext(const struct dmi_header * hdr,void * data)1106 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
1107 {
1108 struct ath10k *ar = data;
1109 const char *bdf_ext;
1110 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
1111 u8 bdf_enabled;
1112 int i;
1113
1114 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
1115 return;
1116
1117 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
1118 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1119 "wrong smbios bdf ext type length (%d).\n",
1120 hdr->length);
1121 return;
1122 }
1123
1124 #if defined(__linux__)
1125 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1126 #elif defined(__FreeBSD__)
1127 bdf_enabled = *((const u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1128 #endif
1129 if (!bdf_enabled) {
1130 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
1131 return;
1132 }
1133
1134 /* Only one string exists (per spec) */
1135 #if defined(__linux__)
1136 bdf_ext = (char *)hdr + hdr->length;
1137 #elif defined(__FreeBSD__)
1138 bdf_ext = (const char *)hdr + hdr->length;
1139 #endif
1140
1141 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1142 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1143 "bdf variant magic does not match.\n");
1144 return;
1145 }
1146
1147 for (i = 0; i < strlen(bdf_ext); i++) {
1148 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1149 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1150 "bdf variant name contains non ascii chars.\n");
1151 return;
1152 }
1153 }
1154
1155 /* Copy extension name without magic suffix */
1156 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1157 sizeof(ar->id.bdf_ext)) < 0) {
1158 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1159 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1160 bdf_ext);
1161 return;
1162 }
1163
1164 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1165 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1166 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1167 }
1168
ath10k_core_check_smbios(struct ath10k * ar)1169 static int ath10k_core_check_smbios(struct ath10k *ar)
1170 {
1171 ar->id.bdf_ext[0] = '\0';
1172 dmi_walk(ath10k_core_check_bdfext, ar);
1173
1174 if (ar->id.bdf_ext[0] == '\0')
1175 return -ENODATA;
1176
1177 return 0;
1178 }
1179
ath10k_core_check_dt(struct ath10k * ar)1180 int ath10k_core_check_dt(struct ath10k *ar)
1181 {
1182 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
1183 struct device_node *node;
1184 const char *variant = NULL;
1185
1186 node = ar->dev->of_node;
1187 if (!node)
1188 return -ENOENT;
1189
1190 of_property_read_string(node, "qcom,calibration-variant",
1191 &variant);
1192 if (!variant)
1193 of_property_read_string(node, "qcom,ath10k-calibration-variant",
1194 &variant);
1195 if (!variant)
1196 return -ENODATA;
1197
1198 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1199 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1200 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1201 variant);
1202
1203 return 0;
1204 #else
1205 return -ENOENT;
1206 #endif
1207 }
1208 EXPORT_SYMBOL(ath10k_core_check_dt);
1209
ath10k_download_fw(struct ath10k * ar)1210 static int ath10k_download_fw(struct ath10k *ar)
1211 {
1212 u32 address, data_len;
1213 const void *data;
1214 int ret;
1215 struct pm_qos_request latency_qos;
1216
1217 address = ar->hw_params.patch_load_addr;
1218
1219 data = ar->running_fw->fw_file.firmware_data;
1220 data_len = ar->running_fw->fw_file.firmware_len;
1221
1222 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1223 if (ret) {
1224 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1225 ret);
1226 return ret;
1227 }
1228
1229 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1230 "boot uploading firmware image %p len %d\n",
1231 data, data_len);
1232
1233 /* Check if device supports to download firmware via
1234 * diag copy engine. Downloading firmware via diag CE
1235 * greatly reduces the time to download firmware.
1236 */
1237 if (ar->hw_params.fw_diag_ce_download) {
1238 ret = ath10k_hw_diag_fast_download(ar, address,
1239 data, data_len);
1240 if (ret == 0)
1241 /* firmware upload via diag ce was successful */
1242 return 0;
1243
1244 ath10k_warn(ar,
1245 "failed to upload firmware via diag ce, trying BMI: %d",
1246 ret);
1247 }
1248
1249 memset(&latency_qos, 0, sizeof(latency_qos));
1250 cpu_latency_qos_add_request(&latency_qos, 0);
1251
1252 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1253
1254 cpu_latency_qos_remove_request(&latency_qos);
1255
1256 return ret;
1257 }
1258
ath10k_core_free_board_files(struct ath10k * ar)1259 void ath10k_core_free_board_files(struct ath10k *ar)
1260 {
1261 if (!IS_ERR(ar->normal_mode_fw.board))
1262 release_firmware(ar->normal_mode_fw.board);
1263
1264 if (!IS_ERR(ar->normal_mode_fw.ext_board))
1265 release_firmware(ar->normal_mode_fw.ext_board);
1266
1267 ar->normal_mode_fw.board = NULL;
1268 ar->normal_mode_fw.board_data = NULL;
1269 ar->normal_mode_fw.board_len = 0;
1270 ar->normal_mode_fw.ext_board = NULL;
1271 ar->normal_mode_fw.ext_board_data = NULL;
1272 ar->normal_mode_fw.ext_board_len = 0;
1273 }
1274 EXPORT_SYMBOL(ath10k_core_free_board_files);
1275
ath10k_core_free_firmware_files(struct ath10k * ar)1276 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1277 {
1278 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1279 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1280
1281 if (!IS_ERR(ar->cal_file))
1282 release_firmware(ar->cal_file);
1283
1284 if (!IS_ERR(ar->pre_cal_file))
1285 release_firmware(ar->pre_cal_file);
1286
1287 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1288
1289 ar->normal_mode_fw.fw_file.otp_data = NULL;
1290 ar->normal_mode_fw.fw_file.otp_len = 0;
1291
1292 ar->normal_mode_fw.fw_file.firmware = NULL;
1293 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1294 ar->normal_mode_fw.fw_file.firmware_len = 0;
1295
1296 ar->cal_file = NULL;
1297 ar->pre_cal_file = NULL;
1298 }
1299
ath10k_fetch_cal_file(struct ath10k * ar)1300 static int ath10k_fetch_cal_file(struct ath10k *ar)
1301 {
1302 char filename[100];
1303
1304 /* pre-cal-<bus>-<id>.bin */
1305 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1306 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1307
1308 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1309 if (!IS_ERR(ar->pre_cal_file))
1310 goto success;
1311
1312 /* cal-<bus>-<id>.bin */
1313 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1314 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1315
1316 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1317 if (IS_ERR(ar->cal_file))
1318 /* calibration file is optional, don't print any warnings */
1319 return PTR_ERR(ar->cal_file);
1320 success:
1321 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1322 ATH10K_FW_DIR, filename);
1323
1324 return 0;
1325 }
1326
ath10k_core_fetch_board_data_api_1(struct ath10k * ar,int bd_ie_type)1327 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1328 {
1329 const struct firmware *fw;
1330 char boardname[100];
1331
1332 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1333 scnprintf(boardname, sizeof(boardname), "board-%s-%s.bin",
1334 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1335
1336 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1337 ar->hw_params.fw.dir,
1338 boardname);
1339 if (IS_ERR(ar->normal_mode_fw.board)) {
1340 fw = ath10k_fetch_fw_file(ar,
1341 ar->hw_params.fw.dir,
1342 ATH10K_BOARD_DATA_FILE);
1343 ar->normal_mode_fw.board = fw;
1344 }
1345
1346 if (IS_ERR(ar->normal_mode_fw.board))
1347 return PTR_ERR(ar->normal_mode_fw.board);
1348
1349 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1350 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1351 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1352 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1353 ATH10K_EBOARD_DATA_FILE);
1354 ar->normal_mode_fw.ext_board = fw;
1355 if (IS_ERR(ar->normal_mode_fw.ext_board))
1356 return PTR_ERR(ar->normal_mode_fw.ext_board);
1357
1358 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1359 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1360 }
1361
1362 return 0;
1363 }
1364
ath10k_core_parse_bd_ie_board(struct ath10k * ar,const void * buf,size_t buf_len,const char * boardname,int bd_ie_type)1365 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1366 #if defined(__linux__)
1367 const void *buf, size_t buf_len,
1368 #elif defined(__FreeBSD__)
1369 const u8 *buf, size_t buf_len,
1370 #endif
1371 const char *boardname,
1372 int bd_ie_type)
1373 {
1374 const struct ath10k_fw_ie *hdr;
1375 bool name_match_found;
1376 int ret, board_ie_id;
1377 size_t board_ie_len;
1378 const void *board_ie_data;
1379
1380 name_match_found = false;
1381
1382 /* go through ATH10K_BD_IE_BOARD_ elements */
1383 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1384 #if defined(__linux__)
1385 hdr = buf;
1386 #elif defined(__FreeBSD__)
1387 hdr = (const void *)buf;
1388 #endif
1389 board_ie_id = le32_to_cpu(hdr->id);
1390 board_ie_len = le32_to_cpu(hdr->len);
1391 board_ie_data = hdr->data;
1392
1393 buf_len -= sizeof(*hdr);
1394 buf += sizeof(*hdr);
1395
1396 if (buf_len < ALIGN(board_ie_len, 4)) {
1397 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1398 buf_len, ALIGN(board_ie_len, 4));
1399 ret = -EINVAL;
1400 goto out;
1401 }
1402
1403 switch (board_ie_id) {
1404 case ATH10K_BD_IE_BOARD_NAME:
1405 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1406 board_ie_data, board_ie_len);
1407
1408 if (board_ie_len != strlen(boardname))
1409 break;
1410
1411 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1412 if (ret)
1413 break;
1414
1415 name_match_found = true;
1416 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1417 "boot found match for name '%s'",
1418 boardname);
1419 break;
1420 case ATH10K_BD_IE_BOARD_DATA:
1421 if (!name_match_found)
1422 /* no match found */
1423 break;
1424
1425 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1426 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1427 "boot found board data for '%s'",
1428 boardname);
1429
1430 ar->normal_mode_fw.board_data = board_ie_data;
1431 ar->normal_mode_fw.board_len = board_ie_len;
1432 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1433 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1434 "boot found eboard data for '%s'",
1435 boardname);
1436
1437 ar->normal_mode_fw.ext_board_data = board_ie_data;
1438 ar->normal_mode_fw.ext_board_len = board_ie_len;
1439 }
1440
1441 ret = 0;
1442 goto out;
1443 default:
1444 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1445 board_ie_id);
1446 break;
1447 }
1448
1449 /* jump over the padding */
1450 board_ie_len = ALIGN(board_ie_len, 4);
1451
1452 buf_len -= board_ie_len;
1453 buf += board_ie_len;
1454 }
1455
1456 /* no match found */
1457 ret = -ENOENT;
1458
1459 out:
1460 return ret;
1461 }
1462
ath10k_core_search_bd(struct ath10k * ar,const char * boardname,const u8 * data,size_t len)1463 static int ath10k_core_search_bd(struct ath10k *ar,
1464 const char *boardname,
1465 const u8 *data,
1466 size_t len)
1467 {
1468 size_t ie_len;
1469 #if defined(__linux__)
1470 struct ath10k_fw_ie *hdr;
1471 #elif defined(__FreeBSD__)
1472 const struct ath10k_fw_ie *hdr;
1473 #endif
1474 int ret = -ENOENT, ie_id;
1475
1476 while (len > sizeof(struct ath10k_fw_ie)) {
1477 #if defined(__linux__)
1478 hdr = (struct ath10k_fw_ie *)data;
1479 #elif defined(__FreeBSD__)
1480 hdr = (const struct ath10k_fw_ie *)data;
1481 #endif
1482 ie_id = le32_to_cpu(hdr->id);
1483 ie_len = le32_to_cpu(hdr->len);
1484
1485 len -= sizeof(*hdr);
1486 data = hdr->data;
1487
1488 if (len < ALIGN(ie_len, 4)) {
1489 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1490 ie_id, ie_len, len);
1491 return -EINVAL;
1492 }
1493
1494 switch (ie_id) {
1495 case ATH10K_BD_IE_BOARD:
1496 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1497 boardname,
1498 ATH10K_BD_IE_BOARD);
1499 if (ret == -ENOENT)
1500 /* no match found, continue */
1501 break;
1502
1503 /* either found or error, so stop searching */
1504 goto out;
1505 case ATH10K_BD_IE_BOARD_EXT:
1506 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1507 boardname,
1508 ATH10K_BD_IE_BOARD_EXT);
1509 if (ret == -ENOENT)
1510 /* no match found, continue */
1511 break;
1512
1513 /* either found or error, so stop searching */
1514 goto out;
1515 }
1516
1517 /* jump over the padding */
1518 ie_len = ALIGN(ie_len, 4);
1519
1520 len -= ie_len;
1521 data += ie_len;
1522 }
1523
1524 out:
1525 /* return result of parse_bd_ie_board() or -ENOENT */
1526 return ret;
1527 }
1528
ath10k_core_fetch_board_data_api_n(struct ath10k * ar,const char * boardname,const char * fallback_boardname1,const char * fallback_boardname2,const char * filename)1529 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1530 const char *boardname,
1531 const char *fallback_boardname1,
1532 const char *fallback_boardname2,
1533 const char *filename)
1534 {
1535 size_t len, magic_len;
1536 const u8 *data;
1537 int ret;
1538
1539 /* Skip if already fetched during board data download */
1540 if (!ar->normal_mode_fw.board)
1541 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1542 ar->hw_params.fw.dir,
1543 filename);
1544 if (IS_ERR(ar->normal_mode_fw.board))
1545 return PTR_ERR(ar->normal_mode_fw.board);
1546
1547 data = ar->normal_mode_fw.board->data;
1548 len = ar->normal_mode_fw.board->size;
1549
1550 /* magic has extra null byte padded */
1551 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1552 if (len < magic_len) {
1553 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1554 ar->hw_params.fw.dir, filename, len);
1555 ret = -EINVAL;
1556 goto err;
1557 }
1558
1559 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1560 ath10k_err(ar, "found invalid board magic\n");
1561 ret = -EINVAL;
1562 goto err;
1563 }
1564
1565 /* magic is padded to 4 bytes */
1566 magic_len = ALIGN(magic_len, 4);
1567 if (len < magic_len) {
1568 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1569 ar->hw_params.fw.dir, filename, len);
1570 ret = -EINVAL;
1571 goto err;
1572 }
1573
1574 data += magic_len;
1575 len -= magic_len;
1576
1577 /* attempt to find boardname in the IE list */
1578 ret = ath10k_core_search_bd(ar, boardname, data, len);
1579
1580 /* if we didn't find it and have a fallback name, try that */
1581 if (ret == -ENOENT && fallback_boardname1)
1582 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1583
1584 if (ret == -ENOENT && fallback_boardname2)
1585 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1586
1587 if (ret == -ENOENT) {
1588 ath10k_err(ar,
1589 "failed to fetch board data for %s from %s/%s\n",
1590 boardname, ar->hw_params.fw.dir, filename);
1591 ret = -ENODATA;
1592 }
1593
1594 if (ret)
1595 goto err;
1596
1597 return 0;
1598
1599 err:
1600 ath10k_core_free_board_files(ar);
1601 return ret;
1602 }
1603
ath10k_core_create_board_name(struct ath10k * ar,char * name,size_t name_len,bool with_variant,bool with_chip_id)1604 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1605 size_t name_len, bool with_variant,
1606 bool with_chip_id)
1607 {
1608 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1609 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = {};
1610
1611 if (with_variant && ar->id.bdf_ext[0] != '\0')
1612 scnprintf(variant, sizeof(variant), ",variant=%s",
1613 ar->id.bdf_ext);
1614
1615 if (ar->id.bmi_ids_valid) {
1616 scnprintf(name, name_len,
1617 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1618 ath10k_bus_str(ar->hif.bus),
1619 ar->id.bmi_chip_id,
1620 ar->id.bmi_board_id, variant);
1621 goto out;
1622 }
1623
1624 if (ar->id.qmi_ids_valid) {
1625 if (with_chip_id)
1626 scnprintf(name, name_len,
1627 "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1628 ath10k_bus_str(ar->hif.bus),
1629 ar->id.qmi_board_id, ar->id.qmi_chip_id,
1630 variant);
1631 else
1632 scnprintf(name, name_len,
1633 "bus=%s,qmi-board-id=%x",
1634 ath10k_bus_str(ar->hif.bus),
1635 ar->id.qmi_board_id);
1636 goto out;
1637 }
1638
1639 scnprintf(name, name_len,
1640 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1641 ath10k_bus_str(ar->hif.bus),
1642 ar->id.vendor, ar->id.device,
1643 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1644 out:
1645 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1646
1647 return 0;
1648 }
1649
ath10k_core_create_eboard_name(struct ath10k * ar,char * name,size_t name_len)1650 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1651 size_t name_len)
1652 {
1653 if (ar->id.bmi_ids_valid) {
1654 scnprintf(name, name_len,
1655 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1656 ath10k_bus_str(ar->hif.bus),
1657 ar->id.bmi_chip_id,
1658 ar->id.bmi_eboard_id);
1659
1660 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1661 return 0;
1662 }
1663 /* Fallback if returned board id is zero */
1664 return -1;
1665 }
1666
ath10k_core_fetch_board_file(struct ath10k * ar,int bd_ie_type)1667 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1668 {
1669 char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1670 int ret;
1671
1672 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1673 /* With variant and chip id */
1674 ret = ath10k_core_create_board_name(ar, boardname,
1675 sizeof(boardname), true,
1676 true);
1677 if (ret) {
1678 ath10k_err(ar, "failed to create board name: %d", ret);
1679 return ret;
1680 }
1681
1682 /* Without variant and only chip-id */
1683 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1684 sizeof(boardname), false,
1685 true);
1686 if (ret) {
1687 ath10k_err(ar, "failed to create 1st fallback board name: %d",
1688 ret);
1689 return ret;
1690 }
1691
1692 /* Without variant and without chip-id */
1693 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1694 sizeof(boardname), false,
1695 false);
1696 if (ret) {
1697 ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1698 ret);
1699 return ret;
1700 }
1701 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1702 ret = ath10k_core_create_eboard_name(ar, boardname,
1703 sizeof(boardname));
1704 if (ret) {
1705 ath10k_err(ar, "fallback to eboard.bin since board id 0");
1706 goto fallback;
1707 }
1708 }
1709
1710 ar->bd_api = 2;
1711 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1712 fallback_boardname1,
1713 fallback_boardname2,
1714 ATH10K_BOARD_API2_FILE);
1715 if (!ret)
1716 goto success;
1717
1718 fallback:
1719 ar->bd_api = 1;
1720 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1721 if (ret) {
1722 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1723 ar->hw_params.fw.dir);
1724 return ret;
1725 }
1726
1727 success:
1728 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1729 return 0;
1730 }
1731 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1732
ath10k_core_get_ext_board_id_from_otp(struct ath10k * ar)1733 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1734 {
1735 u32 result, address;
1736 u8 ext_board_id;
1737 int ret;
1738
1739 address = ar->hw_params.patch_load_addr;
1740
1741 if (!ar->normal_mode_fw.fw_file.otp_data ||
1742 !ar->normal_mode_fw.fw_file.otp_len) {
1743 ath10k_warn(ar,
1744 "failed to retrieve extended board id due to otp binary missing\n");
1745 return -ENODATA;
1746 }
1747
1748 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1749 "boot upload otp to 0x%x len %zd for ext board id\n",
1750 address, ar->normal_mode_fw.fw_file.otp_len);
1751
1752 ret = ath10k_bmi_fast_download(ar, address,
1753 ar->normal_mode_fw.fw_file.otp_data,
1754 ar->normal_mode_fw.fw_file.otp_len);
1755 if (ret) {
1756 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1757 ret);
1758 return ret;
1759 }
1760
1761 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1762 if (ret) {
1763 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1764 ret);
1765 return ret;
1766 }
1767
1768 if (!result) {
1769 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1770 "ext board id does not exist in otp, ignore it\n");
1771 return -EOPNOTSUPP;
1772 }
1773
1774 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1775
1776 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1777 "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1778 result, ext_board_id);
1779
1780 ar->id.bmi_eboard_id = ext_board_id;
1781
1782 return 0;
1783 }
1784
ath10k_download_board_data(struct ath10k * ar,const void * data,size_t data_len)1785 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1786 size_t data_len)
1787 {
1788 u32 board_data_size = ar->hw_params.fw.board_size;
1789 u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1790 u32 board_address;
1791 u32 ext_board_address;
1792 int ret;
1793
1794 ret = ath10k_push_board_ext_data(ar, data, data_len);
1795 if (ret) {
1796 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1797 goto exit;
1798 }
1799
1800 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1801 if (ret) {
1802 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1803 goto exit;
1804 }
1805
1806 ret = ath10k_bmi_write_memory(ar, board_address, data,
1807 min_t(u32, board_data_size,
1808 data_len));
1809 if (ret) {
1810 ath10k_err(ar, "could not write board data (%d)\n", ret);
1811 goto exit;
1812 }
1813
1814 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1815 if (ret) {
1816 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1817 goto exit;
1818 }
1819
1820 if (!ar->id.ext_bid_supported)
1821 goto exit;
1822
1823 /* Extended board data download */
1824 ret = ath10k_core_get_ext_board_id_from_otp(ar);
1825 if (ret == -EOPNOTSUPP) {
1826 /* Not fetching ext_board_data if ext board id is 0 */
1827 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1828 return 0;
1829 } else if (ret) {
1830 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1831 goto exit;
1832 }
1833
1834 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1835 if (ret)
1836 goto exit;
1837
1838 if (ar->normal_mode_fw.ext_board_data) {
1839 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1840 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1841 "boot writing ext board data to addr 0x%x",
1842 ext_board_address);
1843 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1844 ar->normal_mode_fw.ext_board_data,
1845 min_t(u32, eboard_data_size, data_len));
1846 if (ret)
1847 ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1848 }
1849
1850 exit:
1851 return ret;
1852 }
1853
ath10k_download_and_run_otp(struct ath10k * ar)1854 static int ath10k_download_and_run_otp(struct ath10k *ar)
1855 {
1856 u32 result, address = ar->hw_params.patch_load_addr;
1857 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1858 int ret;
1859
1860 ret = ath10k_download_board_data(ar,
1861 ar->running_fw->board_data,
1862 ar->running_fw->board_len);
1863 if (ret) {
1864 ath10k_err(ar, "failed to download board data: %d\n", ret);
1865 return ret;
1866 }
1867
1868 /* OTP is optional */
1869
1870 if (!ar->running_fw->fw_file.otp_data ||
1871 !ar->running_fw->fw_file.otp_len) {
1872 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
1873 ar->running_fw->fw_file.otp_data,
1874 ar->running_fw->fw_file.otp_len);
1875 return 0;
1876 }
1877
1878 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1879 address, ar->running_fw->fw_file.otp_len);
1880
1881 ret = ath10k_bmi_fast_download(ar, address,
1882 ar->running_fw->fw_file.otp_data,
1883 ar->running_fw->fw_file.otp_len);
1884 if (ret) {
1885 ath10k_err(ar, "could not write otp (%d)\n", ret);
1886 return ret;
1887 }
1888
1889 /* As of now pre-cal is valid for 10_4 variants */
1890 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1891 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1892 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1893 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1894
1895 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1896 if (ret) {
1897 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1898 return ret;
1899 }
1900
1901 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1902
1903 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1904 ar->running_fw->fw_file.fw_features)) &&
1905 result != 0) {
1906 ath10k_err(ar, "otp calibration failed: %d", result);
1907 return -EINVAL;
1908 }
1909
1910 return 0;
1911 }
1912
ath10k_download_cal_file(struct ath10k * ar,const struct firmware * file)1913 static int ath10k_download_cal_file(struct ath10k *ar,
1914 const struct firmware *file)
1915 {
1916 int ret;
1917
1918 if (!file)
1919 return -ENOENT;
1920
1921 if (IS_ERR(file))
1922 return PTR_ERR(file);
1923
1924 ret = ath10k_download_board_data(ar, file->data, file->size);
1925 if (ret) {
1926 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1927 return ret;
1928 }
1929
1930 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1931
1932 return 0;
1933 }
1934
ath10k_download_cal_dt(struct ath10k * ar,const char * dt_name)1935 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1936 {
1937 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
1938 struct device_node *node;
1939 int data_len;
1940 void *data;
1941 int ret;
1942
1943 node = ar->dev->of_node;
1944 if (!node)
1945 /* Device Tree is optional, don't print any warnings if
1946 * there's no node for ath10k.
1947 */
1948 return -ENOENT;
1949
1950 if (!of_get_property(node, dt_name, &data_len)) {
1951 /* The calibration data node is optional */
1952 return -ENOENT;
1953 }
1954
1955 if (data_len != ar->hw_params.cal_data_len) {
1956 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1957 data_len);
1958 ret = -EMSGSIZE;
1959 goto out;
1960 }
1961
1962 data = kmalloc(data_len, GFP_KERNEL);
1963 if (!data) {
1964 ret = -ENOMEM;
1965 goto out;
1966 }
1967
1968 ret = of_property_read_u8_array(node, dt_name, data, data_len);
1969 if (ret) {
1970 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1971 ret);
1972 goto out_free;
1973 }
1974
1975 ret = ath10k_download_board_data(ar, data, data_len);
1976 if (ret) {
1977 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1978 ret);
1979 goto out_free;
1980 }
1981
1982 ret = 0;
1983
1984 out_free:
1985 kfree(data);
1986
1987 out:
1988 return ret;
1989 #else
1990 return -ENOENT;
1991 #endif
1992 }
1993
ath10k_download_cal_eeprom(struct ath10k * ar)1994 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1995 {
1996 size_t data_len;
1997 void *data = NULL;
1998 int ret;
1999
2000 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
2001 if (ret) {
2002 if (ret != -EOPNOTSUPP)
2003 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
2004 ret);
2005 goto out_free;
2006 }
2007
2008 ret = ath10k_download_board_data(ar, data, data_len);
2009 if (ret) {
2010 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
2011 ret);
2012 goto out_free;
2013 }
2014
2015 ret = 0;
2016
2017 out_free:
2018 kfree(data);
2019
2020 return ret;
2021 }
2022
ath10k_download_cal_nvmem(struct ath10k * ar,const char * cell_name)2023 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
2024 {
2025 #if defined(__linux__)
2026 struct nvmem_cell *cell;
2027 void *buf;
2028 size_t len;
2029 #endif
2030 int ret;
2031
2032 #if defined(__linux__)
2033 cell = devm_nvmem_cell_get(ar->dev, cell_name);
2034 if (IS_ERR(cell)) {
2035 ret = PTR_ERR(cell);
2036 return ret;
2037 }
2038
2039 buf = nvmem_cell_read(cell, &len);
2040 if (IS_ERR(buf))
2041 return PTR_ERR(buf);
2042
2043 if (ar->hw_params.cal_data_len != len) {
2044 kfree(buf);
2045 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
2046 cell_name, len, ar->hw_params.cal_data_len);
2047 return -EMSGSIZE;
2048 }
2049
2050 ret = ath10k_download_board_data(ar, buf, len);
2051 kfree(buf);
2052 #elif defined(__FreeBSD__)
2053 ret = -ENXIO;
2054 #endif
2055 if (ret)
2056 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
2057 cell_name, ret);
2058
2059 return ret;
2060 }
2061
ath10k_core_fetch_firmware_api_n(struct ath10k * ar,const char * name,struct ath10k_fw_file * fw_file)2062 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
2063 struct ath10k_fw_file *fw_file)
2064 {
2065 size_t magic_len, len, ie_len;
2066 int ie_id, i, index, bit, ret;
2067 #if defined(__linux__)
2068 struct ath10k_fw_ie *hdr;
2069 #elif defined(__FreeBSD__)
2070 const struct ath10k_fw_ie *hdr;
2071 #endif
2072 const u8 *data;
2073 #if defined(__linux__)
2074 __le32 *timestamp, *version;
2075 #elif defined(__FreeBSD__)
2076 const __le32 *timestamp, *version;
2077 #endif
2078
2079 /* first fetch the firmware file (firmware-*.bin) */
2080 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
2081 name);
2082 if (IS_ERR(fw_file->firmware))
2083 return PTR_ERR(fw_file->firmware);
2084
2085 data = fw_file->firmware->data;
2086 len = fw_file->firmware->size;
2087
2088 /* magic also includes the null byte, check that as well */
2089 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
2090
2091 if (len < magic_len) {
2092 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
2093 ar->hw_params.fw.dir, name, len);
2094 ret = -EINVAL;
2095 goto err;
2096 }
2097
2098 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
2099 ath10k_err(ar, "invalid firmware magic\n");
2100 ret = -EINVAL;
2101 goto err;
2102 }
2103
2104 /* jump over the padding */
2105 magic_len = ALIGN(magic_len, 4);
2106
2107 len -= magic_len;
2108 data += magic_len;
2109
2110 /* loop elements */
2111 while (len > sizeof(struct ath10k_fw_ie)) {
2112 #if defined(__linux__)
2113 hdr = (struct ath10k_fw_ie *)data;
2114 #elif defined(__FreeBSD__)
2115 hdr = (const struct ath10k_fw_ie *)data;
2116 #endif
2117
2118 ie_id = le32_to_cpu(hdr->id);
2119 ie_len = le32_to_cpu(hdr->len);
2120
2121 len -= sizeof(*hdr);
2122 data += sizeof(*hdr);
2123
2124 if (len < ie_len) {
2125 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
2126 ie_id, len, ie_len);
2127 ret = -EINVAL;
2128 goto err;
2129 }
2130
2131 switch (ie_id) {
2132 case ATH10K_FW_IE_FW_VERSION:
2133 if (ie_len > sizeof(fw_file->fw_version) - 1)
2134 break;
2135
2136 memcpy(fw_file->fw_version, data, ie_len);
2137 fw_file->fw_version[ie_len] = '\0';
2138
2139 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2140 "found fw version %s\n",
2141 fw_file->fw_version);
2142 break;
2143 case ATH10K_FW_IE_TIMESTAMP:
2144 if (ie_len != sizeof(u32))
2145 break;
2146
2147 #if defined(__linux__)
2148 timestamp = (__le32 *)data;
2149 #elif defined(__FreeBSD__)
2150 timestamp = (const __le32 *)data;
2151 #endif
2152
2153 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
2154 le32_to_cpup(timestamp));
2155 break;
2156 case ATH10K_FW_IE_FEATURES:
2157 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2158 "found firmware features ie (%zd B)\n",
2159 ie_len);
2160
2161 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
2162 index = i / 8;
2163 bit = i % 8;
2164
2165 if (index == ie_len)
2166 break;
2167
2168 if (data[index] & (1 << bit)) {
2169 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2170 "Enabling feature bit: %i\n",
2171 i);
2172 __set_bit(i, fw_file->fw_features);
2173 }
2174 }
2175
2176 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
2177 fw_file->fw_features,
2178 sizeof(fw_file->fw_features));
2179 break;
2180 case ATH10K_FW_IE_FW_IMAGE:
2181 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2182 "found fw image ie (%zd B)\n",
2183 ie_len);
2184
2185 fw_file->firmware_data = data;
2186 fw_file->firmware_len = ie_len;
2187
2188 break;
2189 case ATH10K_FW_IE_OTP_IMAGE:
2190 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2191 "found otp image ie (%zd B)\n",
2192 ie_len);
2193
2194 fw_file->otp_data = data;
2195 fw_file->otp_len = ie_len;
2196
2197 break;
2198 case ATH10K_FW_IE_WMI_OP_VERSION:
2199 if (ie_len != sizeof(u32))
2200 break;
2201
2202 #if defined(__linux__)
2203 version = (__le32 *)data;
2204 #elif defined(__FreeBSD__)
2205 version = (const __le32 *)data;
2206 #endif
2207
2208 fw_file->wmi_op_version = le32_to_cpup(version);
2209
2210 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
2211 fw_file->wmi_op_version);
2212 break;
2213 case ATH10K_FW_IE_HTT_OP_VERSION:
2214 if (ie_len != sizeof(u32))
2215 break;
2216
2217 #if defined(__linux__)
2218 version = (__le32 *)data;
2219 #elif defined(__FreeBSD__)
2220 version = (const __le32 *)data;
2221 #endif
2222
2223 fw_file->htt_op_version = le32_to_cpup(version);
2224
2225 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
2226 fw_file->htt_op_version);
2227 break;
2228 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
2229 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2230 "found fw code swap image ie (%zd B)\n",
2231 ie_len);
2232 fw_file->codeswap_data = data;
2233 fw_file->codeswap_len = ie_len;
2234 break;
2235 default:
2236 ath10k_warn(ar, "Unknown FW IE: %u\n",
2237 le32_to_cpu(hdr->id));
2238 break;
2239 }
2240
2241 /* jump over the padding */
2242 ie_len = ALIGN(ie_len, 4);
2243
2244 len -= ie_len;
2245 data += ie_len;
2246 }
2247
2248 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2249 (!fw_file->firmware_data || !fw_file->firmware_len)) {
2250 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2251 ar->hw_params.fw.dir, name);
2252 ret = -ENOMEDIUM;
2253 goto err;
2254 }
2255
2256 return 0;
2257
2258 err:
2259 ath10k_core_free_firmware_files(ar);
2260 return ret;
2261 }
2262
ath10k_core_get_fw_name(struct ath10k * ar,char * fw_name,size_t fw_name_len,int fw_api)2263 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2264 size_t fw_name_len, int fw_api)
2265 {
2266 switch (ar->hif.bus) {
2267 case ATH10K_BUS_SDIO:
2268 case ATH10K_BUS_USB:
2269 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2270 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2271 fw_api);
2272 break;
2273 case ATH10K_BUS_PCI:
2274 case ATH10K_BUS_AHB:
2275 case ATH10K_BUS_SNOC:
2276 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2277 ATH10K_FW_FILE_BASE, fw_api);
2278 break;
2279 }
2280 }
2281
ath10k_core_fetch_firmware_files(struct ath10k * ar)2282 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2283 {
2284 int ret, i;
2285 char fw_name[100];
2286
2287 /* calibration file is optional, don't check for any errors */
2288 ath10k_fetch_cal_file(ar);
2289
2290 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2291 ar->fw_api = i;
2292 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2293 ar->fw_api);
2294
2295 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2296 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2297 &ar->normal_mode_fw.fw_file);
2298 if (!ret)
2299 goto success;
2300 }
2301
2302 /* we end up here if we couldn't fetch any firmware */
2303
2304 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2305 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2306 ret);
2307
2308 return ret;
2309
2310 success:
2311 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2312
2313 return 0;
2314 }
2315
ath10k_core_pre_cal_download(struct ath10k * ar)2316 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2317 {
2318 int ret;
2319
2320 ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
2321 if (ret == 0) {
2322 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
2323 goto success;
2324 } else if (ret == -EPROBE_DEFER) {
2325 return ret;
2326 }
2327
2328 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2329 "boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
2330 ret);
2331
2332 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2333 if (ret == 0) {
2334 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2335 goto success;
2336 }
2337
2338 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2339 "boot did not find a pre calibration file, try DT next: %d\n",
2340 ret);
2341
2342 ret = ath10k_download_cal_dt(ar, "qcom,pre-calibration-data");
2343 if (ret == -ENOENT)
2344 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2345 if (ret) {
2346 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2347 "unable to load pre cal data from DT: %d\n", ret);
2348 return ret;
2349 }
2350 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2351
2352 success:
2353 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2354 ath10k_cal_mode_str(ar->cal_mode));
2355
2356 return 0;
2357 }
2358
ath10k_core_pre_cal_config(struct ath10k * ar)2359 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2360 {
2361 int ret;
2362
2363 ret = ath10k_core_pre_cal_download(ar);
2364 if (ret) {
2365 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2366 "failed to load pre cal data: %d\n", ret);
2367 return ret;
2368 }
2369
2370 ret = ath10k_core_get_board_id_from_otp(ar);
2371 if (ret) {
2372 ath10k_err(ar, "failed to get board id: %d\n", ret);
2373 return ret;
2374 }
2375
2376 ret = ath10k_download_and_run_otp(ar);
2377 if (ret) {
2378 ath10k_err(ar, "failed to run otp: %d\n", ret);
2379 return ret;
2380 }
2381
2382 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2383 "pre cal configuration done successfully\n");
2384
2385 return 0;
2386 }
2387
ath10k_download_cal_data(struct ath10k * ar)2388 static int ath10k_download_cal_data(struct ath10k *ar)
2389 {
2390 int ret;
2391
2392 ret = ath10k_core_pre_cal_config(ar);
2393 if (ret == 0)
2394 return 0;
2395
2396 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2397 "pre cal download procedure failed, try cal file: %d\n",
2398 ret);
2399
2400 ret = ath10k_download_cal_nvmem(ar, "calibration");
2401 if (ret == 0) {
2402 ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
2403 goto done;
2404 } else if (ret == -EPROBE_DEFER) {
2405 return ret;
2406 }
2407
2408 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2409 "boot did not find a calibration nvmem-cell, try file next: %d\n",
2410 ret);
2411
2412 ret = ath10k_download_cal_file(ar, ar->cal_file);
2413 if (ret == 0) {
2414 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2415 goto done;
2416 }
2417
2418 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2419 "boot did not find a calibration file, try DT next: %d\n",
2420 ret);
2421
2422 ret = ath10k_download_cal_dt(ar, "qcom,calibration-data");
2423 if (ret == -ENOENT)
2424 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2425 if (ret == 0) {
2426 ar->cal_mode = ATH10K_CAL_MODE_DT;
2427 goto done;
2428 }
2429
2430 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2431 "boot did not find DT entry, try target EEPROM next: %d\n",
2432 ret);
2433
2434 ret = ath10k_download_cal_eeprom(ar);
2435 if (ret == 0) {
2436 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2437 goto done;
2438 }
2439
2440 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2441 "boot did not find target EEPROM entry, try OTP next: %d\n",
2442 ret);
2443
2444 ret = ath10k_download_and_run_otp(ar);
2445 if (ret) {
2446 ath10k_err(ar, "failed to run otp: %d\n", ret);
2447 return ret;
2448 }
2449
2450 ar->cal_mode = ATH10K_CAL_MODE_OTP;
2451
2452 done:
2453 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2454 ath10k_cal_mode_str(ar->cal_mode));
2455 return 0;
2456 }
2457
ath10k_core_fetch_btcoex_dt(struct ath10k * ar)2458 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2459 {
2460 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
2461 struct device_node *node;
2462 u8 coex_support = 0;
2463 int ret;
2464
2465 node = ar->dev->of_node;
2466 if (!node)
2467 goto out;
2468
2469 ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2470 if (ret) {
2471 ar->coex_support = true;
2472 goto out;
2473 }
2474
2475 if (coex_support) {
2476 ar->coex_support = true;
2477 } else {
2478 ar->coex_support = false;
2479 ar->coex_gpio_pin = -1;
2480 goto out;
2481 }
2482
2483 ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2484 &ar->coex_gpio_pin);
2485 if (ret)
2486 ar->coex_gpio_pin = -1;
2487
2488 out:
2489 #endif
2490 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2491 ar->coex_support, ar->coex_gpio_pin);
2492 }
2493
ath10k_init_uart(struct ath10k * ar)2494 static int ath10k_init_uart(struct ath10k *ar)
2495 {
2496 int ret;
2497
2498 /*
2499 * Explicitly setting UART prints to zero as target turns it on
2500 * based on scratch registers.
2501 */
2502 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2503 if (ret) {
2504 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2505 return ret;
2506 }
2507
2508 if (!uart_print) {
2509 if (ar->hw_params.uart_pin_workaround) {
2510 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2511 ar->hw_params.uart_pin);
2512 if (ret) {
2513 ath10k_warn(ar, "failed to set UART TX pin: %d",
2514 ret);
2515 return ret;
2516 }
2517 }
2518
2519 return 0;
2520 }
2521
2522 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2523 if (ret) {
2524 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2525 return ret;
2526 }
2527
2528 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2529 if (ret) {
2530 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2531 return ret;
2532 }
2533
2534 /* Set the UART baud rate to 19200. */
2535 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2536 if (ret) {
2537 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2538 return ret;
2539 }
2540
2541 ath10k_info(ar, "UART prints enabled\n");
2542 return 0;
2543 }
2544
ath10k_init_hw_params(struct ath10k * ar)2545 static int ath10k_init_hw_params(struct ath10k *ar)
2546 {
2547 const struct ath10k_hw_params *hw_params;
2548 int i;
2549
2550 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2551 hw_params = &ath10k_hw_params_list[i];
2552
2553 if (hw_params->bus == ar->hif.bus &&
2554 hw_params->id == ar->target_version &&
2555 hw_params->dev_id == ar->dev_id)
2556 break;
2557 }
2558
2559 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2560 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2561 ar->target_version);
2562 return -EINVAL;
2563 }
2564
2565 ar->hw_params = *hw_params;
2566
2567 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2568 ar->hw_params.name, ar->target_version);
2569
2570 return 0;
2571 }
2572
ath10k_core_needs_recovery(struct ath10k * ar)2573 static bool ath10k_core_needs_recovery(struct ath10k *ar)
2574 {
2575 long time_left;
2576
2577 /* Sometimes the recovery will fail and then the next all recovery fail,
2578 * so avoid infinite recovery.
2579 */
2580 if (atomic_read(&ar->fail_cont_count) >= ATH10K_RECOVERY_MAX_FAIL_COUNT) {
2581 ath10k_err(ar, "consecutive fail %d times, will shutdown driver!",
2582 atomic_read(&ar->fail_cont_count));
2583 ar->state = ATH10K_STATE_WEDGED;
2584 return false;
2585 }
2586
2587 ath10k_dbg(ar, ATH10K_DBG_BOOT, "total recovery count: %d", ++ar->recovery_count);
2588
2589 if (atomic_read(&ar->pending_recovery)) {
2590 /* Sometimes it happened another recovery work before the previous one
2591 * completed, then the second recovery work will destroy the previous
2592 * one, thus below is to avoid that.
2593 */
2594 time_left = wait_for_completion_timeout(&ar->driver_recovery,
2595 ATH10K_RECOVERY_TIMEOUT_HZ);
2596 if (time_left) {
2597 ath10k_warn(ar, "previous recovery succeeded, skip this!\n");
2598 return false;
2599 }
2600
2601 /* Record the continuous recovery fail count when recovery failed. */
2602 atomic_inc(&ar->fail_cont_count);
2603
2604 /* Avoid having multiple recoveries at the same time. */
2605 return false;
2606 }
2607
2608 atomic_inc(&ar->pending_recovery);
2609
2610 return true;
2611 }
2612
ath10k_core_start_recovery(struct ath10k * ar)2613 void ath10k_core_start_recovery(struct ath10k *ar)
2614 {
2615 if (!ath10k_core_needs_recovery(ar))
2616 return;
2617
2618 queue_work(ar->workqueue, &ar->restart_work);
2619 }
2620 EXPORT_SYMBOL(ath10k_core_start_recovery);
2621
ath10k_core_napi_enable(struct ath10k * ar)2622 void ath10k_core_napi_enable(struct ath10k *ar)
2623 {
2624 lockdep_assert_held(&ar->conf_mutex);
2625
2626 if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2627 return;
2628
2629 napi_enable(&ar->napi);
2630 set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2631 }
2632 EXPORT_SYMBOL(ath10k_core_napi_enable);
2633
ath10k_core_napi_sync_disable(struct ath10k * ar)2634 void ath10k_core_napi_sync_disable(struct ath10k *ar)
2635 {
2636 lockdep_assert_held(&ar->conf_mutex);
2637
2638 if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2639 return;
2640
2641 napi_synchronize(&ar->napi);
2642 napi_disable(&ar->napi);
2643 clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2644 }
2645 EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2646
ath10k_core_restart(struct work_struct * work)2647 static void ath10k_core_restart(struct work_struct *work)
2648 {
2649 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2650 int ret;
2651
2652 reinit_completion(&ar->driver_recovery);
2653
2654 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2655
2656 /* Place a barrier to make sure the compiler doesn't reorder
2657 * CRASH_FLUSH and calling other functions.
2658 */
2659 barrier();
2660
2661 ieee80211_stop_queues(ar->hw);
2662 ath10k_drain_tx(ar);
2663 complete(&ar->scan.started);
2664 complete(&ar->scan.completed);
2665 complete(&ar->scan.on_channel);
2666 complete(&ar->offchan_tx_completed);
2667 complete(&ar->install_key_done);
2668 complete(&ar->vdev_setup_done);
2669 complete(&ar->vdev_delete_done);
2670 complete(&ar->thermal.wmi_sync);
2671 complete(&ar->bss_survey_done);
2672 wake_up(&ar->htt.empty_tx_wq);
2673 wake_up(&ar->wmi.tx_credits_wq);
2674 wake_up(&ar->peer_mapping_wq);
2675
2676 /* TODO: We can have one instance of cancelling coverage_class_work by
2677 * moving it to ath10k_halt(), so that both stop() and restart() would
2678 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2679 * with conf_mutex it will deadlock.
2680 */
2681 cancel_work_sync(&ar->set_coverage_class_work);
2682
2683 mutex_lock(&ar->conf_mutex);
2684
2685 switch (ar->state) {
2686 case ATH10K_STATE_ON:
2687 ar->state = ATH10K_STATE_RESTARTING;
2688 ath10k_halt(ar);
2689 ath10k_scan_finish(ar);
2690 ieee80211_restart_hw(ar->hw);
2691 break;
2692 case ATH10K_STATE_OFF:
2693 /* this can happen if driver is being unloaded
2694 * or if the crash happens during FW probing
2695 */
2696 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2697 break;
2698 case ATH10K_STATE_RESTARTING:
2699 /* hw restart might be requested from multiple places */
2700 break;
2701 case ATH10K_STATE_RESTARTED:
2702 ar->state = ATH10K_STATE_WEDGED;
2703 fallthrough;
2704 case ATH10K_STATE_WEDGED:
2705 ath10k_warn(ar, "device is wedged, will not restart\n");
2706 break;
2707 case ATH10K_STATE_UTF:
2708 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2709 break;
2710 }
2711
2712 mutex_unlock(&ar->conf_mutex);
2713
2714 ret = ath10k_coredump_submit(ar);
2715 if (ret)
2716 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2717 ret);
2718 }
2719
ath10k_core_set_coverage_class_work(struct work_struct * work)2720 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2721 {
2722 struct ath10k *ar = container_of(work, struct ath10k,
2723 set_coverage_class_work);
2724
2725 if (ar->hw_params.hw_ops->set_coverage_class)
2726 ar->hw_params.hw_ops->set_coverage_class(ar, -1, -1);
2727 }
2728
ath10k_core_init_firmware_features(struct ath10k * ar)2729 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2730 {
2731 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2732 int max_num_peers;
2733
2734 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2735 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2736 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2737 return -EINVAL;
2738 }
2739
2740 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2741 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2742 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2743 return -EINVAL;
2744 }
2745
2746 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2747 switch (ath10k_cryptmode_param) {
2748 case ATH10K_CRYPT_MODE_HW:
2749 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2750 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2751 break;
2752 case ATH10K_CRYPT_MODE_SW:
2753 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2754 fw_file->fw_features)) {
2755 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2756 return -EINVAL;
2757 }
2758
2759 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2760 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2761 break;
2762 default:
2763 ath10k_info(ar, "invalid cryptmode: %d\n",
2764 ath10k_cryptmode_param);
2765 return -EINVAL;
2766 }
2767
2768 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2769 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2770
2771 if (ath10k_frame_mode == ATH10K_HW_TXRX_RAW) {
2772 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2773 fw_file->fw_features)) {
2774 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2775 return -EINVAL;
2776 }
2777 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2778 }
2779
2780 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2781 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2782
2783 /* Workaround:
2784 *
2785 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2786 * and causes enormous performance issues (malformed frames,
2787 * etc).
2788 *
2789 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2790 * albeit a bit slower compared to regular operation.
2791 */
2792 ar->htt.max_num_amsdu = 1;
2793 }
2794
2795 /* Backwards compatibility for firmwares without
2796 * ATH10K_FW_IE_WMI_OP_VERSION.
2797 */
2798 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2799 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2800 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2801 fw_file->fw_features))
2802 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2803 else
2804 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2805 } else {
2806 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2807 }
2808 }
2809
2810 switch (fw_file->wmi_op_version) {
2811 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2812 max_num_peers = TARGET_NUM_PEERS;
2813 ar->max_num_stations = TARGET_NUM_STATIONS;
2814 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2815 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2816 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2817 WMI_STAT_PEER;
2818 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2819 break;
2820 case ATH10K_FW_WMI_OP_VERSION_10_1:
2821 case ATH10K_FW_WMI_OP_VERSION_10_2:
2822 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2823 if (ath10k_peer_stats_enabled(ar)) {
2824 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2825 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2826 } else {
2827 max_num_peers = TARGET_10X_NUM_PEERS;
2828 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2829 }
2830 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2831 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2832 ar->fw_stats_req_mask = WMI_STAT_PEER;
2833 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2834 #if defined(CONFIG_FWLOG)
2835 ar->fwlog_max_moduleid = ATH10K_FWLOG_MODULE_ID_MAX_10_2_4;
2836 #endif
2837 break;
2838 case ATH10K_FW_WMI_OP_VERSION_TLV:
2839 max_num_peers = TARGET_TLV_NUM_PEERS;
2840 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2841 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2842 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2843 if (ar->hif.bus == ATH10K_BUS_SDIO)
2844 ar->htt.max_num_pending_tx =
2845 TARGET_TLV_NUM_MSDU_DESC_HL;
2846 else
2847 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2848 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2849 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2850 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2851 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2852 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2853 break;
2854 case ATH10K_FW_WMI_OP_VERSION_10_4:
2855 max_num_peers = TARGET_10_4_NUM_PEERS;
2856 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2857 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2858 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2859 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2860 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2861 WMI_10_4_STAT_PEER_EXTD |
2862 WMI_10_4_STAT_VDEV_EXTD;
2863 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2864 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2865
2866 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2867 fw_file->fw_features))
2868 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2869 else
2870 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2871 break;
2872 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2873 case ATH10K_FW_WMI_OP_VERSION_MAX:
2874 default:
2875 WARN_ON(1);
2876 return -EINVAL;
2877 }
2878
2879 if (ar->hw_params.num_peers)
2880 ar->max_num_peers = ar->hw_params.num_peers;
2881 else
2882 ar->max_num_peers = max_num_peers;
2883
2884 /* Backwards compatibility for firmwares without
2885 * ATH10K_FW_IE_HTT_OP_VERSION.
2886 */
2887 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2888 switch (fw_file->wmi_op_version) {
2889 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2890 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2891 break;
2892 case ATH10K_FW_WMI_OP_VERSION_10_1:
2893 case ATH10K_FW_WMI_OP_VERSION_10_2:
2894 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2895 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2896 break;
2897 case ATH10K_FW_WMI_OP_VERSION_TLV:
2898 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2899 break;
2900 case ATH10K_FW_WMI_OP_VERSION_10_4:
2901 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2902 case ATH10K_FW_WMI_OP_VERSION_MAX:
2903 ath10k_err(ar, "htt op version not found from fw meta data");
2904 return -EINVAL;
2905 }
2906 }
2907
2908 return 0;
2909 }
2910
ath10k_core_reset_rx_filter(struct ath10k * ar)2911 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2912 {
2913 int ret;
2914 int vdev_id;
2915 int vdev_type;
2916 int vdev_subtype;
2917 const u8 *vdev_addr;
2918
2919 vdev_id = 0;
2920 vdev_type = WMI_VDEV_TYPE_STA;
2921 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2922 vdev_addr = ar->mac_addr;
2923
2924 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2925 vdev_addr);
2926 if (ret) {
2927 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2928 return ret;
2929 }
2930
2931 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2932 if (ret) {
2933 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2934 return ret;
2935 }
2936
2937 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2938 * serialized properly implicitly.
2939 *
2940 * Moreover (most) WMI commands have no explicit acknowledges. It is
2941 * possible to infer it implicitly by poking firmware with echo
2942 * command - getting a reply means all preceding comments have been
2943 * (mostly) processed.
2944 *
2945 * In case of vdev create/delete this is sufficient.
2946 *
2947 * Without this it's possible to end up with a race when HTT Rx ring is
2948 * started before vdev create/delete hack is complete allowing a short
2949 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2950 */
2951 ret = ath10k_wmi_barrier(ar);
2952 if (ret) {
2953 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2954 return ret;
2955 }
2956
2957 return 0;
2958 }
2959
ath10k_core_compat_services(struct ath10k * ar)2960 static int ath10k_core_compat_services(struct ath10k *ar)
2961 {
2962 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2963
2964 /* all 10.x firmware versions support thermal throttling but don't
2965 * advertise the support via service flags so we have to hardcode
2966 * it here
2967 */
2968 switch (fw_file->wmi_op_version) {
2969 case ATH10K_FW_WMI_OP_VERSION_10_1:
2970 case ATH10K_FW_WMI_OP_VERSION_10_2:
2971 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2972 case ATH10K_FW_WMI_OP_VERSION_10_4:
2973 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2974 break;
2975 default:
2976 break;
2977 }
2978
2979 return 0;
2980 }
2981
2982 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2983
ath10k_core_copy_target_iram(struct ath10k * ar)2984 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2985 {
2986 const struct ath10k_hw_mem_layout *hw_mem;
2987 const struct ath10k_mem_region *tmp, *mem_region = NULL;
2988 dma_addr_t paddr;
2989 void *vaddr = NULL;
2990 u8 num_read_itr;
2991 int i, ret;
2992 u32 len, remaining_len;
2993
2994 /* copy target iram feature must work also when
2995 * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so
2996 * _ath10k_coredump_get_mem_layout() to accomplist that
2997 */
2998 hw_mem = _ath10k_coredump_get_mem_layout(ar);
2999 if (!hw_mem)
3000 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then
3001 * just silently disable the feature by doing nothing
3002 */
3003 return 0;
3004
3005 for (i = 0; i < hw_mem->region_table.size; i++) {
3006 tmp = &hw_mem->region_table.regions[i];
3007 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
3008 mem_region = tmp;
3009 break;
3010 }
3011 }
3012
3013 if (!mem_region)
3014 return -ENOMEM;
3015
3016 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3017 if (ar->wmi.mem_chunks[i].req_id ==
3018 WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
3019 vaddr = ar->wmi.mem_chunks[i].vaddr;
3020 len = ar->wmi.mem_chunks[i].len;
3021 break;
3022 }
3023 }
3024
3025 if (!vaddr || !len) {
3026 ath10k_warn(ar, "No allocated memory for IRAM back up");
3027 return -ENOMEM;
3028 }
3029
3030 len = (len < mem_region->len) ? len : mem_region->len;
3031 paddr = mem_region->start;
3032 num_read_itr = len / TGT_IRAM_READ_PER_ITR;
3033 remaining_len = len % TGT_IRAM_READ_PER_ITR;
3034 for (i = 0; i < num_read_itr; i++) {
3035 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
3036 TGT_IRAM_READ_PER_ITR);
3037 if (ret) {
3038 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
3039 ret);
3040 return ret;
3041 }
3042
3043 paddr += TGT_IRAM_READ_PER_ITR;
3044 #if defined(__linux__)
3045 vaddr += TGT_IRAM_READ_PER_ITR;
3046 #elif defined(__FreeBSD__)
3047 vaddr = (void *)((uintptr_t)vaddr + TGT_IRAM_READ_PER_ITR);
3048 #endif
3049 }
3050
3051 if (remaining_len) {
3052 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
3053 if (ret) {
3054 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
3055 ret);
3056 return ret;
3057 }
3058 }
3059
3060 ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
3061
3062 return 0;
3063 }
3064
ath10k_core_start(struct ath10k * ar,enum ath10k_firmware_mode mode,const struct ath10k_fw_components * fw)3065 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
3066 const struct ath10k_fw_components *fw)
3067 {
3068 int status;
3069 u32 val;
3070
3071 lockdep_assert_held(&ar->conf_mutex);
3072
3073 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
3074
3075 ar->running_fw = fw;
3076
3077 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3078 ar->running_fw->fw_file.fw_features)) {
3079 ath10k_bmi_start(ar);
3080
3081 /* Enable hardware clock to speed up firmware download */
3082 if (ar->hw_params.hw_ops->enable_pll_clk) {
3083 status = ar->hw_params.hw_ops->enable_pll_clk(ar);
3084 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
3085 status);
3086 }
3087
3088 if (ath10k_init_configure_target(ar)) {
3089 status = -EINVAL;
3090 goto err;
3091 }
3092
3093 status = ath10k_download_cal_data(ar);
3094 if (status)
3095 goto err;
3096
3097 /* Some of qca988x solutions are having global reset issue
3098 * during target initialization. Bypassing PLL setting before
3099 * downloading firmware and letting the SoC run on REF_CLK is
3100 * fixing the problem. Corresponding firmware change is also
3101 * needed to set the clock source once the target is
3102 * initialized.
3103 */
3104 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
3105 ar->running_fw->fw_file.fw_features)) {
3106 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
3107 if (status) {
3108 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
3109 status);
3110 goto err;
3111 }
3112 }
3113
3114 status = ath10k_download_fw(ar);
3115 if (status)
3116 goto err;
3117
3118 status = ath10k_init_uart(ar);
3119 if (status)
3120 goto err;
3121
3122 if (ar->hif.bus == ATH10K_BUS_SDIO) {
3123 status = ath10k_init_sdio(ar, mode);
3124 if (status) {
3125 ath10k_err(ar, "failed to init SDIO: %d\n", status);
3126 goto err;
3127 }
3128 }
3129 }
3130
3131 ar->htc.htc_ops.target_send_suspend_complete =
3132 ath10k_send_suspend_complete;
3133
3134 status = ath10k_htc_init(ar);
3135 if (status) {
3136 ath10k_err(ar, "could not init HTC (%d)\n", status);
3137 goto err;
3138 }
3139
3140 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3141 ar->running_fw->fw_file.fw_features)) {
3142 status = ath10k_bmi_done(ar);
3143 if (status)
3144 goto err;
3145 }
3146
3147 status = ath10k_wmi_attach(ar);
3148 if (status) {
3149 ath10k_err(ar, "WMI attach failed: %d\n", status);
3150 goto err;
3151 }
3152
3153 status = ath10k_htt_init(ar);
3154 if (status) {
3155 ath10k_err(ar, "failed to init htt: %d\n", status);
3156 goto err_wmi_detach;
3157 }
3158
3159 status = ath10k_htt_tx_start(&ar->htt);
3160 if (status) {
3161 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
3162 goto err_wmi_detach;
3163 }
3164
3165 /* If firmware indicates Full Rx Reorder support it must be used in a
3166 * slightly different manner. Let HTT code know.
3167 */
3168 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
3169 ar->wmi.svc_map));
3170
3171 status = ath10k_htt_rx_alloc(&ar->htt);
3172 if (status) {
3173 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
3174 goto err_htt_tx_detach;
3175 }
3176
3177 status = ath10k_hif_start(ar);
3178 if (status) {
3179 ath10k_err(ar, "could not start HIF: %d\n", status);
3180 goto err_htt_rx_detach;
3181 }
3182
3183 status = ath10k_htc_wait_target(&ar->htc);
3184 if (status) {
3185 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
3186 goto err_hif_stop;
3187 }
3188
3189 status = ath10k_hif_start_post(ar);
3190 if (status) {
3191 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
3192 goto err_hif_stop;
3193 }
3194
3195 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3196 status = ath10k_htt_connect(&ar->htt);
3197 if (status) {
3198 ath10k_err(ar, "failed to connect htt (%d)\n", status);
3199 goto err_hif_stop;
3200 }
3201 }
3202
3203 status = ath10k_wmi_connect(ar);
3204 if (status) {
3205 ath10k_err(ar, "could not connect wmi: %d\n", status);
3206 goto err_hif_stop;
3207 }
3208
3209 status = ath10k_htc_start(&ar->htc);
3210 if (status) {
3211 ath10k_err(ar, "failed to start htc: %d\n", status);
3212 goto err_hif_stop;
3213 }
3214
3215 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3216 status = ath10k_wmi_wait_for_service_ready(ar);
3217 if (status) {
3218 ath10k_warn(ar, "wmi service ready event not received");
3219 goto err_hif_stop;
3220 }
3221 }
3222
3223 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
3224 ar->hw->wiphy->fw_version);
3225
3226 if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
3227 ar->running_fw->fw_file.fw_features)) {
3228 status = ath10k_core_copy_target_iram(ar);
3229 if (status) {
3230 ath10k_warn(ar, "failed to copy target iram contents: %d",
3231 status);
3232 goto err_hif_stop;
3233 }
3234 }
3235
3236 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
3237 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3238 val = 0;
3239 if (ath10k_peer_stats_enabled(ar))
3240 val = WMI_10_4_PEER_STATS;
3241
3242 /* Enable vdev stats by default */
3243 val |= WMI_10_4_VDEV_STATS;
3244
3245 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
3246 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
3247
3248 ath10k_core_fetch_btcoex_dt(ar);
3249
3250 /* 10.4 firmware supports BT-Coex without reloading firmware
3251 * via pdev param. To support Bluetooth coexistence pdev param,
3252 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
3253 * enabled always.
3254 *
3255 * We can still enable BTCOEX if firmware has the support
3256 * even though btceox_support value is
3257 * ATH10K_DT_BTCOEX_NOT_FOUND
3258 */
3259
3260 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
3261 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
3262 ar->running_fw->fw_file.fw_features) &&
3263 ar->coex_support)
3264 val |= WMI_10_4_COEX_GPIO_SUPPORT;
3265
3266 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
3267 ar->wmi.svc_map))
3268 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
3269
3270 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
3271 ar->wmi.svc_map))
3272 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
3273
3274 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
3275 ar->wmi.svc_map))
3276 val |= WMI_10_4_TX_DATA_ACK_RSSI;
3277
3278 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
3279 val |= WMI_10_4_REPORT_AIRTIME;
3280
3281 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
3282 ar->wmi.svc_map))
3283 val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
3284
3285 status = ath10k_mac_ext_resource_config(ar, val);
3286 if (status) {
3287 ath10k_err(ar,
3288 "failed to send ext resource cfg command : %d\n",
3289 status);
3290 goto err_hif_stop;
3291 }
3292 }
3293
3294 status = ath10k_wmi_cmd_init(ar);
3295 if (status) {
3296 ath10k_err(ar, "could not send WMI init command (%d)\n",
3297 status);
3298 goto err_hif_stop;
3299 }
3300
3301 status = ath10k_wmi_wait_for_unified_ready(ar);
3302 if (status) {
3303 ath10k_err(ar, "wmi unified ready event not received\n");
3304 goto err_hif_stop;
3305 }
3306
3307 status = ath10k_core_compat_services(ar);
3308 if (status) {
3309 ath10k_err(ar, "compat services failed: %d\n", status);
3310 goto err_hif_stop;
3311 }
3312
3313 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3314 if (status && status != -EOPNOTSUPP) {
3315 ath10k_err(ar,
3316 "failed to set base mac address: %d\n", status);
3317 goto err_hif_stop;
3318 }
3319
3320 /* Some firmware revisions do not properly set up hardware rx filter
3321 * registers.
3322 *
3323 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3324 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
3325 * any frames that matches MAC_PCU_RX_FILTER which is also
3326 * misconfigured to accept anything.
3327 *
3328 * The ADDR1 is programmed using internal firmware structure field and
3329 * can't be (easily/sanely) reached from the driver explicitly. It is
3330 * possible to implicitly make it correct by creating a dummy vdev and
3331 * then deleting it.
3332 */
3333 if (ar->hw_params.hw_filter_reset_required &&
3334 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3335 status = ath10k_core_reset_rx_filter(ar);
3336 if (status) {
3337 ath10k_err(ar,
3338 "failed to reset rx filter: %d\n", status);
3339 goto err_hif_stop;
3340 }
3341 }
3342
3343 status = ath10k_htt_rx_ring_refill(ar);
3344 if (status) {
3345 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3346 goto err_hif_stop;
3347 }
3348
3349 if (ar->max_num_vdevs >= 64)
3350 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3351 else
3352 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3353
3354 INIT_LIST_HEAD(&ar->arvifs);
3355
3356 /* we don't care about HTT in UTF mode */
3357 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3358 status = ath10k_htt_setup(&ar->htt);
3359 if (status) {
3360 ath10k_err(ar, "failed to setup htt: %d\n", status);
3361 goto err_hif_stop;
3362 }
3363 }
3364
3365 status = ath10k_debug_start(ar);
3366 if (status)
3367 goto err_hif_stop;
3368
3369 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3370 if (status && status != -EOPNOTSUPP) {
3371 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3372 goto err_hif_stop;
3373 }
3374
3375 status = ath10k_leds_start(ar);
3376 if (status)
3377 goto err_hif_stop;
3378
3379 return 0;
3380
3381 err_hif_stop:
3382 ath10k_hif_stop(ar);
3383 err_htt_rx_detach:
3384 ath10k_htt_rx_free(&ar->htt);
3385 err_htt_tx_detach:
3386 ath10k_htt_tx_free(&ar->htt);
3387 err_wmi_detach:
3388 ath10k_wmi_detach(ar);
3389 err:
3390 return status;
3391 }
3392 EXPORT_SYMBOL(ath10k_core_start);
3393
ath10k_wait_for_suspend(struct ath10k * ar,u32 suspend_opt)3394 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3395 {
3396 int ret;
3397 unsigned long time_left;
3398
3399 reinit_completion(&ar->target_suspend);
3400
3401 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3402 if (ret) {
3403 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3404 return ret;
3405 }
3406
3407 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3408
3409 if (!time_left) {
3410 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3411 return -ETIMEDOUT;
3412 }
3413
3414 return 0;
3415 }
3416
ath10k_core_stop(struct ath10k * ar)3417 void ath10k_core_stop(struct ath10k *ar)
3418 {
3419 lockdep_assert_held(&ar->conf_mutex);
3420 ath10k_debug_stop(ar);
3421
3422 /* try to suspend target */
3423 if (ar->state != ATH10K_STATE_RESTARTING &&
3424 ar->state != ATH10K_STATE_UTF)
3425 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3426
3427 ath10k_hif_stop(ar);
3428 ath10k_htt_tx_stop(&ar->htt);
3429 ath10k_htt_rx_free(&ar->htt);
3430 ath10k_wmi_detach(ar);
3431
3432 ar->id.bmi_ids_valid = false;
3433 }
3434 EXPORT_SYMBOL(ath10k_core_stop);
3435
3436 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3437 * order to know what hw capabilities should be advertised to mac80211 it is
3438 * necessary to load the firmware (and tear it down immediately since start
3439 * hook will try to init it again) before registering
3440 */
ath10k_core_probe_fw(struct ath10k * ar)3441 static int ath10k_core_probe_fw(struct ath10k *ar)
3442 {
3443 struct bmi_target_info target_info;
3444 int ret = 0;
3445
3446 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3447 if (ret) {
3448 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3449 return ret;
3450 }
3451
3452 switch (ar->hif.bus) {
3453 case ATH10K_BUS_SDIO:
3454 memset(&target_info, 0, sizeof(target_info));
3455 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3456 if (ret) {
3457 ath10k_err(ar, "could not get target info (%d)\n", ret);
3458 goto err_power_down;
3459 }
3460 ar->target_version = target_info.version;
3461 ar->hw->wiphy->hw_version = target_info.version;
3462 break;
3463 case ATH10K_BUS_PCI:
3464 case ATH10K_BUS_AHB:
3465 case ATH10K_BUS_USB:
3466 memset(&target_info, 0, sizeof(target_info));
3467 ret = ath10k_bmi_get_target_info(ar, &target_info);
3468 if (ret) {
3469 ath10k_err(ar, "could not get target info (%d)\n", ret);
3470 goto err_power_down;
3471 }
3472 ar->target_version = target_info.version;
3473 ar->hw->wiphy->hw_version = target_info.version;
3474 break;
3475 case ATH10K_BUS_SNOC:
3476 memset(&target_info, 0, sizeof(target_info));
3477 ret = ath10k_hif_get_target_info(ar, &target_info);
3478 if (ret) {
3479 ath10k_err(ar, "could not get target info (%d)\n", ret);
3480 goto err_power_down;
3481 }
3482 ar->target_version = target_info.version;
3483 ar->hw->wiphy->hw_version = target_info.version;
3484 break;
3485 default:
3486 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3487 }
3488
3489 ret = ath10k_init_hw_params(ar);
3490 if (ret) {
3491 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3492 goto err_power_down;
3493 }
3494
3495 ret = ath10k_core_fetch_firmware_files(ar);
3496 if (ret) {
3497 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3498 goto err_power_down;
3499 }
3500
3501 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3502 sizeof(ar->normal_mode_fw.fw_file.fw_version));
3503 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3504 sizeof(ar->hw->wiphy->fw_version));
3505
3506 ath10k_debug_print_hwfw_info(ar);
3507
3508 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3509 ar->normal_mode_fw.fw_file.fw_features)) {
3510 ret = ath10k_core_pre_cal_download(ar);
3511 if (ret) {
3512 /* pre calibration data download is not necessary
3513 * for all the chipsets. Ignore failures and continue.
3514 */
3515 ath10k_dbg(ar, ATH10K_DBG_BOOT,
3516 "could not load pre cal data: %d\n", ret);
3517 }
3518
3519 ret = ath10k_core_get_board_id_from_otp(ar);
3520 if (ret && ret != -EOPNOTSUPP) {
3521 ath10k_err(ar, "failed to get board id from otp: %d\n",
3522 ret);
3523 goto err_free_firmware_files;
3524 }
3525
3526 ret = ath10k_core_check_smbios(ar);
3527 if (ret)
3528 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3529
3530 ret = ath10k_core_check_dt(ar);
3531 if (ret)
3532 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3533
3534 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3535 if (ret) {
3536 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3537 goto err_free_firmware_files;
3538 }
3539
3540 ath10k_debug_print_board_info(ar);
3541 }
3542
3543 device_get_mac_address(ar->dev, ar->mac_addr);
3544
3545 ret = ath10k_core_init_firmware_features(ar);
3546 if (ret) {
3547 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3548 ret);
3549 goto err_free_firmware_files;
3550 }
3551
3552 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3553 ar->normal_mode_fw.fw_file.fw_features)) {
3554 ret = ath10k_swap_code_seg_init(ar,
3555 &ar->normal_mode_fw.fw_file);
3556 if (ret) {
3557 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3558 ret);
3559 goto err_free_firmware_files;
3560 }
3561 }
3562
3563 mutex_lock(&ar->conf_mutex);
3564
3565 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3566 &ar->normal_mode_fw);
3567 if (ret) {
3568 ath10k_err(ar, "could not init core (%d)\n", ret);
3569 goto err_unlock;
3570 }
3571
3572 ath10k_debug_print_boot_info(ar);
3573 ath10k_core_stop(ar);
3574
3575 mutex_unlock(&ar->conf_mutex);
3576
3577 ath10k_hif_power_down(ar);
3578 return 0;
3579
3580 err_unlock:
3581 mutex_unlock(&ar->conf_mutex);
3582
3583 err_free_firmware_files:
3584 ath10k_core_free_firmware_files(ar);
3585
3586 err_power_down:
3587 ath10k_hif_power_down(ar);
3588
3589 return ret;
3590 }
3591
ath10k_core_register_work(struct work_struct * work)3592 static void ath10k_core_register_work(struct work_struct *work)
3593 {
3594 struct ath10k *ar = container_of(work, struct ath10k, register_work);
3595 int status;
3596
3597 /* peer stats are enabled by default */
3598 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3599
3600 status = ath10k_core_probe_fw(ar);
3601 if (status) {
3602 ath10k_err(ar, "could not probe fw (%d)\n", status);
3603 goto err;
3604 }
3605
3606 status = ath10k_mac_register(ar);
3607 if (status) {
3608 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3609 goto err_release_fw;
3610 }
3611
3612 status = ath10k_coredump_register(ar);
3613 if (status) {
3614 ath10k_err(ar, "unable to register coredump\n");
3615 goto err_unregister_mac;
3616 }
3617
3618 status = ath10k_debug_register(ar);
3619 if (status) {
3620 ath10k_err(ar, "unable to initialize debugfs\n");
3621 goto err_unregister_coredump;
3622 }
3623
3624 status = ath10k_spectral_create(ar);
3625 if (status) {
3626 ath10k_err(ar, "failed to initialize spectral\n");
3627 goto err_debug_destroy;
3628 }
3629
3630 status = ath10k_thermal_register(ar);
3631 if (status) {
3632 ath10k_err(ar, "could not register thermal device: %d\n",
3633 status);
3634 goto err_spectral_destroy;
3635 }
3636 #if defined(CONFIG_FWLOG)
3637 ath10k_fwlog_register(ar);
3638 #endif
3639
3640 status = ath10k_leds_register(ar);
3641 if (status) {
3642 ath10k_err(ar, "could not register leds: %d\n",
3643 status);
3644 goto err_thermal_unregister;
3645 }
3646
3647 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3648 return;
3649
3650 err_thermal_unregister:
3651 ath10k_thermal_unregister(ar);
3652 err_spectral_destroy:
3653 ath10k_spectral_destroy(ar);
3654 err_debug_destroy:
3655 ath10k_debug_destroy(ar);
3656 err_unregister_coredump:
3657 ath10k_coredump_unregister(ar);
3658 err_unregister_mac:
3659 ath10k_mac_unregister(ar);
3660 err_release_fw:
3661 ath10k_core_free_firmware_files(ar);
3662 err:
3663 /* TODO: It's probably a good idea to release device from the driver
3664 * but calling device_release_driver() here will cause a deadlock.
3665 */
3666 return;
3667 }
3668
ath10k_core_register(struct ath10k * ar,const struct ath10k_bus_params * bus_params)3669 int ath10k_core_register(struct ath10k *ar,
3670 const struct ath10k_bus_params *bus_params)
3671 {
3672 ar->bus_param = *bus_params;
3673
3674 queue_work(ar->workqueue, &ar->register_work);
3675
3676 return 0;
3677 }
3678 EXPORT_SYMBOL(ath10k_core_register);
3679
ath10k_core_unregister(struct ath10k * ar)3680 void ath10k_core_unregister(struct ath10k *ar)
3681 {
3682 cancel_work_sync(&ar->register_work);
3683
3684 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3685 return;
3686
3687 ath10k_leds_unregister(ar);
3688
3689 ath10k_thermal_unregister(ar);
3690 /* Stop spectral before unregistering from mac80211 to remove the
3691 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3692 * would be already be free'd recursively, leading to a double free.
3693 */
3694 ath10k_spectral_destroy(ar);
3695
3696 /* We must unregister from mac80211 before we stop HTC and HIF.
3697 * Otherwise we will fail to submit commands to FW and mac80211 will be
3698 * unhappy about callback failures.
3699 */
3700 ath10k_mac_unregister(ar);
3701
3702 ath10k_testmode_destroy(ar);
3703
3704 ath10k_core_free_firmware_files(ar);
3705 ath10k_core_free_board_files(ar);
3706
3707 ath10k_debug_unregister(ar);
3708 #if defined(CONFIG_FWLOG)
3709 ath10k_fwlog_unregister(ar);
3710 #endif
3711 }
3712 EXPORT_SYMBOL(ath10k_core_unregister);
3713
ath10k_core_create(size_t priv_size,struct device * dev,enum ath10k_bus bus,enum ath10k_hw_rev hw_rev,const struct ath10k_hif_ops * hif_ops)3714 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3715 enum ath10k_bus bus,
3716 enum ath10k_hw_rev hw_rev,
3717 const struct ath10k_hif_ops *hif_ops)
3718 {
3719 struct ath10k *ar;
3720 int ret;
3721
3722 ar = ath10k_mac_create(priv_size);
3723 if (!ar)
3724 return NULL;
3725
3726 ar->ath_common.priv = ar;
3727 ar->ath_common.hw = ar->hw;
3728 ar->dev = dev;
3729 ar->hw_rev = hw_rev;
3730 ar->hif.ops = hif_ops;
3731 ar->hif.bus = bus;
3732
3733 switch (hw_rev) {
3734 case ATH10K_HW_QCA988X:
3735 case ATH10K_HW_QCA9887:
3736 ar->regs = &qca988x_regs;
3737 ar->hw_ce_regs = &qcax_ce_regs;
3738 ar->hw_values = &qca988x_values;
3739 break;
3740 case ATH10K_HW_QCA6174:
3741 case ATH10K_HW_QCA9377:
3742 ar->regs = &qca6174_regs;
3743 ar->hw_ce_regs = &qcax_ce_regs;
3744 ar->hw_values = &qca6174_values;
3745 break;
3746 case ATH10K_HW_QCA99X0:
3747 case ATH10K_HW_QCA9984:
3748 ar->regs = &qca99x0_regs;
3749 ar->hw_ce_regs = &qcax_ce_regs;
3750 ar->hw_values = &qca99x0_values;
3751 break;
3752 case ATH10K_HW_QCA9888:
3753 ar->regs = &qca99x0_regs;
3754 ar->hw_ce_regs = &qcax_ce_regs;
3755 ar->hw_values = &qca9888_values;
3756 break;
3757 case ATH10K_HW_QCA4019:
3758 ar->regs = &qca4019_regs;
3759 ar->hw_ce_regs = &qcax_ce_regs;
3760 ar->hw_values = &qca4019_values;
3761 break;
3762 case ATH10K_HW_WCN3990:
3763 ar->regs = &wcn3990_regs;
3764 ar->hw_ce_regs = &wcn3990_ce_regs;
3765 ar->hw_values = &wcn3990_values;
3766 break;
3767 default:
3768 ath10k_err(ar, "unsupported core hardware revision %d\n",
3769 hw_rev);
3770 ret = -EOPNOTSUPP;
3771 goto err_free_mac;
3772 }
3773
3774 init_completion(&ar->scan.started);
3775 init_completion(&ar->scan.completed);
3776 init_completion(&ar->scan.on_channel);
3777 init_completion(&ar->target_suspend);
3778 init_completion(&ar->driver_recovery);
3779 init_completion(&ar->wow.wakeup_completed);
3780
3781 init_completion(&ar->install_key_done);
3782 init_completion(&ar->vdev_setup_done);
3783 init_completion(&ar->vdev_delete_done);
3784 init_completion(&ar->thermal.wmi_sync);
3785 init_completion(&ar->bss_survey_done);
3786 init_completion(&ar->peer_delete_done);
3787 init_completion(&ar->peer_stats_info_complete);
3788
3789 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3790
3791 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3792 if (!ar->workqueue)
3793 goto err_free_mac;
3794
3795 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3796 if (!ar->workqueue_aux)
3797 goto err_free_wq;
3798
3799 ar->workqueue_tx_complete =
3800 create_singlethread_workqueue("ath10k_tx_complete_wq");
3801 if (!ar->workqueue_tx_complete)
3802 goto err_free_aux_wq;
3803
3804 mutex_init(&ar->conf_mutex);
3805 mutex_init(&ar->dump_mutex);
3806 spin_lock_init(&ar->data_lock);
3807
3808 for (int ac = 0; ac < IEEE80211_NUM_ACS; ac++)
3809 spin_lock_init(&ar->queue_lock[ac]);
3810
3811 INIT_LIST_HEAD(&ar->peers);
3812 init_waitqueue_head(&ar->peer_mapping_wq);
3813 init_waitqueue_head(&ar->htt.empty_tx_wq);
3814 init_waitqueue_head(&ar->wmi.tx_credits_wq);
3815
3816 skb_queue_head_init(&ar->htt.rx_indication_head);
3817
3818 init_completion(&ar->offchan_tx_completed);
3819 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3820 skb_queue_head_init(&ar->offchan_tx_queue);
3821
3822 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3823 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3824
3825 INIT_WORK(&ar->register_work, ath10k_core_register_work);
3826 INIT_WORK(&ar->restart_work, ath10k_core_restart);
3827 INIT_WORK(&ar->set_coverage_class_work,
3828 ath10k_core_set_coverage_class_work);
3829
3830 ar->napi_dev = alloc_netdev_dummy(0);
3831 if (!ar->napi_dev)
3832 goto err_free_tx_complete;
3833
3834 ret = ath10k_coredump_create(ar);
3835 if (ret)
3836 goto err_free_netdev;
3837
3838 ret = ath10k_debug_create(ar);
3839 if (ret)
3840 goto err_free_coredump;
3841
3842 return ar;
3843
3844 err_free_coredump:
3845 ath10k_coredump_destroy(ar);
3846 err_free_netdev:
3847 free_netdev(ar->napi_dev);
3848 err_free_tx_complete:
3849 destroy_workqueue(ar->workqueue_tx_complete);
3850 err_free_aux_wq:
3851 destroy_workqueue(ar->workqueue_aux);
3852 err_free_wq:
3853 destroy_workqueue(ar->workqueue);
3854 err_free_mac:
3855 ath10k_mac_destroy(ar);
3856
3857 return NULL;
3858 }
3859 EXPORT_SYMBOL(ath10k_core_create);
3860
ath10k_core_destroy(struct ath10k * ar)3861 void ath10k_core_destroy(struct ath10k *ar)
3862 {
3863 destroy_workqueue(ar->workqueue);
3864
3865 destroy_workqueue(ar->workqueue_aux);
3866
3867 destroy_workqueue(ar->workqueue_tx_complete);
3868
3869 free_netdev(ar->napi_dev);
3870 ath10k_debug_destroy(ar);
3871 ath10k_coredump_destroy(ar);
3872 ath10k_htt_tx_destroy(&ar->htt);
3873 ath10k_wmi_free_host_mem(ar);
3874 ath10k_mac_destroy(ar);
3875 }
3876 EXPORT_SYMBOL(ath10k_core_destroy);
3877
3878 MODULE_AUTHOR("Qualcomm Atheros");
3879 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3880 MODULE_LICENSE("Dual BSD/GPL");
3881