xref: /titanic_41/usr/src/uts/intel/io/dktp/controller/ata/ata_blacklist.c (revision 8c112d45d87338e20826001e18cb9e22e5187658)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 
28 #include <sys/types.h>
29 #include <sys/param.h>
30 #include <sys/debug.h>
31 #include <sys/pci.h>
32 
33 #include "ata_blacklist.h"
34 
35 pcibl_t	ata_pciide_blacklist[] = {
36 	/*
37 	 * The Nat SEMI PC87415 doesn't handle data and status byte
38 	 * synchornization correctly if an I/O error occurs that
39 	 * stops the request before the last sector.  I think it can
40 	 * cause lockups. See section 7.4.5.3 of the PC87415 spec.
41 	 * It's also rumored to be a "single fifo" type chip that can't
42 	 * DMA on both channels correctly.
43 	 */
44 	{ 0x100b, 0xffff, 0x2, 0xffff, ATA_BL_BOGUS},
45 
46 	/*
47 	 * The CMD chip 0x646 does not support the use of interrupt bit
48 	 * in the busmaster ide status register when PIO is used.
49 	 * DMA is explicitly disabled for this legacy chip
50 	 */
51 	{ 0x1095, 0xffff, 0x0646, 0xffff, ATA_BL_BMSTATREG_PIO_BROKEN |
52 							ATA_BL_NODMA},
53 
54 	/*
55 	 * Ditto for Serverworks CSB5, CSB6 and BCM5785[HT1000] chips,
56 	 * but we can handle DMA.  Also, when emulating OSB4 mode,
57 	 * the simplex bit lies!
58 	 */
59 	{ 0x1166, 0xffff, 0x0212, 0xffff, ATA_BL_BMSTATREG_PIO_BROKEN|
60 							ATA_BL_NO_SIMPLEX},
61 	{ 0x1166, 0xffff, 0x0213, 0xffff, ATA_BL_BMSTATREG_PIO_BROKEN},
62 	{ 0x1166, 0xffff, 0x0214, 0xffff, ATA_BL_BMSTATREG_PIO_BROKEN},
63 
64 	/*
65 	 * The  chip 0x24b,which is Broadcom HT1000 SATA controller
66 	 * working in legacy IDE mode, does not support ATAPI DMA
67 	 */
68 	{ 0x1166, 0xffff, 0x024b, 0xffff, ATA_BL_ATAPI_NODMA},
69 
70 	/*
71 	 * On Intel ICH5/ICH5R (SATA controller), the simplex bit lies
72 	 */
73 	{ 0x8086, 0xffff, 0x24d1, 0xffff, ATA_BL_NO_SIMPLEX},
74 	{ 0x8086, 0xffff, 0x24df, 0xffff, ATA_BL_NO_SIMPLEX},
75 
76 	/*
77 	 * On Intel ICH6/ICH6R/ICH6-M (IDE and SATA controllers), the
78 	 * simplex bit lies
79 	 */
80 	{ 0x8086, 0xffff, 0x266f, 0xffff, ATA_BL_NO_SIMPLEX},
81 	{ 0x8086, 0xffff, 0x2651, 0xffff, ATA_BL_NO_SIMPLEX},
82 	{ 0x8086, 0xffff, 0x2652, 0xffff, ATA_BL_NO_SIMPLEX},
83 	{ 0x8086, 0xffff, 0x2653, 0xffff, ATA_BL_NO_SIMPLEX},
84 
85 	/*
86 	 * On Intel ICH7 (IDE and SATA(Non-AHCI/Non-RAID, desktop and
87 	 * mobile)), the simplex bit lies
88 	 */
89 	{ 0x8086, 0xffff, 0x27df, 0xffff, ATA_BL_NO_SIMPLEX},
90 	{ 0x8086, 0xffff, 0x27c0, 0xffff, ATA_BL_NO_SIMPLEX},
91 	{ 0x8086, 0xffff, 0x27c4, 0xffff, ATA_BL_NO_SIMPLEX},
92 
93 	/*
94 	 * On Intel ICH8 (IDE and SATA(Non-AHCI/Non-RAID, desktop and
95 	 * mobile)), the simplex bit lies
96 	 */
97 	{ 0x8086, 0xffff, 0x2820, 0xffff, ATA_BL_NO_SIMPLEX},
98 	{ 0x8086, 0xffff, 0x2825, 0xffff, ATA_BL_NO_SIMPLEX},
99 	{ 0x8086, 0xffff, 0x2828, 0xffff, ATA_BL_NO_SIMPLEX},
100 	{ 0x8086, 0xffff, 0x2850, 0xffff, ATA_BL_NO_SIMPLEX},
101 
102 	/*
103 	 * On Intel ICH9 SATA(Non-AHCI/Non-RAID), the simplex bit lies
104 	 */
105 	{ 0x8086, 0xffff, 0x2920, 0xffff, ATA_BL_NO_SIMPLEX},
106 	{ 0x8086, 0xffff, 0x2921, 0xffff, ATA_BL_NO_SIMPLEX},
107 	{ 0x8086, 0xffff, 0x2926, 0xffff, ATA_BL_NO_SIMPLEX},
108 
109 	/*
110 	 * The ITE 8211F requires some special initialization to get DMA
111 	 * working that does not fit into the current ata driver model.
112 	 * This makes it work in PIO mode.
113 	 */
114 	{ 0x1283, 0xffff, 0x8211, 0xffff, ATA_BL_NODMA},
115 
116 	{ 0, 0, 0, 0, 0 }
117 };
118 
119 /*
120  * add drives that have DMA or other problems to this list
121  */
122 
123 atabl_t	ata_drive_blacklist[] = {
124 	{ "NEC CD-ROM DRIVE:260",	NULL,		ATA_BL_1SECTOR },
125 	{ "NEC CD-ROM DRIVE:272",	NULL,		ATA_BL_1SECTOR },
126 	{ "NEC CD-ROM DRIVE:273",	NULL,		ATA_BL_1SECTOR },
127 
128 	{ /* Mitsumi */ "FX001DE",	NULL,		ATA_BL_1SECTOR },
129 
130 	{ "fubar", NULL,
131 		(ATA_BL_NODMA |
132 		ATA_BL_1SECTOR |
133 		ATA_BL_NORVRT |
134 		ATA_BL_BOGUS |
135 		ATA_BL_BMSTATREG_PIO_BROKEN)
136 	},
137 
138 	/* Known drives that have DMA problems */
139 	{ "SAMSUNG CD-ROM SN-124",	NULL,		ATA_BL_NODMA },
140 	{ "SAMSUNG CDRW/DVD SM-352F",	NULL,		ATA_BL_NODMA },
141 	{ "QEMU DVD-ROM",		"0.8.1",	ATA_BL_NODMA },
142 	{ "QEMU DVD-ROM",		"0.8.2",	ATA_BL_NODMA },
143 	{ "QEMU CD-ROM",		"0.8.1",	ATA_BL_NODMA },
144 	{ "QEMU CD-ROM",		"0.8.2",	ATA_BL_NODMA },
145 	{ "VMware Virtual IDE Hard Drive", NULL,	ATA_BL_LBA48 },
146 
147 	NULL
148 };
149